[PATCH] arm: mxs: bcb: fix usage of second bootstream
If a second bootstream was used, there was a sanity check which was not
only wrong (using erasesize instead of writesize) but also superfluous
(we got the block from an existing cdev, so it must be in the flash
range). Simply remove it to make bcb work as expected.
Signed-off-by: Wolfram Sang
---
arch/arm/mach-mxs/bcb.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-mxs/bcb.c b/arch/arm/mach-mxs/bcb.c
index d0a3ddc..af51d24 100644
--- a/arch/arm/mach-mxs/bcb.c
+++ b/arch/arm/mach-mxs/bcb.c
@@ -236,7 +236,7 @@ static struct mx28_fcb *create_fcb(struct mtd_info *mtd,
void *buf, unsigned fw1
fcb->fw1_start_page = fw1_start_block / mtd->writesize;
fcb->fw1_sectors = DIV_ROUND_UP(fw_size, mtd->writesize);
- if (fw2_start_block != 0 && fw2_start_block < mtd->size /
mtd->erasesize) {
+ if (fw2_start_block) {
fcb->fw2_start_page = fw2_start_block / mtd->writesize;
fcb->fw2_sectors = fcb->fw1_sectors;
}
--
1.7.10.4
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[PATCH] net: miidev: really wait for auto negotiation
miidev_wait_aneg() polled the wrong bit, so link detection did fail on boards where the PHY had to come out of a powerdown mode. Signed-off-by: Wolfram Sang --- drivers/net/miidev.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/miidev.c b/drivers/net/miidev.c index b49944b..75b53e3 100644 --- a/drivers/net/miidev.c +++ b/drivers/net/miidev.c @@ -116,7 +116,7 @@ int miidev_wait_aneg(struct mii_device *mdev) return -ETIMEDOUT; } - } while (!(status & BMSR_LSTATUS)); + } while (!(status & BMSR_ANEGCOMPLETE)); return 0; } -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH V2 0/6 ] IMX i2c driver update for the PPC 85xx
This patch set prepares the PPC 85xx SOC to use the IMX i2c driver and updates
the driver with specific clock settings. The driver name is renamed "i2c-fsl".
The patch also introduces a function returning the system clock to calculate
the i2c frequency bus divider. Finally, the P2020RDB board support is updated
to test the driver on 8-bit and 16-bit I2C devices.
This patch has NOT been tested on a IMX board.
Renaud Barbier (6):
mpc85xx: i2c frequency
ppc/asm/fsl_i2c.h is removed
mpc85xx: header update
IMX driver: replace imx -> fsl
i2c: adapt the i2c-imx driver to mpc85xx machines
ppc: p2020rdb i2c support
arch/ppc/boards/freescale-p2020rdb/p2020rdb.c | 14 +-
arch/ppc/configs/p2020rdb_defconfig|3 +
arch/ppc/include/asm/fsl_i2c.h | 86 --
.../include/mach/{clocks.h => clock.h} |1 +
arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h|3 +
arch/ppc/mach-mpc85xx/speed.c | 11 +-
arch/ppc/mach-mpc85xx/time.c |2 +-
drivers/i2c/busses/Kconfig |4 +-
drivers/i2c/busses/i2c-imx.c | 324
9 files changed, 230 insertions(+), 218 deletions(-)
delete mode 100644 arch/ppc/include/asm/fsl_i2c.h
rename arch/ppc/mach-mpc85xx/include/mach/{clocks.h => clock.h} (91%)
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[PATCH 6/6] ppc: p2020rdb i2c support
Support for both i2c busses on the p2020rdb board is added and the
configuration file is updated to add the I2C driver and commands.
Signed-off-by: Renaud Barbier
---
arch/ppc/boards/freescale-p2020rdb/p2020rdb.c | 12 +++-
arch/ppc/configs/p2020rdb_defconfig |3 +++
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
index 23d752d..94b5935 100644
--- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
+++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -62,6 +63,11 @@
#define SYSCLK_50 5000
#define SYSCLK_100 1
+/* I2C busses. */
+struct i2c_platform_data i2cplat = {
+ .bitrate = 40,
+};
+
/* Ethernet. Use eTSEC3 */
static struct gfar_info_struct gfar_info[] = {
{
@@ -71,11 +77,15 @@ static struct gfar_info_struct gfar_info[] = {
},
};
-
static int devices_init(void)
{
add_cfi_flash_device(DEVICE_ID_DYNAMIC, CFG_FLASH_BASE, 16 << 20, 0);
+ add_generic_device("i2c-fsl", 0, NULL, I2C1_BASE_ADDR,
+ 0x100, IORESOURCE_MEM, &i2cplat);
+ add_generic_device("i2c-fsl", 1, NULL, I2C2_BASE_ADDR,
+ 0x100, IORESOURCE_MEM, &i2cplat);
+
/* eTSEC3 */
fsl_eth_init(3, &gfar_info[0]);
diff --git a/arch/ppc/configs/p2020rdb_defconfig
b/arch/ppc/configs/p2020rdb_defconfig
index d025a40..7690327 100644
--- a/arch/ppc/configs/p2020rdb_defconfig
+++ b/arch/ppc/configs/p2020rdb_defconfig
@@ -27,3 +27,6 @@ CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_PING=y
CONFIG_TFTP=y
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
+CONFIG_CMD_I2C=y
--
1.7.1
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[PATCH 5/6] i2c: adapt the i2c-imx driver to mpc85xx machines
A function to calculate the frequency divider and digital filter sampling rate
for the 85xx processors is added to the i2c-imx driver. Hence, this driver is
usable on IMX and 85xx machines.
Signed-off-by: Renaud Barbier
---
arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h |3 +
drivers/i2c/busses/Kconfig |4 +-
drivers/i2c/busses/i2c-imx.c| 91 ---
3 files changed, 86 insertions(+), 12 deletions(-)
diff --git a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
index bf0f7f5..d2f8bbe 100644
--- a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
+++ b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
@@ -136,4 +136,7 @@
#define GFAR_BASE_ADDR (CFG_IMMR + TSEC1_OFFSET)
#define MDIO_BASE_ADDR (CFG_IMMR + 0x24000)
+
+#define I2C1_BASE_ADDR (CFG_IMMR + 0x3000)
+#define I2C2_BASE_ADDR (CFG_IMMR + 0x3100)
#endif /*__IMMAP_85xx__*/
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 1ce5c00..3f998ea 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -5,8 +5,8 @@
menu "I2C Hardware Bus support"
config I2C_IMX
- bool "i.MX I2C Master driver"
- depends on ARCH_IMX && !ARCH_IMX1
+ bool "MPC85xx/i.MX I2C Master driver"
+ depends on (ARCH_IMX && !ARCH_IMX1) || ARCH_MPC85XX
config I2C_OMAP
bool "OMAP I2C Master driver"
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 8bbe87b..6018204 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -23,7 +23,8 @@
*
* Desc.:
* Implementation of I2C Adapter/Algorithm Driver
- * for I2C Bus integrated in Freescale i.MX/MXC processors
+ * for I2C Bus integrated in Freescale i.MX/MXC processors and
+ * 85xx processors.
*
* Derived from Motorola GSG China I2C example driver
*
@@ -37,7 +38,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -47,7 +47,6 @@
#include
#include
-#include
#include
/* This will be the driver name */
@@ -62,6 +61,7 @@
#define FSL_I2C_I2CR 0x08/* i2c control */
#define FSL_I2C_I2SR 0x0C/* i2c status */
#define FSL_I2C_I2DR 0x10/* i2c transfer data */
+#define FSL_I2C_DFSRR 0x14/* i2c digital filter sampling rate */
/* Bits of FSL I2C registers */
#define I2SR_RXAK 0x01
@@ -86,6 +86,7 @@
*
* Duplicated divider values removed from list
*/
+#ifndef CONFIG_PPC
static u16 i2c_clk_div[50][2] = {
{ 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 },
{ 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 },
@@ -101,6 +102,7 @@ static u16 i2c_clk_div[50][2] = {
{ 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
{ 3072, 0x1E }, { 3840, 0x1F }
};
+#endif
struct fsl_i2c_struct {
void __iomem*base;
@@ -108,6 +110,7 @@ struct fsl_i2c_struct {
unsigned intdisable_delay;
int stopped;
unsigned intifdr; /* FSL_I2C_IFDR */
+ unsigned intdfsrr; /* FSL_I2C_DFSRR */
};
#define to_fsl_i2c_struct(a) container_of(a, struct fsl_i2c_struct, adapter)
@@ -216,6 +219,9 @@ static int i2c_fsl_start(struct i2c_adapter *adapter)
int result;
writeb(i2c_fsl->ifdr, base + FSL_I2C_IFDR);
+ if (i2c_fsl->dfsrr != -1)
+ writeb(i2c_fsl->dfsrr, base + FSL_I2C_DFSRR);
+
/* Enable I2C controller */
writeb(0, base + FSL_I2C_I2SR);
writeb(I2CR_IEN, base + FSL_I2C_I2CR);
@@ -255,13 +261,6 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
* controller is disabled before the STOP is sent completely */
i2c_fsl->stopped = i2c_fsl_bus_busy(adapter, 0) ? 0 : 1;
}
- if (cpu_is_mx1()) {
- /*
-* This delay caused by an i.MXL hardware bug.
-* If no (or too short) delay, no "STOP" bit will be generated.
-*/
- udelay(i2c_fsl->disable_delay);
- }
if (!i2c_fsl->stopped) {
i2c_fsl_bus_busy(adapter, 0);
@@ -272,6 +271,76 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
writeb(0, base + FSL_I2C_I2CR);
}
+#ifdef CONFIG_PPC
+static void i2c_fsl_set_clk(struct fsl_i2c_struct *i2c_fsl,
+ unsigned int rate)
+{
+ void __iomem *base;
+ unsigned int i2c_clk;
+ unsigned short divider;
+ /*
+* We want to choose an FDR/DFSR that generates an I2C bus speed that
+* is equal to or lower than the requested speed. That means that we
+* want the first divider that is equal to or greater than the
+* calculated divider.
+*/
+ u8 dfsr, fdr;
+ /* a, b and dfsr matches identifiers A,B and C respectively in AN2919 */
+ unsigned
[PATCH 4/6] IMX driver: replace imx -> fsl
The IMX i2c driver is to be used by SOCs on both the ARM and PPC architetures.
Use a more neutral name for the structure, function names and #define.
The driver name is now "i2c-fsl".
Signed-off-by: Renaud Barbier
---
drivers/i2c/busses/i2c-imx.c | 235 +-
1 files changed, 118 insertions(+), 117 deletions(-)
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index da6218f..8bbe87b 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -1,4 +1,5 @@
/*
+ * Copyright 2012 GE Intelligent Platforms, Inc
* Copyright (C) 2002 Motorola GSG-China
* 2009 Marc Kleine-Budde, Pengutronix
*
@@ -50,19 +51,19 @@
#include
/* This will be the driver name */
-#define DRIVER_NAME "i2c-imx"
+#define DRIVER_NAME "i2c-fsl"
/* Default value */
-#define IMX_I2C_BIT_RATE 10 /* 100kHz */
+#define FSL_I2C_BIT_RATE 10 /* 100kHz */
-/* IMX I2C registers */
-#define IMX_I2C_IADR 0x00/* i2c slave address */
-#define IMX_I2C_IFDR 0x04/* i2c frequency divider */
-#define IMX_I2C_I2CR 0x08/* i2c control */
-#define IMX_I2C_I2SR 0x0C/* i2c status */
-#define IMX_I2C_I2DR 0x10/* i2c transfer data */
+/* FSL I2C registers */
+#define FSL_I2C_IADR 0x00/* i2c slave address */
+#define FSL_I2C_IFDR 0x04/* i2c frequency divider */
+#define FSL_I2C_I2CR 0x08/* i2c control */
+#define FSL_I2C_I2SR 0x0C/* i2c status */
+#define FSL_I2C_I2DR 0x10/* i2c transfer data */
-/* Bits of IMX I2C registers */
+/* Bits of FSL I2C registers */
#define I2SR_RXAK 0x01
#define I2SR_IIF 0x02
#define I2SR_SRW 0x04
@@ -101,23 +102,23 @@ static u16 i2c_clk_div[50][2] = {
{ 3072, 0x1E }, { 3840, 0x1F }
};
-struct imx_i2c_struct {
+struct fsl_i2c_struct {
void __iomem*base;
struct i2c_adapter adapter;
unsigned intdisable_delay;
int stopped;
- unsigned intifdr; /* IMX_I2C_IFDR */
+ unsigned intifdr; /* FSL_I2C_IFDR */
};
-#define to_imx_i2c_struct(a) container_of(a, struct imx_i2c_struct, adapter)
+#define to_fsl_i2c_struct(a) container_of(a, struct fsl_i2c_struct, adapter)
#ifdef CONFIG_I2C_DEBUG
-static void i2c_imx_dump_reg(struct i2c_adapter *adapter)
+static void i2c_fsl_dump_reg(struct i2c_adapter *adapter)
{
- struct imx_i2c_struct *i2c_imx = to_imx_i2c_struct(adapter);
+ struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
u32 reg_cr, reg_sr;
- reg_cr = readb(i2c_imx->base + IMX_I2C_I2CR);
- reg_sr = readb(i2c_imx->base + IMX_I2C_I2SR);
+ reg_cr = readb(i2c_fsl->base + FSL_I2C_I2CR);
+ reg_sr = readb(i2c_fsl->base + FSL_I2C_I2SR);
dev_dbg(adapter->dev, "CONTROL:\t"
"IEN =%d, IIEN=%d, MSTA=%d, MTX =%d, TXAK=%d, RSTA=%d\n",
@@ -133,22 +134,22 @@ static void i2c_imx_dump_reg(struct i2c_adapter *adapter)
(reg_sr & I2SR_RXAK ? 1 : 0));
}
#else
-static inline void i2c_imx_dump_reg(struct i2c_adapter *adapter)
+static inline void i2c_fsl_dump_reg(struct i2c_adapter *adapter)
{
return;
}
#endif
-static int i2c_imx_bus_busy(struct i2c_adapter *adapter, int for_busy)
+static int i2c_fsl_bus_busy(struct i2c_adapter *adapter, int for_busy)
{
- struct imx_i2c_struct *i2c_imx = to_imx_i2c_struct(adapter);
- void __iomem *base = i2c_imx->base;
+ struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
+ void __iomem *base = i2c_fsl->base;
uint64_t start;
unsigned int temp;
start = get_time_ns();
while (1) {
- temp = readb(base + IMX_I2C_I2SR);
+ temp = readb(base + FSL_I2C_I2SR);
if (for_busy && (temp & I2SR_IBB))
break;
if (!for_busy && !(temp & I2SR_IBB))
@@ -164,15 +165,15 @@ static int i2c_imx_bus_busy(struct i2c_adapter *adapter,
int for_busy)
return 0;
}
-static int i2c_imx_trx_complete(struct i2c_adapter *adapter)
+static int i2c_fsl_trx_complete(struct i2c_adapter *adapter)
{
- struct imx_i2c_struct *i2c_imx = to_imx_i2c_struct(adapter);
- void __iomem *base = i2c_imx->base;
+ struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
+ void __iomem *base = i2c_fsl->base;
uint64_t start;
start = get_time_ns();
while (1) {
- unsigned int reg = readb(base + IMX_I2C_I2SR);
+ unsigned int reg = readb(base + FSL_I2C_I2SR);
if (reg & I2SR_IIF)
break;
@@ -181,20 +182,20 @@ static int i2c_imx_trx_complete(struct i2c_adapter
*adapter)
return -EIO;
}
}
- writeb(0, base + IMX_I2C_I2SR);
+ writeb(0, base + FSL_I2C_I2SR);
return 0;
}
-static int i2c_imx_acked(stru
[PATCH 1/6] mpc85xx: i2c frequency
A function that returns the system bus frequency used to compute the i2c bus
frequency is added for future use.
Signed-off-by: Renaud Barbier
---
arch/ppc/mach-mpc85xx/include/mach/clocks.h |1 +
arch/ppc/mach-mpc85xx/speed.c |9 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/ppc/mach-mpc85xx/include/mach/clocks.h
b/arch/ppc/mach-mpc85xx/include/mach/clocks.h
index 2ab367b..e20d685 100644
--- a/arch/ppc/mach-mpc85xx/include/mach/clocks.h
+++ b/arch/ppc/mach-mpc85xx/include/mach/clocks.h
@@ -12,5 +12,6 @@ struct sys_info {
unsigned long fsl_get_bus_freq(ulong dummy);
unsigned long fsl_get_timebase_clock(void);
+unsigned long fsl_get_i2c_freq(void);
void fsl_get_sys_info(struct sys_info *sysInfo);
#endif /* __ASM_ARCH_CLOCKS_H */
diff --git a/arch/ppc/mach-mpc85xx/speed.c b/arch/ppc/mach-mpc85xx/speed.c
index 40d3664..fff2d22 100644
--- a/arch/ppc/mach-mpc85xx/speed.c
+++ b/arch/ppc/mach-mpc85xx/speed.c
@@ -102,3 +102,12 @@ unsigned long fsl_get_timebase_clock(void)
return (sysinfo.freqSystemBus + 4UL)/8UL;
}
+
+unsigned long fsl_get_i2c_freq(void)
+{
+ struct sys_info sysinfo;
+
+ fsl_get_sys_info(&sysinfo);
+
+ return sysinfo.freqSystemBus / 2;
+}
--
1.7.1
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[PATCH 2/6] ppc/asm/fsl_i2c.h is removed
The i2c-imx driver is able to support the I2C bus on the 85xx machines
with minor modifications. It already defines register offsets. Therefore,
this header file is no longer needed.
Signed-off-by: Renaud Barbier
---
arch/ppc/include/asm/fsl_i2c.h | 86
1 files changed, 0 insertions(+), 86 deletions(-)
delete mode 100644 arch/ppc/include/asm/fsl_i2c.h
diff --git a/arch/ppc/include/asm/fsl_i2c.h b/arch/ppc/include/asm/fsl_i2c.h
deleted file mode 100644
index 4f71341..000
--- a/arch/ppc/include/asm/fsl_i2c.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Freescale I2C Controller
- *
- * Copyright 2006 Freescale Semiconductor, Inc.
- *
- * Based on earlier versions by Gleb Natapov ,
- * Xianghua Xiao , Eran Liberty (libe...@freescale.com),
- * and Jeff Brown.
- * Some bits are taken from linux driver writen by adr...@humboldt.co.uk.
- *
- * This software may be used and distributed according to the
- * terms of the GNU Public License, Version 2, incorporated
- * herein by reference.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _ASM_FSL_I2C_H_
-#define _ASM_FSL_I2C_H_
-
-#include
-
-typedef struct fsl_i2c {
-
- u8 adr; /* I2C slave address */
- u8 res0[3];
-#define I2C_ADR0xFE
-#define I2C_ADR_SHIFT 1
-#define I2C_ADR_RES~(I2C_ADR)
-
- u8 fdr; /* I2C frequency divider register */
- u8 res1[3];
-#define IC2_FDR0x3F
-#define IC2_FDR_SHIFT 0
-#define IC2_FDR_RES~(IC2_FDR)
-
- u8 cr; /* I2C control redister */
- u8 res2[3];
-#define I2C_CR_MEN 0x80
-#define I2C_CR_MIEN0x40
-#define I2C_CR_MSTA0x20
-#define I2C_CR_MTX 0x10
-#define I2C_CR_TXAK0x08
-#define I2C_CR_RSTA0x04
-#define I2C_CR_BCST0x01
-
- u8 sr; /* I2C status register */
- u8 res3[3];
-#define I2C_SR_MCF 0x80
-#define I2C_SR_MAAS0x40
-#define I2C_SR_MBB 0x20
-#define I2C_SR_MAL 0x10
-#define I2C_SR_BCSTM 0x08
-#define I2C_SR_SRW 0x04
-#define I2C_SR_MIF 0x02
-#define I2C_SR_RXAK0x01
-
- u8 dr; /* I2C data register */
- u8 res4[3];
-#define I2C_DR 0xFF
-#define I2C_DR_SHIFT 0
-#define I2C_DR_RES ~(I2C_DR)
-
- u8 dfsrr; /* I2C digital filter sampling rate register */
- u8 res5[3];
-#define I2C_DFSRR 0x3F
-#define I2C_DFSRR_SHIFT0
-#define I2C_DFSRR_RES ~(I2C_DR)
-
- /* Fill out the reserved block */
- u8 res6[0xE8];
-} fsl_i2c_t;
-
-#endif /* _ASM_I2C_H_ */
--
1.7.1
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[PATCH 3/6] mpc85xx: header update
In order to use the IMX i2c driver on the mpc85xx SOC, the file mach/clocks.h
is renamed mach/clock.h. Files using this header are updated accordingly.
Signed-off-by: Renaud Barbier
---
arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |2 +-
.../include/mach/{clocks.h => clock.h} |0
arch/ppc/mach-mpc85xx/speed.c |2 +-
arch/ppc/mach-mpc85xx/time.c |2 +-
4 files changed, 3 insertions(+), 3 deletions(-)
rename arch/ppc/mach-mpc85xx/include/mach/{clocks.h => clock.h} (100%)
diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
index 734fef9..23d752d 100644
--- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
+++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
@@ -34,7 +34,7 @@
#include
#include
#include
-#include
+#include
#include
#include
diff --git a/arch/ppc/mach-mpc85xx/include/mach/clocks.h
b/arch/ppc/mach-mpc85xx/include/mach/clock.h
similarity index 100%
rename from arch/ppc/mach-mpc85xx/include/mach/clocks.h
rename to arch/ppc/mach-mpc85xx/include/mach/clock.h
diff --git a/arch/ppc/mach-mpc85xx/speed.c b/arch/ppc/mach-mpc85xx/speed.c
index fff2d22..6778d57 100644
--- a/arch/ppc/mach-mpc85xx/speed.c
+++ b/arch/ppc/mach-mpc85xx/speed.c
@@ -30,7 +30,7 @@
#include
#include
-#include
+#include
#include
#include
diff --git a/arch/ppc/mach-mpc85xx/time.c b/arch/ppc/mach-mpc85xx/time.c
index 408a28a..c50591c 100644
--- a/arch/ppc/mach-mpc85xx/time.c
+++ b/arch/ppc/mach-mpc85xx/time.c
@@ -25,7 +25,7 @@
#include
#include
#include
-#include
+#include
uint64_t ppc_clocksource_read(void)
{
--
1.7.1
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[PATCH] ARM i.MX6: query silicon revision
Read silicon revision from ???-register.
This is based on a7683867463481bfea84af4d60af832ddfb3da7f from u-boot.
The address 0x020c8260 is used and decoded. I haven't found that in my
datasheet, so I must trust the code to be correct.
At least on a SabreLite v1.0 I get the correct version though.
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx6.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index b6067d7..9c90444 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -19,7 +19,7 @@
#include
#include
#include
-#include
+#include
#include "gpio.h"
@@ -35,6 +35,40 @@ void *imx_gpio_base[] = {
int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
+static u32 mx6_silicon_revision;
+static char *mx6_rev_string = "unknown";
+
+int imx_silicon_revision(void)
+{
+ return mx6_silicon_revision;
+}
+
+static int query_silicon_revision(void)
+{
+ void __iomem *anatop = (void *) MX6_ANATOP_BASE_ADDR;
+ u32 rev, reg;
+
+ reg = readl(anatop + 0x260);
+ /* read mx6 variant: quad, dual, solo */
+ //rev = (reg >> 4) & 0xff000;
+ rev = (reg & 0xff) + 0x10;
+ switch (rev) {
+ case 0x10:
+ mx6_silicon_revision = IMX_CHIP_REV_1_0;
+ mx6_rev_string = "1.0";
+ break;
+ case 0x11:
+ mx6_silicon_revision = IMX_CHIP_REV_1_1;
+ mx6_rev_string = "1.1";
+ break;
+ default:
+ mx6_silicon_revision = 0;
+ }
+
+ return 0;
+}
+core_initcall(query_silicon_revision);
+
void imx6_init_lowlevel(void)
{
void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
--
1.7.10.4
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[PATCH 2/2] gpio: add driver for stmpe io-expander
Add a driver for the stmpe1601 gpio block. The stmpe io-expanders have multiple
blocks (keypad, gpio...) that can be enabled and used. Only gpio is supported
atm.
This was only tested on a stmpe connected via i2c. It is also possible to
connect
via spi.
Signed-off-by: Steffen Trumtrar
---
drivers/Kconfig |1 +
drivers/gpio/Kconfig |8 +++
drivers/gpio/Makefile |1 +
drivers/gpio/gpio-stmpe.c | 155 +
4 files changed, 165 insertions(+)
create mode 100644 drivers/gpio/Kconfig
create mode 100644 drivers/gpio/gpio-stmpe.c
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 883b0e7..adf8fcd 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -18,5 +18,6 @@ source "drivers/input/Kconfig"
source "drivers/watchdog/Kconfig"
source "drivers/pwm/Kconfig"
source "drivers/dma/Kconfig"
+source "drivers/gpio/Kconfig"
endmenu
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
new file mode 100644
index 000..939cda8
--- /dev/null
+++ b/drivers/gpio/Kconfig
@@ -0,0 +1,8 @@
+menu "GPIO "
+
+config STMPE_GPIO
+ depends on I2C
+ select I2C_STMPE
+ bool "STMPE GPIO Expander"
+
+endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 7837966..da1bc21 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -1 +1,2 @@
obj-y += gpio.o
+obj-$(CONFIG_STMPE_GPIO) += gpio-stmpe.o
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
new file mode 100644
index 000..44e7ae6
--- /dev/null
+++ b/drivers/gpio/gpio-stmpe.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2012 Pengutronix
+ * Steffen Trumtrar
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define GPIO_BASE 0x80
+#define GPIO_SET (GPIO_BASE + 0x02)
+#define GPIO_CLR (GPIO_BASE + 0x04)
+#define GPIO_MP(GPIO_BASE + 0x06)
+#define GPIO_SET_DIR (GPIO_BASE + 0x08)
+#define GPIO_ED(GPIO_BASE + 0x0a)
+#define GPIO_RE(GPIO_BASE + 0x0c)
+#define GPIO_FE(GPIO_BASE + 0x0e)
+#define GPIO_PULL_UP (GPIO_BASE + 0x10)
+#define GPIO_AF(GPIO_BASE + 0x12)
+#define GPIO_LT(GPIO_BASE + 0x16)
+
+#define OFFSET(gpio) (0xff & (1 << (gpio)) ? 1 : 0)
+
+extern void __iomem *stmpe_gpio_base[];
+extern int stmpe_gpio_count;
+
+struct stmpe_gpio_chip {
+ void __iomem *base;
+ struct gpio_chip chip;
+ void *ci;
+};
+
+static void stmpe_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int
value)
+{
+ struct stmpe_gpio_chip *stmpegpio = container_of(chip, struct
stmpe_gpio_chip, chip);
+ struct stmpe_client_info *ci = (struct stmpe_client_info
*)stmpegpio->ci;
+ int ret;
+ u8 val;
+
+ ci->read_reg(ci->stmpe, GPIO_MP + OFFSET(gpio), &val);
+
+ val |= 1 << (gpio % 8);
+
+ if (value)
+ ret = ci->write_reg(ci->stmpe, GPIO_SET + OFFSET(gpio), val);
+ else
+ ret = ci->write_reg(ci->stmpe, GPIO_CLR + OFFSET(gpio), val);
+
+ if (ret)
+ dev_err(chip->dev, "write failed!\n");
+}
+
+static int stmpe_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+{
+ struct stmpe_gpio_chip *stmpegpio = container_of(chip, struct
stmpe_gpio_chip, chip);
+ struct stmpe_client_info *ci = (struct stmpe_client_info
*)stmpegpio->ci;
+ int ret;
+ u8 val;
+
+ ci->read_reg(ci->stmpe, GPIO_SET_DIR + OFFSET(gpio), &val);
+ val &= ~(1 << (gpio % 8));
+ ret = ci->write_reg(ci->stmpe, GPIO_SET_DIR + OFFSET(gpio), val);
+
+ if (ret)
+ dev_err(chip->dev, "couldn't change direction. Write
failed!\n");
+
+ return 0;
+}
+
+static int stmpe_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
int value)
+{
+ struct stmpe_gpio_chip *stmpegpio = container_of(chip, struct
stmpe_gpio_chip, chip);
+ struct stmpe_client_info *ci = (struct stmpe_client_info
*)stmpegpio->ci;
+ int ret;
+ u8 val;
+
+ ci->read_reg(ci->stmpe, GPIO_SET_DIR + OFFSET(gpio), &val);
+ val |= 1 << (gpio % 8);
+ ret = ci->write_reg(ci->stmpe, GPIO_SET_DIR + OFFSET(gpio), val);
+
+ stmpe_gpio_set_value(chip, gpio, value);
+
+ if (ret)
+ dev_err(chip->dev, "couldn't change direction. Write
failed!\n");
+
+ return 0;
+}
+
+static int stmpe_gpio_get_value(struct gpio_chip *c
[PATCH 0/2] Add stmpe mfd
Hi all, this adds support for a stmpe1601 mfd connected via i2c. This was only tested with the gpiolib support from the previous patch-series "ARM i.MX: add gpiolib support". Greetings, Steffen Steffen Trumtrar (2): mfd: add stmpe-i2c driver gpio: add driver for stmpe io-expander drivers/Kconfig |1 + drivers/gpio/Kconfig |8 +++ drivers/gpio/Makefile |1 + drivers/gpio/gpio-stmpe.c | 155 ++ drivers/mfd/Kconfig |4 ++ drivers/mfd/Makefile |1 + drivers/mfd/stmpe-i2c.c | 166 + include/mfd/stmpe-i2c.h | 55 +++ 8 files changed, 391 insertions(+) create mode 100644 drivers/gpio/Kconfig create mode 100644 drivers/gpio/gpio-stmpe.c create mode 100644 drivers/mfd/stmpe-i2c.c create mode 100644 include/mfd/stmpe-i2c.h -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/2] mfd: add stmpe-i2c driver
The stmpe mfds can be connected via i2c and spi. This driver provides the basic
infrastructure for the i2c kind. It can be added as a normal i2c-device in the
board code. To enable functions a platform_data struct has to be provided, that
describes what parts of the chip are to be used.
Signed-off-by: Steffen Trumtrar
---
drivers/mfd/Kconfig |4 ++
drivers/mfd/Makefile|1 +
drivers/mfd/stmpe-i2c.c | 166 +++
include/mfd/stmpe-i2c.h | 55
4 files changed, 226 insertions(+)
create mode 100644 drivers/mfd/stmpe-i2c.c
create mode 100644 include/mfd/stmpe-i2c.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index af67935..20eef86 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -33,4 +33,8 @@ config I2C_TWL6030
select I2C_TWLCORE
bool "TWL6030 driver"
+config I2C_STMPE
+ depends on I2C
+ bool "STMPE-i2c driver"
+
endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index e11223b..792ae2d 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_I2C_LP3972) += lp3972.o
obj-$(CONFIG_I2C_TWLCORE) += twl-core.o
obj-$(CONFIG_I2C_TWL4030) += twl4030.o
obj-$(CONFIG_I2C_TWL6030) += twl6030.o
+obj-$(CONFIG_I2C_STMPE) += stmpe-i2c.o
diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c
new file mode 100644
index 000..a0cfa75
--- /dev/null
+++ b/drivers/mfd/stmpe-i2c.c
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2012 Pengutronix
+ * Steffen Trumtrar
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#define DRIVERNAME "stmpe-i2c"
+
+#define to_stmpe(a)container_of(a, struct stmpe, cdev)
+
+static struct stmpe *stmpe_dev;
+
+struct stmpe *stmpe_get(void)
+{
+ if (!stmpe_dev)
+ return NULL;
+
+ return stmpe_dev;
+}
+EXPORT_SYMBOL(stmpe_get);
+
+int stmpe_reg_read(struct stmpe *stmpe, u32 reg, u8 *val)
+{
+ int ret;
+
+ ret = i2c_read_reg(stmpe->client, reg, val, 1);
+
+ return ret == 1 ? 0 : ret;
+}
+EXPORT_SYMBOL(stmpe_reg_read)
+
+int stmpe_reg_write(struct stmpe *stmpe, u32 reg, u8 val)
+{
+ int ret;
+
+ ret = i2c_write_reg(stmpe->client, reg, &val, 1);
+
+ return ret == 1 ? 0 : ret;
+}
+EXPORT_SYMBOL(stmpe_reg_write)
+
+int stmpe_set_bits(struct stmpe *stmpe, u32 reg, u8 mask, u8 val)
+{
+ u8 tmp;
+ int err;
+
+ err = stmpe_reg_read(stmpe, reg, &tmp);
+ tmp = (tmp & ~mask) | val;
+
+ if (!err)
+ err = stmpe_reg_write(stmpe, reg, tmp);
+
+ return err;
+}
+EXPORT_SYMBOL(stmpe_set_bits);
+
+static ssize_t stmpe_read(struct cdev *cdev, void *_buf, size_t count, loff_t
offset, ulong flags)
+{
+ struct stmpe *stmpe = to_stmpe(cdev);
+ u8 *buf = _buf;
+ size_t i = count;
+ int err;
+
+ while (i) {
+ err = stmpe_reg_read(stmpe, offset, buf);
+ if (err)
+ return (ssize_t)err;
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
+
+static ssize_t stmpe_write(struct cdev *cdev, const void *_buf, size_t count,
loff_t offset, ulong flags)
+{
+ struct stmpe *stmpe = to_stmpe(cdev);
+ const u8 *buf = _buf;
+ size_t i = count;
+ int err;
+
+ while (i) {
+ err = stmpe_reg_write(stmpe, offset, *buf);
+ if (err)
+ return (ssize_t)err;
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
+
+static struct file_operations stmpe_fops = {
+ .lseek = dev_lseek_default,
+ .read = stmpe_read,
+ .write = stmpe_write,
+};
+
+static struct stmpe_client_info i2c_ci = {
+ .read_reg = stmpe_reg_read,
+ .write_reg = stmpe_reg_write,
+};
+
+static int stmpe_probe(struct device_d *dev)
+{
+ struct stmpe_platform_data *pdata = dev->platform_data;
+
+ if (!pdata) {
+ dev_dbg(dev, "no platform data\n");
+ return -ENODEV;
+ }
+
+ if (stmpe_dev)
+ return -EBUSY;
+
+ stmpe_dev = xzalloc(sizeof(struct stmpe));
+ stmpe_dev->cdev.name = DRIVERNAME;
+ stmpe_dev->client = to_i2c_client(dev);
+ stmpe_dev->cdev.size = 191; /* 191 known registers */
+ stmpe_dev->cdev.dev = dev;
+ stmpe_dev
[PATCH 02/10] ARM i.MX: switch to gpiolib support
From: Sascha Hauer
Signed-off-by: Sascha Hauer
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/gpio.c | 91 ++
1 file changed, 59 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-imx/gpio.c b/arch/arm/mach-imx/gpio.c
index fdee20b..370b555 100644
--- a/arch/arm/mach-imx/gpio.c
+++ b/arch/arm/mach-imx/gpio.c
@@ -27,7 +27,8 @@
#include
#include
#include
-#include
+#include
+#include
#if defined CONFIG_ARCH_IMX1 || defined CONFIG_ARCH_IMX21 || defined
CONFIG_ARCH_IMX27
#define GPIO_DR0x1c
@@ -51,18 +52,15 @@
extern void __iomem *imx_gpio_base[];
extern int imx_gpio_count;
-static void __iomem *gpio_get_base(unsigned gpio)
-{
- if (gpio >= imx_gpio_count)
- return NULL;
-
- return imx_gpio_base[gpio / 32];
-}
+struct imx_gpio_chip {
+ void __iomem *base;
+ struct gpio_chip chip;
+};
-void gpio_set_value(unsigned gpio, int value)
+static void imx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int
value)
{
- void __iomem *base = gpio_get_base(gpio);
- int shift = gpio % 32;
+ struct imx_gpio_chip *imxgpio = container_of(chip, struct
imx_gpio_chip, chip);
+ void __iomem *base = imxgpio->base;
u32 val;
if (!base)
@@ -71,59 +69,88 @@ void gpio_set_value(unsigned gpio, int value)
val = readl(base + GPIO_DR);
if (value)
- val |= 1 << shift;
+ val |= 1 << gpio;
else
- val &= ~(1 << shift);
+ val &= ~(1 << gpio);
writel(val, base + GPIO_DR);
}
-int gpio_direction_input(unsigned gpio)
+static int imx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
- void __iomem *base = gpio_get_base(gpio);
- int shift = gpio % 32;
+ struct imx_gpio_chip *imxgpio = container_of(chip, struct
imx_gpio_chip, chip);
+ void __iomem *base = imxgpio->base;
u32 val;
if (!base)
return -EINVAL;
val = readl(base + GPIO_GDIR);
- val &= ~(1 << shift);
+ val &= ~(1 << gpio);
writel(val, base + GPIO_GDIR);
return 0;
}
-int gpio_direction_output(unsigned gpio, int value)
+static int imx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
int value)
{
- void __iomem *base = gpio_get_base(gpio);
- int shift = gpio % 32;
+ struct imx_gpio_chip *imxgpio = container_of(chip, struct
imx_gpio_chip, chip);
+ void __iomem *base = imxgpio->base;
u32 val;
- if (!base)
- return -EINVAL;
-
- gpio_set_value(gpio, value);
+ gpio_set_value(gpio + chip->base, value);
val = readl(base + GPIO_GDIR);
- val |= 1 << shift;
+ val |= 1 << gpio;
writel(val, base + GPIO_GDIR);
return 0;
}
-int gpio_get_value(unsigned gpio)
+static int imx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
{
- void __iomem *base = gpio_get_base(gpio);
- int shift = gpio % 32;
+ struct imx_gpio_chip *imxgpio = container_of(chip, struct
imx_gpio_chip, chip);
+ void __iomem *base = imxgpio->base;
u32 val;
- if (!base)
- return -EINVAL;
-
val = readl(base + GPIO_PSR);
- return val & (1 << shift) ? 1 : 0;
+ return val & (1 << gpio) ? 1 : 0;
}
+static struct gpio_ops imx_gpio_ops = {
+ .direction_input = imx_gpio_direction_input,
+ .direction_output = imx_gpio_direction_output,
+ .get = imx_gpio_get_value,
+ .set = imx_gpio_set_value,
+};
+
+static int imx_gpio_probe(struct device_d *dev)
+{
+ struct imx_gpio_chip *imxgpio;
+
+ imxgpio = xzalloc(sizeof(*imxgpio));
+ imxgpio->base = dev_request_mem_region(dev, 0);
+ imxgpio->chip.ops = &imx_gpio_ops;
+ imxgpio->chip.base = -1;
+ imxgpio->chip.ngpio = 32;
+ imxgpio->chip.dev = dev;
+ gpiochip_add(&imxgpio->chip);
+
+ dev_info(dev, "probed gpiochip%d with base %d\n", dev->id,
imxgpio->chip.base);
+
+ return 0;
+}
+
+static struct driver_d imx_gpio_driver = {
+ .name = "imx-gpio",
+ .probe = imx_gpio_probe,
+};
+
+static int imx_gpio_add(void)
+{
+ register_driver(&imx_gpio_driver);
+ return 0;
+}
+coredevice_initcall(imx_gpio_add);
--
1.7.10.4
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[PATCH 09/10] ARM i.MX1: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx1.c |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c
index 742a260..1ce0e39 100644
--- a/arch/arm/mach-imx/imx1.c
+++ b/arch/arm/mach-imx/imx1.c
@@ -28,4 +28,13 @@ void *imx_gpio_base[] = {
int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
+static int imx1_init(void)
+{
+ add_generic_device("imx-gpio", 0, NULL, 0x0021c000, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x0021c100, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x0021c200, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, 0x0021c300, 0x100,
IORESOURCE_MEM, NULL);
+ return 0;
+}
+coredevice_initcall(imx1_init);
--
1.7.10.4
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[PATCH 00/10] ARM i.MX: add gpiolib support
Hi all, this patch series moves mach-imx to gpiolib support. This was tested on imx6 and at least compiles on other SoC-defconfigs. Greetings, Steffen Sascha Hauer (2): add gpiolib support ARM i.MX: switch to gpiolib support Steffen Trumtrar (8): ARM i.MX5: add imx-gpio devices ARM i.MX6: add imx-gpio devices ARM i.MX53: add imx-gpio devices ARM i.MX35: add imx-gpio devices ARM i.MX27: add imx-gpio devices ARM i.MX25: add imx-gpio devices ARM i.MX1: add imx-gpio devices ARM i.MX21: add imx-gpio devices arch/arm/mach-imx/gpio.c | 91 +++--- arch/arm/mach-imx/imx1.c |9 +++ arch/arm/mach-imx/imx21.c | 15 + arch/arm/mach-imx/imx25.c |4 ++ arch/arm/mach-imx/imx27.c |6 ++ arch/arm/mach-imx/imx35.c |4 ++ arch/arm/mach-imx/imx51.c |5 ++ arch/arm/mach-imx/imx53.c |7 +++ arch/arm/mach-imx/imx6.c | 14 + drivers/Makefile |1 + drivers/gpio/Makefile |1 + drivers/gpio/gpio.c | 134 + include/gpio.h| 32 --- 13 files changed, 283 insertions(+), 40 deletions(-) create mode 100644 drivers/gpio/Makefile create mode 100644 drivers/gpio/gpio.c -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 05/10] ARM i.MX53: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx53.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 7c679bb..4071dce 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -88,6 +88,13 @@ static int imx53_init(void)
add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 0, NULL, MX53_GPIO1_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, MX53_GPIO2_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, MX53_GPIO3_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, MX53_GPIO4_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 4, NULL, MX53_GPIO5_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 5, NULL, MX53_GPIO6_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 6, NULL, MX53_GPIO7_BASE_ADDR, 0x1000,
IORESOURCE_MEM, NULL);
return 0;
}
coredevice_initcall(imx53_init);
--
1.7.10.4
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[PATCH 03/10] ARM i.MX5: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx51.c |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index 53205a9..506a7d9 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -89,6 +89,11 @@ static int imx51_init(void)
add_generic_device("imx_iim", 0, NULL, MX51_IIM_BASE_ADDR, SZ_4K,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 0, NULL, 0x73f84000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x73f88000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x73f8c000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, 0x73f9, 0x1000,
IORESOURCE_MEM, NULL);
+
return 0;
}
coredevice_initcall(imx51_init);
--
1.7.10.4
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[PATCH 01/10] add gpiolib support
From: Sascha Hauer
Signed-off-by: Sascha Hauer
Signed-off-by: Steffen Trumtrar
---
drivers/Makefile |1 +
drivers/gpio/Makefile |1 +
drivers/gpio/gpio.c | 134 +
include/gpio.h| 32 +---
4 files changed, 160 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpio/Makefile
create mode 100644 drivers/gpio/gpio.c
diff --git a/drivers/Makefile b/drivers/Makefile
index ea3263f..1d14e6c 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_PWM) += pwm/
obj-y += input/
obj-y += dma/
obj-y += watchdog/
+obj-y += gpio/
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
new file mode 100644
index 000..7837966
--- /dev/null
+++ b/drivers/gpio/Makefile
@@ -0,0 +1 @@
+obj-y += gpio.o
diff --git a/drivers/gpio/gpio.c b/drivers/gpio/gpio.c
new file mode 100644
index 000..6ad8d27
--- /dev/null
+++ b/drivers/gpio/gpio.c
@@ -0,0 +1,134 @@
+#include
+#include
+#include
+
+static LIST_HEAD(chip_list);
+
+#define ARCH_NR_GPIOS 256
+
+static struct gpio_chip *gpio_desc[ARCH_NR_GPIOS];
+
+static int gpio_is_valid(unsigned gpio)
+{
+ if (gpio < ARCH_NR_GPIOS)
+ return 1;
+ return 0;
+}
+
+void gpio_set_value(unsigned gpio, int value)
+{
+ struct gpio_chip *chip = gpio_desc[gpio];
+
+ if (!gpio_is_valid(gpio))
+ return;
+ if (!chip)
+ return;
+ if (!chip->ops->set)
+ return;
+ chip->ops->set(chip, gpio - chip->base, value);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+int gpio_get_value(unsigned gpio)
+{
+ struct gpio_chip *chip = gpio_desc[gpio];
+
+ if (!gpio_is_valid(gpio))
+ return -EINVAL;
+ if (!chip)
+ return -ENODEV;
+ if (!chip->ops->get)
+ return -ENOSYS;
+ return chip->ops->get(chip, gpio - chip->base);
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ struct gpio_chip *chip = gpio_desc[gpio];
+
+ if (!gpio_is_valid(gpio))
+ return -EINVAL;
+ if (!chip)
+ return -ENODEV;
+ if (!chip->ops->direction_output)
+ return -ENOSYS;
+ return chip->ops->direction_output(chip, gpio - chip->base, value);
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+int gpio_direction_input(unsigned gpio)
+{
+ struct gpio_chip *chip = gpio_desc[gpio];
+
+ if (!gpio_is_valid(gpio))
+ return -EINVAL;
+ if (!chip)
+ return -ENODEV;
+ if (!chip->ops->direction_input)
+ return -ENOSYS;
+ return chip->ops->direction_input(chip, gpio - chip->base);
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+static int gpiochip_find_base(int start, int ngpio)
+{
+ int i;
+ int spare = 0;
+ int base = -ENOSPC;
+
+ if (start < 0)
+ start = 0;
+
+ for (i = start; i < ARCH_NR_GPIOS; i++) {
+ struct gpio_chip *chip = gpio_desc[i];
+
+ if (!chip) {
+ spare++;
+ if (spare == ngpio) {
+ base = i + 1 - ngpio;
+ break;
+ }
+ } else {
+ spare = 0;
+ i += chip->ngpio - 1;
+ }
+ }
+
+ if (gpio_is_valid(base))
+ debug("%s: found new base at %d\n", __func__, base);
+ return base;
+}
+
+int gpiochip_add(struct gpio_chip *chip)
+{
+ int base, i;
+
+ base = gpiochip_find_base(chip->base, chip->ngpio);
+ if (base < 0)
+ return base;
+
+ if (chip->base >= 0 && chip->base != base)
+ return -EBUSY;
+
+ chip->base = base;
+
+ list_add_tail(&chip->list, &chip_list);
+
+ for (i = chip->base; i < chip->base + chip->ngpio; i++)
+ gpio_desc[i] = chip;
+
+ return 0;
+}
+
+int gpio_get_num(struct device_d *dev, int gpio)
+{
+ struct gpio_chip *chip;
+
+ list_for_each_entry(chip, &chip_list, list) {
+ if (chip->dev == dev)
+ return chip->base + gpio;
+ }
+
+ return -ENODEV;
+}
diff --git a/include/gpio.h b/include/gpio.h
index b7d8402..903fa06 100644
--- a/include/gpio.h
+++ b/include/gpio.h
@@ -3,12 +3,28 @@
#include
-static inline int gpio_request(unsigned gpio, const char *label)
-{
- return 0;
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-}
+struct gpio_chip;
+
+struct gpio_ops {
+ int (*direction_input)(struct gpio_chip *chip, unsigned offset);
+ int (*direction_output)(struct gpio_chip *chip, unsigned offset, int
value);
+ int (*get)(struct gpio_chip *chip, unsigned offset);
+ void (*set)(struct gpio_chip *chip, unsigned offset, int value);
+};
+
+struct gpio_chip {
+ struct device_d *dev;
+
+ int base;
[PATCH 08/10] ARM i.MX25: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx25.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c
index 19a2909..7552af3 100644
--- a/arch/arm/mach-imx/imx25.c
+++ b/arch/arm/mach-imx/imx25.c
@@ -59,6 +59,10 @@ static int imx25_init(void)
add_generic_device("imx_iim", 0, NULL, IMX_IIM_BASE, SZ_4K,
IORESOURCE_MEM, &imx25_iim_pdata);
+ add_generic_device("imx-gpio", 0, NULL, 0x53fcc000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x53fd, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x53fa4000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, 0x53f9c000, 0x1000,
IORESOURCE_MEM, NULL);
return 0;
}
coredevice_initcall(imx25_init);
--
1.7.10.4
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[PATCH 04/10] ARM i.MX6: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx6.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index a443343..b6067d7 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -69,3 +69,17 @@ void imx6_init_lowlevel(void)
writel(0x, 0x020c407c);
writel(0x, 0x020c4080);
}
+
+static int imx6_init(void)
+{
+ add_generic_device("imx-gpio", 0, NULL, MX6_GPIO1_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, MX6_GPIO2_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, MX6_GPIO3_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, MX6_GPIO4_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 4, NULL, MX6_GPIO5_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 5, NULL, MX6_GPIO6_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 6, NULL, MX6_GPIO7_BASE_ADDR, 0x4000,
IORESOURCE_MEM, NULL);
+
+ return 0;
+}
+coredevice_initcall(imx6_init);
--
1.7.10.4
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[PATCH 10/10] ARM i.MX21: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx21.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/mach-imx/imx21.c b/arch/arm/mach-imx/imx21.c
index bbef33d..19e9bd0 100644
--- a/arch/arm/mach-imx/imx21.c
+++ b/arch/arm/mach-imx/imx21.c
@@ -39,3 +39,18 @@ void *imx_gpio_base[] = {
int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
+static int imx21_init(void)
+{
+ add_generic_device("imx_iim", 0, NULL, MX51_IIM_BASE_ADDR, SZ_4K,
+ IORESOURCE_MEM, NULL);
+
+ add_generic_device("imx-gpio", 0, NULL, 0x10015000, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x10015100, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x10015200, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, 0x10015300, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 4, NULL, 0x10015400, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 5, NULL, 0x10015500, 0x100,
IORESOURCE_MEM, NULL);
+
+ return 0;
+}
+coredevice_initcall(imx21_init);
--
1.7.10.4
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[PATCH 07/10] ARM i.MX27: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx27.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/imx27.c b/arch/arm/mach-imx/imx27.c
index 1af291d..cf5ec21 100644
--- a/arch/arm/mach-imx/imx27.c
+++ b/arch/arm/mach-imx/imx27.c
@@ -86,6 +86,12 @@ static int imx27_init(void)
imx27_init_max();
+ add_generic_device("imx-gpio", 0, NULL, 0x10015000, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x10015100, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x10015200, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 3, NULL, 0x10015300, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 4, NULL, 0x10015400, 0x100,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 5, NULL, 0x10015500, 0x100,
IORESOURCE_MEM, NULL);
return 0;
}
coredevice_initcall(imx27_init);
--
1.7.10.4
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[PATCH 06/10] ARM i.MX35: add imx-gpio devices
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-imx/imx35.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c
index fe0c99e..066436c 100644
--- a/arch/arm/mach-imx/imx35.c
+++ b/arch/arm/mach-imx/imx35.c
@@ -66,6 +66,10 @@ static int imx35_init(void)
add_generic_device("imx_iim", 0, NULL, IMX_IIM_BASE, SZ_4K,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 0, NULL, 0x53fcc000, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 1, NULL, 0x53fd, 0x1000,
IORESOURCE_MEM, NULL);
+ add_generic_device("imx-gpio", 2, NULL, 0x53fa4000, 0x1000,
IORESOURCE_MEM, NULL);
+
return 0;
}
coredevice_initcall(imx35_init);
--
1.7.10.4
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Re: [PATCH v3 0/5] rewritten memtest command
Hi Alexander, Apart from the comment I made the series looks good to me. Sascha On Thu, Aug 30, 2012 at 12:29:49PM +0200, Alexander Aring wrote: > Rewritten memtest command. > Added new section data which is between text and bss. > Only tested on arm architecture. > > Alexander Aring (5): > mmu: make remap_range global accessable > memory: add function address_in_sdram_regions > barebox-data: add barebox-data sections > memtest: remove memtest command > memtest: add rewritten memtest command > > arch/arm/cpu/mmu.c |4 +- > arch/arm/include/asm/mmu.h | 13 + > arch/arm/lib/barebox.lds.S |6 +- > arch/blackfin/boards/ipe337/barebox.lds.S|6 +- > arch/blackfin/include/asm/mmu.h | 15 + > arch/mips/include/asm/mmu.h | 15 + > arch/mips/lib/barebox.lds.S |5 +- > arch/nios2/cpu/barebox.lds.S |5 +- > arch/nios2/include/asm/mmu.h | 15 + > arch/openrisc/include/asm/mmu.h | 15 + > arch/ppc/boards/freescale-p2020rdb/barebox.lds.S |6 +- > arch/ppc/boards/pcm030/barebox.lds.S |5 +- > arch/ppc/include/asm/mmu.h | 10 + > arch/x86/include/asm/mmu.h | 15 + > arch/x86/lib/barebox.lds.S |5 +- > commands/Kconfig | 11 +- > commands/Makefile|2 +- > commands/memtest.c | 850 > +++--- > common/memory.c | 17 + > include/asm-generic/sections.h |1 + > include/common.h |3 + > include/memory.h |6 + > 22 files changed, 732 insertions(+), 298 deletions(-) > create mode 100644 arch/blackfin/include/asm/mmu.h > create mode 100644 arch/mips/include/asm/mmu.h > create mode 100644 arch/nios2/include/asm/mmu.h > create mode 100644 arch/openrisc/include/asm/mmu.h > create mode 100644 arch/x86/include/asm/mmu.h > > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 3/5] barebox-data: add barebox-data sections
On Thu, Aug 30, 2012 at 12:29:52PM +0200, Alexander Aring wrote:
> Add barebox-data section in arm branch to get complete
> barebox regions in sdram regions tree.
>
> Signed-off-by: Alexander Aring
> ---
> arch/arm/lib/barebox.lds.S |6 +-
> arch/blackfin/boards/ipe337/barebox.lds.S|6 +-
> arch/mips/lib/barebox.lds.S |5 -
> arch/nios2/cpu/barebox.lds.S |5 +++--
> arch/ppc/boards/freescale-p2020rdb/barebox.lds.S |6 --
> arch/ppc/boards/pcm030/barebox.lds.S |5 +++--
> arch/x86/lib/barebox.lds.S |5 -
> common/memory.c |4
> include/asm-generic/sections.h |1 +
> 9 files changed, 33 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
> index e0bae70..ae0b760 100644
> --- a/arch/arm/lib/barebox.lds.S
> +++ b/arch/arm/lib/barebox.lds.S
> @@ -70,7 +70,9 @@ SECTIONS
> __stop_unwind_tab = .;
> }
> #endif
> - _etext = .; /* End of text and rodata section */
> + _etext = . - 1; /* End of text and rodata section */
I am not sure this is a good idea. Looking at it this indeed seems to be
correct. Anyway, at least in the Linux kernel I can find things like:
codesize = (unsigned long)_etext - (unsigned long)_text;
If we have _etext = . the above results in the correct codesize, but if
we change this to _etext = . - 1 we would have to do
codesize = (unsigned long)_etext - (unsigned long)_text + 1;
instead.
Everyone else including the kernel and the standard linker scripts from
ld have _etext = .; so I vote for keeping it that way.
> @@ -83,6 +85,8 @@ SECTIONS
> __usymtab : { BAREBOX_SYMS }
> ___usymtab_end = .;
>
> + _edata - . -1;
s/-/=/
Sascha
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH 0/3] ARM i.MX6: basic USB H1 support
Le Fri, 31 Aug 2012 09:33:06 +0200, Sascha Hauer a écrit : > I also applied 3/3 from which I know that it currently does not help > Eric. It's a step in the right direction and I hope that there might > be something else wrong on his hardware. > > BTW, Eric, does the hub work under Linux? It also should not work there > when Linux also uses 100ms. > yes it works fine under Linux Eric ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] NAND Flash SMC timings update (nwe_pulse) for calao board based on AT91SAM9G20 SoC
On Thu, Aug 30, 2012 at 09:06:06AM +0200, gregory hermant wrote:
> Hello sascha,
> It's just a typo.
> gregory
Applied now, thanks
Sascha
>
> Sascha Hauer wrote:
> > On Tue, Aug 28, 2012 at 08:40:57AM +0200, gregory hermant wrote:
> >> Signed-off-by: Gregory Hermant
> >
> > The commmit log is a bit sparse. It would be interesting if this is an
> > enhancement, fixes a problem, is needed on newer board revisions...
> >
> > Sascha
> >
> >> ---
> >> arch/arm/boards/tny-a926x/init.c |2 +-
> >> arch/arm/boards/usb-a926x/init.c |2 +-
> >> 2 files changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/arm/boards/tny-a926x/init.c
> >> b/arch/arm/boards/tny-a926x/init.c
> >> index d58132a..5538a44 100644
> >> --- a/arch/arm/boards/tny-a926x/init.c
> >> +++ b/arch/arm/boards/tny-a926x/init.c
> >> @@ -89,7 +89,7 @@ static struct sam9_smc_config tny_a9g20_nand_smc_config
> >> = {
> >>.ncs_read_pulse = 4,
> >>.nrd_pulse = 4,
> >>.ncs_write_pulse= 4,
> >> - .nwe_pulse = 2,
> >> + .nwe_pulse = 4,
> >>
> >>.read_cycle = 7,
> >>.write_cycle= 7,
> >> diff --git a/arch/arm/boards/usb-a926x/init.c
> >> b/arch/arm/boards/usb-a926x/init.c
> >> index 7e63876..00a215d 100644
> >> --- a/arch/arm/boards/usb-a926x/init.c
> >> +++ b/arch/arm/boards/usb-a926x/init.c
> >> @@ -90,7 +90,7 @@ static struct sam9_smc_config usb_a9g20_nand_smc_config
> >> = {
> >>.ncs_read_pulse = 4,
> >>.nrd_pulse = 4,
> >>.ncs_write_pulse= 4,
> >> - .nwe_pulse = 2,
> >> + .nwe_pulse = 4,
> >>
> >>.read_cycle = 7,
> >>.write_cycle= 7,
> >> --
> >> 1.5.6.3
> >>
> >>
> >>
> >> ___
> >> barebox mailing list
> >> barebox@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/barebox
> >>
> >
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH 0/2] ARM i.MX6: Add sabrelite features
On Thu, Aug 30, 2012 at 02:58:36PM +0200, Steffen Trumtrar wrote: > This adds usb h1 and the i2c iomux to the sabrelite board. > > Steffen Trumtrar (2): > ARM i.MX6: Add usb-ehci to sabrelite > ARM i.MX6: Add i2c iomux to sabrelite Applied, thanks Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 0/3] ARM i.MX6: basic USB H1 support
On Thu, Aug 30, 2012 at 02:30:47PM +0200, Steffen Trumtrar wrote: > This series adds basic support for usb host1 on imx6q. This was tested on a > sabrelite board. > > Steffen Trumtrar (3): > ARM i.MX6: add the usbphy1 base addr > ARM i.MX6: enable usbphy1 > usb: use ep-specific pwrgood delay Applied, thanks. I also applied 3/3 from which I know that it currently does not help Eric. It's a step in the right direction and I hope that there might be something else wrong on his hardware. BTW, Eric, does the hub work under Linux? It also should not work there when Linux also uses 100ms. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 0/2] trivial: correct spellings and grammar
On Thu, Aug 30, 2012 at 01:13:58PM +0200, Steffen Trumtrar wrote: > Hi all, > > this patchseries fixes just some spelling, grammar, etc errors I > stumbled upon. > > Steffen Trumtrar (2): > trivial: fix spelling in usb code > trivial: bootm: correct grammar in error message Applied, thanks Sascha > > commands/bootm.c |2 +- > commands/usb.c |2 +- > drivers/usb/core/usb.c |4 ++-- > 3 files changed, 4 insertions(+), 4 deletions(-) > > -- > 1.7.10.4 > > > ___ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 4/5] i2c: adapt the i2c-imx driver to mpc85xx machines.
On Thu, Aug 30, 2012 at 03:00:16PM +0100, Renaud Barbier wrote: > A function to calculate the frequency divider and digital filter sampling rate > for the 85xx processors is added to the i2c-imx driver. Hence, this driver is > used on IMX and 85xx machines. > > > /* This will be the driver name */ > +#ifdef CONFIG_PPC > +#define DRIVER_NAME "i2c-mpc" > +#else > #define DRIVER_NAME "i2c-imx" > +#endif Can we run a s/imx/fsl/ over the driver in the first step? > > /* Default value */ > #define IMX_I2C_BIT_RATE 10 /* 100kHz */ > @@ -61,6 +66,7 @@ > #define IMX_I2C_I2CR 0x08/* i2c control */ > #define IMX_I2C_I2SR 0x0C/* i2c status */ > #define IMX_I2C_I2DR 0x10/* i2c transfer data */ > +#define IMX_I2C_DFSRR0x14/* i2c digital filter smapling rate */ s/smapling/sampling/ Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 3/5] mpc85xx: header update
Hi Renaud, On Thu, Aug 30, 2012 at 03:00:15PM +0100, Renaud Barbier wrote: > In order to use the IMX i2c driver on the mpc85xx SOC, the file > mach/clocks.h is renamed mach/clock.h. Files using this header are updated > accordingly. The file mach/generic.h is also added to accommodate the driver. > > Finally, there is a clean up of a line too long. Please drop this. If you are really interested in the line wrap, you can send a separate patch, but having this in an unrelated patch is not good. > return 0; > } > > + > +#define cpu_is_mx1() (0) Rather than adding a cpu_is_mx1() for ppc you can simply drop the code in the i2c driver. i.MX1 is quite old, noone uses i2c on i.MX1 and it's unlikely that someone ever will. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
