date:20121015

Re: [PATCH 1/1] designware: fix 100mps phy support

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 04:23:18PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com

Applied, thanks

Sascha

 ---
  drivers/net/designware.c |   10 ++
  1 file changed, 10 insertions(+)
 
 diff --git a/drivers/net/designware.c b/drivers/net/designware.c
 index 63b199f..7eadd92 100644
 --- a/drivers/net/designware.c
 +++ b/drivers/net/designware.c
 @@ -244,6 +244,16 @@ static void dwc_update_linkspeed(struct eth_device *edev)
   conf = ~MII_PORTSELECT;
   else
   conf |= MII_PORTSELECT;
 +
 + if ((edev-phydev-interface != PHY_INTERFACE_MODE_MII) 
 + (edev-phydev-interface != PHY_INTERFACE_MODE_GMII)) {
 +
 + if (edev-phydev-speed == 100)
 + conf |= FES_100;
 + else
 + conf = ~FES_100;
 + }
 +
   writel(conf, mac_p-conf);
  }
  
 -- 
 1.7.10.4
 
 
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Re: [PATCH 1/1] amba: add periph id RO params to the device

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 04:27:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 this will allow to knonw the pid probed
 
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com

Applied, thanks

Sascha

 ---
  drivers/amba/bus.c |7 +++
  1 file changed, 7 insertions(+)
 
 diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
 index f0a40b6..d1ab53c 100644
 --- a/drivers/amba/bus.c
 +++ b/drivers/amba/bus.c
 @@ -157,6 +157,13 @@ int amba_device_add(struct amba_device *dev)
   if (ret)
   goto err_release;
  
 + if (IS_ENABLED(CONFIG_PARAMETER)) {
 + char str[16];
 +
 + sprintf(str, 0x%08x, dev-periphid);
 + dev_add_param_fixed(dev-dev, periphid, str);
 + }
 +
   return ret;
   err_release:
   release_region(res);
 -- 
 1.7.10.4
 
 
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Re: [PATCH 2/3] mtd: add dataflash support

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 10:49:23PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 from linux 3.6
 
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 ---
  drivers/mtd/devices/Kconfig |   18 +
  drivers/mtd/devices/Makefile|1 +
  drivers/mtd/devices/mtd_dataflash.c |  882 
 +++
  include/spi/flash.h |2 +-
  4 files changed, 902 insertions(+), 1 deletion(-)
  create mode 100644 drivers/mtd/devices/mtd_dataflash.c
 
 diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
 index e6d747c..e956921 100644
 --- a/drivers/mtd/devices/Kconfig
 +++ b/drivers/mtd/devices/Kconfig
 @@ -1,6 +1,24 @@
  menu Self contained MTD devices
   depends on MTD!=n
  
 +config MTD_DATAFLASH
 + tristate Support for AT45xxx DataFlash
 + depends on SPI
 + help
 +   This enables access to AT45xxx DataFlash chips, using SPI.
 +   Sometimes DataFlash chips are packaged inside MMC-format
 +   cards; at this writing, the MMC stack won't handle those.
 +
 +config MTD_DATAFLASH_WRITE_VERIFY
 + bool Verify DataFlash page writes
 + depends on MTD_DATAFLASH
 + help
 +   This adds an extra check when data is written to the flash.
 +   It may help if you are verifying chip setup (timings etc) on
 +   your board.  There is a rare possibility that even though the
 +   device thinks the write was successful, a bit could have been
 +   flipped accidentally due to device wear or something else.
 +

What about MTD_DATAFLASH_OTP?

Sascha

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Re: [PATCH 00/12] add bus device

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 10:59:29PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 Hi,
 
 we have now a nice output per bus
 
 barebox@ST SPEARr1340 EVB:/
 # devinfo 
 devices:
 ` platfrom
  ` mem0
   ` 0x-0x3fff: /dev/ram0
  ` smp_twd
  ` mem1
   ` 0x-0x251f: /dev/defaultenv
  ` mem2
   ` 0x-0xfffe: /dev/mem
  ` designware_eth0
   ` miibus0
   ` eth0
  ` fsmc-nand
   ` nand0
` 0x-0x7fff: /dev/nand0
` 0x-0x: /dev/xloader
` 0x0001-0x0004: /dev/self_raw
` 0x0005-0x0006: /dev/env_raw
` 0x-0x0003: /dev/nand0.xloader
` 0x0004-0x0007: /dev/nand0.meminit
` 0x0008-0x0027: /dev/nand0.barebox
` 0x0028-0x0057: /dev/nand0.kernel
` 0x0058-0x01b7: /dev/nand0.rootfs
` 0x01b8-0x07f7: /dev/nand0.userfs
` 0x07f8-0x07fd: /dev/nand0.free
` 0x07fe-0x07ff: /dev/nand0.bareboxenv
  ` smi
   ` smi0
` 0x-0x007f: /dev/smi0
  ` sdhci-spear
   ` mci0
` 0x-0x1e3d: /dev/disk0
` 0x0001da00-0x1e3d1fff: /dev/disk0.0
 ` amba
  ` uart-pl0110
   ` cs0
  ` pl061_gpio0
  ` pl061_gpio1
  ` ssp-pl0220
   ` m25p0
` 0x-0x: /dev/m25p0
 ` mdio_bus
 ` usb
 ` spi
 ` i2c
 ` fb
 ` fs
  ` ramfs0
  ` devfs0
 ` net
 ` global

Look nice indeed. Why not do it simpler?


From f8e90176da267275fa25feca2b880cdf4d9f5daf Mon Sep 17 00:00:00 2001
From: Sascha Hauer s.ha...@pengutronix.de
Date: Mon, 15 Oct 2012 08:53:29 +0200
Subject: [PATCH] add bus devices

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 drivers/base/bus.c|9 +
 drivers/base/driver.c |5 +
 include/driver.h  |2 ++
 3 files changed, 16 insertions(+)

diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 69782d2..caff0af 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -25,12 +25,21 @@ static struct bus_type *get_bus_by_name(const char *name)
 
 int bus_register(struct bus_type *bus)
 {
+   int ret;
+
if (get_bus_by_name(bus-name))
return -EEXIST;
 
INIT_LIST_HEAD(bus-device_list);
INIT_LIST_HEAD(bus-driver_list);
 
+   safe_strncpy(bus-bus_dev.name, bus-name, MAX_DRIVER_NAME);
+   bus-bus_dev.id = DEVICE_ID_SINGLE;
+
+   ret = register_device(bus-bus_dev);
+   if (ret)
+   return ret;
+
list_add_tail(bus-list, bus_list);
 
return 0;
diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index 5b7286a..395546b 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -127,6 +127,11 @@ int register_device(struct device_d *new_device)
 
list_add_tail(new_device-bus_list, new_device-bus-device_list);
 
+   if (!new_device-parent) {
+   new_device-parent = new_device-bus-dev;
+   dev_add_child(new_device-parent, new_device);
+   }
+
bus_for_each_driver(new_device-bus, drv) {
if (!match(drv, new_device))
break;
diff --git a/include/driver.h b/include/driver.h
index 4918054..100eb15 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -381,6 +381,8 @@ struct bus_type {
struct list_head list;
struct list_head device_list;
struct list_head driver_list;
+
+   struct device_d bus_dev;
 };
 
 int bus_register(struct bus_type *bus);
-- 
1.7.10.4


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Re: [PATCH 1/1] designware: set parent for eth_device and miibus

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 11:05:16PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com

Applied, thanks

Sascha

 ---
  drivers/net/designware.c |2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/drivers/net/designware.c b/drivers/net/designware.c
 index bf71d15..63b199f 100644
 --- a/drivers/net/designware.c
 +++ b/drivers/net/designware.c
 @@ -419,6 +419,7 @@ static int dwc_ether_probe(struct device_d *dev)
   miibus = priv-miibus;
   edev-priv = priv;
  
 + edev-parent = dev;
   edev-init = dwc_ether_init;
   edev-open = dwc_ether_open;
   edev-send = dwc_ether_send;
 @@ -429,6 +430,7 @@ static int dwc_ether_probe(struct device_d *dev)
  
   priv-phy_addr = pdata-phy_addr;
   priv-interface = pdata-interface;
 + miibus-parent = dev;
   miibus-read = dwc_ether_mii_read;
   miibus-write = dwc_ether_mii_write;
   miibus-priv = priv;
 -- 
 1.7.10.4
 
 
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Re: [PATCH 6/6] OMAP4: clean voltage switch

2012-10-15 Thread Sascha Hauer

On Mon, Oct 15, 2012 at 02:22:40AM +0200, Vicente Bergas wrote:
  Modified voltage setting to do a clean switch.
  See: http://lists.denx.de/pipermail/u-boot/2012-March/119149.html

Could you include the commit message from the original U-Boot commit?
Having a reference to the mailing list is fine, but we should also have
the reasoning behind this patch in the commit log.

Sascha

 
  Also changed vdd_mpu and VCORE2 to 1.2 volt as in u-boot.
 
 Signed-off-by: Vicente Bergas vice...@gmail.com
 ---
  arch/arm/boards/archosg9/mux.c  |  9 +
  arch/arm/mach-omap/include/mach/omap4-clock.h   |  2 +-
  arch/arm/mach-omap/include/mach/omap4-silicon.h |  2 +-
  arch/arm/mach-omap/omap4_clock.c| 37 +-
  arch/arm/mach-omap/omap4_generic.c  | 52 
 -
  5 files changed, 46 insertions(+), 56 deletions(-)
 
 diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c
 index 7ca5057..c8695c0 100644
 --- a/arch/arm/boards/archosg9/mux.c
 +++ b/arch/arm/boards/archosg9/mux.c
 @@ -441,7 +441,7 @@ static const struct pad_conf_entry wkup_padconf_array[] = 
 {
   /* gpio_wk30   */
   { FREF_CLK3_REQ, M3 },
   /* gpio_wk7*/ /* tps62361_vsel0 */
 - { FREF_CLK4_REQ, IEN | PTU | M3 },
 + { FREF_CLK4_REQ, M3 },
  };
  
  void set_muxconf_regs(void){
 @@ -449,11 +449,4 @@ void set_muxconf_regs(void){
   core_padconf_array, ARRAY_SIZE(core_padconf_array));
   omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP,
   wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array));
 -
 - /* gpio_wk7 is used for controlling TPS on 4460 */
 - if (omap4_revision() = OMAP4460_ES1_0) {
 - writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
 - /* Enable GPIO-1 clocks before TPS initialization */
 - omap4_enable_gpio1_wup_clocks();
 - }
  }
 diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h 
 b/arch/arm/mach-omap/include/mach/omap4-clock.h
 index e5302d6..8cbc061 100644
 --- a/arch/arm/mach-omap/include/mach/omap4-clock.h
 +++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
 @@ -335,5 +335,5 @@ void omap4_lock_core_dpll_shadow(const struct dpll_param 
 *param);
  void omap4_enable_gpio1_wup_clocks(void);
  void omap4_enable_gpio_clocks(void);
  void omap4_enable_all_clocks(void);
 -void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 +void omap4_do_scale_tps62361(int vsel0_pin, u32 reg, u32 volt_mv);
  
 diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
 b/arch/arm/mach-omap/include/mach/omap4-silicon.h
 index 71ffe39..137cc88 100644
 --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
 +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
 @@ -196,6 +196,6 @@ struct dpll_param;
  void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
  void omap4_power_i2c_send(u32);
  unsigned int omap4_revision(void);
 -noinline int omap4_scale_vcores(unsigned vsel0_pin);
 +noinline int omap4_scale_vcores(int vsel0_pin);
  
  #endif
 diff --git a/arch/arm/mach-omap/omap4_clock.c 
 b/arch/arm/mach-omap/omap4_clock.c
 index 1481f16..f7927d2 100644
 --- a/arch/arm/mach-omap/omap4_clock.c
 +++ b/arch/arm/mach-omap/omap4_clock.c
 @@ -394,9 +394,38 @@ void omap4_enable_all_clocks(void)
   sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
  }
  
 -void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
 +#define GPIO_MASK0x1f
 +#define GPIO_OE  0x34
 +#define GPIO_CLEARDATAOUT0x90
 +#define GPIO_SETDATAOUT  0x94
 +
 +static void __iomem *omap4_get_gpio_base(unsigned gpio)
 +{
 + void __iomem *base;
 +
 + if (gpio  32)
 + base = (void *)0x4a310100;
 + else
 + base = (void *)(0x48053100 + ((gpio  ~GPIO_MASK)  8));
 +
 + return base;
 +}
 +
 +void omap4_do_scale_tps62361(int vsel0_pin, u32 reg, u32 volt_mv)
  {
   u32 temp, step;
 + void __iomem *base;
 + u32 val;
 +
 + /* Pull the GPIO low to select SET0 register, while we program SET1 */
 + if (vsel0_pin = 0) {
 + base = omap4_get_gpio_base(vsel0_pin);
 + val = 1  (vsel0_pin  GPIO_MASK);
 + writel(val, base + GPIO_CLEARDATAOUT);
 + val =  readl(base + GPIO_OE);
 + val = (1  (vsel0_pin  GPIO_MASK));
 + writel(val, base + GPIO_OE);
 + }
  
   step = volt_mv - TPS62361_BASE_VOLT_MV;
   step /= 10;
 @@ -411,4 +440,10 @@ void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
   if (!wait_on_value(OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT, 0,
   OMAP44XX_PRM_VC_VAL_BYPASS, LDELAY))
   puts(Scaling voltage failed for vdd_mpu from TPS\n);
 +
 + /* Pull the GPIO high to select SET1 register */
 + if (vsel0_pin = 0) {
 + val = 1  (vsel0_pin  GPIO_MASK);
 + writel(val, base +

Re: [PATCH 0/6] archosg9: improve support for tablet

2012-10-15 Thread Sascha Hauer

Hi vj,

On Mon, Oct 15, 2012 at 02:22:34AM +0200, Vicente Bergas wrote:
 This patch series solves/improves/implements:
  ttyOxxx are 0 based, so change ttyO1 to ttyO0
  change speed to 115200, there are some issues at Mbaud speed in linux
  make the archos environment more flexible: initrd and zImage names are 
 overwritable
  added definition of PSR_I_BIT and some others, remaining PSR bits renamed to 
 match the linux ones
  disable interrupts at barebox exit
  speed up initrd transfer
  cleaner voltage switching

I applied up to 4/6. 

 
 For the OMAP4: clean voltage switch patch I'm not sure if the changes are 
 compatible with other boards.
 
 Vicente Bergas (6):
   ArchosG9: changed serial port and env
   ARM: add rename PSR bits to match linux names
   ARM: ensure irqs are disabled at barebox exit
   UIMAGE: improve transfer speed
   ARM: use arm setup stack function on archosg9

This one has to wait for some time. Currently the branch containing the
Archos patches does not have this function. I try to remember that I
still have to apply it.

   OMAP4: clean voltage switch

I responded to that separately.

BTW please try to add a bit more verbose commit messages next time. For
example for the uImage patch it would have been interesting to know
which workload is affected. Things like this will help us later when
we wish to change the lines along the commit and we wish to know why
they are there anyway.

Sascha

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Re: [PATCH 3/4] reset_resource: add wakeup source

2012-10-15 Thread Jan Lübbe

On Sat, 2012-10-13 at 15:49 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
 +static const char * const wakeup_src_names[] = {
 + [WAKEUP_UKWNOWN] = unknown,
 + [WAKEUP_POWER] = power,
 + [WAKEUP_RTC] = rtc,
 + [WAKEUP_TIMER] = timer,
 + [WAKEUP_USER] = user,
 + [WAKEUP_WOL] = wakeup on lan,
 +};
 +
 +void set_wakeup_source(enum wakeup_src_type st)
 +{
 + setenv(global.system.wakeup, wakeup_src_names[st]);
 +}
 +EXPORT_SYMBOL(set_reset_source);

The EXPORT_SYMBOL should be for _wakeup_ instead of _reset_.

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Re: [PATCH 00/12] add bus device

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 09:10 Mon 15 Oct , Sascha Hauer wrote:
 On Sun, Oct 14, 2012 at 10:59:29PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
 wrote:
  Hi,
  
  we have now a nice output per bus
  
  barebox@ST SPEARr1340 EVB:/
  # devinfo 
  devices:
  ` platfrom
   ` mem0
` 0x-0x3fff: /dev/ram0
   ` smp_twd
   ` mem1
` 0x-0x251f: /dev/defaultenv
   ` mem2
` 0x-0xfffe: /dev/mem
   ` designware_eth0
` miibus0
` eth0
   ` fsmc-nand
` nand0
 ` 0x-0x7fff: /dev/nand0
 ` 0x-0x: /dev/xloader
 ` 0x0001-0x0004: /dev/self_raw
 ` 0x0005-0x0006: /dev/env_raw
 ` 0x-0x0003: /dev/nand0.xloader
 ` 0x0004-0x0007: /dev/nand0.meminit
 ` 0x0008-0x0027: /dev/nand0.barebox
 ` 0x0028-0x0057: /dev/nand0.kernel
 ` 0x0058-0x01b7: /dev/nand0.rootfs
 ` 0x01b8-0x07f7: /dev/nand0.userfs
 ` 0x07f8-0x07fd: /dev/nand0.free
 ` 0x07fe-0x07ff: /dev/nand0.bareboxenv
   ` smi
` smi0
 ` 0x-0x007f: /dev/smi0
   ` sdhci-spear
` mci0
 ` 0x-0x1e3d: /dev/disk0
 ` 0x0001da00-0x1e3d1fff: /dev/disk0.0
  ` amba
   ` uart-pl0110
` cs0
   ` pl061_gpio0
   ` pl061_gpio1
   ` ssp-pl0220
` m25p0
 ` 0x-0x: /dev/m25p0
  ` mdio_bus
  ` usb
  ` spi
  ` i2c
  ` fb
  ` fs
   ` ramfs0
   ` devfs0
  ` net
  ` global
 
 Look nice indeed. Why not do it simpler?
 
 
 From f8e90176da267275fa25feca2b880cdf4d9f5daf Mon Sep 17 00:00:00 2001
 From: Sascha Hauer s.ha...@pengutronix.de
 Date: Mon, 15 Oct 2012 08:53:29 +0200
 Subject: [PATCH] add bus devices
 
 Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
 ---
  drivers/base/bus.c|9 +
  drivers/base/driver.c |5 +
  include/driver.h  |2 ++
  3 files changed, 16 insertions(+)
 
 diff --git a/drivers/base/bus.c b/drivers/base/bus.c
 index 69782d2..caff0af 100644
 --- a/drivers/base/bus.c
 +++ b/drivers/base/bus.c
 @@ -25,12 +25,21 @@ static struct bus_type *get_bus_by_name(const char *name)
  
  int bus_register(struct bus_type *bus)
  {
 + int ret;
 +
   if (get_bus_by_name(bus-name))
   return -EEXIST;
  
   INIT_LIST_HEAD(bus-device_list);
   INIT_LIST_HEAD(bus-driver_list);
  
 + safe_strncpy(bus-bus_dev.name, bus-name, MAX_DRIVER_NAME);
 + bus-bus_dev.id = DEVICE_ID_SINGLE;
 +
 + ret = register_device(bus-bus_dev);
 + if (ret)
 + return ret;
 +
   list_add_tail(bus-list, bus_list);
  
   return 0;
 diff --git a/drivers/base/driver.c b/drivers/base/driver.c
 index 5b7286a..395546b 100644
 --- a/drivers/base/driver.c
 +++ b/drivers/base/driver.c
 @@ -127,6 +127,11 @@ int register_device(struct device_d *new_device)
  
   list_add_tail(new_device-bus_list, new_device-bus-device_list);
  
 + if (!new_device-parent) {
 + new_device-parent = new_device-bus-dev;
 + dev_add_child(new_device-parent, new_device);
and I was wanting to add global name barebox and add everyone under to it

I choose to do let the bus manage the child
and to create a device or not

as done in linux

Best Regards,
J.

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Re: [PATCH 2/3] mtd: add dataflash support

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 09:08 Mon 15 Oct , Sascha Hauer wrote:
 On Sun, Oct 14, 2012 at 10:49:23PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
 wrote:
  from linux 3.6
  
  Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
  ---
   drivers/mtd/devices/Kconfig |   18 +
   drivers/mtd/devices/Makefile|1 +
   drivers/mtd/devices/mtd_dataflash.c |  882 
  +++
   include/spi/flash.h |2 +-
   4 files changed, 902 insertions(+), 1 deletion(-)
   create mode 100644 drivers/mtd/devices/mtd_dataflash.c
  
  diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
  index e6d747c..e956921 100644
  --- a/drivers/mtd/devices/Kconfig
  +++ b/drivers/mtd/devices/Kconfig
  @@ -1,6 +1,24 @@
   menu Self contained MTD devices
  depends on MTD!=n
   
  +config MTD_DATAFLASH
  +   tristate Support for AT45xxx DataFlash
  +   depends on SPI
  +   help
  + This enables access to AT45xxx DataFlash chips, using SPI.
  + Sometimes DataFlash chips are packaged inside MMC-format
  + cards; at this writing, the MMC stack won't handle those.
  +
  +config MTD_DATAFLASH_WRITE_VERIFY
  +   bool Verify DataFlash page writes
  +   depends on MTD_DATAFLASH
  +   help
  + This adds an extra check when data is written to the flash.
  + It may help if you are verifying chip setup (timings etc) on
  + your board.  There is a rare possibility that even though the
  + device thinks the write was successful, a bit could have been
  + flipped accidentally due to device wear or something else.
  +
 
 What about MTD_DATAFLASH_OTP?
 the DATAFLASH_OTP need the MTD to have the OTP support

 which we do not have yet

 do I did not add it

Best Regards,
J.

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Re: [PATCH 0/5] BCM2835/Raspberry-Pi support

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 08:56 Mon 15 Oct , Sascha Hauer wrote:
 
 Jean-Christophe,
 
 Since you reviewed this series can I assume you give your Acked-by once
 you are happy with it?
I'm happy with it except one point that I just check with the mainline kernel
the DT

the timer as example is brcm,bcm2835-system-timer not brcm,bcm2835-cs

for gpio it's the right one

as we can agree to dt must be in sync

Best Regards,
J.
 
 Sascha
 
 On Sat, Oct 13, 2012 at 04:00:11PM +0200, Carlo Caione wrote:
  The set is the same as before except for patch 05/05
  
  Carlo Caione (5):
BCM2835: add clocksource driver
BCM2835: add gpio driver
ARM1176: add support
BCM2835: add support (arch)
Raspberry-Pi: add support (board)
  
   arch/arm/Kconfig   |   9 ++
   arch/arm/Makefile  |   2 +
   arch/arm/boards/raspberry-pi/Makefile  |   1 +
   arch/arm/boards/raspberry-pi/config.h  |   4 +
   .../arm/boards/raspberry-pi/env/init/bootargs-base |   8 +
   arch/arm/boards/raspberry-pi/env/init/hostname |   8 +
   arch/arm/boards/raspberry-pi/rpi.c |  49 ++
   arch/arm/configs/rpi_defconfig |  40 +
   arch/arm/cpu/Kconfig   |   5 +
   arch/arm/mach-bcm2835/Kconfig  |  18 +++
   arch/arm/mach-bcm2835/Makefile |   2 +
   arch/arm/mach-bcm2835/clock.c  |  39 +
   arch/arm/mach-bcm2835/core.c   | 105 +
   arch/arm/mach-bcm2835/include/mach/clkdev.h|   7 +
   arch/arm/mach-bcm2835/include/mach/clock.h |   8 +
   arch/arm/mach-bcm2835/include/mach/core.h  |  27 
   arch/arm/mach-bcm2835/include/mach/gpio.h  |   1 +
   arch/arm/mach-bcm2835/include/mach/platform.h  |  53 +++
   arch/arm/mach-bcm2835/include/mach/wd.h|  50 +++
   drivers/clocksource/Kconfig|   4 +
   drivers/clocksource/Makefile   |   1 +
   drivers/clocksource/bcm2835.c  |  95 
   drivers/gpio/Kconfig   |   4 +
   drivers/gpio/Makefile  |   1 +
   drivers/gpio/gpio-bcm2835.c| 165 
  +
   25 files changed, 706 insertions(+)
   create mode 100644 arch/arm/boards/raspberry-pi/Makefile
   create mode 100644 arch/arm/boards/raspberry-pi/config.h
   create mode 100644 arch/arm/boards/raspberry-pi/env/init/bootargs-base
   create mode 100644 arch/arm/boards/raspberry-pi/env/init/hostname
   create mode 100644 arch/arm/boards/raspberry-pi/rpi.c
   create mode 100644 arch/arm/configs/rpi_defconfig
   create mode 100644 arch/arm/mach-bcm2835/Kconfig
   create mode 100644 arch/arm/mach-bcm2835/Makefile
   create mode 100644 arch/arm/mach-bcm2835/clock.c
   create mode 100644 arch/arm/mach-bcm2835/core.c
   create mode 100644 arch/arm/mach-bcm2835/include/mach/clkdev.h
   create mode 100644 arch/arm/mach-bcm2835/include/mach/clock.h
   create mode 100644 arch/arm/mach-bcm2835/include/mach/core.h
   create mode 100644 arch/arm/mach-bcm2835/include/mach/gpio.h
   create mode 100644 arch/arm/mach-bcm2835/include/mach/platform.h
   create mode 100644 arch/arm/mach-bcm2835/include/mach/wd.h
   create mode 100644 drivers/clocksource/bcm2835.c
   create mode 100644 drivers/gpio/gpio-bcm2835.c
  
  -- 
  1.7.12.3
  
  
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[PATCH] barebox in-system update infrastructure

2012-10-15 Thread Sascha Hauer

This is an update to the barebox in-system update infrastructure
I posted some time ago.

Basically this infrastructure adds a command which calls previously
registered handlers to update barebox in flash/mmc/...

Here is an example session:

barebox@Ka-Ro tx53:/ barebox_update
Usage: barebox_update [OPTIONS] image
Update barebox to persistent media
-t target
-d device write image to device instead of handler default
Can be used for debugging purposes (-d /tmpfile)
-y  yes. Do not ask for confirmation
-f level  Set force level
-l  list registered targets

barebox@Ka-Ro tx53:/ barebox_update -l
registered update handlers:
* nand-xx30   - /dev/nand0
  mmc-1011- /dev/disk0

barebox@Ka-Ro tx53:/ barebox_update -t mmc-1011 /mnt/tftp/barebox-tx53.bin
100Mbps full duplex link detected
DHCP client bound to address 192.168.24.6
update barebox from /mnt/tftp/barebox-tx53.bin using handler mmc-1011 to 
/dev/disk0 (y/n)?
updating to /dev/disk0
update succeeded

The only user of this infrastructure currently is the i.MX internal
boot mode. For MMC/SD users this has the advantage that the update
command preserves the partition table on the MMC/SD card. For NAND
users it has the advantage that a BBT table for the i.MX BOOT ROM is
created, so that bad blocks in the area where the barebox binary
resides are automatically skipped. Also before flashing an image
it's tested whether the image to flash really is a barebox image.

Sascha


Sascha Hauer (5):
  Add in-system barebox update infrastructure
  ARM i.MX: Add barebox update handler for internal boot
  ARM i.MX51 babbage: register MMC update handler
  ARM i.MX53 loco: register MMC update handler
  ARM i.MX53 tx53: register MMC and NAND update handler

 arch/arm/boards/freescale-mx51-pdk/board.c |9 +
 arch/arm/boards/freescale-mx51-pdk/dcd-data.h  |   60 +++
 arch/arm/boards/freescale-mx51-pdk/flash_header.c  |   61 +--
 arch/arm/boards/freescale-mx53-loco/board.c|9 +
 arch/arm/boards/freescale-mx53-loco/dcd-data.h |   54 ++
 arch/arm/boards/freescale-mx53-loco/flash_header.c |   56 +-
 arch/arm/boards/karo-tx53/board.c  |   18 +
 arch/arm/boards/karo-tx53/dcd-data-1011.h  |   94 
 arch/arm/boards/karo-tx53/dcd-data-xx30.h  |  145 ++
 arch/arm/boards/karo-tx53/flash_header.c   |  248 +
 arch/arm/mach-imx/Makefile |1 +
 arch/arm/mach-imx/imx-bbu-internal.c   |  543 
 arch/arm/mach-imx/include/mach/bbu.h   |   51 ++
 arch/arm/mach-imx/include/mach/imx-flash-header.h  |2 +
 commands/Kconfig   |5 +
 commands/Makefile  |1 +
 commands/barebox-update.c  |   86 
 common/Kconfig |3 +
 common/Makefile|1 +
 common/bbu.c   |  150 ++
 include/bbu.h  |   49 ++
 21 files changed, 1299 insertions(+), 347 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-pdk/dcd-data.h
 create mode 100644 arch/arm/boards/freescale-mx53-loco/dcd-data.h
 create mode 100644 arch/arm/boards/karo-tx53/dcd-data-1011.h
 create mode 100644 arch/arm/boards/karo-tx53/dcd-data-xx30.h
 create mode 100644 arch/arm/mach-imx/imx-bbu-internal.c
 create mode 100644 arch/arm/mach-imx/include/mach/bbu.h
 create mode 100644 commands/barebox-update.c
 create mode 100644 common/bbu.c
 create mode 100644 include/bbu.h

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[PATCH 4/5] ARM i.MX53 loco: register MMC update handler

2012-10-15 Thread Sascha Hauer

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/freescale-mx53-loco/board.c|9 
 arch/arm/boards/freescale-mx53-loco/dcd-data.h |   54 +++
 arch/arm/boards/freescale-mx53-loco/flash_header.c |   56 ++--
 3 files changed, 66 insertions(+), 53 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx53-loco/dcd-data.h

diff --git a/arch/arm/boards/freescale-mx53-loco/board.c 
b/arch/arm/boards/freescale-mx53-loco/board.c
index 0678e0a..45c05c2 100644
--- a/arch/arm/boards/freescale-mx53-loco/board.c
+++ b/arch/arm/boards/freescale-mx53-loco/board.c
@@ -36,6 +36,8 @@
 #include mach/iim.h
 #include mach/imx5.h
 #include mach/revision.h
+#include mach/bbu.h
+#include mach/imx-flash-header.h
 
 #include i2c/i2c.h
 #include mfd/mc34708.h
@@ -177,6 +179,10 @@ static void loco_ehci_init(void)
add_generic_usb_ehci_device(1, MX53_OTG_BASE_ADDR + 0x200, NULL);
 }
 
+#define DCD_NAME static struct imx_dcd_v2_entry dcd_entry
+
+#include dcd-data.h
+
 static int loco_devices_init(void)
 {
 
@@ -197,6 +203,9 @@ static int loco_devices_init(void)
armlinux_set_bootparams((void *)0x7100);
armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
 
+   imx53_bbu_internal_mmc_register_handler(mmc, /dev/disk0,
+   BBU_HANDLER_FLAG_DEFAULT, dcd_entry, sizeof(dcd_entry));
+
return 0;
 }
 
diff --git a/arch/arm/boards/freescale-mx53-loco/dcd-data.h 
b/arch/arm/boards/freescale-mx53-loco/dcd-data.h
new file mode 100644
index 000..9f95fb4
--- /dev/null
+++ b/arch/arm/boards/freescale-mx53-loco/dcd-data.h
@@ -0,0 +1,54 @@
+
+DCD_NAME[] = {
+   { .addr = cpu_to_be32(0x53fa8554), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8558), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8560), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8564), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8568), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8570), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8574), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8578), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa857c), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8580), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8584), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8588), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8590), .val = cpu_to_be32(0x00300040), },
+   { .addr = cpu_to_be32(0x53fa8594), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa86f0), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa86f4), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa86fc), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa8714), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa8718), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa871c), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8720), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa8724), .val = cpu_to_be32(0x0400), },
+   { .addr = cpu_to_be32(0x53fa8728), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x53fa872c), .val = cpu_to_be32(0x0030), },
+   { .addr = cpu_to_be32(0x63fd9088), .val = cpu_to_be32(0x35343535), },
+   { .addr = cpu_to_be32(0x63fd9090), .val = cpu_to_be32(0x4d444c44), },
+   { .addr = cpu_to_be32(0x63fd907c), .val = cpu_to_be32(0x01370138), },
+   { .addr = cpu_to_be32(0x63fd9080), .val = cpu_to_be32(0x013b013c), },
+   { .addr = cpu_to_be32(0x63fd9018), .val = cpu_to_be32(0x00011740), },
+   { .addr = cpu_to_be32(0x63fd9000), .val = cpu_to_be32(0xc319), },
+   { .addr = cpu_to_be32(0x63fd900c), .val = cpu_to_be32(0x9f5152e3), },
+   { .addr = cpu_to_be32(0x63fd9010), .val = cpu_to_be32(0xb68e8a63), },
+   { .addr = cpu_to_be32(0x63fd9014), .val = cpu_to_be32(0x01ff00db), },
+   { .addr = cpu_to_be32(0x63fd902c), .val = cpu_to_be32(0x26d2), },
+   { .addr = cpu_to_be32(0x63fd9030), .val = cpu_to_be32(0x009f0e21), },
+   { .addr = cpu_to_be32(0x63fd9008), .val = cpu_to_be32(0x12273030), },
+   { .addr = cpu_to_be32(0x63fd9004), .val = cpu_to_be32(0x0002002d), },
+   { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x8032), },
+   { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x8033), },
+   { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00028031), },
+   { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x052080b0), },
+   { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x04008040), },
+   { .addr = cpu_to_be32(0x63fd901c), .val =

[PATCH 3/5] ARM i.MX51 babbage: register MMC update handler

2012-10-15 Thread Sascha Hauer

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/freescale-mx51-pdk/board.c|9 +++
 arch/arm/boards/freescale-mx51-pdk/dcd-data.h |   60 
 arch/arm/boards/freescale-mx51-pdk/flash_header.c |   61 +
 3 files changed, 72 insertions(+), 58 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-pdk/dcd-data.h

diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c 
b/arch/arm/boards/freescale-mx51-pdk/board.c
index 0adceac..9db0ed9 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -25,6 +25,7 @@
 #include partition.h
 #include fs.h
 #include fcntl.h
+#include mach/bbu.h
 #include nand.h
 #include notifier.h
 #include spi/spi.h
@@ -39,6 +40,7 @@
 #include mach/devices-imx51.h
 #include mach/revision.h
 #include mach/iim.h
+#include mach/imx-flash-header.h
 
 static struct fec_platform_data fec_info = {
.xcv_type = MII100,
@@ -235,6 +237,10 @@ static void babbage_power_init(void)
mdelay(50);
 }
 
+#define DCD_NAME static struct imx_dcd_entry dcd_entry
+
+#include dcd-data.h
+
 static int f3s_devices_init(void)
 {
spi_register_board_info(mx51_babbage_spi_board_info,
@@ -255,6 +261,9 @@ static int f3s_devices_init(void)
armlinux_set_bootparams((void *)0x9100);
armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE);
 
+   imx51_bbu_internal_mmc_register_handler(mmc, /dev/disk0,
+   BBU_HANDLER_FLAG_DEFAULT, dcd_entry, sizeof(dcd_entry));
+
return 0;
 }
 
diff --git a/arch/arm/boards/freescale-mx51-pdk/dcd-data.h 
b/arch/arm/boards/freescale-mx51-pdk/dcd-data.h
new file mode 100644
index 000..4dd6c0d
--- /dev/null
+++ b/arch/arm/boards/freescale-mx51-pdk/dcd-data.h
@@ -0,0 +1,60 @@
+
+DCD_NAME[] = {
+   { .ptr_type = 4, .addr = 0x73fa88a0, .val = 0x0200, },
+   { .ptr_type = 4, .addr = 0x73fa850c, .val = 0x20c5, },
+   { .ptr_type = 4, .addr = 0x73fa8510, .val = 0x20c5, },
+   { .ptr_type = 4, .addr = 0x73fa883c, .val = 0x0002, },
+   { .ptr_type = 4, .addr = 0x73fa8848, .val = 0x0002, },
+   { .ptr_type = 4, .addr = 0x73fa84b8, .val = 0x00e7, },
+   { .ptr_type = 4, .addr = 0x73fa84bc, .val = 0x0045, },
+   { .ptr_type = 4, .addr = 0x73fa84c0, .val = 0x0045, },
+   { .ptr_type = 4, .addr = 0x73fa84c4, .val = 0x0045, },
+   { .ptr_type = 4, .addr = 0x73fa84c8, .val = 0x0045, },
+   { .ptr_type = 4, .addr = 0x73fa8820, .val = 0x, },
+   { .ptr_type = 4, .addr = 0x73fa84a4, .val = 0x0003, },
+   { .ptr_type = 4, .addr = 0x73fa84a8, .val = 0x0003, },
+   { .ptr_type = 4, .addr = 0x73fa84ac, .val = 0x00e3, },
+   { .ptr_type = 4, .addr = 0x73fa84b0, .val = 0x00e3, },
+   { .ptr_type = 4, .addr = 0x73fa84b4, .val = 0x00e3, },
+   { .ptr_type = 4, .addr = 0x73fa84cc, .val = 0x00e3, },
+   { .ptr_type = 4, .addr = 0x73fa84d0, .val = 0x00e2, },
+   { .ptr_type = 4, .addr = 0x73fa882c, .val = 0x0004, },
+   { .ptr_type = 4, .addr = 0x73fa88a4, .val = 0x0004, },
+   { .ptr_type = 4, .addr = 0x73fa88ac, .val = 0x0004, },
+   { .ptr_type = 4, .addr = 0x73fa88b8, .val = 0x0004, },
+   { .ptr_type = 4, .addr = 0x83fd9000, .val = 0x82a2, },
+   { .ptr_type = 4, .addr = 0x83fd9008, .val = 0x82a2, },
+   { .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000ad0d0, },
+   { .ptr_type = 4, .addr = 0x83fd9004, .val = 0x3f3584ab, },
+   { .ptr_type = 4, .addr = 0x83fd900c, .val = 0x3f3584ab, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x801a, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x801b, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00448019, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x07328018, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x8010, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x8010, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x06328018, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x03808019, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00408019, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x8000, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x801e, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x801f, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x801d, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0732801c, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x8014, },
+   { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x8014, },
+   { .ptr_type

[PATCH 2/5] ARM i.MX: Add barebox update handler for internal boot

2012-10-15 Thread Sascha Hauer

This adds support for an update handler for internal boot. Currently
handled are:

- v1 MMC/SD
- v2 MMC/SD
- v2 NAND

where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53.

This code intentionally does not use the DCD data compiled into every
i.MX internal boot image. This makes it possible to make a pure second
stage barebox bootable on i.MX internal boot devices later.

This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53
board.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/mach-imx/Makefile|1 +
 arch/arm/mach-imx/imx-bbu-internal.c  |  543 +
 arch/arm/mach-imx/include/mach/bbu.h  |   51 ++
 arch/arm/mach-imx/include/mach/imx-flash-header.h |2 +
 4 files changed, 597 insertions(+)
 create mode 100644 arch/arm/mach-imx/imx-bbu-internal.c
 create mode 100644 arch/arm/mach-imx/include/mach/bbu.h

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e5ef78a..259733e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -16,3 +16,4 @@ pbl-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += 
external-nand-boot.o
 obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-pfd.o
 obj-y += devices.o imx.o
 obj-y += boot.o
+obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o
diff --git a/arch/arm/mach-imx/imx-bbu-internal.c 
b/arch/arm/mach-imx/imx-bbu-internal.c
new file mode 100644
index 000..85d10cf
--- /dev/null
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -0,0 +1,543 @@
+/*
+ * imx-bbu-internal.c - i.MX specific update functions for internal boot
+ *
+ * Copyright (c) 2012 Sascha Hauer s.ha...@pengutronix.de, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define IMX_INTERNAL_NAND_BBU
+
+#include common.h
+#include malloc.h
+#include bbu.h
+#include filetype.h
+#include errno.h
+#include fs.h
+#include fcntl.h
+#include sizes.h
+#include linux/mtd/mtd-abi.h
+#include linux/stat.h
+#include ioctl.h
+#include mach/bbu.h
+#include mach/imx-flash-header.h
+
+#define FLASH_HEADER_OFFSET_MMC0x400
+
+#define IMX_INTERNAL_FLAG_NAND (1  0)
+#define IMX_INTERNAL_FLAG_KEEP_DOSPART (1  1)
+
+struct imx_internal_bbu_handler {
+   struct bbu_handler handler;
+   const void *dcd;
+   int dcdsize;
+   unsigned long app_dest;
+   unsigned long flash_header_offset;
+   size_t device_size;
+   unsigned long flags;
+};
+
+/*
+ * Actually write an image to the target device, eventually keeping a
+ * DOS partition table on the device
+ */
+static int imx_bbu_write_device(struct imx_internal_bbu_handler *imx_handler,
+   struct bbu_data *data, void *buf, int image_len)
+{
+   int fd, ret;
+
+   fd = open(data-devicefile, O_RDWR | O_CREAT);
+   if (fd  0)
+   return fd;
+
+   if (imx_handler-flags  IMX_INTERNAL_FLAG_KEEP_DOSPART) {
+   void *mbr = xzalloc(512);
+
+   debug(%s: reading DOS partition table in order to keep it\n);
+
+   ret = read(fd, mbr, 512);
+   if (ret  0) {
+   free(mbr);
+   goto err_close;
+   }
+
+   memcpy(buf + 0x1b8, mbr + 0x1b8, 0x48);
+   free(buf);
+
+   ret = lseek(fd, 0, SEEK_SET);
+   if (ret)
+   goto err_close;
+   }
+
+   ret = write(fd, buf, image_len);
+   if (ret  0)
+   goto err_close;
+
+   ret = 0;
+
+err_close:
+   close(fd);
+
+   return ret;
+}
+
+/*
+ * Update barebox on a v1 type internal boot (i.MX25, i.MX35, i.MX51)
+ *
+ * This constructs a DCD header, adds the specific DCD data and writes
+ * the resulting image to the device. Currently this handles MMC/SD
+ * devices.
+ */
+static int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct 
bbu_data *data)
+{
+   struct imx_internal_bbu_handler *imx_handler =
+   container_of(handler, struct imx_internal_bbu_handler, handler);
+   struct imx_flash_header *flash_header;
+   unsigned long flash_header_offset = imx_handler-flash_header_offset;
+   u32 *dcd_image_size;
+   void *imx_pre_image;
+   int imx_pre_image_size = 0x2000;
+   int ret, image_len;
+   void *buf;
+
+   if (file_detect_type(data-image) != filetype_arm_barebox) {
+   if (!bbu_force(data, Not an ARM barebox image))
+

[PATCH 1/5] Add in-system barebox update infrastructure

2012-10-15 Thread Sascha Hauer

Currently in-system update means to write an arbitrary file to
an arbitrary device. There is no sanity check if the flashed image
is of the right type or will fit onto the device. Furthermore some
SoCs need a special preparation step for their images before
flashing them.

This adds a barebox in-system update infrastructure. Boards can
register update handlers which know how to make the board bootable.
The available handlers can be listed to be able to select one,
different force levels give the user the chance to know it better.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 commands/Kconfig  |5 ++
 commands/Makefile |1 +
 commands/barebox-update.c |   86 ++
 common/Kconfig|3 +
 common/Makefile   |1 +
 common/bbu.c  |  150 +
 include/bbu.h |   49 +++
 7 files changed, 295 insertions(+)
 create mode 100644 commands/barebox-update.c
 create mode 100644 common/bbu.c
 create mode 100644 include/bbu.h

diff --git a/commands/Kconfig b/commands/Kconfig
index e934f29..251d8b6 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -509,6 +509,11 @@ endif
 
 endmenu
 
+config CMD_BAREBOX_UPDATE
+   tristate
+   select BAREBOX_UPDATE
+   prompt barebox-update
+
 config CMD_TIMEOUT
tristate
prompt timeout
diff --git a/commands/Makefile b/commands/Makefile
index 610be55..7606643 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -76,3 +76,4 @@ obj-$(CONFIG_CMD_READLINK)+= readlink.o
 obj-$(CONFIG_CMD_LN)   += ln.o
 obj-$(CONFIG_CMD_CLK)  += clk.o
 obj-$(CONFIG_CMD_TFTP) += tftp.o
+obj-$(CONFIG_CMD_BAREBOX_UPDATE)+= barebox-update.o
diff --git a/commands/barebox-update.c b/commands/barebox-update.c
new file mode 100644
index 000..f550572
--- /dev/null
+++ b/commands/barebox-update.c
@@ -0,0 +1,86 @@
+/*
+ * barebox-update.c - update barebox
+ *
+ * Copyright (c) 2012 Sascha Hauer s.ha...@pengutronix.de, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include common.h
+#include command.h
+#include getopt.h
+#include malloc.h
+#include errno.h
+#include bbu.h
+#include fs.h
+
+static int do_barebox_update(int argc, char *argv[])
+{
+   int opt, ret;
+   struct bbu_data data = {};
+
+   while ((opt = getopt(argc, argv, t:yf:ld:))  0) {
+   switch (opt) {
+   case 'd':
+   data.devicefile = optarg;
+   break;
+   case 'f':
+   data.force = simple_strtoul(optarg, NULL, 0);
+   data.flags |= BBU_FLAG_FORCE;
+   break;
+   case 't':
+   data.handler_name = optarg;
+   break;
+   case 'y':
+   data.flags |= BBU_FLAG_YES;
+   break;
+   case 'l':
+   printf(registered update handlers:\n);
+   bbu_handlers_list();
+   return 0;
+   default:
+   return COMMAND_ERROR_USAGE;
+   }
+   }
+
+   if (!(argc - optind))
+   return COMMAND_ERROR_USAGE;
+
+   data.imagefile = argv[optind];
+
+   data.image = read_file(data.imagefile, data.len);
+   if (!data.image)
+   return -errno;
+
+   ret = barebox_update(data);
+
+   free(data.image);
+
+   return ret;
+}
+
+BAREBOX_CMD_HELP_START(barebox_update)
+BAREBOX_CMD_HELP_USAGE(barebox_update [OPTIONS] image\n)
+BAREBOX_CMD_HELP_SHORT(Update barebox to persistent media\n)
+BAREBOX_CMD_HELP_OPT(-t target, \n)
+BAREBOX_CMD_HELP_OPT(-d device, write image to device instead of 
handler default\n)
+BAREBOX_CMD_HELP_OPT(   , Can be used for debugging purposes (-d 
/tmpfile)\n)
+BAREBOX_CMD_HELP_OPT(-y\t, yes. Do not ask for confirmation\n)
+BAREBOX_CMD_HELP_OPT(-f level, Set force level\n)
+BAREBOX_CMD_HELP_OPT(-l\t, list registered targets\n)
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(barebox_update)
+   .cmd= do_barebox_update,
+   .usage  = update barebox,
+   BAREBOX_CMD_HELP(cmd_barebox_update_help)
+BAREBOX_CMD_END
diff --git a/common/Kconfig b/common/Kconfig
index 107774c..d60db80 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -58,6 +58,9 @@ config GLOBALVAR
 config STDDEV
bool
 
+config BAREBOX_UPDATE

[PATCH 5/5] ARM i.MX53 tx53: register MMC and NAND update handler

2012-10-15 Thread Sascha Hauer

We support two different board revisions, both of which only differ
in the dcd table, so we can support both in a single binary with the
cost of storing both dcd tables in the binary.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/karo-tx53/board.c |   18 +++
 arch/arm/boards/karo-tx53/dcd-data-1011.h |   94 +++
 arch/arm/boards/karo-tx53/dcd-data-xx30.h |  145 +
 arch/arm/boards/karo-tx53/flash_header.c  |  248 ++---
 4 files changed, 269 insertions(+), 236 deletions(-)
 create mode 100644 arch/arm/boards/karo-tx53/dcd-data-1011.h
 create mode 100644 arch/arm/boards/karo-tx53/dcd-data-xx30.h

diff --git a/arch/arm/boards/karo-tx53/board.c 
b/arch/arm/boards/karo-tx53/board.c
index 99ddcec..8f87c9c 100644
--- a/arch/arm/boards/karo-tx53/board.c
+++ b/arch/arm/boards/karo-tx53/board.c
@@ -33,6 +33,8 @@
 #include mach/imx-nand.h
 #include mach/iim.h
 #include mach/imx5.h
+#include mach/imx-flash-header.h
+#include mach/bbu.h
 
 #include asm/armlinux.h
 #include io.h
@@ -206,6 +208,14 @@ static inline void tx53_fec_init(void)
ARRAY_SIZE(tx53_fec_pads));
 }
 
+#define DCD_NAME_1011 static struct imx_dcd_v2_entry dcd_entry_1011
+
+#include dcd-data-1011.h
+
+#define DCD_NAME_XX30 static u32 dcd_entry_xx30
+
+#include dcd-data-xx30.h
+
 static int tx53_devices_init(void)
 {
imx53_iim_register_fec_ethaddr();
@@ -217,6 +227,14 @@ static int tx53_devices_init(void)
armlinux_set_bootparams((void *)0x7100);
armlinux_set_architecture(MACH_TYPE_TX53);
 
+   /* rev xx30 can boot from nand or USB */
+   imx53_bbu_internal_nand_register_handler(nand-xx30,
+   BBU_HANDLER_FLAG_DEFAULT, (void *)dcd_entry_xx30, 
sizeof(dcd_entry_xx30), SZ_512K);
+
+   /* rev 1011 can boot from MMC/SD, other bootsource currently unknown */
+   imx53_bbu_internal_mmc_register_handler(mmc-1011, /dev/disk0,
+   0, (void *)dcd_entry_1011, sizeof(dcd_entry_1011));
+
return 0;
 }
 
diff --git a/arch/arm/boards/karo-tx53/dcd-data-1011.h 
b/arch/arm/boards/karo-tx53/dcd-data-1011.h
new file mode 100644
index 000..7034ff8
--- /dev/null
+++ b/arch/arm/boards/karo-tx53/dcd-data-1011.h
@@ -0,0 +1,94 @@
+DCD_NAME_1011[] = {
+   { .addr = cpu_to_be32(0x53fd406c), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd4070), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd4074), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd4078), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd407c), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd4080), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fd4088), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa8174), .val = cpu_to_be32(0x0011), },
+   { .addr = cpu_to_be32(0x63fd800c), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa8554), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8560), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8594), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8584), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8558), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa8568), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa8590), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa857c), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa8564), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa8580), .val = cpu_to_be32(0x00200040), },
+   { .addr = cpu_to_be32(0x53fa8570), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8578), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa872c), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8728), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa871c), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8718), .val = cpu_to_be32(0x0020), },
+   { .addr = cpu_to_be32(0x53fa8574), .val = cpu_to_be32(0x0028), },
+   { .addr = cpu_to_be32(0x53fa8588), .val = cpu_to_be32(0x0028), },
+   { .addr = cpu_to_be32(0x53fa86f0), .val = cpu_to_be32(0x0028), },
+   { .addr = cpu_to_be32(0x53fa8720), .val = cpu_to_be32(0x0028), },
+   { .addr = cpu_to_be32(0x53fa86fc), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa86f4), .val = cpu_to_be32(0x0200), },
+   { .addr = cpu_to_be32(0x53fa8714), .val = cpu_to_be32(0x), },
+   { .addr = cpu_to_be32(0x53fa8724), .val = cpu_to_be32(0x0600), },
+   { .addr = cpu_to_be32(0x63fd9088), .val = cpu_to_be32(0x36353b38), },
+   { .addr = cpu_to_be32(0x63fd9090), .val

Re: [PATCH 00/12] add bus device

2012-10-15 Thread Sascha Hauer

On Mon, Oct 15, 2012 at 12:23:07PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 On 09:10 Mon 15 Oct , Sascha Hauer wrote:
  +   ret = register_device(bus-bus_dev);
  +   if (ret)
  +   return ret;
  +
  list_add_tail(bus-list, bus_list);
   
  return 0;
  diff --git a/drivers/base/driver.c b/drivers/base/driver.c
  index 5b7286a..395546b 100644
  --- a/drivers/base/driver.c
  +++ b/drivers/base/driver.c
  @@ -127,6 +127,11 @@ int register_device(struct device_d *new_device)
   
  list_add_tail(new_device-bus_list, new_device-bus-device_list);
   
  +   if (!new_device-parent) {
  +   new_device-parent = new_device-bus-dev;
  +   dev_add_child(new_device-parent, new_device);
 and I was wanting to add global name barebox and add everyone under to it
 
 I choose to do let the bus manage the child
 and to create a device or not

Any idea why we would need this?

Sascha


-- 
Pengutronix e.K.   | |
Industrial Linux Solutions | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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[PATCH 2/2] ARM samsung S5P: Enable board support

2012-10-15 Thread Sascha Hauer

This was once disabled because we had no board support. This has
changed, so enable the S5P board support in the config so that
the friendlyarm_tiny210_defconfig actually builds for the correct
machine.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/Kconfig |   14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8278c82..c1a963d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -71,14 +71,12 @@ config ARCH_S3C24xx
select ARCH_SAMSUNG
select CPU_ARM920T
select GENERIC_GPIO
-#
-# Currently no board support
-#
-#config ARCH_S5PCxx
-#  bool Samsung S5PC110, S5PV210
-#  select ARCH_SAMSUNG
-#  select CPU_V7
-#  select GENERIC_GPIO
+
+config ARCH_S5PCxx
+   bool Samsung S5PC110, S5PV210
+   select ARCH_SAMSUNG
+   select CPU_V7
+   select GENERIC_GPIO
 
 config ARCH_S3C64xx
bool Samsung S3C64xx
-- 
1.7.10.4


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[PATCH 1/2] ARM a9m2440: Fix lowlevel init

2012-10-15 Thread Sascha Hauer

board_init_lowlevel is no longer called from generic code, so we can't
just return from in. Instead we have to jump to board_init_lowlevel_return
manually. For the a9m2440 board one case was missed to convert. This
is broken since:

| commit faf7b7af6e51a33b88453821d792c89a84f72b1d
| Author: Jan Luebbe j...@pengutronix.de
| Date:   Mon Sep 24 10:18:34 2012 +0200
|
| ARM: give boards control of the reset entry point
|
| On some SoCs (for example AM35xx), the ROM bootloader passes useful
| information in r0 when jumping to barebox.
|
| To avoid overwriting this in the generic reset code, we introduce
| common_reset as a C function and as an assembler macro. This is then
| called form the reset entry point (either in common or in board code).
|
| This patch is based on code by Sascha Hauer s.ha...@pengutronix.de.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/a9m2440/lowlevel_init.S |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boards/a9m2440/lowlevel_init.S 
b/arch/arm/boards/a9m2440/lowlevel_init.S
index da29efd..8f6cfcb 100644
--- a/arch/arm/boards/a9m2440/lowlevel_init.S
+++ b/arch/arm/boards/a9m2440/lowlevel_init.S
@@ -225,7 +225,7 @@ reset:
cmp pc, #S3C_SDRAM_END
bhs 1f
 
-   mov pc, r10
+   b board_init_lowlevel_return
 
 /* we are running from NOR or NAND/SRAM memory. Do further initialisation */
 1:
-- 
1.7.10.4


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Re: [PATCH 0/3] add mtd dataflash support

2012-10-15 Thread Sascha Hauer

On Sun, Oct 14, 2012 at 10:46:22PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 HI,
 
   the following patch serie add the dataflash support
   and use it on Calao USB-A9263
 
   I'll add later the support on Atmel Reference Board
 
 The following changes since commit 461e7d7aefb128a63b84687ba7e361473ada91c6:
 
   mtd-core: add writesize in MEMGETINFO ioctl (2012-10-13 14:30:50 +0200)
 
 are available in the git repository at:
 
   git://git.jcrosoft.org/barebox.git delivery/calao

Pulled, thanks

Sascha

 
 for you to fetch changes up to cc1c399fbad7c8e818d7030777317703ced86c1c:
 
   usb-a9263: add spi dataflash support (2012-10-14 20:13:00 +0800)
 
 
 Jean-Christophe PLAGNIOL-VILLARD (3):
   import include/linux/math64.h
   mtd: add dataflash support
   usb-a9263: add spi dataflash support
 
  arch/arm/boards/usb-a926x/init.c|   21 +++
  arch/arm/configs/usb_a9263_128mib_defconfig |3 +-
  arch/arm/configs/usb_a9263_defconfig|3 +-
  drivers/mtd/devices/Kconfig |   18 ++
  drivers/mtd/devices/Makefile|1 +
  drivers/mtd/devices/mtd_dataflash.c |  882 
 ++
  include/linux/math64.h  |  121 +
  include/spi/flash.h |2 +-
  8 files changed, 1048 insertions(+), 3 deletions(-)
  create mode 100644 drivers/mtd/devices/mtd_dataflash.c
  create mode 100644 include/linux/math64.h
 
 Best Regards,
 J.
 
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Re: [PATCH 0/5] BCM2835/Raspberry-Pi support

2012-10-15 Thread Carlo Caione


On 10/15/2012 02:43 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:

On 08:56 Mon 15 Oct , Sascha Hauer wrote:


Jean-Christophe,

Since you reviewed this series can I assume you give your Acked-by once
you are happy with it?

I'm happy with it except one point that I just check with the mainline kernel
the DT

the timer as example is brcm,bcm2835-system-timer not brcm,bcm2835-cs

for gpio it's the right one

as we can agree to dt must be in sync


You are definitely right.
I'll resubmit the patches.
Thank you for your review, it is greatly appreciated.

Best,

--
Carlo Caione

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Re: [PATCH 00/12] add bus device

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 15:21 Mon 15 Oct , Sascha Hauer wrote:
 On Mon, Oct 15, 2012 at 12:23:07PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
 wrote:
  On 09:10 Mon 15 Oct , Sascha Hauer wrote:
   + ret = register_device(bus-bus_dev);
   + if (ret)
   + return ret;
   +
 list_add_tail(bus-list, bus_list);

 return 0;
   diff --git a/drivers/base/driver.c b/drivers/base/driver.c
   index 5b7286a..395546b 100644
   --- a/drivers/base/driver.c
   +++ b/drivers/base/driver.c
   @@ -127,6 +127,11 @@ int register_device(struct device_d *new_device)

 list_add_tail(new_device-bus_list, new_device-bus-device_list);

   + if (!new_device-parent) {
   + new_device-parent = new_device-bus-dev;
   + dev_add_child(new_device-parent, new_device);
  and I was wanting to add global name barebox and add everyone under to it
  
  I choose to do let the bus manage the child
  and to create a device or not
 
 Any idea why we would need this?
mdio bus as example I was thinking to drop the device as they are always
attached to a ethernet device

input bus too

as example some bus as device specific so no need to add device as the device
is already here

I already implement this on arm and so it in the kernel arm too

Best Regards,
J.

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[PATCH v2 1/3] ARM: Add CLPS711X architecture

2012-10-15 Thread Alexander Shiyan

This patch adds new architecture (CLPS711X) into barebox.
The core-logic functionality of the device is built around an ARM720T
processor running at clock speeds up to 90 MHz.

Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
 arch/arm/Kconfig   |6 +
 arch/arm/Makefile  |1 +
 arch/arm/mach-clps711x/Kconfig |   16 ++
 arch/arm/mach-clps711x/Makefile|1 +
 arch/arm/mach-clps711x/clock.c |  113 ++
 arch/arm/mach-clps711x/devices.c   |   42 
 arch/arm/mach-clps711x/include/mach/clkdev.h   |7 +
 arch/arm/mach-clps711x/include/mach/clps711x.h |  283 
 arch/arm/mach-clps711x/include/mach/devices.h  |7 +
 arch/arm/mach-clps711x/reset.c |   20 ++
 10 files changed, 496 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-clps711x/Kconfig
 create mode 100644 arch/arm/mach-clps711x/Makefile
 create mode 100644 arch/arm/mach-clps711x/clock.c
 create mode 100644 arch/arm/mach-clps711x/devices.c
 create mode 100644 arch/arm/mach-clps711x/include/mach/clkdev.h
 create mode 100644 arch/arm/mach-clps711x/include/mach/clps711x.h
 create mode 100644 arch/arm/mach-clps711x/include/mach/devices.h
 create mode 100644 arch/arm/mach-clps711x/reset.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8278c82..2cf9a57 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -31,6 +31,11 @@ config ARCH_AT91
select HAS_DEBUG_LL
select HAVE_MACH_ARM_HEAD
 
+config ARCH_CLPS711X
+   bool Cirrus Logic EP711x/EP721x/EP731x
+   select CLKDEV_LOOKUP
+   select CPU_32v4T
+
 config ARCH_EP93XX
bool Cirrus Logic EP93xx
select CPU_ARM920T
@@ -99,6 +104,7 @@ endchoice
 
 source arch/arm/cpu/Kconfig
 source arch/arm/mach-at91/Kconfig
+source arch/arm/mach-clps711x/Kconfig
 source arch/arm/mach-ep93xx/Kconfig
 source arch/arm/mach-imx/Kconfig
 source arch/arm/mach-mxs/Kconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 855043a..da80e00 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -52,6 +52,7 @@ AFLAGS   += -include asm/unified.h -msoft-float 
$(AFLAGS_THUMB2)
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91):= at91
+machine-$(CONFIG_ARCH_CLPS711X):= clps711x
 machine-$(CONFIG_ARCH_EP93XX)  := ep93xx
 machine-$(CONFIG_ARCH_IMX) := imx
 machine-$(CONFIG_ARCH_MXS) := mxs
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
new file mode 100644
index 000..c5e97ed
--- /dev/null
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -0,0 +1,16 @@
+if ARCH_CLPS711X
+
+choice
+   prompt Cirrus Logic EP711x/EP721x/EP731x Board Type
+
+endchoice
+
+config ARCH_TEXT_BASE
+   hex
+   default 0xc078
+
+config BAREBOX_MAX_IMAGE_SIZE
+   hex
+   default 0x0008
+
+endif
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
new file mode 100644
index 000..41012bc
--- /dev/null
+++ b/arch/arm/mach-clps711x/Makefile
@@ -0,0 +1 @@
+obj-y += clock.o devices.o reset.o
diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
new file mode 100644
index 000..5cafba9
--- /dev/null
+++ b/arch/arm/mach-clps711x/clock.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2012 Alexander Shiyan shc_w...@mail.ru
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include common.h
+#include init.h
+#include clock.h
+#include asm/io.h
+#include linux/clkdev.h
+
+#include mach/clps711x.h
+
+struct clk {
+   unsigned long   rate;
+};
+
+static struct clk uart_clk, bus_clk;
+
+uint64_t clocksource_read(void)
+{
+   return ~readw(TC2D);
+}
+
+static struct clocksource cs = {
+   .read   = clocksource_read,
+   .mask   = CLOCKSOURCE_MASK(16),
+};
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+   return clk-rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+int clk_enable(struct clk *clk)
+{
+   /* Do nothing */
+   return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+   /* Do nothing */
+}
+EXPORT_SYMBOL(clk_disable);
+
+static int clocks_init(void)
+{
+   int osc, ext, pll, cpu, timer;
+   u32 tmp;
+
+   osc = 3686400;
+   ext = 1300;
+
+   tmp = readl(PLLR)  24;
+   if (tmp)
+   pll = (osc * tmp) / 2;
+   else
+   pll = 73728000; /* Default value for old CPUs */
+
+   tmp = readl(SYSFLG2);
+   if (tmp  SYSFLG2_CKMODE) {
+   cpu = ext;
+   bus_clk.rate = cpu;
+   } else {
+   cpu = pll;
+   if (cpu = 36864000)
+

[PATCH v2 3/3] ARM: clps711x: Add generic board support (CLEP7212)

2012-10-15 Thread Alexander Shiyan

This patch adds generic board support (CLEP7212, Linux ARM ID=91)
for CLPS711X-target.

Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
 arch/arm/Makefile   |1 +
 arch/arm/boards/clep7212/Makefile   |1 +
 arch/arm/boards/clep7212/clep7212.c |   64 +++
 arch/arm/boards/clep7212/config.h   |4 ++
 arch/arm/boards/clep7212/env/bin/mtdparts-add   |   21 +++
 arch/arm/boards/clep7212/env/boot/nor   |9 +++
 arch/arm/boards/clep7212/env/init/automount |   12 
 arch/arm/boards/clep7212/env/init/bootargs-base |8 +++
 arch/arm/boards/clep7212/env/init/general   |   12 
 arch/arm/boards/clep7212/env/init/hostname  |8 +++
 arch/arm/boards/clep7212/lowlevel.c |   56 
 arch/arm/configs/clps711x_defconfig |   42 +++
 arch/arm/mach-clps711x/Kconfig  |9 +++
 13 files changed, 247 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/clep7212/Makefile
 create mode 100644 arch/arm/boards/clep7212/clep7212.c
 create mode 100644 arch/arm/boards/clep7212/config.h
 create mode 100644 arch/arm/boards/clep7212/env/bin/mtdparts-add
 create mode 100644 arch/arm/boards/clep7212/env/boot/nor
 create mode 100644 arch/arm/boards/clep7212/env/init/automount
 create mode 100644 arch/arm/boards/clep7212/env/init/bootargs-base
 create mode 100644 arch/arm/boards/clep7212/env/init/general
 create mode 100644 arch/arm/boards/clep7212/env/init/hostname
 create mode 100644 arch/arm/boards/clep7212/lowlevel.c
 create mode 100644 arch/arm/configs/clps711x_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index da80e00..05f9943 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -76,6 +76,7 @@ board-$(CONFIG_MACH_AT91SAM9G10EK):= at91sam9261ek
 board-$(CONFIG_MACH_AT91SAM9G20EK) := at91sam9260ek
 board-$(CONFIG_MACH_AT91SAM9X5EK)  := at91sam9x5ek
 board-$(CONFIG_MACH_AT91SAM9M10G45EK)  := at91sam9m10g45ek
+board-$(CONFIG_MACH_CLEP7212)  := clep7212
 board-$(CONFIG_MACH_DSS11) := dss11
 board-$(CONFIG_MACH_EDB9301)   := edb93xx
 board-$(CONFIG_MACH_EDB9302)   := edb93xx
diff --git a/arch/arm/boards/clep7212/Makefile 
b/arch/arm/boards/clep7212/Makefile
new file mode 100644
index 000..7e58f10
--- /dev/null
+++ b/arch/arm/boards/clep7212/Makefile
@@ -0,0 +1 @@
+obj-y += clep7212.o lowlevel.o
diff --git a/arch/arm/boards/clep7212/clep7212.c 
b/arch/arm/boards/clep7212/clep7212.c
new file mode 100644
index 000..1d5828d
--- /dev/null
+++ b/arch/arm/boards/clep7212/clep7212.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2012 Alexander Shiyan shc_w...@mail.ru
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include common.h
+#include driver.h
+#include init.h
+#include partition.h
+#include io.h
+#include sizes.h
+#include asm/armlinux.h
+#include generated/mach-types.h
+
+#include mach/clps711x.h
+#include mach/devices.h
+
+static int clps711x_mem_init(void)
+{
+   ulong memsize = get_ram_size((ulong *)SDRAM_BASE, SZ_32M);
+
+   arm_add_mem_device(ram0, SDRAM_BASE, memsize);
+
+   return 0;
+}
+mem_initcall(clps711x_mem_init);
+
+static int clps711x_devices_init(void)
+{
+   u32 serial_h = 0, serial_l = readl(UNIQID);
+
+   /* Setup Chipselects */
+   clps711x_setup_memcfg(0, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_16);
+   clps711x_setup_memcfg(1, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_8);
+   clps711x_setup_memcfg(2, MEMCFG_WAITSTATE_8_3 | MEMCFG_BUS_WIDTH_16 |
+ MEMCFG_CLKENB);
+   clps711x_setup_memcfg(3, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_32);
+
+   add_cfi_flash_device(0, CS0_BASE, SZ_32M, 0);
+
+   devfs_add_partition(nor0, 0x0, SZ_256K, DEVFS_PARTITION_FIXED,
+   self0);
+   devfs_add_partition(nor0, SZ_256K, SZ_256K, DEVFS_PARTITION_FIXED,
+   env0);
+
+   armlinux_set_bootparams((void *)SDRAM_BASE + 0x100);
+   armlinux_set_architecture(MACH_TYPE_CLEP7212);
+   armlinux_set_serial(((u64)serial_h  32) | serial_l);
+
+   return 0;
+}
+device_initcall(clps711x_devices_init);
+
+static int clps711x_console_init(void)
+{
+   clps711x_add_uart(0);
+
+   return 0;
+}
+console_initcall(clps711x_console_init);
diff --git a/arch/arm/boards/clep7212/config.h 
b/arch/arm/boards/clep7212/config.h
new file mode 100644
index 000..6ae9a40
--- /dev/null
+++ b/arch/arm/boards/clep7212/config.h
@@ -0,0 +1,4 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif  /* __CONFIG_H */
diff --git

[PATCH v2 2/3] ARM: clps711x: Add serial driver

2012-10-15 Thread Alexander Shiyan


Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
 drivers/serial/Kconfig   |5 ++
 drivers/serial/Makefile  |1 +
 drivers/serial/serial_clps711x.c |  118 ++
 3 files changed, 124 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/serial_clps711x.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7eb96ed..02bc8bf 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -43,6 +43,11 @@ config DRIVER_SERIAL_BLACKFIN
default y
bool Blackfin serial driver
 
+config DRIVER_SERIAL_CLPS711X
+   depends on ARCH_CLPS711X
+   default y
+   bool CLPS711X serial driver
+
 config DRIVER_SERIAL_ALTERA
depends on NIOS2
default y
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e2d56b9..e6f1e22 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DRIVER_SERIAL_NETX)  += serial_netx.o
 obj-$(CONFIG_DRIVER_SERIAL_LINUX_CONSOLE)  += linux_console.o
 obj-$(CONFIG_DRIVER_SERIAL_MPC5XXX)+= serial_mpc5xxx.o
 obj-$(CONFIG_DRIVER_SERIAL_BLACKFIN)   += serial_blackfin.o
+obj-$(CONFIG_DRIVER_SERIAL_CLPS711X)   += serial_clps711x.o
 obj-$(CONFIG_DRIVER_SERIAL_NS16550)+= serial_ns16550.o
 obj-$(CONFIG_DRIVER_SERIAL_PL010)  += serial_pl010.o
 obj-$(CONFIG_DRIVER_SERIAL_S3C)+= serial_s3c.o
diff --git a/drivers/serial/serial_clps711x.c b/drivers/serial/serial_clps711x.c
new file mode 100644
index 000..462ba9f
--- /dev/null
+++ b/drivers/serial/serial_clps711x.c
@@ -0,0 +1,118 @@
+/*
+ * Simple CLPS711X serial driver
+ *
+ * (C) Copyright 2012 Alexander Shiyan shc_w...@mail.ru
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include common.h
+#include init.h
+#include io.h
+#include linux/clk.h
+
+#include mach/clps711x.h
+
+#define UBRLCR(x)  (UBRLCR1 + (x) * 0x1000)
+#define SYSCON(x)  (SYSCON1 + (x) * 0x1000)
+#define SYSFLG(x)  (SYSFLG1 + (x) * 0x1000)
+#define UARTDR(x)  (UARTDR1 + (x) * 0x1000)
+
+static int clps711x_setbaudrate(struct console_device *cdev, int baudrate)
+{
+   int divisor;
+   u32 tmp;
+
+   divisor = (clk_get_rate(cdev-dev-priv) / 16) / baudrate;
+
+   tmp = readl(UBRLCR(cdev-dev-id))  ~UBRLCR_BAUD_MASK;
+   tmp |= divisor - 1;
+   writel(tmp, UBRLCR(cdev-dev-id));
+
+   return 0;
+}
+
+static void clps711x_init_port(struct console_device *cdev)
+{
+   u32 tmp;
+
+   /* Disable the UART */
+   writel(readl(SYSCON(cdev-dev-id))  ~SYSCON_UARTEN,
+  SYSCON(cdev-dev-id));
+
+   /* Setup Line Control Register */
+   tmp = readl(UBRLCR(cdev-dev-id))  UBRLCR_BAUD_MASK;
+   tmp |= UBRLCR_FIFOEN | UBRLCR_WRDLEN8; /* FIFO on, 8N1 mode */
+   writel(tmp, UBRLCR(cdev-dev-id));
+
+   /* Set default baudrate on initialization */
+   clps711x_setbaudrate(cdev, CONFIG_BAUDRATE);
+
+   /* Enable the UART */
+   writel(readl(SYSCON(cdev-dev-id)) | SYSCON_UARTEN,
+  SYSCON(cdev-dev-id));
+}
+
+static void clps711x_putc(struct console_device *cdev, char c)
+{
+   /* Wait until there is space in the FIFO */
+   while (readl(SYSFLG(cdev-dev-id))  SYSFLG_UTXFF) {
+   }
+
+   /* Send the character */
+   writew(c, UARTDR(cdev-dev-id));
+}
+
+static int clps711x_getc(struct console_device *cdev)
+{
+   u16 data;
+
+   /* Wait until there is data in the FIFO */
+   while (readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE) {
+   }
+
+   data = readw(UARTDR(cdev-dev-id));
+
+   /* Check for an error flag */
+   if (data  (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR))
+   return -1;
+
+   return (int)data;
+}
+
+static int clps711x_tstc(struct console_device *cdev)
+{
+   return !(readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE);
+}
+
+static int clps711x_probe(struct device_d *dev)
+{
+   struct console_device *cdev = xzalloc(sizeof(struct console_device));
+
+   dev-priv = clk_get(dev, NULL);
+   BUG_ON(!dev-priv);
+
+   cdev-dev   = dev;
+   cdev-f_caps= CONSOLE_STDIN | CONSOLE_STDOUT | CONSOLE_STDERR;
+   cdev-tstc  = clps711x_tstc;
+   cdev-putc  = clps711x_putc;
+   cdev-getc  = clps711x_getc;
+   cdev-setbrg= clps711x_setbaudrate;
+   clps711x_init_port(cdev);
+
+   return console_register(cdev);
+}
+
+static struct driver_d clps711x_driver = {
+   .name   = clps711x_serial,
+   .probe  = clps711x_probe,
+};
+
+static int clps711x_init(void)
+{
+   return platform_driver_register(clps711x_driver);
+}
+console_initcall(clps711x_init);
-- 
1.7.8.6

Re: [PATCH v2 1/3] ARM: Add CLPS711X architecture

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 20:26 Mon 15 Oct , Alexander Shiyan wrote:
 This patch adds new architecture (CLPS711X) into barebox.
 The core-logic functionality of the device is built around an ARM720T
 processor running at clock speeds up to 90 MHz.
 
 Signed-off-by: Alexander Shiyan shc_w...@mail.ru
 ---
  arch/arm/Kconfig   |6 +
  arch/arm/Makefile  |1 +
  arch/arm/mach-clps711x/Kconfig |   16 ++
  arch/arm/mach-clps711x/Makefile|1 +
  arch/arm/mach-clps711x/clock.c |  113 ++
  arch/arm/mach-clps711x/devices.c   |   42 
  arch/arm/mach-clps711x/include/mach/clkdev.h   |7 +
  arch/arm/mach-clps711x/include/mach/clps711x.h |  283 
 
  arch/arm/mach-clps711x/include/mach/devices.h  |7 +
  arch/arm/mach-clps711x/reset.c |   20 ++
  10 files changed, 496 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/mach-clps711x/Kconfig
  create mode 100644 arch/arm/mach-clps711x/Makefile
  create mode 100644 arch/arm/mach-clps711x/clock.c
  create mode 100644 arch/arm/mach-clps711x/devices.c
  create mode 100644 arch/arm/mach-clps711x/include/mach/clkdev.h
  create mode 100644 arch/arm/mach-clps711x/include/mach/clps711x.h
  create mode 100644 arch/arm/mach-clps711x/include/mach/devices.h
  create mode 100644 arch/arm/mach-clps711x/reset.c
 
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index 8278c82..2cf9a57 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -31,6 +31,11 @@ config ARCH_AT91
   select HAS_DEBUG_LL
   select HAVE_MACH_ARM_HEAD
  
 +config ARCH_CLPS711X
 + bool Cirrus Logic EP711x/EP721x/EP731x
 + select CLKDEV_LOOKUP
 + select CPU_32v4T
 +
  config ARCH_EP93XX
   bool Cirrus Logic EP93xx
   select CPU_ARM920T
 @@ -99,6 +104,7 @@ endchoice
  
  source arch/arm/cpu/Kconfig
  source arch/arm/mach-at91/Kconfig
 +source arch/arm/mach-clps711x/Kconfig
  source arch/arm/mach-ep93xx/Kconfig
  source arch/arm/mach-imx/Kconfig
  source arch/arm/mach-mxs/Kconfig
 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
 index 855043a..da80e00 100644
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
 @@ -52,6 +52,7 @@ AFLAGS   += -include asm/unified.h -msoft-float 
 $(AFLAGS_THUMB2)
  # Machine directory name.  This list is sorted alphanumerically
  # by CONFIG_* macro name.
  machine-$(CONFIG_ARCH_AT91)  := at91
 +machine-$(CONFIG_ARCH_CLPS711X)  := clps711x
  machine-$(CONFIG_ARCH_EP93XX):= ep93xx
  machine-$(CONFIG_ARCH_IMX)   := imx
  machine-$(CONFIG_ARCH_MXS)   := mxs
 diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
 new file mode 100644
 index 000..c5e97ed
 --- /dev/null
 +++ b/arch/arm/mach-clps711x/Kconfig
 @@ -0,0 +1,16 @@
 +if ARCH_CLPS711X
 +
 +choice
 + prompt Cirrus Logic EP711x/EP721x/EP731x Board Type
 +
 +endchoice
 +
 +config ARCH_TEXT_BASE
 + hex
 + default 0xc078
 +
 +config BAREBOX_MAX_IMAGE_SIZE
 + hex
 + default 0x0008
 +
 +endif
 diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
 new file mode 100644
 index 000..41012bc
 --- /dev/null
 +++ b/arch/arm/mach-clps711x/Makefile
 @@ -0,0 +1 @@
 +obj-y += clock.o devices.o reset.o
 diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
 new file mode 100644
 index 000..5cafba9
 --- /dev/null
 +++ b/arch/arm/mach-clps711x/clock.c
 @@ -0,0 +1,113 @@
 +/*
 + * Copyright (C) 2012 Alexander Shiyan shc_w...@mail.ru
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + */
 +
 +#include common.h
 +#include init.h
 +#include clock.h
 +#include asm/io.h
 +#include linux/clkdev.h
split the code in 2
 - clock
 - clocksource in drivers/clocksource
 and cs as a driver
 +
 +#include mach/clps711x.h
 +
 +struct clk {
 + unsigned long   rate;
 +};
 +
 +static struct clk uart_clk, bus_clk;
 +
 +uint64_t clocksource_read(void)
 +{
 + return ~readw(TC2D);
 +}
 +
 +static struct clocksource cs = {
 + .read   = clocksource_read,
 + .mask   = CLOCKSOURCE_MASK(16),
 +};
 +
 +unsigned long clk_get_rate(struct clk *clk)
 +{
 + return clk-rate;
 +}
 +EXPORT_SYMBOL(clk_get_rate);
 +
 +int clk_enable(struct clk *clk)
 +{
 + /* Do nothing */
 + return 0;
 +}
 +EXPORT_SYMBOL(clk_enable);
 +
 +void clk_disable(struct clk *clk)
 +{
 + /* Do nothing */
 +}
 +EXPORT_SYMBOL(clk_disable);
 +
 +static int clocks_init(void)
 +{
 + int osc, ext, pll, cpu, timer;
 + u32 tmp;
 +
 + osc = 3686400;
 + ext = 1300;
creaet a clock for this
 +
 + tmp = readl(PLLR)  24;
 + if (tmp)
 + pll = (osc * tmp) / 2;
 + else
 + pll

Re: [PATCH v2 2/3] ARM: clps711x: Add serial driver

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 20:26 Mon 15 Oct , Alexander Shiyan wrote:
 
 Signed-off-by: Alexander Shiyan shc_w...@mail.ru
 ---
  drivers/serial/Kconfig   |5 ++
  drivers/serial/Makefile  |1 +
  drivers/serial/serial_clps711x.c |  118 
 ++
  3 files changed, 124 insertions(+), 0 deletions(-)
  create mode 100644 drivers/serial/serial_clps711x.c
 
 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
 index 7eb96ed..02bc8bf 100644
 --- a/drivers/serial/Kconfig
 +++ b/drivers/serial/Kconfig
 @@ -43,6 +43,11 @@ config DRIVER_SERIAL_BLACKFIN
   default y
   bool Blackfin serial driver
  
 +config DRIVER_SERIAL_CLPS711X
 + depends on ARCH_CLPS711X
 + default y
 + bool CLPS711X serial driver
 +
  config DRIVER_SERIAL_ALTERA
   depends on NIOS2
   default y
 diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
 index e2d56b9..e6f1e22 100644
 --- a/drivers/serial/Makefile
 +++ b/drivers/serial/Makefile
 @@ -13,6 +13,7 @@ obj-$(CONFIG_DRIVER_SERIAL_NETX)+= serial_netx.o
  obj-$(CONFIG_DRIVER_SERIAL_LINUX_CONSOLE)+= linux_console.o
  obj-$(CONFIG_DRIVER_SERIAL_MPC5XXX)  += serial_mpc5xxx.o
  obj-$(CONFIG_DRIVER_SERIAL_BLACKFIN) += serial_blackfin.o
 +obj-$(CONFIG_DRIVER_SERIAL_CLPS711X) += serial_clps711x.o
  obj-$(CONFIG_DRIVER_SERIAL_NS16550)  += serial_ns16550.o
  obj-$(CONFIG_DRIVER_SERIAL_PL010)+= serial_pl010.o
  obj-$(CONFIG_DRIVER_SERIAL_S3C)  += serial_s3c.o
 diff --git a/drivers/serial/serial_clps711x.c 
 b/drivers/serial/serial_clps711x.c
 new file mode 100644
 index 000..462ba9f
 --- /dev/null
 +++ b/drivers/serial/serial_clps711x.c
 @@ -0,0 +1,118 @@
 +/*
 + * Simple CLPS711X serial driver
 + *
 + * (C) Copyright 2012 Alexander Shiyan shc_w...@mail.ru
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + */
 +
 +#include common.h
 +#include init.h
 +#include io.h
 +#include linux/clk.h
 +
 +#include mach/clps711x.h
 +
 +#define UBRLCR(x)(UBRLCR1 + (x) * 0x1000)
 +#define SYSCON(x)(SYSCON1 + (x) * 0x1000)
 +#define SYSFLG(x)(SYSFLG1 + (x) * 0x1000)
 +#define UARTDR(x)(UARTDR1 + (x) * 0x1000)
provide this via resoure

here 4 resources
 +
 +static int clps711x_setbaudrate(struct console_device *cdev, int baudrate)
 +{
 + int divisor;
 + u32 tmp;
 +
 + divisor = (clk_get_rate(cdev-dev-priv) / 16) / baudrate;
 +
 + tmp = readl(UBRLCR(cdev-dev-id))  ~UBRLCR_BAUD_MASK;
 + tmp |= divisor - 1;
 + writel(tmp, UBRLCR(cdev-dev-id));
 +
 + return 0;
 +}
 +
 +static void clps711x_init_port(struct console_device *cdev)
 +{
 + u32 tmp;
 +
 + /* Disable the UART */
 + writel(readl(SYSCON(cdev-dev-id))  ~SYSCON_UARTEN,
 +SYSCON(cdev-dev-id));
 +
 + /* Setup Line Control Register */
 + tmp = readl(UBRLCR(cdev-dev-id))  UBRLCR_BAUD_MASK;
 + tmp |= UBRLCR_FIFOEN | UBRLCR_WRDLEN8; /* FIFO on, 8N1 mode */
 + writel(tmp, UBRLCR(cdev-dev-id));
 +
 + /* Set default baudrate on initialization */
 + clps711x_setbaudrate(cdev, CONFIG_BAUDRATE);
 +
 + /* Enable the UART */
 + writel(readl(SYSCON(cdev-dev-id)) | SYSCON_UARTEN,
 +SYSCON(cdev-dev-id));
 +}
 +
 +static void clps711x_putc(struct console_device *cdev, char c)
 +{
 + /* Wait until there is space in the FIFO */
 + while (readl(SYSFLG(cdev-dev-id))  SYSFLG_UTXFF) {
 + }
drop the {}
 +
 + /* Send the character */
 + writew(c, UARTDR(cdev-dev-id));
 +}
 +
 +static int clps711x_getc(struct console_device *cdev)
 +{
 + u16 data;
 +
 + /* Wait until there is data in the FIFO */
 + while (readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE) {
 + }
 +
 + data = readw(UARTDR(cdev-dev-id));
 +
 + /* Check for an error flag */
 + if (data  (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR))
 + return -1;
 +
 + return (int)data;
 +}
 +
 +static int clps711x_tstc(struct console_device *cdev)
 +{
 + return !(readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE);
factorise those pull status as

status int xxx(data, mask) {}

Best Regards,
J.

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Re: [PATCH v2 3/3] ARM: clps711x: Add generic board support (CLEP7212)

2012-10-15 Thread Jean-Christophe PLAGNIOL-VILLARD

On 20:26 Mon 15 Oct , Alexander Shiyan wrote:
 This patch adds generic board support (CLEP7212, Linux ARM ID=91)
 for CLPS711X-target.
 
 Signed-off-by: Alexander Shiyan shc_w...@mail.ru
 ---
  arch/arm/Makefile   |1 +
  arch/arm/boards/clep7212/Makefile   |1 +
  arch/arm/boards/clep7212/clep7212.c |   64 
 +++
  arch/arm/boards/clep7212/config.h   |4 ++
  arch/arm/boards/clep7212/env/bin/mtdparts-add   |   21 +++
  arch/arm/boards/clep7212/env/boot/nor   |9 +++
  arch/arm/boards/clep7212/env/init/automount |   12 
  arch/arm/boards/clep7212/env/init/bootargs-base |8 +++
  arch/arm/boards/clep7212/env/init/general   |   12 
  arch/arm/boards/clep7212/env/init/hostname  |8 +++
  arch/arm/boards/clep7212/lowlevel.c |   56 
  arch/arm/configs/clps711x_defconfig |   42 +++
  arch/arm/mach-clps711x/Kconfig  |9 +++
  13 files changed, 247 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/boards/clep7212/Makefile
  create mode 100644 arch/arm/boards/clep7212/clep7212.c
  create mode 100644 arch/arm/boards/clep7212/config.h
  create mode 100644 arch/arm/boards/clep7212/env/bin/mtdparts-add
  create mode 100644 arch/arm/boards/clep7212/env/boot/nor
  create mode 100644 arch/arm/boards/clep7212/env/init/automount
  create mode 100644 arch/arm/boards/clep7212/env/init/bootargs-base
  create mode 100644 arch/arm/boards/clep7212/env/init/general
  create mode 100644 arch/arm/boards/clep7212/env/init/hostname
  create mode 100644 arch/arm/boards/clep7212/lowlevel.c
  create mode 100644 arch/arm/configs/clps711x_defconfig
 
 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
 index da80e00..05f9943 100644
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
 @@ -76,6 +76,7 @@ board-$(CONFIG_MACH_AT91SAM9G10EK)  := at91sam9261ek
  board-$(CONFIG_MACH_AT91SAM9G20EK)   := at91sam9260ek
  board-$(CONFIG_MACH_AT91SAM9X5EK):= at91sam9x5ek
  board-$(CONFIG_MACH_AT91SAM9M10G45EK):= at91sam9m10g45ek
 +board-$(CONFIG_MACH_CLEP7212):= clep7212
  board-$(CONFIG_MACH_DSS11)   := dss11
  board-$(CONFIG_MACH_EDB9301) := edb93xx
  board-$(CONFIG_MACH_EDB9302) := edb93xx
 diff --git a/arch/arm/boards/clep7212/Makefile 
 b/arch/arm/boards/clep7212/Makefile
 new file mode 100644
 index 000..7e58f10
 --- /dev/null
 +++ b/arch/arm/boards/clep7212/Makefile
 @@ -0,0 +1 @@
 +obj-y += clep7212.o lowlevel.o
 diff --git a/arch/arm/boards/clep7212/clep7212.c 
 b/arch/arm/boards/clep7212/clep7212.c
 new file mode 100644
 index 000..1d5828d
 --- /dev/null
 +++ b/arch/arm/boards/clep7212/clep7212.c
 @@ -0,0 +1,64 @@
 +/*
 + * Copyright (C) 2012 Alexander Shiyan shc_w...@mail.ru
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + */
 +
 +#include common.h
 +#include driver.h
 +#include init.h
 +#include partition.h
 +#include io.h
 +#include sizes.h
 +#include asm/armlinux.h
 +#include generated/mach-types.h
 +
 +#include mach/clps711x.h
 +#include mach/devices.h
 +
 +static int clps711x_mem_init(void)
 +{
 + ulong memsize = get_ram_size((ulong *)SDRAM_BASE, SZ_32M);
 +
 + arm_add_mem_device(ram0, SDRAM_BASE, memsize);
create a generic fuction as soc level
clps711x_add_mem(x);
 +
 + return 0;
 +}
 +mem_initcall(clps711x_mem_init);
 +
 +static int clps711x_devices_init(void)
 +{
 + u32 serial_h = 0, serial_l = readl(UNIQID);
 +
 + /* Setup Chipselects */
 + clps711x_setup_memcfg(0, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_16);
 + clps711x_setup_memcfg(1, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_8);
 + clps711x_setup_memcfg(2, MEMCFG_WAITSTATE_8_3 | MEMCFG_BUS_WIDTH_16 |
 +   MEMCFG_CLKENB);
 + clps711x_setup_memcfg(3, MEMCFG_WAITSTATE_6_1 | MEMCFG_BUS_WIDTH_32);
 +
 + add_cfi_flash_device(0, CS0_BASE, SZ_32M, 0);
 +
 + devfs_add_partition(nor0, 0x0, SZ_256K, DEVFS_PARTITION_FIXED,
 + self0);
 + devfs_add_partition(nor0, SZ_256K, SZ_256K, DEVFS_PARTITION_FIXED,
 + env0);
 +
 + armlinux_set_bootparams((void *)SDRAM_BASE + 0x100);
 + armlinux_set_architecture(MACH_TYPE_CLEP7212);
 + armlinux_set_serial(((u64)serial_h  32) | serial_l);
 +
 + return 0;
 +}
 +device_initcall(clps711x_devices_init);
 +
 +static int clps711x_console_init(void)
 +{
 + clps711x_add_uart(0);
 +
 + return 0;
 +}
 +console_initcall(clps711x_console_init);
 diff --git a/arch/arm/boards/clep7212/config.h 
 b/arch/arm/boards/clep7212/config.h
 new file mode 100644
 index

Re: [PATCH v2 1/3] ARM: Add CLPS711X architecture

2012-10-15 Thread Alexander Shiyan

On Mon, 15 Oct 2012 19:54:14 +0200
Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote:

 On 20:26 Mon 15 Oct , Alexander Shiyan wrote:
  This patch adds new architecture (CLPS711X) into barebox.
  The core-logic functionality of the device is built around an ARM720T
  processor running at clock speeds up to 90 MHz.
  
  Signed-off-by: Alexander Shiyan shc_w...@mail.ru
...
  +#include linux/clkdev.h
 split the code in 2
  - clock
  - clocksource in drivers/clocksource
  and cs as a driver
drivers/clocksource is missing in master repository and as far I know we are
made patches for master but not for next.

...
  +   osc = 3686400;
  +   ext = 1300;
 creaet a clock for this
This is constant frequencies and it is used only here. Is this really need?

...
  +void clps711x_add_uart(unsigned int id)
  +{
  +   add_generic_device_res(clps711x_serial, id, NULL, 0, NULL);
 where is the base address address?
Base address is not needed because it is impossible to request resource for
registers for this CPU. Registers is shared for all devices.

 where is the check on the id?
Simple check is provided in serial driver by definition, for example:
SYSFLG(x) ? SYSFLG2 : SYSFLG1, where x is id.
But, you are right, I will made one more check for id in probe.

-- 
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Re: [PATCH v2 2/3] ARM: clps711x: Add serial driver

2012-10-15 Thread Alexander Shiyan

On Mon, 15 Oct 2012 19:58:52 +0200
Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote:

  +static int clps711x_tstc(struct console_device *cdev)
  +{
  +   return !(readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE);
 factorise those pull status as
 
 status int xxx(data, mask) {}
Not clean understand this comment. You mean about one more define
for check status?

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Re: barebox@ELCE

2012-10-15 Thread Sascha Hauer

On Wed, Oct 10, 2012 at 12:49:41PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 On 11:54 Wed 10 Oct , Sascha Hauer wrote:
  On Wed, Oct 10, 2012 at 11:41:23AM +0200, Jean-Christophe PLAGNIOL-VILLARD 
  wrote:
   On 08:46 Wed 10 Oct , Sascha Hauer wrote:
Hi All,

As you might have noticed already there is a barebox presentation at the
ELCE this year in Barcelona. For everyone who is able to come I'd be
happy to see and meet you there.
I will talk about the current barebox status and the future directions
for barebox.
   for the future direction I thik we could discus about it here first
  
  Well those who have seen the patches I was recently working on won't be
  surprised: It goes into the direction of a multiplatform bootloader.
 can we add dt probe will full dt support (maybe drop the boards
 
 I'll to add multi boards support too specially usefull as a second stage. As
 example we could detect the board type in the pbl and let barebox select the
 correct one, also if a first stage oottloader exist it can pass the
 infotmation.
 
 I was thinking on arm in the same way as the kernel

That's exactly what I am working on.

Sascha

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Re: [PATCH v2 3/3] ARM: clps711x: Add generic board support (CLEP7212)

2012-10-15 Thread Alexander Shiyan

On Mon, 15 Oct 2012 20:03:59 +0200
Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote:

...
  +mkdir -p /mnt/disk0
  +automount -d /mnt/disk0 '[ -e /dev/disk0.0 ]  mount /dev/disk0.0 
  /mnt/disk0'
  +
  +mkdir -p /mnt/disk1
 I do not see any block driver
Sorry, this is my upstream :)

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Re: [PATCH 00/12] add bus device

2012-10-15 Thread Sascha Hauer

On Mon, Oct 15, 2012 at 04:49:35PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 On 15:21 Mon 15 Oct , Sascha Hauer wrote:
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -127,6 +127,11 @@ int register_device(struct device_d *new_device)
 
list_add_tail(new_device-bus_list, 
new_device-bus-device_list);
 
+   if (!new_device-parent) {
+   new_device-parent = new_device-bus-dev;
+   dev_add_child(new_device-parent, new_device);
   and I was wanting to add global name barebox and add everyone under to 
   it
   
   I choose to do let the bus manage the child
   and to create a device or not
  
  Any idea why we would need this?
 mdio bus as example I was thinking to drop the device as they are always
 attached to a ethernet device
 
 input bus too
 
 as example some bus as device specific so no need to add device as the device
 is already here
 
 I already implement this on arm and so it in the kernel arm too

The patch only makes the new device a child of the bus device when no
parent is set, so it would still be possible to make the phy a child
of the ethernet device.

Sascha


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[PATCH] make make -s more silent

2012-10-15 Thread Sascha Hauer

use $(kecho) instead of echo to not output messages with
make -s

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 Makefile|6 +++---
 arch/arm/pbl/Makefile   |2 +-
 arch/arm/tools/Makefile |4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 881680d..af3711a 100644
--- a/Makefile
+++ b/Makefile
@@ -894,7 +894,7 @@ endef
 # directory for generated filesas used by some architectures.
 define create-symlink
if [ ! -L include/asm ]; then   \
-   echo '  SYMLINK $@ - include/asm-$(SRCARCH)';  \
+   $(kecho) '  SYMLINK $@ - include/asm-$(SRCARCH)';  
\
if [ ! -d include/asm-$(SRCARCH) ]; then\
mkdir -p include/asm-$(SRCARCH);\
fi; \
@@ -907,11 +907,11 @@ include/asm:
$(Q)$(create-symlink)
 
 include/config.h: include/config/auto.conf
-   @echo '  SYMLINK $@ - $(BOARD)/config.h'
+   $(kecho) '  SYMLINK $@ - $(BOARD)/config.h'
 ifneq ($(KBUILD_SRC),)
$(Q)ln -fsn $(srctree)/$(BOARD)/config.h $@
 else
-   @ln -fsn ../$(BOARD)/config.h $@
+   $(Q)ln -fsn ../$(BOARD)/config.h $@
 endif
 
 # Generate some files
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index fe68e72..4e4e7ef 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -14,7 +14,7 @@ extra-y   += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern
 $(obj)/zbarebox.bin:   $(obj)/zbarebox FORCE
$(call if_changed,objcopy)
$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
-   @echo '  Barebox: $@ is ready'
+   $(kecho) '  Barebox: $@ is ready'
 
 $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
$(call if_changed,disasm)
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index 635cb18..7d8c14a 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -5,6 +5,6 @@
 #
 
 include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
-   @echo '  Generating $@'
-   @mkdir -p $(dir $@)
+   $(kecho) '  Generating $@'
+   $(Q)mkdir -p $(dir $@)
$(Q)$(AWK) -f $^  $@ || { rm -f $@; /bin/false; }
-- 
1.7.10.4


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[PATCH] ARM bootz: use request_sdram_region

2012-10-15 Thread Sascha Hauer

We now have request_sdram_region to request a region. Use
it instead of a comparison with MALLOC_BASE.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/lib/bootz.c |   12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm/lib/bootz.c b/arch/arm/lib/bootz.c
index f394a6b..f069127 100644
--- a/arch/arm/lib/bootz.c
+++ b/arch/arm/lib/bootz.c
@@ -30,6 +30,7 @@ static int do_bootz(int argc, char *argv[])
u32 end;
int usemap = 0;
struct memory_bank *bank = list_first_entry(memory_banks, struct 
memory_bank, list);
+   struct resource *res = NULL;
 
if (argc != 2)
return COMMAND_ERROR_USAGE;
@@ -83,8 +84,10 @@ static int do_bootz(int argc, char *argv[])
zimage = xmalloc(end);
} else {
zimage = (void *)bank-start + SZ_8M;
-   if (bank-start + SZ_8M + end = MALLOC_BASE) {
-   printf(won't overwrite malloc space with 
image\n);
+   res = request_sdram_region(zimage,
+   bank-start + SZ_8M, end);
+   if (!res) {
+   printf(can't request region for kernel\n);
goto err_out1;
}
}
@@ -94,7 +97,7 @@ static int do_bootz(int argc, char *argv[])
ret = read(fd, zimage + sizeof(*header), end - sizeof(*header));
if (ret  end - sizeof(*header)) {
printf(could not read %s\n, argv[1]);
-   goto err_out1;
+   goto err_out2;
}
}
 
@@ -113,6 +116,9 @@ static int do_bootz(int argc, char *argv[])
 
return 0;
 
+err_out2:
+   if (res)
+   release_sdram_region(res);
 err_out1:
free(zimage);
 err_out:
-- 
1.7.10.4


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[PATCH 6/6] OMAP4: clean voltage switch

2012-10-15 Thread Vicente Bergas

OMAP4 requires that parent domains scale ahead of dependent domains.
This is due to the restrictions in timing closure. To ensure
a consistent behavior across all OMAP4 SoC, ensure that
vdd_core scale first, then vdd_mpu and finally vdd_iva.

TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
   |---| (SET1 default 1.4V)
   |   (programmed voltage)
   | - (This switch happens on mux7,pullup)
vdd_mpu(TPS) -/ (OPP boot voltage)
 - (programmed voltage)
vdd_core(TWL6030)---/ (OPP boot voltage)
Problem 1)|- Tx --|
   timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.

By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
   (programmed voltage)
vdd_mpu(TPS) / (Opp boot voltage)
   - (programmed voltage)
vdd_core(TWL6030)-/ (OPP boot voltage)

original patch from:
http://lists.denx.de/pipermail/u-boot/2012-March/119149.html
http://lists.denx.de/pipermail/u-boot/2012-March/119150.html

Signed-off-by: Vicente Bergas vice...@gmail.com
---
 arch/arm/boards/archosg9/mux.c  |  9 +
 arch/arm/mach-omap/include/mach/omap4-clock.h   |  2 +-
 arch/arm/mach-omap/include/mach/omap4-silicon.h |  2 +-
 arch/arm/mach-omap/omap4_clock.c| 37 +-
 arch/arm/mach-omap/omap4_generic.c  | 52 -
 5 files changed, 46 insertions(+), 56 deletions(-)

diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c
index 7ca5057..c8695c0 100644
--- a/arch/arm/boards/archosg9/mux.c
+++ b/arch/arm/boards/archosg9/mux.c
@@ -441,7 +441,7 @@ static const struct pad_conf_entry wkup_padconf_array[] = {
/* gpio_wk30   */
{ FREF_CLK3_REQ, M3 },
/* gpio_wk7*/ /* tps62361_vsel0 */
-   { FREF_CLK4_REQ, IEN | PTU | M3 },
+   { FREF_CLK4_REQ, M3 },
 };
 
 void set_muxconf_regs(void){
@@ -449,11 +449,4 @@ void set_muxconf_regs(void){
core_padconf_array, ARRAY_SIZE(core_padconf_array));
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP,
wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array));
-
-   /* gpio_wk7 is used for controlling TPS on 4460 */
-   if (omap4_revision() = OMAP4460_ES1_0) {
-   writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
-   /* Enable GPIO-1 clocks before TPS initialization */
-   omap4_enable_gpio1_wup_clocks();
-   }
 }
diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h 
b/arch/arm/mach-omap/include/mach/omap4-clock.h
index e5302d6..8cbc061 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -335,5 +335,5 @@ void omap4_lock_core_dpll_shadow(const struct dpll_param 
*param);
 void omap4_enable_gpio1_wup_clocks(void);
 void omap4_enable_gpio_clocks(void);
 void omap4_enable_all_clocks(void);
-void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
+void omap4_do_scale_tps62361(int vsel0_pin, u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index 71ffe39..137cc88 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -196,6 +196,6 @@ struct dpll_param;
 void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(unsigned vsel0_pin);
+noinline int omap4_scale_vcores(int vsel0_pin);
 
 #endif
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 1481f16..f7927d2 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -394,9 +394,38 @@ void omap4_enable_all_clocks(void)
sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
 }
 
-void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
+#define GPIO_MASK  0x1f
+#define GPIO_OE0x34
+#define GPIO_CLEARDATAOUT  0x90
+#define GPIO_SETDATAOUT0x94
+
+static void __iomem *omap4_get_gpio_base(unsigned gpio)
+{
+   void __iomem *base;
+
+   if (gpio  32)
+   base = (void *)0x4a310100;
+   else
+   base = (void *)(0x48053100 + ((gpio  ~GPIO_MASK)  8));
+
+   return base;
+}
+
+void omap4_do_scale_tps62361(int vsel0_pin, u32 reg,

Re: [PATCH v2 2/3] ARM: clps711x: Add serial driver

2012-10-15 Thread Sascha Hauer

On Mon, Oct 15, 2012 at 07:58:52PM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 On 20:26 Mon 15 Oct , Alexander Shiyan wrote:
  
  +
  +#define UBRLCR(x)  (UBRLCR1 + (x) * 0x1000)
  +#define SYSCON(x)  (SYSCON1 + (x) * 0x1000)
  +#define SYSFLG(x)  (SYSFLG1 + (x) * 0x1000)
  +#define UARTDR(x)  (UARTDR1 + (x) * 0x1000)
 provide this via resoure
 
 here 4 resources

We already had this. This SoC has a very strange register layout. The
registers for the UARTs are spread around the SoC and the registers
are not even exclusively used for the UARTs. They have bits which are
also used for the timer and other stuff.

  +static int clps711x_tstc(struct console_device *cdev)
  +{
  +   return !(readl(SYSFLG(cdev-dev-id))  SYSFLG_URXFE);
 factorise those pull status as
 
 status int xxx(data, mask) {}

I don'r understand this. This is a single register read, there's not
much to factorize and the code is easy to read.

Sascha


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Re: [PATCH 4/4] memory: fix memory calculation

2012-10-15 Thread Sascha Hauer

On Mon, Oct 15, 2012 at 03:22:42PM +0200, Alexander Aring wrote:
 Fix memory calculation.
 
 Signed-off-by: Alexander Aring a.ar...@phytec.de
 ---
  common/meminfo.c |8 
  common/memory.c  |4 ++--
  2 files changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/common/meminfo.c b/common/meminfo.c
 index b2b09da..13633a2 100644
 --- a/common/meminfo.c
 +++ b/common/meminfo.c
 @@ -15,9 +15,9 @@ static int display_meminfo(void)
  #endif
  
   debug(barebox code: 0x%p - 0x%p (size 0x%08lx)\n,
 - _stext, _etext, text_size);
 + _stext, _etext - 1, text_size);
   debug(bss segment:  0x%p - 0x%p (size 0x%08lx)\n,
 - __bss_start, __bss_stop, bss_size);
 + __bss_start, __bss_stop - 1, bss_size);
  #ifdef DEBUG
   printf(malloc space: 0x%08lx - 0x%08lx (size 0x%08lx)\n,
   mstart, mend, msize);
 @@ -28,11 +28,11 @@ static int display_meminfo(void)
  #ifdef CONFIG_ARM
  #ifdef DEBUG
   printf(stack space:  0x%08x - 0x%08x (size 0x%08x)\n,
 - STACK_BASE, STACK_BASE + STACK_SIZE,
 + STACK_BASE, STACK_BASE + STACK_SIZE - 1,
   STACK_SIZE);
  #else
   printf(stack space:  0x%08x - 0x%08x (size %s)\n,
 - STACK_BASE, STACK_BASE + STACK_SIZE,
 + STACK_BASE, STACK_BASE + STACK_SIZE - 1,
   size_human_readable(STACK_SIZE));

Hm, you copied wrong code in an earlier patch in this series which
you fix afterwards. That's not good, fixes, should always come first.
This for example makes it possible to apply the fix to the master
branch and feature additions to -next.

Besides, printing the exact values for the debug case and
size_human_readable otherwise is unnecessary churn. All the
information above can be retrieved using the iomem command
anyway, so removing the code altogether seems more useful.

  #endif
  #endif
 diff --git a/common/memory.c b/common/memory.c
 index 8919ab1..6bf4af6 100644
 --- a/common/memory.c
 +++ b/common/memory.c
 @@ -74,11 +74,11 @@ static int mem_malloc_resource(void)
   request_sdram_region(barebox,
   (unsigned long)_stext,
   (unsigned long)_etext -
 - (unsigned long)_stext + 1);
 + (unsigned long)_stext);
   request_sdram_region(bss,
   (unsigned long)__bss_start,
   (unsigned long)__bss_stop -
 - (unsigned long)__bss_start + 1);
 + (unsigned long)__bss_start);

That's a useful fix. Can we have this as a separate patch?

Sascha


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