Re: [PATCH 4/4] ArchosG9: add keyboard input and new reset menu entries

[vj]

On Mon, Mar 11, 2013 at 10:45 PM, Sascha Hauer  wrote:
> On Mon, Mar 11, 2013 at 12:36:07AM +0100, Vicente Bergas wrote:
>>
>> Signed-off-by: Vicente Bergas 
>> ---
>>  arch/arm/boards/archosg9/board.c  | 25 +++
>>  arch/arm/boards/archosg9/env/bin/init | 28 
>> ++
>>  arch/arm/boards/archosg9/env/boot/usb-android |  2 +-
>>  arch/arm/boards/archosg9/env/boot/usb-linux   |  2 +-
>>  arch/arm/boards/archosg9/env/menu/mainmenu| 29 
>> +++
>>  arch/arm/configs/archosg9_defconfig   | 11 ++
>>  6 files changed, 91 insertions(+), 6 deletions(-)
>>  create mode 100644 arch/arm/boards/archosg9/env/bin/init
>>  create mode 100644 arch/arm/boards/archosg9/env/menu/mainmenu
>>
>> diff --git a/arch/arm/boards/archosg9/board.c 
>> b/arch/arm/boards/archosg9/board.c
>> index bf247de..edeb871 100644
>> --- a/arch/arm/boards/archosg9/board.c
>> +++ b/arch/arm/boards/archosg9/board.c
>> @@ -20,6 +20,9 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>> +#include 
>> +#include 
>>  #include "archos_features.h"
>>
>>  static int archosg9_console_init(void){
>> @@ -44,11 +47,33 @@ mem_initcall(archosg9_mem_init);
>>  static struct i2c_board_info i2c_devices[] = {
>>   { I2C_BOARD_INFO("twl6030", 0x48), },
>>  };
>> +#ifdef CONFIG_KEYBOARD_TWL6030
>> +static struct twl6030_pwrbtn_platform_data pwrbtn_data = {
>> + .code = KEY_ENTER
>> +};
>> +#endif
>> +#ifdef CONFIG_KEYBOARD_GPIO
>> +static struct gpio_keys_button keys[] = {
>> + { .code = KEY_UP  , .gpio = 43, .active_low = 1 },
>> + { .code = KEY_DOWN, .gpio = 44, .active_low = 1 },
>> +};
>> +static struct gpio_keys_platform_data gk_data = {
>> + .buttons = keys,
>> + .nbuttons = ARRAY_SIZE(keys),
>> +};
>> +#endif
>>
>>  static int archosg9_devices_init(void){
>>   i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
>>   omap44xx_add_i2c1(NULL);
>>   omap44xx_add_mmc1(NULL);
>> +#ifdef CONFIG_KEYBOARD_TWL6030
>> + add_generic_device_res("twl6030_pwrbtn", DEVICE_ID_DYNAMIC, 0, 0,
>> + &pwrbtn_data);
>> +#endif
>> +#ifdef CONFIG_KEYBOARD_GPIO
>> + add_gpio_keys_device(DEVICE_ID_DYNAMIC, &gk_data);
>> +#endif
>
> If you are not really really concerned about binary size I suggest to
> drop the ifdefs. It makes for better readability.
>
> Sascha
>
> --
> Pengutronix e.K.   | |
> Industrial Linux Solutions | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
> Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

In fact I'm concerned about size, the first stage bootloader has been
increased a lot since sd-card booting support was enabled (fat, mmc)
and had to enable the thumb2 mode because of this.
So, only required code is desirable to go into the first stage.

Regards,
  Vicente.

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[PATCH 2/4] twl6030: add power button as an input key

[Vicente Bergas]

Done as suggested.
Thanks for the suggestion.

Signed-off-by: Vicente Bergas 
---
 drivers/input/Kconfig  |   7 +++
 drivers/input/Makefile |   1 +
 drivers/input/twl6030_pwrbtn.c | 112 +
 include/twl6030_pwrbtn.h   |   9 
 4 files changed, 129 insertions(+)
 create mode 100644 drivers/input/twl6030_pwrbtn.c
 create mode 100644 include/twl6030_pwrbtn.h

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index a6f1f47..3d9016b 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -38,4 +38,11 @@ config KEYBOARD_QT1070
  Say Y here if you want to use Atmel AT42QT1070 QTouch
  Sensor chip as input device.
 
+config KEYBOARD_TWL6030
+   tristate "TWL6030 power button"
+   depends on MFD_TWL6030
+   select POLLER
+   help
+ Say Y here if you want to use TWL6030 power button as a key.
+
 endmenu
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index d042980..b9bcc82 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o
+obj-$(CONFIG_KEYBOARD_TWL6030) += twl6030_pwrbtn.o
 obj-$(CONFIG_KEYBOARD_IMX_KEYPAD) += imx_keypad.o
 obj-$(CONFIG_KEYBOARD_QT1070) += qt1070.o
diff --git a/drivers/input/twl6030_pwrbtn.c b/drivers/input/twl6030_pwrbtn.c
new file mode 100644
index 000..ec6cf7f
--- /dev/null
+++ b/drivers/input/twl6030_pwrbtn.c
@@ -0,0 +1,112 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct twl6030_pwrbtn_internal_data {
+   int code;
+   u8 previous_state;
+   struct twl6030 *twl6030;
+   struct kfifo *recv_fifo;
+   struct console_device cdev;
+   struct poller_struct poller;
+};
+
+#define PWR_PWRON_IRQ (1 << 0)
+
+static void ic2_key_poller(struct poller_struct *poller)
+{
+   struct twl6030_pwrbtn_internal_data *idata = container_of(
+   poller, struct twl6030_pwrbtn_internal_data, poller);
+   u8 val;
+
+   if (twl6030_reg_read(idata->twl6030, TWL6030_PMCM_HW, &val)) {
+   dev_err(idata->cdev.dev, "reading i2c\n");
+   return;
+   }
+   val = !(val & PWR_PWRON_IRQ);
+   if (val != idata->previous_state && val) {
+   kfifo_put(idata->recv_fifo, (u_char *)&idata->code,
+   sizeof(int));
+   dev_dbg(idata->cdev.dev, "pressed power button as %d\n",
+   idata->code);
+   }
+   idata->previous_state = val;
+}
+
+static int twl6030_pwrbtn_tstc(struct console_device *cdev)
+{
+   struct twl6030_pwrbtn_internal_data *idata = container_of(
+   cdev, struct twl6030_pwrbtn_internal_data, cdev);
+
+   return kfifo_len(idata->recv_fifo) ? 1 : 0;
+}
+
+static int twl6030_pwrbtn_getc(struct console_device *cdev)
+{
+   int code = 0;
+   struct twl6030_pwrbtn_internal_data *idata = container_of(
+   cdev, struct twl6030_pwrbtn_internal_data, cdev);
+
+   kfifo_get(idata->recv_fifo, (u_char *)&code, sizeof(int));
+   return code;
+}
+
+static int __init twl6030_pwrbtn_probe(struct device_d *dev)
+{
+   struct twl6030_pwrbtn_internal_data *idata;
+   struct twl6030_pwrbtn_platform_data *pdata;
+
+   pdata = dev->platform_data;
+   if (!pdata) {
+   dev_err(dev, "missing platform_data\n");
+   return -ENODEV;
+   }
+
+   idata = xzalloc(sizeof(struct twl6030_pwrbtn_internal_data));
+   if (!idata) {
+   dev_err(dev, "out of memory allocating idata\n");
+   return -ENOMEM;
+   }
+
+   idata->recv_fifo = kfifo_alloc(sizeof(int));
+   if (!idata->recv_fifo) {
+   dev_err(dev, "out of memory allocating kfifo\n");
+   free(idata);
+   return -ENOMEM;
+   }
+
+   idata->code = pdata->code;
+   idata->twl6030 = twl6030_get();
+   idata->poller.func = ic2_key_poller;
+
+   dev->type_data = &idata->cdev;
+   idata->cdev.dev = dev;
+   idata->cdev.f_caps = CONSOLE_STDIN;
+   idata->cdev.tstc = twl6030_pwrbtn_tstc;
+   idata->cdev.getc = twl6030_pwrbtn_getc;
+   console_register(&idata->cdev);
+
+   return poller_register(&idata->poller);
+}
+
+static struct driver_d twl6030_pwrbtn_driver = {
+   .name   = "twl6030_pwrbtn",
+   .probe  = twl6030_pwrbtn_probe,
+};
+device_platform_driver(twl6030_pwrbtn_driver

[PATCH 3/4] OMAP4: add command to select next boot device priority

[Vicente Bergas]

getopt: done as suggested
bootsrc: done as suggested

IMO this command will be used 99% of the times followed by a reset.
The -r option will avoid the burden of executing always the same two commands.

Signed-off-by: Vicente Bergas 
---
 arch/arm/mach-omap/include/mach/omap4-silicon.h | 20 ++
 arch/arm/mach-omap/omap4_generic.c  | 20 ++
 commands/Kconfig|  5 ++
 commands/Makefile   |  1 +
 commands/boot_order.c   | 88 +
 5 files changed, 134 insertions(+)
 create mode 100644 commands/boot_order.c

diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index 9e82435..7e67abc 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -161,6 +161,25 @@
 #define OMAP44XX_PRM_RSTCTRL_RESET 0x01
 
 /*
+ * SAR (Save & Rescue) memory region
+ */
+#define OMAP44XX_SAR_RAM_BASE  0x4a326000
+#define OMAP44XX_SAR_CH_ADDRESS(OMAP44XX_SAR_RAM_BASE + 0xA00)
+#define OMAP44XX_SAR_CH_START  (OMAP44XX_SAR_RAM_BASE + 0xA0C)
+#define OMAP44XX_SAR_BOOT_VOID 0x00
+#define OMAP44XX_SAR_BOOT_XIP  0x01
+#define OMAP44XX_SAR_BOOT_XIPWAIT  0x02
+#define OMAP44XX_SAR_BOOT_NAND 0x03
+#define OMAP44XX_SAR_BOOT_ONENAND  0x04
+#define OMAP44XX_SAR_BOOT_MMC1 0x05
+#define OMAP44XX_SAR_BOOT_MMC2_1   0x06
+#define OMAP44XX_SAR_BOOT_MMC2_2   0x07
+#define OMAP44XX_SAR_BOOT_UART 0x43
+#define OMAP44XX_SAR_BOOT_USB_10x45
+#define OMAP44XX_SAR_BOOT_USB_ULPI 0x46
+#define OMAP44XX_SAR_BOOT_USB_20x47
+
+/*
  * Non-secure SRAM Addresses
  * Non-secure RAM starts at 0x4030 for GP devices. But we keep SRAM_BASE
  * at 0x40304000(EMU base) so that our code works for both EMU and GP
@@ -212,6 +231,7 @@ void omap4_ddr_init(const struct ddr_regs *, const struct 
dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
 noinline int omap4_scale_vcores(unsigned vsel0_pin);
+void omap4_set_warmboot_order(u32 *device_list);
 
 #endif
 
diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index 2a09eb6..e062332 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -41,6 +41,26 @@ void __noreturn reset_cpu(unsigned long addr)
while (1);
 }
 
+void omap4_set_warmboot_order(u32 *device_list)
+{
+   const u32 CH[] = {
+   0xCF00AA01,
+   0x000C,
+   (device_list[0] << 16) | 0x,
+   (device_list[2] << 16) | device_list[1],
+   0x | device_list[3],
+   0x,
+   0x,
+   0x,
+   0x
+   };
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(CH); i++)
+   writel(CH[i], OMAP44XX_SAR_CH_START + i*sizeof(CH[0]));
+   writel(OMAP44XX_SAR_CH_START, OMAP44XX_SAR_CH_ADDRESS);
+}
+
 #define WATCHDOG_WSPR  0x48
 #define WATCHDOG_WWPS  0x34
 
diff --git a/commands/Kconfig b/commands/Kconfig
index 0062758..524f00e 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -474,6 +474,11 @@ config CMD_POWEROFF
depends on HAS_POWEROFF
prompt "poweroff"
 
+config CMD_BOOT_ORDER
+   tristate
+   depends on ARCH_OMAP4
+   prompt "boot_order"
+
 config CMD_GO
tristate
prompt "go"
diff --git a/commands/Makefile b/commands/Makefile
index 0ae6b95..428da57 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CMD_SLEEP)   += sleep.o
 obj-$(CONFIG_CMD_MSLEEP)   += msleep.o
 obj-$(CONFIG_CMD_RESET)+= reset.o
 obj-$(CONFIG_CMD_POWEROFF) += poweroff.o
+obj-$(CONFIG_CMD_BOOT_ORDER)   += boot_order.o
 obj-$(CONFIG_CMD_GO)   += go.o
 obj-$(CONFIG_NET)  += net.o
 obj-$(CONFIG_CMD_PARTITION)+= partition.o
diff --git a/commands/boot_order.c b/commands/boot_order.c
new file mode 100644
index 000..1c31c16
--- /dev/null
+++ b/commands/boot_order.c
@@ -0,0 +1,88 @@
+/*
+ * boot_order.c - configure omap warm boot
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct bootsrc {
+   const char *name;
+   uint32_t sar;
+};
+
+static int cmd_boot_order(int argc, char *argv[])
+{
+   const struct bootsrc src_list[] = {
+   {"xip" , OMAP44XX_SAR_BOOT_XIP },
+   {"xipwait" , OMAP44XX_SAR_BOOT_XIPWAIT },
+  

[PATCH 8/9] archos: add atag appender for all features

[Vicente Bergas]

> I don't see a point in obfuscating this so much. Please call only call
> the features you want to have setup in the first place. For your own
> debugging purposes it makes no difference whether you edit the C file
> above or this header file. For different tablets with different features
> you need to find another solution anyway.
> 
> Sascha

I agree with you. My first intention was to put a place-holder for each feature
so it would be easy to customize for each tablet. But anyways the file has to
be edited for customization.
This second version of the patch leaves the same features, which are required,
but still has the changes for zeroing each feature before setting it.

Signed-off-by: Vicente Bergas 
---
 arch/arm/boards/archosg9/archos_features.c | 58 +-
 1 file changed, 16 insertions(+), 42 deletions(-)

diff --git a/arch/arm/boards/archosg9/archos_features.c 
b/arch/arm/boards/archosg9/archos_features.c
index 5d93403..b396734 100644
--- a/arch/arm/boards/archosg9/archos_features.c
+++ b/arch/arm/boards/archosg9/archos_features.c
@@ -27,9 +27,9 @@ static void setup_feature_core(void)
features->hdr.tag = FTAG_CORE;
features->hdr.size = feature_tag_size(feature_tag_core);
 
+   memset(&features->u.core, 0, sizeof(features->u.core));
features->u.core.magic = FEATURE_LIST_MAGIC;
features->u.core.list_revision = FEATURE_LIST_REV;
-   features->u.core.flags = 0;
 
features = feature_tag_next(features);
 }
@@ -38,8 +38,7 @@ static void setup_feature_product_name(void)
features->hdr.tag = FTAG_PRODUCT_NAME;
features->hdr.size = feature_tag_size(feature_tag_product_name);
 
-   memset(features->u.product_name.name, 0,
-   sizeof(features->u.product_name.name));
+   memset(&features->u.product_name, 0, sizeof(features->u.product_name));
sprintf(features->u.product_name.name, "A80S");
features->u.product_name.id = 0x13A8;
 
@@ -50,10 +49,8 @@ static void setup_feature_product_serial_number(void)
features->hdr.tag = FTAG_PRODUCT_SERIAL_NUMBER;
features->hdr.size = feature_tag_size(feature_tag_product_serial);
 
-   features->u.product_serial.serial[0] = 0;
-   features->u.product_serial.serial[1] = 0;
-   features->u.product_serial.serial[2] = 0;
-   features->u.product_serial.serial[3] = 0;
+   memset(&features->u.product_serial, 0,
+   sizeof(features->u.product_serial));
 
features = feature_tag_next(features);
 }
@@ -62,14 +59,7 @@ static void setup_feature_product_mac_address(void)
features->hdr.tag = FTAG_PRODUCT_MAC_ADDRESS;
features->hdr.size = feature_tag_size(feature_tag_product_mac_address);
 
-   features->u.mac_address.addr[0] = 0;
-   features->u.mac_address.addr[1] = 0;
-   features->u.mac_address.addr[2] = 0;
-   features->u.mac_address.addr[3] = 0;
-   features->u.mac_address.addr[4] = 0;
-   features->u.mac_address.addr[5] = 0;
-   features->u.mac_address.reserved1 = 0;
-   features->u.mac_address.reserved2 = 0;
+   memset(&features->u.mac_address, 0, sizeof(features->u.mac_address));
 
features = feature_tag_next(features);
 }
@@ -78,6 +68,8 @@ static void setup_feature_board_pcb_revision(void)
features->hdr.tag = FTAG_BOARD_PCB_REVISION;
features->hdr.size = feature_tag_size(feature_tag_board_revision);
 
+   memset(&features->u.board_revision, 0,
+   sizeof(features->u.board_revision));
features->u.board_revision.revision = 5;
 
features = feature_tag_next(features);
@@ -87,23 +79,10 @@ static void setup_feature_sdram(void)
features->hdr.tag = FTAG_SDRAM;
features->hdr.size = feature_tag_size(feature_tag_sdram);
 
-   memset(features->u.sdram.vendor, 0, sizeof(features->u.sdram.vendor));
-   memset(features->u.sdram.product, 0,
-   sizeof(features->u.sdram.product));
+   memset(&features->u.sdram, 0, sizeof(features->u.sdram));
sprintf(features->u.sdram.vendor , "elpida");
-   sprintf(features->u.sdram.product, "EDB8064B1PB"/*"EDB4064B2PB"*/);
-   features->u.sdram.type = 0;
-   features->u.sdram.revision = 0;
-   features->u.sdram.flags= 0;
-   features->u.sdram.clock= 400;
-   features->u.sdram.param_0  = 0;
-   features->u.sdram.param_1  = 0;
-   features->u.sdram.param_2  = 0;
-   features->u.sdram.param_3  = 0;
-   features->u.sdram.param_4  = 0;
-   features->u.sdram.param_5  = 0;
-   features->u.sdram.param_6  = 0;
-   features->u.sdram.param_7  = 0;
+   sprintf(features->u.sdram.product, "EDB8064B1PB");
+   features->u.sdram.clock = 400;
 
features = feature_tag_next(features);
 }
@@ -112,6 +91,7 @@ static void setup_feature_pmic(void)
features->hdr.tag = FTAG_PMIC;
features->hdr.size = feature_tag_size(feature_tag_pmic);
 
+   memset(&features->u.pm

Re: [PATCH 4/4] ArchosG9: add keyboard input and new reset menu entries

[Sascha Hauer]

On Mon, Mar 11, 2013 at 12:36:07AM +0100, Vicente Bergas wrote:
> 
> Signed-off-by: Vicente Bergas 
> ---
>  arch/arm/boards/archosg9/board.c  | 25 +++
>  arch/arm/boards/archosg9/env/bin/init | 28 ++
>  arch/arm/boards/archosg9/env/boot/usb-android |  2 +-
>  arch/arm/boards/archosg9/env/boot/usb-linux   |  2 +-
>  arch/arm/boards/archosg9/env/menu/mainmenu| 29 
> +++
>  arch/arm/configs/archosg9_defconfig   | 11 ++
>  6 files changed, 91 insertions(+), 6 deletions(-)
>  create mode 100644 arch/arm/boards/archosg9/env/bin/init
>  create mode 100644 arch/arm/boards/archosg9/env/menu/mainmenu
> 
> diff --git a/arch/arm/boards/archosg9/board.c 
> b/arch/arm/boards/archosg9/board.c
> index bf247de..edeb871 100644
> --- a/arch/arm/boards/archosg9/board.c
> +++ b/arch/arm/boards/archosg9/board.c
> @@ -20,6 +20,9 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
> +#include 
>  #include "archos_features.h"
>  
>  static int archosg9_console_init(void){
> @@ -44,11 +47,33 @@ mem_initcall(archosg9_mem_init);
>  static struct i2c_board_info i2c_devices[] = {
>   { I2C_BOARD_INFO("twl6030", 0x48), },
>  };
> +#ifdef CONFIG_KEYBOARD_TWL6030
> +static struct twl6030_pwrbtn_platform_data pwrbtn_data = {
> + .code = KEY_ENTER
> +};
> +#endif
> +#ifdef CONFIG_KEYBOARD_GPIO
> +static struct gpio_keys_button keys[] = {
> + { .code = KEY_UP  , .gpio = 43, .active_low = 1 },
> + { .code = KEY_DOWN, .gpio = 44, .active_low = 1 },
> +};
> +static struct gpio_keys_platform_data gk_data = {
> + .buttons = keys,
> + .nbuttons = ARRAY_SIZE(keys),
> +};
> +#endif
>  
>  static int archosg9_devices_init(void){
>   i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
>   omap44xx_add_i2c1(NULL);
>   omap44xx_add_mmc1(NULL);
> +#ifdef CONFIG_KEYBOARD_TWL6030
> + add_generic_device_res("twl6030_pwrbtn", DEVICE_ID_DYNAMIC, 0, 0,
> + &pwrbtn_data);
> +#endif
> +#ifdef CONFIG_KEYBOARD_GPIO
> + add_gpio_keys_device(DEVICE_ID_DYNAMIC, &gk_data);
> +#endif

If you are not really really concerned about binary size I suggest to
drop the ifdefs. It makes for better readability.

Sascha

-- 
Pengutronix e.K.   | |
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Re: [PATCH 3/4] OMAP4: add command to select next boot device priority

[Sascha Hauer]

On Mon, Mar 11, 2013 at 12:36:06AM +0100, Vicente Bergas wrote:
> On OMAP4 SoC there is a SAR memory region (Save & Rescue) where the ROM
> code reads the device to boot from.
> This patch adds a way to set this.
> 
> Signed-off-by: Vicente Bergas 
> ---
>  arch/arm/mach-omap/include/mach/omap4-silicon.h | 20 ++
>  arch/arm/mach-omap/omap4_generic.c  | 20 ++
>  commands/Kconfig|  5 ++
>  commands/Makefile   |  1 +
>  commands/boot_order.c   | 83 
> +
>  5 files changed, 129 insertions(+)
>  create mode 100644 commands/boot_order.c
> 
> +static int cmd_boot_order(int argc, char *argv[])
> +{
> + u32 device_list[] = {
> + OMAP44XX_SAR_BOOT_VOID,
> + OMAP44XX_SAR_BOOT_VOID,
> + OMAP44XX_SAR_BOOT_VOID,
> + OMAP44XX_SAR_BOOT_VOID,
> + };
> + int i, j = 1, do_reset = 0;
> +
> + if (argc > 1 && strcmp(argv[1], "-r") == 0) {
> + do_reset = 1;
> + j = 2;
> + }

You should use getopt() to parse options.

> + for (i = 0; i < 4 && j < argc; i++, j++) {
> + if  (strcmp(argv[j], "xip") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_XIP;
> + else if (strcmp(argv[j], "xipwait") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_XIPWAIT;
> + else if (strcmp(argv[j], "nand") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_NAND;
> + else if (strcmp(argv[j], "onenand") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_ONENAND;
> + else if (strcmp(argv[j], "mmc1") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_MMC1;
> + else if (strcmp(argv[j], "mmc2_1") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_MMC2_1;
> + else if (strcmp(argv[j], "mmc2_2") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_MMC2_2;
> + else if (strcmp(argv[j], "uart") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_UART;
> + else if (strcmp(argv[j], "usb_1") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_USB_1;
> + else if (strcmp(argv[j], "usb_ulpi") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_USB_ULPI;
> + else if (strcmp(argv[j], "usb_2") == 0)
> + device_list[i] = OMAP44XX_SAR_BOOT_USB_2;

You could add a table for this, something like

struct bootsrc {
const char *name;
uint32_t sar;
};

> + }
> + if (device_list[0] == OMAP44XX_SAR_BOOT_VOID) {
> + printf("First boot device can't be void\n");
> + return COMMAND_ERROR_USAGE;
> + }
> + omap4_set_warmboot_order(device_list);
> + if (do_reset) {
> + shutdown_barebox();
> + reset_cpu(0);
> + }

Why is this done here? I mean you could execute the reset command after
this one.

Sascha

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Re: [PATCH 2/4] twl6030: add power button as an input key

[Sascha Hauer]

On Mon, Mar 11, 2013 at 12:36:05AM +0100, Vicente Bergas wrote:
> 
> +
> +static int __init twl6030_pwrbtn_probe(struct device_d *dev)
> +{
> + struct twl6030_pwrbtn_platform_data *pdata;
> + struct console_device *cdev;
> +
> + pdata = dev->platform_data;
> +
> + if (!pdata) {
> + pr_err("missing platform_data\n");

use dev_err and friends for driver messages.

> + return -ENODEV;
> + }
> +
> + pdata->twl6030 = twl6030_get();
> + if (!pdata->fifo_size)
> + pdata->fifo_size = 4;
> +
> + pdata->recv_fifo = kfifo_alloc(pdata->fifo_size);
> +
> + pdata->poller.func = ic2_key_poller;
> +
> + cdev = &pdata->cdev;
> + dev->type_data = cdev;
> + cdev->dev = dev;
> + cdev->f_caps = CONSOLE_STDIN;
> + cdev->tstc = twl6030_pwrbtn_tstc;
> + cdev->getc = twl6030_pwrbtn_getc;
> +
> + console_register(&pdata->cdev);
> +
> + return poller_register(&pdata->poller);
> +}
> +
> +static struct driver_d twl6030_pwrbtn_driver = {
> + .name   = "twl6030_pwrbtn",
> + .probe  = twl6030_pwrbtn_probe,
> +};
> +device_platform_driver(twl6030_pwrbtn_driver);
> diff --git a/include/twl6030_pwrbtn.h b/include/twl6030_pwrbtn.h
> new file mode 100644
> index 000..e7e8383
> --- /dev/null
> +++ b/include/twl6030_pwrbtn.h
> @@ -0,0 +1,23 @@
> +#ifndef _TWL6030_PWRBTN_H
> +#define _TWL6030_PWRBTN_H
> +
> +#include 
> +#include 
> +#include 
> +
> +struct twl6030_pwrbtn_platform_data {
> + /* Configuration parameters */
> + int code;
> + /* optional */
> + int fifo_size;

Since this driver handles a single key only, must the fifo size
be configurable?

> +
> + /* internal */
> + u8 previous_state;
> +
> + struct twl6030 *twl6030;
> + struct kfifo *recv_fifo;
> + struct poller_struct poller;
> + struct console_device cdev;
> +};

Please do not abuse platform_data for private driver data use. Allocate
a separate struct for it.

Sascha

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Re: [PATCH 0/9] Add support for booting ArchosG9 from sd-card

[Sascha Hauer]

Hi Vicente,

On Sun, Mar 10, 2013 at 12:19:33AM +0100, Vicente Bergas wrote:
>  This patch series ends up adding sd-card booting support to archosg9 boards.
>  First 8 patches are improvements and minor fixes found during the process.

I applied most patches from thsi series, the rest needs some updates.

Thanks
 Sascha

> 
> Vicente Bergas (9):
>   defaultenv-2: don't load nonexistent file
>   omap4_romusb: rename omap4_usbboot_pdata to omap4_usbboot_data
>   omap_uart: rename OMAP3EVM_UARTx to OMAP_UARTx
>   omap_uart: add low level port serial initialization
>   panda: remove unused configuration items
>   omap4_romusb: allow adding usb-serial when not booting from usb
>   menu: avoid errors when building submenus
>   archos: add atag appender for all features
>   archosg9: enable booting from sd-card
> 
>  arch/arm/boards/archosg9/archos_features.c | 414 
> +++--
>  arch/arm/boards/archosg9/archos_features.h |  39 ++
>  arch/arm/boards/archosg9/board.c   |   1 -
>  arch/arm/boards/archosg9/env/boot/sd-card-android  |  11 +
>  arch/arm/boards/archosg9/env/boot/sd-card-linux|  17 +
>  arch/arm/boards/archosg9/env/boot/usb-android  |  11 +
>  arch/arm/boards/archosg9/env/boot/usb-linux|  17 +
>  arch/arm/boards/archosg9/env/config|   3 -
>  arch/arm/boards/archosg9/env/init/automount|  28 ++
>  arch/arm/boards/archosg9/env/init/bootsource   |  11 +
>  arch/arm/boards/archosg9/env/init/usbboot  |   6 -
>  arch/arm/boards/at91sam9m10ihd/env/boot/android|   2 +-
>  arch/arm/boards/at91sam9m10ihd/env/boot/mmc|   2 +-
>  arch/arm/boards/at91sam9m10ihd/env/boot/net|   2 +-
>  arch/arm/boards/at91sam9m10ihd/env/boot/net-usb|   2 +-
>  arch/arm/boards/beagle/env/boot/mmc|   2 +-
>  arch/arm/boards/beagle/env/boot/nand-ubi   |   2 +-
>  arch/arm/boards/beagle/env/boot/nand-ubi-dt|   2 +-
>  arch/arm/boards/beaglebone/env/boot/sd |   2 +-
>  arch/arm/boards/clep7212/env/boot/nor  |   2 +-
>  .../boards/crystalfontz-cfa10036/env/boot/mmc-ext3 |   2 +-
>  .../boards/efika-mx-smartbook/env/boot/hd-internal |   2 +-
>  .../boards/efika-mx-smartbook/env/boot/mmc-left|   2 +-
>  arch/arm/boards/guf-vincell/env/boot/nand-ubi  |   2 +-
>  arch/arm/boards/karo-tx25/env/boot/nand-ubi|   2 +-
>  arch/arm/boards/omap3evm/board.c   |   4 +-
>  arch/arm/boards/omap3evm/lowlevel.c|   4 +-
>  arch/arm/boards/panda/env/boot/mmc |   2 +-
>  arch/arm/boards/pcm037/env/boot/nand-ubi   |   2 +-
>  arch/arm/boards/pcm038/env/boot/nand-ubi   |   2 +-
>  arch/arm/boards/pcm043/env/boot/nand-ubi   |   2 +-
>  arch/arm/boards/pcm051/env/boot/sd |   2 +-
>  arch/arm/boards/telit-evk-pro3/env/boot/nand-ubi   |   2 +-
>  arch/arm/configs/archosg9_defconfig|  67 ++--
>  arch/arm/configs/archosg9_xload_defconfig  |  20 +-
>  arch/arm/configs/panda_xload_defconfig |   3 -
>  arch/arm/mach-omap/Kconfig |  11 +-
>  arch/arm/mach-omap/include/mach/debug_ll.h |  27 +-
>  arch/arm/mach-omap/include/mach/omap4_rom_usb.h|   3 +
>  arch/arm/mach-omap/omap4_rom_usb.c |  95 +++--
>  defaultenv-2/base/bin/init |   2 +-
>  defaultenv-2/base/boot/net |   2 +-
>  defaultenv-2/base/data/boot-template   |   2 +-
>  defaultenv-2/menu/menu/boot-entries-collect|   4 +-
>  defaultenv-2/menu/menu/boot-entries-edit   |   2 +-
>  defaultenv-2/menu/menu/boot-entries-remove |   2 +-
>  defaultenv-2/menu/menu/boot-menu-add-entry |   6 +-
>  defaultenv-2/menu/menu/mainmenu|   2 +-
>  drivers/serial/serial_omap4_usbboot.c  |   2 +
>  49 files changed, 686 insertions(+), 170 deletions(-)
>  create mode 100644 arch/arm/boards/archosg9/env/boot/sd-card-android
>  create mode 100644 arch/arm/boards/archosg9/env/boot/sd-card-linux
>  create mode 100644 arch/arm/boards/archosg9/env/boot/usb-android
>  create mode 100644 arch/arm/boards/archosg9/env/boot/usb-linux
>  delete mode 100644 arch/arm/boards/archosg9/env/config
>  create mode 100644 arch/arm/boards/archosg9/env/init/automount
>  create mode 100644 arch/arm/boards/archosg9/env/init/bootsource
>  delete mode 100644 arch/arm/boards/archosg9/env/init/usbboot
> 
> -- 
> 1.8.1.5
> 
> 
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Re: [PATCH 01/13] ARM: clep7212: Migrate to config-board

[Sascha Hauer]

On Mon, Mar 11, 2013 at 01:26:31PM +0400, Alexander Shiyan wrote:
> 
> Signed-off-by: Alexander Shiyan 

Applied, thanks

Sascha

> ---
>  arch/arm/boards/clep7212/env/config   |   20 
>  arch/arm/boards/clep7212/env/config-board |   14 ++
>  2 files changed, 14 insertions(+), 20 deletions(-)
>  delete mode 100644 arch/arm/boards/clep7212/env/config
>  create mode 100644 arch/arm/boards/clep7212/env/config-board
> 
> diff --git a/arch/arm/boards/clep7212/env/config 
> b/arch/arm/boards/clep7212/env/config
> deleted file mode 100644
> index e8f2c3a..000
> --- a/arch/arm/boards/clep7212/env/config
> +++ /dev/null
> @@ -1,20 +0,0 @@
> -#!/bin/sh
> -
> -global.hostname=clps711x
> -
> -# set to false if you do not want to have colors
> -global.allow_color=true
> -
> -# user (used for network filenames)
> -global.user=anonymous
> -
> -# timeout in seconds before the default boot entry is started
> -global.autoboot_timeout=2
> -
> -# default boot entry (one of /env/boot/*)
> -if [ -e /dev/nor0 ]; then
> - global.boot.default=nor
> -fi
> -
> -# default bootargs
> -global.linux.bootargs.base="earlyprintk console=ttyCL0,57600n8"
> diff --git a/arch/arm/boards/clep7212/env/config-board 
> b/arch/arm/boards/clep7212/env/config-board
> new file mode 100644
> index 000..3cf699a
> --- /dev/null
> +++ b/arch/arm/boards/clep7212/env/config-board
> @@ -0,0 +1,14 @@
> +#!/bin/sh
> +
> +global.hostname=clps711x
> +
> +# Timeout in seconds before the default boot entry is started
> +global.autoboot_timeout=2
> +
> +# Default boot entry (one of /env/boot/*)
> +if [ -e /dev/nor0 ]; then
> + global.boot.default=nor
> +fi
> +
> +# Board bootargs
> +global.linux.bootargs.base="earlyprintk console=ttyCL0,57600n8"
> -- 
> 1.7.3.4
> 
> 
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[PATCH 5/5] drivers: Bail out if dev_request_mem_region fails

[Sascha Hauer]

Signed-off-by: Sascha Hauer 
---
 arch/arm/mach-imx/clk-imx1.c|  2 ++
 arch/arm/mach-imx/clk-imx21.c   |  2 ++
 arch/arm/mach-imx/clk-imx25.c   |  2 ++
 arch/arm/mach-imx/clk-imx27.c   |  2 ++
 arch/arm/mach-imx/clk-imx31.c   |  2 ++
 arch/arm/mach-imx/clk-imx35.c   |  2 ++
 arch/arm/mach-imx/clk-imx5.c|  4 
 arch/arm/mach-imx/clk-imx6.c|  2 ++
 arch/arm/mach-imx/clocksource.c |  2 ++
 arch/arm/mach-imx/esdctl.c  |  2 +-
 arch/arm/mach-imx/gpio.c| 10 ++
 arch/arm/mach-imx/iim.c |  2 ++
 arch/arm/mach-imx/iomux-v2.c|  2 ++
 arch/arm/mach-imx/iomux-v3.c|  2 ++
 drivers/mci/mxs.c   | 10 ++
 drivers/mci/omap_hsmmc.c| 10 ++
 drivers/mci/s3c.c   | 10 ++
 drivers/mtd/nor/cfi_flash.c | 12 
 drivers/net/fec_imx.c   |  4 
 drivers/serial/serial_altera_jtag.c | 11 +++
 drivers/serial/serial_imx.c |  5 +
 drivers/serial/serial_s3c.c | 10 ++
 drivers/serial/stm-serial.c | 10 ++
 drivers/spi/imx_spi.c   |  4 
 drivers/watchdog/imxwd.c|  5 +
 25 files changed, 128 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 0d04a92..2192082 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -90,6 +90,8 @@ static int imx1_ccm_probe(struct device_d *dev)
void __iomem *regs;
 
regs = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
mx1_clocks_init(regs, 32000);
 
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 6e91424..d76ba9a 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -112,6 +112,8 @@ static int imx21_ccm_probe(struct device_d *dev)
unsigned long href = 2600;
 
base = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
writel(PCCR0_UART1_EN | PCCR0_UART2_EN | PCCR0_UART3_EN | 
PCCR0_UART4_EN |
PCCR0_CSPI1_EN | PCCR0_CSPI2_EN | PCCR0_SDHC1_EN |
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 95b105d..81db426 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -75,6 +75,8 @@ static int imx25_ccm_probe(struct device_d *dev)
void __iomem *base;
 
base = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
writel((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 8) | (1 << 9) |
(1 << 10) | (1 << 15) | (1 << 19) | (1 << 21) | (1 << 
22) |
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index e221928..4c84744 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -134,6 +134,8 @@ static int imx27_ccm_probe(struct device_d *dev)
void __iomem *base;
 
base = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
writel(PCCR0_SDHC3_EN | PCCR0_SDHC2_EN | PCCR0_SDHC1_EN |
PCCR0_PWM_EN | PCCR0_KPP_EN | PCCR0_IIM_EN |
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index aa1b652..435aed7 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -83,6 +83,8 @@ static int imx31_ccm_probe(struct device_d *dev)
void __iomem *base;
 
base = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
writel(0x, base + CCM_CGR0);
writel(0x, base + CCM_CGR1);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index f50c07d..e1ee979 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -96,6 +96,8 @@ static int imx35_ccm_probe(struct device_d *dev)
void __iomem *base;
 
base = dev_request_mem_region(dev, 0);
+   if (!base)
+   return -EBUSY;
 
writel(0x, base + CCM_CGR0);
writel(0x, base + CCM_CGR1);
diff --git a/arch/arm/mach-imx/clk-imx5.c b/arch/arm/mach-imx/clk-imx5.c
index 8b5bffd..350cce9 100644
--- a/arch/arm/mach-imx/clk-imx5.c
+++ b/arch/arm/mach-imx/clk-imx5.c
@@ -229,6 +229,8 @@ static int imx51_ccm_probe(struct device_d *dev)
void __iomem *regs;
 
regs = dev_request_mem_region(dev, 0);
+   if (!regs)
+   return -EBUSY;
 
mx51_clocks_init(regs, 32768, 2400, 22579200, 0); /* FIXME */
 
@@ -292,6 +294,8 @@ static int imx53_ccm_probe(struct device_d *dev)
void __iomem *regs;
 
regs = dev_request_mem_region(dev, 0);
+   if (!regs)
+   return -EBUSY;
 
mx53_clocks_init(regs, 32768, 2400, 22579200, 0); /* FIXME */
 
diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-im

[PATCH 4/5] ARM: Add initial i.MX27 dts files

[Sascha Hauer]

Signed-off-by: Sascha Hauer 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/imx27-phytec-phycore.dts | 106 ++
 arch/arm/dts/imx27.dtsi   | 250 ++
 arch/arm/mach-imx/imx27.c |   3 +
 4 files changed, 360 insertions(+)
 create mode 100644 arch/arm/dts/imx27-phytec-phycore.dts
 create mode 100644 arch/arm/dts/imx27.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2b25fdf..9e816c4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_IMX27) += imx27-phytec-phycore.dtb
 
 BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
 ifneq ($(CONFIG_BUILTIN_DTB),"")
diff --git a/arch/arm/dts/imx27-phytec-phycore.dts 
b/arch/arm/dts/imx27-phytec-phycore.dts
new file mode 100644
index 000..0a7222f
--- /dev/null
+++ b/arch/arm/dts/imx27-phytec-phycore.dts
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx27.dtsi"
+
+/ {
+   model = "Phytec pcm038";
+   compatible = "phytec,imx27-pcm038", "fsl,imx27";
+
+   aliases {
+   bareboxenv = &bareboxenv;
+   };
+
+   memory {
+   reg = <0xa000 0x0800>;
+   };
+
+   chosen {
+   linux,stdout-path = &uart1;
+   };
+
+   soc {
+   aipi@1000 { /* aipi */
+
+   serial@1000a000 {
+   fsl,uart-has-rtscts;
+   status = "okay";
+   };
+
+   serial@1000b000 {
+   fsl,uart-has-rtscts;
+   status = "okay";
+   };
+
+   serial@1000c000 {
+   fsl,uart-has-rtscts;
+   status = "okay";
+   };
+
+   cspi@1000e000 {
+   status = "okay";
+   fsl,spi-num-chipselects = <1>;
+   cs-gpios = <&gpio4 28 0>;
+   pmic:mc13783@0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,mc13783";
+   spi-max-frequency = <600>;
+   reg = <0>;
+   };
+   };
+
+   i2c@1001d000 {
+   clock-frequency = <40>;
+   status = "okay";
+   at24@4c {
+   compatible = "at,24c32";
+   pagesize = <32>;
+   reg = <0x52>;
+   };
+   pcf8563@51 {
+   compatible = "nxp,pcf8563";
+   reg = <0x51>;
+   };
+   lm75@4a {
+   compatible = "national,lm75";
+   reg = <0x4a>;
+   };
+   };
+   };
+   };
+
+   nand@d800 {
+   status = "okay";
+   };
+
+   nor_flash@c000 {
+   compatible = "cfi-flash";
+   bank-width = <2>;
+   reg = <0xc000 0x0200>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "bootloader";
+   reg = <0x0 0x8>;
+   };
+   bareboxenv: partition@8 {
+   label = "bootloader-environment";
+   reg = <0x8 0x8>;
+   };
+   };
+};
+
+&fec {
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx27.dtsi b/arch/arm/dts/imx27.dtsi
new file mode 100644
index 000..0b7d7a2
--- /dev/null
+++ b/arch/arm/dts/imx27.dtsi
@@ -0,0 +1,250 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+   aliases {
+   serial0 = &uart1;
+

[PATCH] Add dtc

[Sascha Hauer]

This adds the devicetree compiler (dtc) and rules to generate dtbs
to barebox. With this devicetrees can be compiled into the barebox
binary and devices can be probed from it. Also added are i.MX27
devicetree files, these are basically meant as example, I won't apply
them eight now.

The dtc probably doesn't make it to the list due to its size. This
doesn't really matter, it's the unchanged version from the kernel.

Also in this series, currently not for merging are some basic i.MX27
devicetree files.

This all works quite good, but there is a problem. Devices in barebox
are usually registered in various initcalls. Most drivers currently
unfortunately don't test if dev_request_mem_region succeeds, instead
they silently try to access NULL pointers. So if you test this series,
make sure that no devices are registered twice.

Sascha

The following changes since commit 695a7ca89f5aae1b8a12d1300eb8b52ac0f05d3b:

  Merge branch 'for-next/pr_print' into next (2013-03-09 11:18:40 +0100)

are available in the git repository at:


  git://git.pengutronix.de/git/barebox.git pu/dtc

for you to fetch changes up to a0976cf182fc9ba15cb12980b4153eca0779fa1c:

  drivers: Bail out if dev_request_mem_region fails (2013-03-11 21:38:09 +0100)


Sascha Hauer (5):
  scripts: Add dtc
  Makefile.lib: Add dtc support
  ARM: Initial dts support
  ARM: Add initial i.MX27 dts files
  drivers: Bail out if dev_request_mem_region fails

 Makefile  |2 +-
 arch/arm/Kconfig  |4 +
 arch/arm/Makefile |   14 +
 arch/arm/cpu/Makefile |3 +
 arch/arm/cpu/dtb.c|   41 +
 arch/arm/dts/Makefile |   13 +
 arch/arm/dts/imx27-phytec-phycore.dts |  106 ++
 arch/arm/dts/imx27.dtsi   |  250 
 arch/arm/dts/skeleton.dtsi|   13 +
 arch/arm/lib/barebox.lds.S|2 +
 arch/arm/mach-imx/clk-imx1.c  |2 +
 arch/arm/mach-imx/clk-imx21.c |2 +
 arch/arm/mach-imx/clk-imx25.c |2 +
 arch/arm/mach-imx/clk-imx27.c |2 +
 arch/arm/mach-imx/clk-imx31.c |2 +
 arch/arm/mach-imx/clk-imx35.c |2 +
 arch/arm/mach-imx/clk-imx5.c  |4 +
 arch/arm/mach-imx/clk-imx6.c  |2 +
 arch/arm/mach-imx/clocksource.c   |2 +
 arch/arm/mach-imx/esdctl.c|2 +-
 arch/arm/mach-imx/gpio.c  |   10 +
 arch/arm/mach-imx/iim.c   |2 +
 arch/arm/mach-imx/imx27.c |3 +
 arch/arm/mach-imx/iomux-v2.c  |2 +
 arch/arm/mach-imx/iomux-v3.c  |2 +
 drivers/mci/mxs.c |   10 +
 drivers/mci/omap_hsmmc.c  |   10 +
 drivers/mci/s3c.c |   10 +
 drivers/mtd/nor/cfi_flash.c   |   12 +
 drivers/net/fec_imx.c |4 +
 drivers/of/Kconfig|4 +
 drivers/serial/serial_altera_jtag.c   |   11 +
 drivers/serial/serial_imx.c   |5 +
 drivers/serial/serial_s3c.c   |   10 +
 drivers/serial/stm-serial.c   |   10 +
 drivers/spi/imx_spi.c |4 +
 drivers/watchdog/imxwd.c  |5 +
 include/asm-generic/barebox.lds.h |   12 +
 scripts/Makefile  |2 +
 scripts/Makefile.lib  |   41 +
 scripts/dtc/Makefile  |   31 +
 scripts/dtc/Makefile.dtc  |   18 +
 scripts/dtc/checks.c  |  759 +++
 scripts/dtc/data.c|  269 
 scripts/dtc/dtc-lexer.l   |  250 
 scripts/dtc/dtc-lexer.lex.c_shipped   | 2195 ++
 scripts/dtc/dtc-parser.tab.c_shipped  | 2398 +
 scripts/dtc/dtc-parser.tab.h_shipped  |  107 ++
 scripts/dtc/dtc-parser.y  |  532 
 scripts/dtc/dtc.c |  260 
 scripts/dtc/dtc.h |  270 
 scripts/dtc/fdtdump.c |  162 +++
 scripts/dtc/fdtget.c  |  366 +
 scripts/dtc/fdtput.c  |  362 +
 scripts/dtc/flattree.c|  933 +
 scripts/dtc/fstree.c  |   91 ++
 scripts/dtc/libfdt/Makefile.libfdt|   10 +
 scripts/dtc/libfdt/fdt.c  |  222 +++
 scripts/dtc/libfdt/fdt.h  |   60 +
 scripts/dtc/libfdt/fdt_empty_tree.c   |   84 ++
 scripts/dtc/libfdt/fdt_ro.c   |  574 
 scripts/dtc/libfdt/fdt_rw.c   |  492 +++
 scripts/dtc/libfdt/fdt_strerror.c |   96 ++
 scripts/dtc/libfdt/fdt_sw.c   |  256 
 scripts/dtc/libfdt/fdt_wip.c  |  118 ++
 scripts/dtc/libfdt/libfdt.h   | 1478 
 scripts/dtc/libfdt/libfdt_env.h   |   29 +
 scripts/dtc/libfdt/libfdt_internal.h  |   95 ++
 scripts/dtc/livetree.c|  709 ++
 scr

[PATCH 2/5] Makefile.lib: Add dtc support

[Sascha Hauer]

Add rules to generate dtb files from dts/dtsi files,
optionally run the source files through the preprocessor.
Also add a rule to generate object files to include in
the barbox binary.

Signed-off-by: Sascha Hauer 
---
 include/asm-generic/barebox.lds.h | 12 
 scripts/Makefile.lib  | 41 +++
 2 files changed, 53 insertions(+)

diff --git a/include/asm-generic/barebox.lds.h 
b/include/asm-generic/barebox.lds.h
index b2bd19e..a77ef8f 100644
--- a/include/asm-generic/barebox.lds.h
+++ b/include/asm-generic/barebox.lds.h
@@ -1,4 +1,11 @@
 
+/*
+ * Align to a 32 byte boundary equal to the
+ * alignment gcc 4.5 uses for a struct
+ */
+#define STRUCT_ALIGNMENT 32
+#define STRUCT_ALIGN() . = ALIGN(STRUCT_ALIGNMENT)
+
 #if defined CONFIG_ARCH_IMX25 || \
defined CONFIG_ARCH_IMX35 || \
defined CONFIG_ARCH_IMX51 || \
@@ -33,6 +40,11 @@
 
 #define BAREBOX_MAGICVARS  KEEP(*(SORT_BY_NAME(.barebox_magicvar*)))
 
+#define BAREBOX_DTB()  \
+   __dtb_start = .;\
+   KEEP(*(.dtb.rodata.*)); \
+   __dtb_end = .;
+
 #if defined(CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE) && \
 CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE < CONFIG_BAREBOX_MAX_BARE_INIT_SIZE
 #define MAX_BARE_INIT_SIZE CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 871c44b..bbfd4cd 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -141,6 +141,11 @@ cpp_flags  = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) 
$(__cpp_flags)
 
 ld_flags   = $(LDFLAGS) $(EXTRA_LDFLAGS)
 
+dtc_cpp_flags  = -Wp,-MD,$(depfile) -nostdinc  \
+  -I$(srctree)/arch/$(SRCARCH)/dts \
+  -I$(srctree)/arch/$(SRCARCH)/include/dts \
+  -undef -D__DTS__
+
 # Finds the multi-part object the current object will be linked into
 modname-multi = $(sort $(foreach m,$(multi-used),\
$(if $(filter $(subst $(obj)/,,$*.o), $($(m:.o=-objs)) 
$($(m:.o=-y))),$(m:.o=
@@ -185,6 +190,42 @@ quiet_cmd_gzip = GZIP$@
 cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
(rm -f $@ ; false)
 
+# DTC
+# ---
+
+# Generate an assembly file to wrap the output of the device tree compiler
+quiet_cmd_dt_S_dtb= DTB$@
+cmd_dt_S_dtb=  \
+(  \
+   echo '\#include ';   \
+   echo '.section .dtb.rodata.$(subst -,_,$(*F)),"a"'; \
+   echo '.balign STRUCT_ALIGNMENT';\
+   echo '.global __dtb_$(subst -,_,$(*F))_start';  \
+   echo '__dtb_$(subst -,_,$(*F))_start:'; \
+   echo '.incbin "$<" ';   \
+   echo '__dtb_$(subst -,_,$(*F))_end:';   \
+   echo '.global __dtb_$(subst -,_,$(*F))_end';\
+   echo '.balign STRUCT_ALIGNMENT';\
+) > $@
+
+$(obj)/%.dtb.S: $(obj)/%.dtb
+   $(call cmd,dt_S_dtb)
+
+quiet_cmd_dtc = DTC $@
+cmd_dtc = $(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 $(DTC_FLAGS) -d 
$(depfile) $<
+
+$(obj)/%.dtb: $(src)/%.dts FORCE
+   $(call if_changed_dep,dtc)
+
+dtc-tmp = $(subst $(comma),_,$(dot-target).dts)
+
+quiet_cmd_dtc_cpp = DTC+CPP $@
+cmd_dtc_cpp = $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; 
\
+   $(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 $(DTC_FLAGS) $(dtc-tmp)
+
+$(obj)/%.dtb: $(src)/%.dtsp FORCE
+   $(call if_changed_dep,dtc_cpp)
+
 # Bzip2
 # ---
 
-- 
1.8.2.rc2


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[PATCH 3/5] ARM: Initial dts support

[Sascha Hauer]

- Add rules to generate dtb files in arch/arm/dts/
- add an initcall which unflattens and probes the internal devicetree
- Add skeleton devicetree

Signed-off-by: Sascha Hauer 
---
 Makefile   |  2 +-
 arch/arm/Kconfig   |  4 
 arch/arm/Makefile  | 14 ++
 arch/arm/cpu/Makefile  |  3 +++
 arch/arm/cpu/dtb.c | 41 +
 arch/arm/dts/Makefile  | 12 
 arch/arm/dts/skeleton.dtsi | 13 +
 arch/arm/lib/barebox.lds.S |  2 ++
 8 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/dtb.c
 create mode 100644 arch/arm/dts/Makefile
 create mode 100644 arch/arm/dts/skeleton.dtsi

diff --git a/Makefile b/Makefile
index b5819fc..f399251 100644
--- a/Makefile
+++ b/Makefile
@@ -481,7 +481,7 @@ export KBUILD_BINARY ?= barebox.bin
 barebox-flash-image: $(KBUILD_IMAGE) FORCE
$(call if_changed,ln)
 
-all: barebox-flash-image
+all: barebox-flash-image $(KBUILD_DTBS)
 
 common-$(CONFIG_PBL_IMAGE) += pbl/
 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7ac134e..5601ca6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -17,6 +17,10 @@ config HAVE_MACH_ARM_HEAD
 
 menu "System Type"
 
+config BUILTIN_DTB
+   string "DTB to build into the barebox image"
+   depends on OFTREE
+
 choice
prompt "ARM system type"
 
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5125b87..d6ec515 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -258,6 +258,16 @@ zbarebox.S zbarebox.bin zbarebox: barebox.bin
 archclean:
$(MAKE) $(clean)=$(pbl)
 
+dts := arch/arm/dts
+
+%.dtb: scripts
+   $(Q)$(MAKE) $(build)=$(dts) $(dts)/$@
+
+dtbs: scripts
+   $(Q)$(MAKE) $(build)=$(dts) dtbs
+
+KBUILD_DTBS := dtbs
+
 KBUILD_IMAGE ?= $(KBUILD_BINARY)
 
 archprepare: maketools
@@ -281,6 +291,10 @@ endif
 common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
+ifneq ($(CONFIG_BUILTIN_DTB),"")
+common-y += arch/arm/dts/
+endif
+
 lds-y  := arch/arm/lib/barebox.lds
 
 CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds 
barebox-flash-image
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 5935e1c..6bf75ba 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -8,6 +8,9 @@ obj-y += start.o setupc.o
 #
 obj-$(CONFIG_CMD_ARM_CPUINFO) += cpuinfo.o
 obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o
+ifneq ($(CONFIG_BUILTIN_DTB),"")
+obj-y += dtb.o
+endif
 obj-$(CONFIG_MMU) += mmu.o cache.o mmu-early.o
 pbl-$(CONFIG_MMU) += cache.o mmu-early.o
 obj-$(CONFIG_CPU_32v4T) += cache-armv4.o
diff --git a/arch/arm/cpu/dtb.c b/arch/arm/cpu/dtb.c
new file mode 100644
index 000..10b73bd
--- /dev/null
+++ b/arch/arm/cpu/dtb.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2013 Sascha Hauer , Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include 
+#include 
+#include 
+
+extern char __dtb_start[];
+
+static int of_arm_init(void)
+{
+   struct device_node *root;
+
+   root = of_get_root_node();
+   if (root)
+   return 0;
+
+   root = of_unflatten_dtb(NULL, __dtb_start);
+   if (root) {
+   pr_debug("using internal DTB\n");
+   of_set_root_node(root);
+   if (IS_ENABLED(CONFIG_OFDEVICE))
+   of_probe();
+   }
+
+   return 0;
+}
+core_initcall(of_arm_init);
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
new file mode 100644
index 000..2b25fdf
--- /dev/null
+++ b/arch/arm/dts/Makefile
@@ -0,0 +1,12 @@
+
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
+ifneq ($(CONFIG_BUILTIN_DTB),"")
+obj-y += $(BUILTIN_DTB)
+endif
+
+targets += dtbs
+targets += $(dtb-y)
+
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+
+clean-files := *.dtb *.dtb.S
diff --git a/arch/arm/dts/skeleton.dtsi b/arch/arm/dts/skeleton.dtsi
new file mode 100644
index 000..b41d241
--- /dev/null
+++ b/arch/arm/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value.  The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   chosen { };
+   aliases { };
+   memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index abdd69e..10c63bf 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -92,6 

[PATCH] usb/gadget/Kconfig: fix menu

[Eric Bénard]

by reordering the entry, USB gadget support is now a menu and the
USB gadget choices are under this menu and not directly in the
driver menu.

Signed-off-by: Eric Bénard 
---
 drivers/usb/gadget/Kconfig | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 5f65cea..97a7d21 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -1,11 +1,11 @@
-menuconfig USB_GADGET
-   depends on USB_HAVE_GADGET_DRIVER
-   bool "USB gadget support"
-
 config USB_HAVE_GADGET_DRIVER
bool
default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA
 
+menuconfig USB_GADGET
+   depends on USB_HAVE_GADGET_DRIVER
+   bool "USB gadget support"
+
 if USB_GADGET
 
 config USB_GADGET_DUALSPEED
-- 
1.7.11.7


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Re: [PATCH 7/9] ARM: zynq: clk: add pll type

[Steffen Trumtrar]

On Mon, Mar 11, 2013 at 01:28:09PM -0500, Josh Cartwright wrote:
> On Mon, Mar 11, 2013 at 10:15:04AM +0100, Steffen Trumtrar wrote:
> > Signed-off-by: Steffen Trumtrar 
> > ---
> >  arch/arm/mach-zynq/clk-zynq7000.c | 33 -
> >  1 file changed, 32 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
> > b/arch/arm/mach-zynq/clk-zynq7000.c
> > index 5a8a12a..0d3c3a8 100644
> > --- a/arch/arm/mach-zynq/clk-zynq7000.c
> > +++ b/arch/arm/mach-zynq/clk-zynq7000.c
> > @@ -33,10 +33,21 @@ enum zynq_clks {
> > cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
> >  };
> >  
> > +enum zynq_pll_type {
> > +   ZYNQ_PLL_ARM,
> > +   ZYNQ_PLL_DDR,
> > +   ZYNQ_PLL_IO,
> > +};
> > +
> > +#define PLL_ARM_LOCK   (1 << 0)
> > +#define PLL_DDR_LOCK   (1 << 1)
> > +#define PLL_IO_LOCK(1 << 2)
> 
> Having both an enum and the #define's seem like an unnecessary
> indirection.  I'd suggest just:
> 
> enum zynq_pll_lockbit {
>   PLL_ARM_LOCK= (1 << 0),
>   PLL_DDR_LOCK= (1 << 1),
>   PLL_IO_LOCK = (1 << 2),
> };
> 
> struct zynq_pll_clk {
>   /* ... */
>   enum zynq_pll_lockbit lockbit;
> };
> 
> static inline struct clk *zynq_pll_clk(enum zynq_pll_lockbit lockbit,
>  const char *name,
>  void __iomem *pll_ctrl)
> {
>   /* ... */
>   pll->lockbit = lockbit; 
>   /* ... */
> }
> 
> > +
> >  static struct clk *clks[clks_max];
> >  
> >  struct zynq_pll_clk {
> > struct clk  clk;
> > +   u32 pll_lock;
> > void __iomem*pll_ctrl;
> >  };
> >  
> > @@ -51,11 +62,19 @@ static unsigned long zynq_pll_recalc_rate(struct clk 
> > *clk,
> > return parent_rate * PLL_CTRL_FDIV(readl(pll->pll_ctrl));
> >  }
> >  
> > +static int zynq_pll_enable(struct clk *clk)
> > +{
> > +   return 0;
> > +}
> > +
> >  static struct clk_ops zynq_pll_clk_ops = {
> > .recalc_rate = zynq_pll_recalc_rate,
> > +   .enable = zynq_pll_enable,
> >  };
> >  
> > -static inline struct clk *zynq_pll_clk(const char *name, void __iomem 
> > *pll_ctrl)
> > +static inline struct clk *zynq_pll_clk(enum zynq_pll_type type,
> > +  const char *name,
> > +  void __iomem *pll_ctrl)
> >  {
> > static const char *pll_parent = "ps_clk";
> > struct zynq_pll_clk *pll;
> > @@ -68,6 +87,18 @@ static inline struct clk *zynq_pll_clk(const char *name, 
> > void __iomem *pll_ctrl)
> > pll->clk.parent_names   = &pll_parent;
> > pll->clk.num_parents= 1;
> >  
> > +   switch(type) {
> > +   case ZYNQ_PLL_ARM:
> > +   pll->pll_lock = PLL_ARM_LOCK;
> > +   break;
> > +   case ZYNQ_PLL_DDR:
> > +   pll->pll_lock = PLL_DDR_LOCK;
> > +   break;
> > +   case ZYNQ_PLL_IO:
> > +   pll->pll_lock = PLL_IO_LOCK;
> 
> Actually, maybe I've gotten a little ahead of myself...you add bits for
> the lock, but you never use it!  So, what's the point!  (If it's to be
> used in the future, it'd be nice to see that in the commit description).

I will remove this from this series. This only makes sense, when
the enable function is filled.

str

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Re: [PATCH 6/9] ARM: zynq: clk: replace define with header

[Steffen Trumtrar]

On Mon, Mar 11, 2013 at 01:29:25PM -0500, Josh Cartwright wrote:
> On Mon, Mar 11, 2013 at 10:15:03AM +0100, Steffen Trumtrar wrote:
> > Signed-off-by: Steffen Trumtrar 
> > ---
> >  arch/arm/mach-zynq/clk-zynq7000.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
> > b/arch/arm/mach-zynq/clk-zynq7000.c
> > index 8dbde2b..5a8a12a 100644
> > --- a/arch/arm/mach-zynq/clk-zynq7000.c
> > +++ b/arch/arm/mach-zynq/clk-zynq7000.c
> > @@ -25,10 +25,9 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  
> > -#define ZYNQ_SLCR_BASE 0xF800
> > -
> >  enum zynq_clks {
> > dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1,
> > cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
> 
> Again, this is one of those intermediate state things that could be
> cleaned up with a rebase.
> 

I wanted to keep the series bisectable, but Sascha already told me that it
is unnecessary. So, I will squash it all down a little.

str

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Re: [PATCH 6/9] ARM: zynq: clk: replace define with header

[Josh Cartwright]

On Mon, Mar 11, 2013 at 10:15:03AM +0100, Steffen Trumtrar wrote:
> Signed-off-by: Steffen Trumtrar 
> ---
>  arch/arm/mach-zynq/clk-zynq7000.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
> b/arch/arm/mach-zynq/clk-zynq7000.c
> index 8dbde2b..5a8a12a 100644
> --- a/arch/arm/mach-zynq/clk-zynq7000.c
> +++ b/arch/arm/mach-zynq/clk-zynq7000.c
> @@ -25,10 +25,9 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
> -#define ZYNQ_SLCR_BASE 0xF800
> -
>  enum zynq_clks {
>   dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1,
>   cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max

Again, this is one of those intermediate state things that could be
cleaned up with a rebase.

   Josh

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Re: [PATCH 7/9] ARM: zynq: clk: add pll type

[Josh Cartwright]

On Mon, Mar 11, 2013 at 10:15:04AM +0100, Steffen Trumtrar wrote:
> Signed-off-by: Steffen Trumtrar 
> ---
>  arch/arm/mach-zynq/clk-zynq7000.c | 33 -
>  1 file changed, 32 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
> b/arch/arm/mach-zynq/clk-zynq7000.c
> index 5a8a12a..0d3c3a8 100644
> --- a/arch/arm/mach-zynq/clk-zynq7000.c
> +++ b/arch/arm/mach-zynq/clk-zynq7000.c
> @@ -33,10 +33,21 @@ enum zynq_clks {
>   cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
>  };
>  
> +enum zynq_pll_type {
> + ZYNQ_PLL_ARM,
> + ZYNQ_PLL_DDR,
> + ZYNQ_PLL_IO,
> +};
> +
> +#define PLL_ARM_LOCK (1 << 0)
> +#define PLL_DDR_LOCK (1 << 1)
> +#define PLL_IO_LOCK  (1 << 2)

Having both an enum and the #define's seem like an unnecessary
indirection.  I'd suggest just:

enum zynq_pll_lockbit {
PLL_ARM_LOCK= (1 << 0),
PLL_DDR_LOCK= (1 << 1),
PLL_IO_LOCK = (1 << 2),
};

struct zynq_pll_clk {
/* ... */
enum zynq_pll_lockbit lockbit;
};

static inline struct clk *zynq_pll_clk(enum zynq_pll_lockbit lockbit,
   const char *name,
   void __iomem *pll_ctrl)
{
/* ... */
pll->lockbit = lockbit; 
/* ... */
}

> +
>  static struct clk *clks[clks_max];
>  
>  struct zynq_pll_clk {
>   struct clk  clk;
> + u32 pll_lock;
>   void __iomem*pll_ctrl;
>  };
>  
> @@ -51,11 +62,19 @@ static unsigned long zynq_pll_recalc_rate(struct clk *clk,
>   return parent_rate * PLL_CTRL_FDIV(readl(pll->pll_ctrl));
>  }
>  
> +static int zynq_pll_enable(struct clk *clk)
> +{
> + return 0;
> +}
> +
>  static struct clk_ops zynq_pll_clk_ops = {
>   .recalc_rate = zynq_pll_recalc_rate,
> + .enable = zynq_pll_enable,
>  };
>  
> -static inline struct clk *zynq_pll_clk(const char *name, void __iomem 
> *pll_ctrl)
> +static inline struct clk *zynq_pll_clk(enum zynq_pll_type type,
> +const char *name,
> +void __iomem *pll_ctrl)
>  {
>   static const char *pll_parent = "ps_clk";
>   struct zynq_pll_clk *pll;
> @@ -68,6 +87,18 @@ static inline struct clk *zynq_pll_clk(const char *name, 
> void __iomem *pll_ctrl)
>   pll->clk.parent_names   = &pll_parent;
>   pll->clk.num_parents= 1;
>  
> + switch(type) {
> + case ZYNQ_PLL_ARM:
> + pll->pll_lock = PLL_ARM_LOCK;
> + break;
> + case ZYNQ_PLL_DDR:
> + pll->pll_lock = PLL_DDR_LOCK;
> + break;
> + case ZYNQ_PLL_IO:
> + pll->pll_lock = PLL_IO_LOCK;

Actually, maybe I've gotten a little ahead of myself...you add bits for
the lock, but you never use it!  So, what's the point!  (If it's to be
used in the future, it'd be nice to see that in the commit description).

Josh

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Re[2]: [PATCH 04/13] ARM: clps711x: Add clocksource driver

[Alexander Shiyan]

> On Mon, Mar 11, 2013 at 08:22:05PM +0400, Alexander Shiyan wrote:
> > > On Mon, Mar 11, 2013 at 12:01:58PM +0100, Jean-Christophe 
> > > PLAGNIOL-VILLARD wrote:
> > > > > +static int clps711x_cs_probe(struct device_d *dev)
> > > > > +{
> > > > > + u32 rate;
> > > > > + struct clk *timer_clk;
> > > > > +
> > > > > + timer_clk = clk_get(dev, NULL);
> > > > > + if (IS_ERR(timer_clk))
> > > > > + return PTR_ERR(timer_clk);
> > > > > +
> > > > > + rate = clk_get_rate(timer_clk);
> > > > > + clps711x_timer_base = dev_request_mem_region(dev, 0);
> > > > > + if (!clps711x_timer_base) {
> > > > > + clk_put(timer_clk);
> > > > > + return -ENOENT;
> > > > > + }
> > > > this deserve a nice crash
> > > 
> > > No, it doesn't. First of all we are very early here, so we might not even
> > > see the crash. Then, with devicetree probing we may often end up with
> > > the same devices registered from the devicetree and from the
> > > platform/soc. While this should find a way to avoid duplicate device
> > > registration, it is not nice having barebox crash in this case.
> > 
> > So what is the solution you propose in this case?
> 
> For the device duplication I don't have a solution yet. Basically I
> wanted to say that your patch looks good the way you did it.

Later I can move check for clps711x_timer_base at start of probe function.
So at least we may avoid to add another clocksource.

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Re: [PATCH 9/9] ARM: zynq: remove clocksource

[Josh Cartwright]

On Mon, Mar 11, 2013 at 10:15:06AM +0100, Steffen Trumtrar wrote:
> With clkdev in place the generic arm_smp_twd can be used.
> 

Oh!  Hmm.  So, you add the clocksource driver in a previous patch, and
remove it here.  I'd recommend rebasing this patchset to remove this
intermediate state.

   Josh

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Re: [PATCH 2/9] ARM: Zynq: Add new architecture zynq

[Josh Cartwright]

On Mon, Mar 11, 2013 at 10:14:59AM +0100, Steffen Trumtrar wrote:
> Add basic support for the Xilinx Zynq-7000 EPP architecture.
> The Zynq-7000 is an embedded processing platform that combines a Cortex A9
> dualcore MPSoC with an Artix-7 FPGA.
> 
> Signed-off-by: Steffen Trumtrar 
> ---
>  arch/arm/Kconfig   |   5 +
>  arch/arm/Makefile  |   2 +
>  arch/arm/mach-zynq/Kconfig |  31 +
>  arch/arm/mach-zynq/Makefile|   1 +
>  arch/arm/mach-zynq/clocksource.c   |  58 +
>  arch/arm/mach-zynq/devices.c   |  14 +++
>  arch/arm/mach-zynq/include/mach/barebox.lds.h  |   9 ++
>  arch/arm/mach-zynq/include/mach/debug_ll.h |  34 ++
>  arch/arm/mach-zynq/include/mach/devices.h  |  13 ++
>  .../arm/mach-zynq/include/mach/zynq-flash-header.h |  40 +++
>  arch/arm/mach-zynq/include/mach/zynq7000-regs.h| 132 
> +
>  arch/arm/mach-zynq/zynq.c  |  41 +++
>  include/asm-generic/barebox.lds.h  |   3 +-
>  13 files changed, 382 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-zynq/Kconfig
>  create mode 100644 arch/arm/mach-zynq/Makefile
>  create mode 100644 arch/arm/mach-zynq/clocksource.c
>  create mode 100644 arch/arm/mach-zynq/devices.c
>  create mode 100644 arch/arm/mach-zynq/include/mach/barebox.lds.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/devices.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/zynq-flash-header.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/zynq7000-regs.h
>  create mode 100644 arch/arm/mach-zynq/zynq.c
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 28332ec..8431fa8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -110,6 +110,10 @@ config ARCH_TEGRA
>   select CPU_ARM926T
>   select HAS_DEBUG_LL
>  
> +config ARCH_ZYNQ
> + bool "Xilinx Zynq-based boards"
> + select HAS_DEBUG_LL
> +
>  endchoice
>  
>  source arch/arm/cpu/Kconfig
> @@ -126,6 +130,7 @@ source arch/arm/mach-pxa/Kconfig
>  source arch/arm/mach-samsung/Kconfig
>  source arch/arm/mach-versatile/Kconfig
>  source arch/arm/mach-tegra/Kconfig
> +source arch/arm/mach-zynq/Kconfig
>  
>  config ARM_ASM_UNIFIED
>   bool
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index fcb2969..ceb45dc 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -64,6 +64,7 @@ machine-$(CONFIG_ARCH_PXA)  := pxa
>  machine-$(CONFIG_ARCH_SAMSUNG)   := samsung
>  machine-$(CONFIG_ARCH_VERSATILE) := versatile
>  machine-$(CONFIG_ARCH_TEGRA) := tegra
> +machine-$(CONFIG_ARCH_ZYNQ)  := zynq
>  
>  # Board directory name.  This list is sorted alphanumerically
>  # by CONFIG_* macro name.
> @@ -157,6 +158,7 @@ board-$(CONFIG_MACH_SABRELITE):= 
> freescale-mx6-sabrelite
>  board-$(CONFIG_MACH_TX53):= karo-tx53
>  board-$(CONFIG_MACH_GUF_VINCELL) := guf-vincell
>  board-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK)  := efika-mx-smartbook
> +board-$(CONFIG_MACH_ZEDBOARD):= avnet-zedboard
>  
>  machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
>  
> diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
> new file mode 100644
> index 000..8eb67d2
> --- /dev/null
> +++ b/arch/arm/mach-zynq/Kconfig
> @@ -0,0 +1,31 @@
> +if ARCH_ZYNQ
> +
> +config ARCH_TEXT_BASE
> + hex
> + default 0x1ff0 if MACH_ZEDBOARD
> +
> +config BOARDINFO
> + default "ZedBoard" if MACH_ZEDBOARD
> +
> +choice
> + prompt "Xilinx Zynq type board"
> +
> +config ARCH_ZYNQ7000
> + bool "Zynq-7000"
> + select CPU_V7
> + select DRIVER_SERIAL_CADENCE
> +
> +endchoice
> +
> +if ARCH_ZYNQ7000
> +
> +choice
> + prompt "Zynq-7000 Board Type"
> +
> +config MACH_ZEDBOARD
> + bool "Avnet Zynq-7000 ZedBoard"
> +
> +endchoice
> +endif
> +
> +endif
> diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
> new file mode 100644
> index 000..5d632b8
> --- /dev/null
> +++ b/arch/arm/mach-zynq/Makefile
> @@ -0,0 +1 @@
> +obj-y += zynq.o devices.o clocksource.o
> diff --git a/arch/arm/mach-zynq/clocksource.c 
> b/arch/arm/mach-zynq/clocksource.c
> new file mode 100644
> index 000..300a73e
> --- /dev/null
> +++ b/arch/arm/mach-zynq/clocksource.c
> @@ -0,0 +1,58 @@
> +/*
> + * (C) Copyright 2012 Steffen Trumtrar 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implie

Re: [PATCH 04/13] ARM: clps711x: Add clocksource driver

[Sascha Hauer]

On Mon, Mar 11, 2013 at 08:22:05PM +0400, Alexander Shiyan wrote:
> > On Mon, Mar 11, 2013 at 12:01:58PM +0100, Jean-Christophe PLAGNIOL-VILLARD 
> > wrote:
> > > > +static int clps711x_cs_probe(struct device_d *dev)
> > > > +{
> > > > +   u32 rate;
> > > > +   struct clk *timer_clk;
> > > > +
> > > > +   timer_clk = clk_get(dev, NULL);
> > > > +   if (IS_ERR(timer_clk))
> > > > +   return PTR_ERR(timer_clk);
> > > > +
> > > > +   rate = clk_get_rate(timer_clk);
> > > > +   clps711x_timer_base = dev_request_mem_region(dev, 0);
> > > > +   if (!clps711x_timer_base) {
> > > > +   clk_put(timer_clk);
> > > > +   return -ENOENT;
> > > > +   }
> > > this deserve a nice crash
> > 
> > No, it doesn't. First of all we are very early here, so we might not even
> > see the crash. Then, with devicetree probing we may often end up with
> > the same devices registered from the devicetree and from the
> > platform/soc. While this should find a way to avoid duplicate device
> > registration, it is not nice having barebox crash in this case.
> 
> So what is the solution you propose in this case?

For the device duplication I don't have a solution yet. Basically I
wanted to say that your patch looks good the way you did it.

Sascha

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Re[2]: [PATCH 04/13] ARM: clps711x: Add clocksource driver

[Alexander Shiyan]

> On Mon, Mar 11, 2013 at 12:01:58PM +0100, Jean-Christophe PLAGNIOL-VILLARD 
> wrote:
> > > +static int clps711x_cs_probe(struct device_d *dev)
> > > +{
> > > + u32 rate;
> > > + struct clk *timer_clk;
> > > +
> > > + timer_clk = clk_get(dev, NULL);
> > > + if (IS_ERR(timer_clk))
> > > + return PTR_ERR(timer_clk);
> > > +
> > > + rate = clk_get_rate(timer_clk);
> > > + clps711x_timer_base = dev_request_mem_region(dev, 0);
> > > + if (!clps711x_timer_base) {
> > > + clk_put(timer_clk);
> > > + return -ENOENT;
> > > + }
> > this deserve a nice crash
> 
> No, it doesn't. First of all we are very early here, so we might not even
> see the crash. Then, with devicetree probing we may often end up with
> the same devices registered from the devicetree and from the
> platform/soc. While this should find a way to avoid duplicate device
> registration, it is not nice having barebox crash in this case.

So what is the solution you propose in this case?

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[PATCH 2/2] Remove unused config.h

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/boards/archosg9/config.h|  1 -
 arch/arm/boards/beagle/config.h  | 17 -
 arch/arm/boards/beaglebone/config.h  | 17 -
 arch/arm/boards/ccxmx51/config.h | 24 
 arch/arm/boards/chumby_falconwing/config.h   | 17 -
 arch/arm/boards/clep7212/config.h|  4 
 arch/arm/boards/crystalfontz-cfa10036/config.h   | 16 
 arch/arm/boards/edb93xx/config.h |  4 
 arch/arm/boards/efika-mx-smartbook/config.h  | 17 -
 arch/arm/boards/eukrea_cpuimx27/config.h | 22 --
 arch/arm/boards/eukrea_cpuimx51/config.h | 20 
 arch/arm/boards/freescale-mx23-evk/config.h  | 12 
 arch/arm/boards/freescale-mx28-evk/config.h  | 16 
 arch/arm/boards/freescale-mx51-pdk/config.h  | 20 
 arch/arm/boards/freescale-mx53-loco/config.h | 20 
 arch/arm/boards/freescale-mx53-smd/config.h  | 20 
 arch/arm/boards/freescale-mx6-arm2/config.h  |  4 
 arch/arm/boards/freescale-mx6-sabrelite/config.h |  4 
 arch/arm/boards/freescale-mx6-sabresd/config.h   |  4 
 arch/arm/boards/guf-neso/config.h| 22 --
 arch/arm/boards/guf-vincell/config.h | 24 
 arch/arm/boards/highbank/config.h|  5 -
 arch/arm/boards/imx21ads/config.h| 22 --
 arch/arm/boards/imx233-olinuxino/config.h| 21 -
 arch/arm/boards/imx27ads/config.h| 22 --
 arch/arm/boards/karo-tx28/config.h   | 16 
 arch/arm/boards/karo-tx51/config.h   | 17 -
 arch/arm/boards/karo-tx53/config.h   | 24 
 arch/arm/boards/mioa701/config.h | 22 --
 arch/arm/boards/netx/config.h|  4 
 arch/arm/boards/nhk8815/config.h |  1 -
 arch/arm/boards/omap343xdsp/config.h | 17 -
 arch/arm/boards/omap3evm/config.h| 17 -
 arch/arm/boards/panda/config.h   |  1 -
 arch/arm/boards/pcm038/config.h  | 22 --
 arch/arm/boards/pcm049/config.h  |  1 -
 arch/arm/boards/pcm051/config.h  | 21 -
 arch/arm/boards/phycard-a-l1/config.h| 18 --
 arch/arm/boards/phycard-a-xl2/config.h   |  1 -
 arch/arm/boards/phycard-i.MX27/config.h  | 22 --
 arch/arm/boards/raspberry-pi/config.h|  4 
 arch/arm/boards/toshiba-ac100/config.h   |  5 -
 arch/arm/boards/tqma53/config.h  |  4 
 arch/arm/boards/versatile/config.h   |  5 -
 arch/arm/boards/vexpress/config.h|  5 -
 arch/mips/boards/dlink-dir-320/config.h  | 15 ---
 arch/mips/boards/qemu-malta/config.h | 15 ---
 arch/mips/boards/rzx50/config.h  | 15 ---
 arch/sandbox/board/config.h  |  4 
 arch/x86/boards/x86_generic/config.h | 17 -
 50 files changed, 668 deletions(-)
 delete mode 100644 arch/arm/boards/archosg9/config.h
 delete mode 100644 arch/arm/boards/beagle/config.h
 delete mode 100644 arch/arm/boards/beaglebone/config.h
 delete mode 100644 arch/arm/boards/ccxmx51/config.h
 delete mode 100644 arch/arm/boards/chumby_falconwing/config.h
 delete mode 100644 arch/arm/boards/clep7212/config.h
 delete mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
 delete mode 100644 arch/arm/boards/edb93xx/config.h
 delete mode 100644 arch/arm/boards/efika-mx-smartbook/config.h
 delete mode 100644 arch/arm/boards/eukrea_cpuimx27/config.h
 delete mode 100644 arch/arm/boards/eukrea_cpuimx51/config.h
 delete mode 100644 arch/arm/boards/freescale-mx23-evk/config.h
 delete mode 100644 arch/arm/boards/freescale-mx28-evk/config.h
 delete mode 100644 arch/arm/boards/freescale-mx51-pdk/config.h
 delete mode 100644 arch/arm/boards/freescale-mx53-loco/config.h
 delete mode 100644 arch/arm/boards/freescale-mx53-smd/config.h
 delete mode 100644 arch/arm/boards/freescale-mx6-arm2/config.h
 delete mode 100644 arch/arm/boards/freescale-mx6-sabrelite/config.h
 delete mode 100644 arch/arm/boards/freescale-mx6-sabresd/config.h
 delete mode 100644 arch/arm/boards/guf-neso/config.h
 delete mode 100644 arch/arm/boards/guf-vincell/config.h
 delete mode 100644 arch/arm/boards/highbank/config.h
 delete mode 100644 arch/arm/boards/imx21ads/config.h
 delete mode 100644 arch/arm/boards/imx233-olinuxino/config.h
 delete mode 1006

[PATCH 1/2] Makefile: Create empty if this header file is not needed by board

[Alexander Shiyan]

Patch creates empty  if this header is not needed by board.
This will allow to remove many empty config.h files from boards.

Signed-off-by: Alexander Shiyan 
---
 Makefile | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index b5819fc..e8d9984 100644
--- a/Makefile
+++ b/Makefile
@@ -898,13 +898,18 @@ include/asm:
$(Q)$(check-symlink)
$(Q)$(create-symlink)
 
+define symlink-config-h
+   if [ -f $(srctree)/$(BOARD)/config.h ]; then\
+   $(kecho) '  SYMLINK $@ -> $(BOARD)/config.h';   \
+   ln -fsn $(srctree)/$(BOARD)/config.h $@;\
+   else\
+   $(kecho) '  CREATE  $@';\
+   echo -n > $@;   \
+   fi
+endef
+
 include/config.h: include/config/auto.conf
-   $(Q)$(kecho) '  SYMLINK $@ -> $(BOARD)/config.h'
-ifneq ($(KBUILD_SRC),)
-   $(Q)ln -fsn $(srctree)/$(BOARD)/config.h $@
-else
-   $(Q)ln -fsn ../$(BOARD)/config.h $@
-endif
+   $(Q)$(symlink-config-h)
 
 # Generate some files
 # ---
-- 
1.7.12.4


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Re[2]: [RFC] Makefile: Create empty if this header file is not needed by board

[Alexander Shiyan]

> On Sun, Mar 10, 2013 at 07:01:00PM +0400, Alexander Shiyan wrote:
> > > > > Patch creates empty  if this header is not needed by board.
> > > > > This will allow to remove many empty config.h files from boards.
> > > 
> > > How does git incorporate with this? I think git just ignores empty files
> > > like these, right?
> > 
> > When I say "empty" here, I mean about not zeroed files, but about
> > files without any content. Now we have 50 config.h files like this.
> 
> My question aimed in the direction whether we end up with empty files
> in git because people accidently add these now generated files.
> 
> I think the goal should be to get rid of the config.h files entirely.
> This patch (or better: the removal of the empty files) could be a good
> start to see what's left.

OK, let's see. I will send the patch again. Second part is a cleanup.

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Re: [PATCH 05/13] ARM: clps711x: Using COMMON_CLK

[Jean-Christophe PLAGNIOL-VILLARD]

On 15:26 Mon 11 Mar , Alexander Shiyan wrote:
> Hello.
> 
> > On 13:26 Mon 11 Mar , Alexander Shiyan wrote:
> > > This patch adds support for COMMON_CLK API for CLPS711X targets.
> > > 
> > > Signed-off-by: Alexander Shiyan 
> ...
> > > + /* Turn timers in free running mode */
> > >   tmp = readl(SYSCON1);
> > > - tmp &= ~SYSCON1_TC2M;   /* Free running mode */
> > > - tmp |= SYSCON1_TC2S;/* High frequency source */
> > > + tmp &= ~(SYSCON1_TC1M | SYSCON1_TC2M);
> > >   writel(tmp, SYSCON1);
> > this is timer configuration not clocks
> 
> We need to read counter value for clocksource, so we need to ensure
> that we have full range of values (0x0 - 0x). It mean that timer/counters
> should not be in prescaler mode. All correct.
as on ARM this timer config no clocks
> Thanks.
> 
> ---

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Re[2]: [PATCH 05/13] ARM: clps711x: Using COMMON_CLK

[Alexander Shiyan]

Hello.

> On 13:26 Mon 11 Mar , Alexander Shiyan wrote:
> > This patch adds support for COMMON_CLK API for CLPS711X targets.
> > 
> > Signed-off-by: Alexander Shiyan 
...
> > +   /* Turn timers in free running mode */
> > tmp = readl(SYSCON1);
> > -   tmp &= ~SYSCON1_TC2M;   /* Free running mode */
> > -   tmp |= SYSCON1_TC2S;/* High frequency source */
> > +   tmp &= ~(SYSCON1_TC1M | SYSCON1_TC2M);
> > writel(tmp, SYSCON1);
> this is timer configuration not clocks

We need to read counter value for clocksource, so we need to ensure
that we have full range of values (0x0 - 0x). It mean that timer/counters
should not be in prescaler mode. All correct.
Thanks.

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Re: [PATCH 04/13] ARM: clps711x: Add clocksource driver

[Sascha Hauer]

On Mon, Mar 11, 2013 at 12:01:58PM +0100, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
> > +static int clps711x_cs_probe(struct device_d *dev)
> > +{
> > +   u32 rate;
> > +   struct clk *timer_clk;
> > +
> > +   timer_clk = clk_get(dev, NULL);
> > +   if (IS_ERR(timer_clk))
> > +   return PTR_ERR(timer_clk);
> > +
> > +   rate = clk_get_rate(timer_clk);
> > +   clps711x_timer_base = dev_request_mem_region(dev, 0);
> > +   if (!clps711x_timer_base) {
> > +   clk_put(timer_clk);
> > +   return -ENOENT;
> > +   }
> this deserve a nice crash

No, it doesn't. First of all we are very early here, so we might not even
see the crash. Then, with devicetree probing we may often end up with
the same devices registered from the devicetree and from the
platform/soc. While this should find a way to avoid duplicate device
registration, it is not nice having barebox crash in this case.

Sascha


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Re: New dt-only arm/mach

[Jean-Christophe PLAGNIOL-VILLARD]

On 18:13 Sun 10 Mar , Alexander Shiyan wrote:
>Hello All.
> 
>I want to add new arch into barebox. n the kernel this arch is dt-only.
>I talking about mach-sunxi. So, how we should handle such platform
>in the barebox? We need always provide dtb to the kernel, then where
>it should be in barebox?
>I think about dtb-file in /env, but not sure...

sama5, sama9x5, sam9n12 are pure DTB kernel

Calxeda Highbank is pure DT with barebox dt probe

Best Regards,
J.
>Thanks.
> 
>---

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Re: [PATCH 05/13] ARM: clps711x: Using COMMON_CLK

[Jean-Christophe PLAGNIOL-VILLARD]

On 13:26 Mon 11 Mar , Alexander Shiyan wrote:
> This patch adds support for COMMON_CLK API for CLPS711X targets.
> 
> Signed-off-by: Alexander Shiyan 
> ---
>  arch/arm/Kconfig |1 +
>  arch/arm/mach-clps711x/clock.c   |  109 
> ++
>  arch/arm/mach-clps711x/devices.c |4 ++
>  3 files changed, 68 insertions(+), 46 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index c608454..6463746 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -40,6 +40,7 @@ config ARCH_CLPS711X
>   bool "Cirrus Logic EP711x/EP721x/EP731x"
>   select CLKDEV_LOOKUP
>   select CLOCKSOURCE_CLPS711X
> + select COMMON_CLK
>   select CPU_32v4T
>  
>  config ARCH_EP93XX
> diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
> index e957662..7658c9a 100644
> --- a/arch/arm/mach-clps711x/clock.c
> +++ b/arch/arm/mach-clps711x/clock.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
> @@ -18,32 +19,37 @@
>  #define CLPS711X_OSC_FREQ3686400
>  #define CLPS711X_EXT_FREQ1300
>  
> -static struct clk {
> - unsigned long   rate;
> -} uart_clk, bus_clk, timer_clk;
> +enum clps711x_clks {
> + dummy, cpu, bus, uart, timer_hf, timer_lf, tc1, tc2, clk_max
> +};
>  
> -unsigned long clk_get_rate(struct clk *clk)
> -{
> - return clk->rate;
> -}
> -EXPORT_SYMBOL(clk_get_rate);
> +static struct {
> + const char  *name;
> + struct clk  *clk;
> +} clks[clk_max] = {
> + { "dummy", },
> + { "cpu", },
> + { "bus", },
> + { "uart", },
> + { "timer_hf", },
> + { "timer_lf", },
> + { "tc1", },
> + { "tc2", },
> +};
>  
> -int clk_enable(struct clk *clk)
> -{
> - /* Do nothing */
> - return 0;
> -}
> -EXPORT_SYMBOL(clk_enable);
> +static const char *tc_sel_clks[] = {
> + "timer_lf",
> + "timer_hf",
> +};
>  
> -void clk_disable(struct clk *clk)
> +static __init void clps711x_clk_register(enum clps711x_clks id)
>  {
> - /* Do nothing */
> + clk_register_clkdev(clks[id].clk, clks[id].name, NULL);
>  }
> -EXPORT_SYMBOL(clk_disable);
>  
> -static int clocks_init(void)
> +static __init int clps711x_clk_init(void)
>  {
> - int pll, cpu;
> + unsigned int f_cpu, f_bus, f_uart, f_timer_hf, f_timer_lf, pll;
>   u32 tmp;
>  
>   tmp = readl(PLLR) >> 24;
> @@ -54,57 +60,68 @@ static int clocks_init(void)
>  
>   tmp = readl(SYSFLG2);
>   if (tmp & SYSFLG2_CKMODE) {
> - cpu = CLPS711X_EXT_FREQ;
> - bus_clk.rate = CLPS711X_EXT_FREQ;
> + f_cpu = CLPS711X_EXT_FREQ;
> + f_bus = CLPS711X_EXT_FREQ;
>   } else {
> - cpu = pll;
> - if (cpu >= 36864000)
> - bus_clk.rate = cpu / 2;
> + f_cpu = pll;
> + if (f_cpu >= 36864000)
> + f_bus = f_cpu / 2;
>   else
> - bus_clk.rate = 36864000 / 2;
> + f_bus = 36864000 / 2;
>   }
>  
> - uart_clk.rate = DIV_ROUND_CLOSEST(bus_clk.rate, 10);
> + f_uart = f_bus / 10;
>  
>   if (tmp & SYSFLG2_CKMODE) {
>   tmp = readw(SYSCON2);
>   if (tmp & SYSCON2_OSTB)
> - timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
> 26);
> + f_timer_hf = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 26);
>   else
> - timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
> 24);
> + f_timer_hf = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 24);
>   } else
> - timer_clk.rate = DIV_ROUND_CLOSEST(cpu, 144);
> + f_timer_hf = DIV_ROUND_CLOSEST(f_cpu, 144);
>  
> + f_timer_lf = DIV_ROUND_CLOSEST(f_timer_hf, 256);
> +
> + /* Turn timers in free running mode */
>   tmp = readl(SYSCON1);
> - tmp &= ~SYSCON1_TC2M;   /* Free running mode */
> - tmp |= SYSCON1_TC2S;/* High frequency source */
> + tmp &= ~(SYSCON1_TC1M | SYSCON1_TC2M);
>   writel(tmp, SYSCON1);
this is timer configuration not clocks

Best Regards,
J.
>  
> - return 0;
> -}
> -core_initcall(clocks_init);
> -
> -static struct clk_lookup clocks_lookups[] = {
> - CLKDEV_CON_ID("bus", &bus_clk),
> - CLKDEV_DEV_ID("clps711x_serial0", &uart_clk),
> - CLKDEV_DEV_ID("clps711x_serial1", &uart_clk),
> - CLKDEV_DEV_ID("clps711x-cs", &timer_clk),
> -};
> -
> -static int clkdev_init(void)
> -{
> - clkdev_add_table(clocks_lookups, ARRAY_SIZE(clocks_lookups));
> + clks[dummy].clk = clk_fixed(clks[dummy].name, 0);
> + clks[cpu].clk = clk_fixed(clks[cpu].name, f_cpu);
> + clks[bus].clk = clk_fixed(clks[bus].name, f_bus);
> + clks[uart].clk = clk_fixed(clks[uart].name, f_uart);
> + clks[timer_hf].clk = clk_fixed(clks[timer_hf].name, f_timer_hf);
> + clks[timer_lf].clk = clk_fixed(clks[timer_lf].name, f_timer_lf);
> +

Re: [PATCH 04/13] ARM: clps711x: Add clocksource driver

[Jean-Christophe PLAGNIOL-VILLARD]

On 13:26 Mon 11 Mar , Alexander Shiyan wrote:
> This patch adds clocksource driver for CLPS711X targets and adds
> support to platform to use this new driver.
> 
> Signed-off-by: Alexander Shiyan 
> ---
>  arch/arm/Kconfig   |1 +
>  arch/arm/mach-clps711x/clock.c |   51 -
>  drivers/clocksource/Kconfig|4 ++
>  drivers/clocksource/Makefile   |1 +
>  drivers/clocksource/clps711x.c |   61 
> 
>  5 files changed, 92 insertions(+), 26 deletions(-)
>  create mode 100644 drivers/clocksource/clps711x.c
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 7ac134e..c608454 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -39,6 +39,7 @@ config ARCH_BCM2835
>  config ARCH_CLPS711X
>   bool "Cirrus Logic EP711x/EP721x/EP731x"
>   select CLKDEV_LOOKUP
> + select CLOCKSOURCE_CLPS711X
>   select CPU_32v4T
>  
>  config ARCH_EP93XX
> diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
> index 09cbaf9..e957662 100644
> --- a/arch/arm/mach-clps711x/clock.c
> +++ b/arch/arm/mach-clps711x/clock.c
> @@ -9,25 +9,18 @@
>  
>  #include 
>  #include 
> -#include 
> +#include 
>  #include 
>  #include 
>  
>  #include 
>  
> +#define CLPS711X_OSC_FREQ3686400
> +#define CLPS711X_EXT_FREQ1300
> +
>  static struct clk {
>   unsigned long   rate;
> -} uart_clk, bus_clk;
> -
> -static uint64_t clocksource_read(void)
> -{
> - return ~readw(TC2D);
> -}
> -
> -static struct clocksource cs = {
> - .read   = clocksource_read,
> - .mask   = CLOCKSOURCE_MASK(16),
> -};
> +} uart_clk, bus_clk, timer_clk;
>  
>  unsigned long clk_get_rate(struct clk *clk)
>  {
> @@ -50,22 +43,19 @@ EXPORT_SYMBOL(clk_disable);
>  
>  static int clocks_init(void)
>  {
> - int osc, ext, pll, cpu, timer;
> + int pll, cpu;
>   u32 tmp;
>  
> - osc = 3686400;
> - ext = 1300;
> -
>   tmp = readl(PLLR) >> 24;
>   if (tmp)
> - pll = (osc * tmp) / 2;
> + pll = (CLPS711X_OSC_FREQ * tmp) / 2;
>   else
>   pll = 73728000; /* Default value for old CPUs */
>  
>   tmp = readl(SYSFLG2);
>   if (tmp & SYSFLG2_CKMODE) {
> - cpu = ext;
> - bus_clk.rate = cpu;
> + cpu = CLPS711X_EXT_FREQ;
> + bus_clk.rate = CLPS711X_EXT_FREQ;
>   } else {
>   cpu = pll;
>   if (cpu >= 36864000)
> @@ -74,25 +64,23 @@ static int clocks_init(void)
>   bus_clk.rate = 36864000 / 2;
>   }
>  
> - uart_clk.rate = bus_clk.rate / 10;
> + uart_clk.rate = DIV_ROUND_CLOSEST(bus_clk.rate, 10);
>  
>   if (tmp & SYSFLG2_CKMODE) {
>   tmp = readw(SYSCON2);
>   if (tmp & SYSCON2_OSTB)
> - timer = ext / 26;
> + timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
> 26);
>   else
> - timer = 541440;
> + timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
> 24);
>   } else
> - timer = cpu / 144;
> + timer_clk.rate = DIV_ROUND_CLOSEST(cpu, 144);
>  
>   tmp = readl(SYSCON1);
>   tmp &= ~SYSCON1_TC2M;   /* Free running mode */
>   tmp |= SYSCON1_TC2S;/* High frequency source */
>   writel(tmp, SYSCON1);
>  
> - clocks_calc_mult_shift(&cs.mult, &cs.shift, timer, NSEC_PER_SEC, 10);
> -
> - return init_clock(&cs);
> + return 0;
>  }
>  core_initcall(clocks_init);
>  
> @@ -100,6 +88,7 @@ static struct clk_lookup clocks_lookups[] = {
>   CLKDEV_CON_ID("bus", &bus_clk),
>   CLKDEV_DEV_ID("clps711x_serial0", &uart_clk),
>   CLKDEV_DEV_ID("clps711x_serial1", &uart_clk),
> + CLKDEV_DEV_ID("clps711x-cs", &timer_clk),
>  };
>  
>  static int clkdev_init(void)
> @@ -109,3 +98,13 @@ static int clkdev_init(void)
>   return 0;
>  }
>  postcore_initcall(clkdev_init);
> +
> +static const char *clps711x_clocksrc_name = "clps711x-cs";
> +
> +static __init int clps711x_core_init(void)
> +{
> + add_generic_device(clps711x_clocksrc_name, DEVICE_ID_SINGLE, NULL,
> +TC2D, SZ_2, IORESOURCE_MEM, NULL);
> + return 0;
> +}
> +coredevice_initcall(clps711x_core_init);
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 3f27cf2..9f3558b 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -10,6 +10,10 @@ config CLOCKSOURCE_BCM2835
>   bool
>   depends on ARCH_BCM2835
>  
> +config CLOCKSOURCE_CLPS711X
> + bool
> + depends on ARCH_CLPS711X
> +
>  config CLOCKSOURCE_NOMADIK
>   bool
>   depends on ARM
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index b0bc8bd..d919881 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_AMBA_SP804) += amba-sp804.o
>  obj-$(CONFIG_ARM_S

Re: [PATCH 4/9] ARM: zynq: Add support for the Avnet Zedboard

[Sascha Hauer]

On Mon, Mar 11, 2013 at 10:15:01AM +0100, Steffen Trumtrar wrote:
> The Avnet ZedBoard is an evalboard with a Zynq-7020 based MPSoC.
> There is also a Digilent ZedBoard, that is the same but only for
> academic customers.
> 
> diff --git a/arch/arm/configs/zedboard_defconfig 
> b/arch/arm/configs/zedboard_defconfig

Please regenerate with make savedefconfig

Sascha


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Re: [PATCH 3/9] ARM: zynq: add zynq fsbl checksum script

[Sascha Hauer]

On Mon, Mar 11, 2013 at 10:15:00AM +0100, Steffen Trumtrar wrote:
> The bootrom only reads an image if the correct checksum is present in the
> header. The calculation is pretty simple:
> sum over all words from 0x20 to 0x44
> Two of this words are the image length. That is why the checksum can not be
> calculated until barebox_image_size is known.
> The easiest solution is a program that has to be run after make.
> Maybe this can be replaced with some linker-fu.
> 
> Signed-off-by: Steffen Trumtrar 
> ---
>  scripts/Makefile|  1 +
>  scripts/zynq_checksum.c | 55 
> +
>  2 files changed, 56 insertions(+)
>  create mode 100644 scripts/zynq_checksum.c
> 
> diff --git a/scripts/Makefile b/scripts/Makefile
> index 08b325c..41c892e 100644
> --- a/scripts/Makefile
> +++ b/scripts/Makefile
> @@ -12,6 +12,7 @@ hostprogs-$(CONFIG_ARCH_NETX)+= gen_netx_image
>  hostprogs-$(CONFIG_ARCH_OMAP)+= omap_signGP mk-am35xx-spi-image
>  hostprogs-$(CONFIG_ARCH_S5PCxx)  += s5p_cksum
>  hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader
> +hostprogs-$(CONFIG_ARCH_ZYNQ) += zynq_checksum
>  
>  HOSTLOADLIBES_omap4_usbboot = -lpthread
>  omap4_usbboot-objs   := usb_linux.o omap4_usbboot.o
> diff --git a/scripts/zynq_checksum.c b/scripts/zynq_checksum.c
> new file mode 100644
> index 000..e814f86
> --- /dev/null
> +++ b/scripts/zynq_checksum.c
> @@ -0,0 +1,55 @@
> +#include 
> +#include 
> +#include 
> +
> +int main(int argc, char *argv[])
> +{
> + FILE *ifile, *ofile;
> + unsigned int *buf;
> + const char *infile;
> + const char *outfile;
> + struct stat st;
> + unsigned int i;
> + unsigned long sum = 0;
> +
> + infile = argv[1];
> + outfile = argv[2];
> +
> + stat(infile, &st);
> +
> + buf = malloc(sizeof(*buf) * st.st_size);
> + if (!buf) {
> + fprintf(stderr, "Unable to allocate buffer\n");
> + return -1;
> + }
> + ifile = fopen(infile, "rb");
> + if (!ifile) {
> + fprintf(stderr, "Cannot open %s for reading\n",
> + infile);
> + free(buf);
> + return -1;
> + }
> + ofile = fopen(outfile, "wb");
> + if (!ofile) {
> + fprintf(stderr, "Cannot open %s for writing\n",
> + outfile);
> + fclose(ifile);
> + free(buf);
> + return -1;
> + }
> +
> + fread(buf, 4, st.st_size, ifile);
> +
> + for (i = 0x8; i < 0x12; i++)
> + sum += buf[i];

endianess?

Sascha


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Re: [PATCH 2/9] ARM: Zynq: Add new architecture zynq

[Sascha Hauer]

On Mon, Mar 11, 2013 at 10:14:59AM +0100, Steffen Trumtrar wrote:
> Add basic support for the Xilinx Zynq-7000 EPP architecture.
> The Zynq-7000 is an embedded processing platform that combines a Cortex A9
> dualcore MPSoC with an Artix-7 FPGA.
> 
> +
> +static void __iomem *timer_base = (void *) CORTEXA9_SCU_TIMER_BASE_ADDR;
> +
> +static uint64_t zynq_clocksource_read(void)
> +{
> + return readl(timer_base + PRIVATE_TIMER_COUNTER);
> +}
> +
> +static struct clocksource cs = {
> + .read   = zynq_clocksource_read,
> + .mask   = CLOCKSOURCE_MASK(16),
> + .shift  = TIMER_PRESCALER_SHIFT,
> +};
> +
> +static int zynq_timer_init(void)
> +{
> + cs.mult = clocksource_hz2mult(3330, cs.shift);

You should add clock support. Adding a first-shot clock support is
really simple:

struct clk = clk_fixed("timer", 3330);
clkdev_add_physbase(clk, CORTEXA9_SCU_TIMER_BASE_ADDR, NULL);


> +
> + /* set timer load register */
> + writel(0x, timer_base);
> +
> + writel(TIMER_CTRL_TIMER_EN | TIMER_CTRL_AUTO_RELOAD |
> + (TIMER_PRESCALER << cs.shift),
> + timer_base + PRIVATE_TIMER_CONTROL);
> +
> + init_clock(&cs);
> +
> + return 0;
> +}
> +coredevice_initcall(zynq_timer_init);

Please make this a real driver.

> diff --git a/arch/arm/mach-zynq/devices.c b/arch/arm/mach-zynq/devices.c
> new file mode 100644
> index 000..2bb3c92
> --- /dev/null
> +++ b/arch/arm/mach-zynq/devices.c
> @@ -0,0 +1,14 @@
> +#include 
> +#include 
> +#include 
> +
> +static inline struct device_d *zynq_add_device(char *name, int id, void 
> *base, int size, void *pdata)
> +{
> + return add_generic_device(name, id, NULL, (resource_size_t)base, size,
> +   IORESOURCE_MEM, pdata);
> +}
> +
> +struct device_d *zynq_add_uart(void *base, int id)
> +{
> + return zynq_add_device("cadence-uart", id, base, 0x1000, NULL);
> +}
> diff --git a/arch/arm/mach-zynq/include/mach/barebox.lds.h 
> b/arch/arm/mach-zynq/include/mach/barebox.lds.h
> new file mode 100644
> index 000..674a4ac
> --- /dev/null
> +++ b/arch/arm/mach-zynq/include/mach/barebox.lds.h
> @@ -0,0 +1,9 @@
> +#define PRE_IMAGE \
> + .pre_image : {  \
> + KEEP(*(.flash_header_start*))   \
> + . = 0x20;   \
> + KEEP(*(.flash_header_0x0*)) \
> + . = 0xa0;   \
> + KEEP(*(.ps7reg_entry_0x0A0))\
> + . = 0x8c0;  \
> + }
> diff --git a/arch/arm/mach-zynq/include/mach/debug_ll.h 
> b/arch/arm/mach-zynq/include/mach/debug_ll.h
> new file mode 100644
> index 000..4fbb387
> --- /dev/null
> +++ b/arch/arm/mach-zynq/include/mach/debug_ll.h
> @@ -0,0 +1,34 @@
> +/*
> + * based on mach-imx/include/mach/debug_ll.h
> + */
> +
> +#ifndef __MACH_DEBUG_LL_H__
> +#define __MACH_DEBUG_LL_H__
> +
> +#include 
> +#include 
> +
> +#ifndef ZYNQ_DEBUG_LL_UART_BASE
> +#warning define ZYNQ_DEBUG_LL_UART_BASE properly for debug_ll
> +#define ZYNQ_DEBUG_LL_UART_BASE ZYNQ_UART1_BASE_ADDR
> +#endif
> +
> +#define ZYNQ_UART_RXTXFIFO   0x30
> +#define ZYNQ_UART_CHANNEL_STS0x2C
> +
> +#define ZYNQ_UART_STS_TFUL   (1 << 4)
> +
> +static inline void PUTC_LL(int c)
> +{
> + void __iomem *base = (void *)ZYNQ_DEBUG_LL_UART_BASE;
> +
> + if (!base)
> + return;

This will never happen, right?

What makes sense though is to add a check whether this UART is enabled.
We do not have initialization code here, so if the UART is not enabled,
you will likely loop forever below. It can be annoying that the only
reason barebox doesn't work is the code you added for debugging.

> +
> + while ((readl(base + ZYNQ_UART_CHANNEL_STS) & ZYNQ_UART_STS_TFUL) != 0)
> + ;
> +
> + writel(c, base + ZYNQ_UART_RXTXFIFO);
> +}
> +
> +#endif
> diff --git a/arch/arm/mach-zynq/include/mach/zynq7000-regs.h 
> b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h
> new file mode 100644
> index 000..58fc712
> --- /dev/null
> +++ b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h
> @@ -0,0 +1,132 @@
> +/*
> + * (c) 2012 Steffen Trumtrar 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#define ZYNQ_UART0_BASE_ADDR 0xE000
> +#define ZYNQ_UART1_BASE_ADDR 0xE0001000
> +#define ZYNQ_I2C0_BASE_ADDR  0xE0004000
> +#define ZYNQ_I2C1_BASE_ADDR 

Re: [PATCH 1/9] serial: Add driver for Cadence UART

[Sascha Hauer]

On Mon, Mar 11, 2013 at 10:14:58AM +0100, Steffen Trumtrar wrote:
> Support for Cadence UART core.
> 
> Signed-off-by: Steffen Trumtrar 
> ---
>  drivers/serial/Kconfig  |   4 +
>  drivers/serial/Makefile |   1 +
>  drivers/serial/serial_cadence.c | 299 
> 
>  3 files changed, 304 insertions(+)
>  create mode 100644 drivers/serial/serial_cadence.c
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index f61d670..a51510e 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -113,4 +113,8 @@ config DRIVER_SERIAL_OMAP4_USBBOOT
>   help
> Enable this to get console support over the usb bus used to boot an 
> OMAP4
>  
> +config DRIVER_SERIAL_CADENCE
> + default n
> + bool "Cadence UART driver"
> +
>  endmenu
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 893e282..963a7df 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -21,3 +21,4 @@ obj-$(CONFIG_DRIVER_SERIAL_ALTERA)  += 
> serial_altera.o
>  obj-$(CONFIG_DRIVER_SERIAL_ALTERA_JTAG)  += serial_altera_jtag.o
>  obj-$(CONFIG_DRIVER_SERIAL_PXA)  += serial_pxa.o
>  obj-$(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT)+= serial_omap4_usbboot.o
> +obj-$(CONFIG_DRIVER_SERIAL_CADENCE)  += serial_cadence.o
> diff --git a/drivers/serial/serial_cadence.c b/drivers/serial/serial_cadence.c
> new file mode 100644
> index 000..0ccb1b3
> --- /dev/null
> +++ b/drivers/serial/serial_cadence.c
> @@ -0,0 +1,299 @@
> +/*
> + * (c) 2012 Steffen Trumtrar 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define CADENCE_UART_CONTROL 0x00
> +#define CADENCE_UART_MODE0x04
> +#define CADENCE_UART_BAUD_GEN0x18
> +#define CADENCE_UART_CHANNEL_STS 0x2C
> +#define CADENCE_UART_RXTXFIFO0x30
> +#define CADENCE_UART_BAUD_DIV0x34
> +
> +#define CADENCE_CTRL_RXRES   (1 << 0)
> +#define CADENCE_CTRL_TXRES   (1 << 1)
> +#define CADENCE_CTRL_RXEN(1 << 2)
> +#define CADENCE_CTRL_RXDIS   (1 << 3)
> +#define CADENCE_CTRL_TXEN(1 << 4)
> +#define CADENCE_CTRL_TXDIS   (1 << 5)
> +#define CADENCE_CTRL_RSTTO   (1 << 6)
> +#define CADENCE_CTRL_STTBRK  (1 << 7)
> +#define CADENCE_CTRL_STPBRK  (1 << 8)
> +
> +#define CADENCE_MODE_CLK_REF (0 << 0)
> +#define CADENCE_MODE_CLK_REF_DIV (1 << 0)
> +#define CADENCE_MODE_CHRL_6  (3 << 1)
> +#define CADENCE_MODE_CHRL_7  (2 << 1)
> +#define CADENCE_MODE_CHRL_8  (0 << 1)
> +#define CADENCE_MODE_PAR_EVEN(0 << 3)
> +#define CADENCE_MODE_PAR_ODD (1 << 3)
> +#define CADENCE_MODE_PAR_SPACE   (2 << 3)
> +#define CADENCE_MODE_PAR_MARK(3 << 3)
> +#define CADENCE_MODE_PAR_NONE(4 << 3)
> +
> +#define CADENCE_STS_REMPTY   (1 << 1)
> +#define CADENCE_STS_RFUL (1 << 2)
> +#define CADENCE_STS_TEMPTY   (1 << 3)
> +#define CADENCE_STS_TFUL (1 << 4)
> +
> +/*
> + * create default values for different platforms
> + */
> +struct cadence_serial_devtype_data {
> + u32 ctrl;
> + u32 mode;
> +};
> +
> +static struct cadence_serial_devtype_data cadence7000_data = {
> + .ctrl = CADENCE_CTRL_RXEN | CADENCE_CTRL_TXEN,
> + .mode = CADENCE_MODE_CLK_REF | CADENCE_MODE_CHRL_8 | 
> CADENCE_MODE_PAR_NONE,
> +};
> +
> +struct cadence_serial_priv {
> + struct console_device cdev;
> + int baudrate;
> + struct notifier_block notify;
> + void __iomem *regs;
> + /*struct clk *clk;*/
> + unsigned long clk;
> + struct cadence_serial_devtype_data *devtype;
> +};
> +
> +static int cadence_serial_reset(struct console_device *cdev)
> +{
> + struct cadence_serial_priv *priv = container_of(cdev,
> + struct cadence_serial_priv, cdev);
> +
> + /* Soft-Reset Tx/Rx paths */
> + writel(CADENCE_CTRL_RXRES | CADENCE_CTRL_TXRES, priv->regs +
> + CADENCE_UART_CONTROL);
> +
> + while (readl(priv->regs + CADENCE_UART_CONTROL) &
> + (CADENCE_CTRL_RXRES | CADENCE_CTRL_TXRES))
> + ;
> +
> + return 0;
> +}
> +
> +static int cadence_serial_setbaudrate(struct console_device *cdev, int 
> baudrate)
> +{
> + struct cadence_serial_priv *priv = container_of(cdev,
> + struct cadence_seria

[PATCH 13/13] serial: clps711x: Migrate to using SYSCON driver

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/mach-clps711x/devices.c |4 
 drivers/serial/serial_clps711x.c |   31 +++
 2 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c
index b36013f..9eeff5c 100644
--- a/arch/arm/mach-clps711x/devices.c
+++ b/arch/arm/mach-clps711x/devices.c
@@ -52,15 +52,11 @@ void clps711x_setup_memcfg(int bank, u32 val)
 
 static struct resource uart0_resources[] = {
DEFINE_RES_MEM(UBRLCR1, SZ_4),
-   DEFINE_RES_MEM(SYSCON1, SZ_4),
-   DEFINE_RES_MEM(SYSFLG1, SZ_4),
DEFINE_RES_MEM(UARTDR1, SZ_4),
 };
 
 static struct resource uart1_resources[] = {
DEFINE_RES_MEM(UBRLCR2, SZ_4),
-   DEFINE_RES_MEM(SYSCON2, SZ_4),
-   DEFINE_RES_MEM(SYSFLG2, SZ_4),
DEFINE_RES_MEM(UARTDR2, SZ_4),
 };
 
diff --git a/drivers/serial/serial_clps711x.c b/drivers/serial/serial_clps711x.c
index 21d0b55..cb250be 100644
--- a/drivers/serial/serial_clps711x.c
+++ b/drivers/serial/serial_clps711x.c
@@ -15,18 +15,21 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
 struct clps711x_uart {
void __iomem*UBRLCR;
-   void __iomem*SYSCON;
-   void __iomem*SYSFLG;
void __iomem*UARTDR;
+   void __iomem*syscon;
struct clk  *uart_clk;
struct console_device   cdev;
 };
 
+#define SYSCON(x)  ((x)->syscon + 0x00)
+#define SYSFLG(x)  ((x)->syscon + 0x40)
+
 static int clps711x_setbaudrate(struct console_device *cdev, int baudrate)
 {
struct clps711x_uart *s = cdev->dev->priv;
@@ -48,7 +51,7 @@ static void clps711x_init_port(struct console_device *cdev)
u32 tmp;
 
/* Disable the UART */
-   writel(readl(s->SYSCON) & ~SYSCON_UARTEN, s->SYSCON);
+   writel(readl(SYSCON(s)) & ~SYSCON_UARTEN, SYSCON(s));
 
/* Setup Line Control Register */
tmp = readl(s->UBRLCR) & UBRLCR_BAUD_MASK;
@@ -59,7 +62,7 @@ static void clps711x_init_port(struct console_device *cdev)
clps711x_setbaudrate(cdev, CONFIG_BAUDRATE);
 
/* Enable the UART */
-   writel(readl(s->SYSCON) | SYSCON_UARTEN, s->SYSCON);
+   writel(readl(SYSCON(s)) | SYSCON_UARTEN, SYSCON(s));
 }
 
 static void clps711x_putc(struct console_device *cdev, char c)
@@ -67,7 +70,7 @@ static void clps711x_putc(struct console_device *cdev, char c)
struct clps711x_uart *s = cdev->dev->priv;
 
/* Wait until there is space in the FIFO */
-   while (readl(s->SYSFLG) & SYSFLG_UTXFF)
+   while (readl(SYSFLG(s)) & SYSFLG_UTXFF)
barrier();
 
/* Send the character */
@@ -80,7 +83,7 @@ static int clps711x_getc(struct console_device *cdev)
u16 data;
 
/* Wait until there is data in the FIFO */
-   while (readl(s->SYSFLG) & SYSFLG_URXFE)
+   while (readl(SYSFLG(s)) & SYSFLG_URXFE)
barrier();
 
data = readw(s->UARTDR);
@@ -96,31 +99,35 @@ static int clps711x_tstc(struct console_device *cdev)
 {
struct clps711x_uart *s = cdev->dev->priv;
 
-   return !(readl(s->SYSFLG) & SYSFLG_URXFE);
+   return !(readl(SYSFLG(s)) & SYSFLG_URXFE);
 }
 
 static void clps711x_flush(struct console_device *cdev)
 {
struct clps711x_uart *s = cdev->dev->priv;
 
-   while (readl(s->SYSFLG) & SYSFLG_UBUSY)
+   while (readl(SYSFLG(s)) & SYSFLG_UBUSY)
barrier();
 }
 
 static int clps711x_probe(struct device_d *dev)
 {
struct clps711x_uart *s;
+   char syscon_dev[18];
 
-   BUG_ON(dev->num_resources != 4);
+   BUG_ON(dev->num_resources != 2);
+   BUG_ON((dev->id != 0) && (dev->id != 1));
 
s = xzalloc(sizeof(struct clps711x_uart));
s->uart_clk = clk_get(dev, NULL);
BUG_ON(IS_ERR(s->uart_clk));
 
s->UBRLCR = dev_get_mem_region(dev, 0);
-   s->SYSCON = dev_get_mem_region(dev, 1);
-   s->SYSFLG = dev_get_mem_region(dev, 2);
-   s->UARTDR = dev_get_mem_region(dev, 3);
+   s->UARTDR = dev_get_mem_region(dev, 1);
+
+   sprintf(syscon_dev, "clps711x-syscon%i", dev->id + 1);
+   s->syscon = syscon_base_lookup_by_pdevname(syscon_dev);
+   BUG_ON(IS_ERR(s->syscon));
 
dev->priv   = s;
s->cdev.dev = dev;
-- 
1.7.3.4


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[PATCH 12/13] ARM: clps711x: Export system-wide registers through SYSCON driver

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/Kconfig |1 +
 arch/arm/mach-clps711x/devices.c |   16 
 drivers/mfd/syscon.c |3 +++
 3 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ed0b453..6128322 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -43,6 +43,7 @@ config ARCH_CLPS711X
select COMMON_CLK
select CPU_32v4T
select GPIOLIB
+   select MFD_SYSCON
 
 config ARCH_EP93XX
bool "Cirrus Logic EP93xx"
diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c
index 4cc53fa..b36013f 100644
--- a/arch/arm/mach-clps711x/devices.c
+++ b/arch/arm/mach-clps711x/devices.c
@@ -121,3 +121,19 @@ static __init int clps711x_gpio_init(void)
return 0;
 }
 coredevice_initcall(clps711x_gpio_init);
+
+static __init int clps711x_syscon_init(void)
+{
+   /* SYSCON1, SYSFLG1 */
+   add_generic_device("clps711x-syscon", 1, NULL, SYSCON1, SZ_128,
+  IORESOURCE_MEM, NULL);
+   /* SYSCON2, SYSFLG2 */
+   add_generic_device("clps711x-syscon", 2, NULL, SYSCON2, SZ_128,
+  IORESOURCE_MEM, NULL);
+   /* SYSCON3 */
+   add_generic_device("clps711x-syscon", 3, NULL, SYSCON3, SZ_64,
+  IORESOURCE_MEM, NULL);
+
+   return 0;
+}
+postcore_initcall(clps711x_syscon_init);
diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index 87d2f7c..b628ab7 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -72,6 +72,9 @@ static int syscon_probe(struct device_d *dev)
 
 static struct platform_device_id syscon_ids[] = {
{ "syscon", },
+#ifdef CONFIG_ARCH_CLPS711X
+   { "clps711x-syscon", },
+#endif
{ }
 };
 
-- 
1.7.3.4


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[PATCH 09/13] ARM: clps711x: Migrate to using DEFINE_RES_MEM macro

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/mach-clps711x/devices.c |  108 ++---
 1 files changed, 18 insertions(+), 90 deletions(-)

diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c
index f94b584..fba0159 100644
--- a/arch/arm/mach-clps711x/devices.c
+++ b/arch/arm/mach-clps711x/devices.c
@@ -51,49 +51,17 @@ void clps711x_setup_memcfg(int bank, u32 val)
 }
 
 static struct resource uart0_resources[] = {
-   {
-   .start  = UBRLCR1,
-   .end= UBRLCR1,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = SYSCON1,
-   .end= SYSCON1,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = SYSFLG1,
-   .end= SYSFLG1,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = UARTDR1,
-   .end= UARTDR1,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(UBRLCR1, SZ_4),
+   DEFINE_RES_MEM(SYSCON1, SZ_4),
+   DEFINE_RES_MEM(SYSFLG1, SZ_4),
+   DEFINE_RES_MEM(UARTDR1, SZ_4),
 };
 
 static struct resource uart1_resources[] = {
-   {
-   .start  = UBRLCR2,
-   .end= UBRLCR2,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = SYSCON2,
-   .end= SYSCON2,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = SYSFLG2,
-   .end= SYSFLG2,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = UARTDR2,
-   .end= UARTDR2,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(UBRLCR2, SZ_4),
+   DEFINE_RES_MEM(SYSCON2, SZ_4),
+   DEFINE_RES_MEM(SYSFLG2, SZ_4),
+   DEFINE_RES_MEM(UARTDR2, SZ_4),
 };
 
 void clps711x_add_uart(unsigned int id)
@@ -113,68 +81,28 @@ void clps711x_add_uart(unsigned int id)
 }
 
 static struct resource gpio0_resources[] = {
-   {
-   .start  = PADR,
-   .end= PADR,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = PADDR,
-   .end= PADDR,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(PADR, SZ_1),
+   DEFINE_RES_MEM(PADDR, SZ_1),
 };
 
 static struct resource gpio1_resources[] = {
-   {
-   .start  = PBDR,
-   .end= PBDR,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = PBDDR,
-   .end= PBDDR,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(PBDR, SZ_1),
+   DEFINE_RES_MEM(PBDDR, SZ_1),
 };
 
 static struct resource gpio2_resources[] = {
-   {
-   .start  = PCDR,
-   .end= PCDR,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = PCDDR,
-   .end= PCDDR,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(PCDR, SZ_1),
+   DEFINE_RES_MEM(PCDDR, SZ_1),
 };
 
 static struct resource gpio3_resources[] = {
-   {
-   .start  = PDDR,
-   .end= PDDR,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = PDDDR,
-   .end= PDDDR,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(PDDR, SZ_1),
+   DEFINE_RES_MEM(PDDDR, SZ_1),
 };
 
 static struct resource gpio4_resources[] = {
-   {
-   .start  = PEDR,
-   .end= PEDR,
-   .flags  = IORESOURCE_MEM,
-   },
-   {
-   .start  = PEDDR,
-   .end= PEDDR,
-   .flags  = IORESOURCE_MEM,
-   },
+   DEFINE_RES_MEM(PEDR, SZ_1),
+   DEFINE_RES_MEM(PEDDR, SZ_1),
 };
 
 static __init int clps711x_gpio_init(void)
-- 
1.7.3.4


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[PATCH 11/13] Add system controller register driver (SYSCON)

[Alexander Shiyan]

This patch adds support for system controller register driver (SYSCON).
Code taken from Linux Kernel and adapted for using in barebox.

Signed-off-by: Alexander Shiyan 
---
 drivers/mfd/Kconfig  |5 +++
 drivers/mfd/Makefile |1 +
 drivers/mfd/syscon.c |   92 ++
 include/mfd/syscon.h |   26 ++
 4 files changed, 124 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mfd/syscon.c
 create mode 100644 include/mfd/syscon.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index c506d67..afb87db 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -24,6 +24,11 @@ config MFD_STMPE
depends on I2C
bool "STMPE-i2c driver"
 
+config MFD_SYSCON
+   bool "System Controller Register"
+   help
+ Select this option to enable accessing system control registers
+
 config MFD_TWLCORE
bool
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 542fb0f..1afd52b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_MFD_MC34704)   += mc34704.o
 obj-$(CONFIG_MFD_MC34708)  += mc34708.o
 obj-$(CONFIG_MFD_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_MFD_STMPE)+= stmpe-i2c.o
+obj-$(CONFIG_MFD_SYSCON)   += syscon.o
 obj-$(CONFIG_MFD_TWLCORE)  += twl-core.o
 obj-$(CONFIG_MFD_TWL4030)  += twl4030.o
 obj-$(CONFIG_MFD_TWL6030)  += twl6030.o
diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
new file mode 100644
index 000..87d2f7c
--- /dev/null
+++ b/drivers/mfd/syscon.c
@@ -0,0 +1,92 @@
+/* System Control Driver
+ *
+ * Based on linux driver by:
+ *  Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *  Copyright (C) 2012 Linaro Ltd.
+ *  Author: Dong Aisheng 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+
+struct syscon {
+   void __iomem *base;
+};
+
+void __iomem *syscon_base_lookup_by_pdevname(const char *s)
+{
+   struct syscon *syscon;
+   struct device_d *dev;
+
+   for_each_device(dev) {
+   if (!strcmp(dev_name(dev), s)) {
+   syscon = dev->priv;
+   return syscon->base;
+   }
+   }
+
+   return ERR_PTR(-ENODEV);
+}
+
+static int syscon_probe(struct device_d *dev)
+{
+   struct syscon *syscon;
+   struct resource *res;
+
+   syscon = xzalloc(sizeof(struct syscon));
+   if (!syscon)
+   return -ENOMEM;
+
+   res = dev_get_resource(dev, 0);
+   if (!res) {
+   free(syscon);
+   return -ENOENT;
+   }
+
+   res = request_iomem_region(dev_name(dev), res->start, res->end);
+   if (!res) {
+   free(syscon);
+   return -EBUSY;
+   }
+
+   syscon->base = (void __iomem *)res->start;
+   dev->priv = syscon;
+
+   dev_info(dev, "map 0x%x-0x%x registered\n", res->start, res->end);
+
+   return 0;
+}
+
+static struct platform_device_id syscon_ids[] = {
+   { "syscon", },
+   { }
+};
+
+static struct driver_d syscon_driver = {
+   .name   = "syscon",
+   .probe  = syscon_probe,
+   .id_table   = syscon_ids,
+};
+
+static int __init syscon_init(void)
+{
+   return platform_driver_register(&syscon_driver);
+}
+core_initcall(syscon_init);
+
+MODULE_AUTHOR("Dong Aisheng ");
+MODULE_DESCRIPTION("System Control driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/mfd/syscon.h b/include/mfd/syscon.h
new file mode 100644
index 000..68432b7
--- /dev/null
+++ b/include/mfd/syscon.h
@@ -0,0 +1,26 @@
+/* System Control Driver
+ *
+ * Based on linux driver by:
+ *  Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *  Copyright (C) 2012 Linaro Ltd.
+ *  Author: Dong Aisheng 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __MFD_SYSCON_H__
+#define __MFD_SYSCON_H__
+
+#ifdef CONFIG_MFD_SYSCON
+void __iomem *syscon_base_lookup_by_pdevname(const char *);
+#else
+static inline void __iomem *syscon_base_lookup_by_pdevname(const char *)
+{
+   return NULL;
+}
+#endif
+
+#endif
-- 
1.7.3.4


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[PATCH 10/13] ARM: clps711x: Limit chipselect setup up to CS5

[Alexander Shiyan]

CS6 and CS7 is a internal CPU resources and these chipselects are
already pre configured, so avoid to rewrite this settings.

Signed-off-by: Alexander Shiyan 
---
 arch/arm/mach-clps711x/devices.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c
index fba0159..4cc53fa 100644
--- a/arch/arm/mach-clps711x/devices.c
+++ b/arch/arm/mach-clps711x/devices.c
@@ -44,7 +44,7 @@ void clps711x_setup_memcfg(int bank, u32 val)
case 0 ... 3:
_clps711x_setup_memcfg(bank, MEMCFG1, val);
break;
-   case 4 ... 7:
+   case 4 ... 5:
_clps711x_setup_memcfg(bank - 4, MEMCFG2, val);
break;
}
-- 
1.7.3.4


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[PATCH 08/13] Add helpers to define resources

[Alexander Shiyan]

This patch adds helpers to define resources, such as
DEFINE_RES_NAMED, DEFINE_RES_MEM and DEFINE_RES_MEM_NAMED.

Signed-off-by: Alexander Shiyan 
---
 include/linux/ioport.h |   15 +++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 6d6cd68..ff0cba0 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -111,10 +111,25 @@ struct resource {
 /* PCI control bits.  Shares IORESOURCE_BITS with above PCI ROM.  */
 #define IORESOURCE_PCI_FIXED   (1<<4)  /* Do not move resource */
 
+/* Helpers to define resources */
+#define DEFINE_RES_NAMED(_start, _size, _name, _flags) \
+   {   \
+   .start  = (_start), \
+   .end= (_start) + (_size) - 1,   \
+   .name   = (_name),  \
+   .flags  = (_flags), \
+   }
+
+#define DEFINE_RES_MEM_NAMED(_start, _size, _name) \
+   DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_MEM)
+#define DEFINE_RES_MEM(_start, _size)  \
+   DEFINE_RES_MEM_NAMED((_start), (_size), NULL)
+
 static inline resource_size_t resource_size(const struct resource *res)
 {
return res->end - res->start + 1;
 }
+
 static inline unsigned long resource_type(const struct resource *res)
 {
return res->flags & IORESOURCE_TYPE_BITS;
-- 
1.7.3.4


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[PATCH 07/13] ARM: clps711x: Add GPIO driver

[Alexander Shiyan]

This patch adds support for CLPS711X GPIOs. Driver based on
generic GPIO driver.

Signed-off-by: Alexander Shiyan 
---
 arch/arm/Kconfig   |1 +
 arch/arm/mach-clps711x/devices.c   |   82 
 arch/arm/mach-clps711x/include/mach/gpio.h |3 +
 drivers/gpio/Kconfig   |7 +++
 drivers/gpio/Makefile  |1 +
 drivers/gpio/gpio-clps711x.c   |   70 
 6 files changed, 164 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-clps711x/include/mach/gpio.h
 create mode 100644 drivers/gpio/gpio-clps711x.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6463746..ed0b453 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -42,6 +42,7 @@ config ARCH_CLPS711X
select CLOCKSOURCE_CLPS711X
select COMMON_CLK
select CPU_32v4T
+   select GPIOLIB
 
 config ARCH_EP93XX
bool "Cirrus Logic EP93xx"
diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c
index 6221da3..f94b584 100644
--- a/arch/arm/mach-clps711x/devices.c
+++ b/arch/arm/mach-clps711x/devices.c
@@ -111,3 +111,85 @@ void clps711x_add_uart(unsigned int id)
break;
}
 }
+
+static struct resource gpio0_resources[] = {
+   {
+   .start  = PADR,
+   .end= PADR,
+   .flags  = IORESOURCE_MEM,
+   },
+   {
+   .start  = PADDR,
+   .end= PADDR,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct resource gpio1_resources[] = {
+   {
+   .start  = PBDR,
+   .end= PBDR,
+   .flags  = IORESOURCE_MEM,
+   },
+   {
+   .start  = PBDDR,
+   .end= PBDDR,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct resource gpio2_resources[] = {
+   {
+   .start  = PCDR,
+   .end= PCDR,
+   .flags  = IORESOURCE_MEM,
+   },
+   {
+   .start  = PCDDR,
+   .end= PCDDR,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct resource gpio3_resources[] = {
+   {
+   .start  = PDDR,
+   .end= PDDR,
+   .flags  = IORESOURCE_MEM,
+   },
+   {
+   .start  = PDDDR,
+   .end= PDDDR,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static struct resource gpio4_resources[] = {
+   {
+   .start  = PEDR,
+   .end= PEDR,
+   .flags  = IORESOURCE_MEM,
+   },
+   {
+   .start  = PEDDR,
+   .end= PEDDR,
+   .flags  = IORESOURCE_MEM,
+   },
+};
+
+static __init int clps711x_gpio_init(void)
+{
+   add_generic_device_res("clps711x-gpio", 0, gpio0_resources,
+  ARRAY_SIZE(gpio0_resources), NULL);
+   add_generic_device_res("clps711x-gpio", 1, gpio1_resources,
+  ARRAY_SIZE(gpio1_resources), NULL);
+   add_generic_device_res("clps711x-gpio", 2, gpio2_resources,
+  ARRAY_SIZE(gpio2_resources), NULL);
+   add_generic_device_res("clps711x-gpio", 3, gpio3_resources,
+  ARRAY_SIZE(gpio3_resources), NULL);
+   add_generic_device_res("clps711x-gpio", 4, gpio4_resources,
+  ARRAY_SIZE(gpio4_resources), NULL);
+
+   return 0;
+}
+coredevice_initcall(clps711x_gpio_init);
diff --git a/arch/arm/mach-clps711x/include/mach/gpio.h 
b/arch/arm/mach-clps711x/include/mach/gpio.h
new file mode 100644
index 000..3428fe5
--- /dev/null
+++ b/arch/arm/mach-clps711x/include/mach/gpio.h
@@ -0,0 +1,3 @@
+#include 
+
+#define CLPS711X_GPIO(prt,bit) ((prt) * 8 + (bit))
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 895eb68..ea07028 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -13,6 +13,13 @@ config GPIO_BCM2835
bool "GPIO support for BCM2835"
depends on ARCH_BCM2835
 
+config GPIO_CLPS711X
+   bool "GPIO support for CLPS711X"
+   depends on ARCH_CLPS711X
+   select GPIO_GENERIC
+   help
+ Say yes here to enable the GPIO driver for the CLPS711X CPUs
+
 config GPIO_GENERIC_PLATFORM
bool "Generic memory-mapped GPIO controller support"
select GPIO_GENERIC
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1ef345c..00acb68 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_GPIOLIB)  += gpio.o
 obj-$(CONFIG_GPIO_BCM2835) += gpio-bcm2835.o
+obj-$(CONFIG_GPIO_CLPS711X)+= gpio-clps711x.o
 obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
 obj-$(CONFIG_GPIO_PL061)   += gpio-pl061.o
 obj-$(CONFIG_GPIO_STMPE)   += gpio-stmpe.o
diff --git a/drivers/gpio/gpio-clps711x.c b/drivers/gpio/gpio-clps711x.c
new

[PATCH 06/13] Add Generic GPIO driver

[Alexander Shiyan]

This patch adds generic memory-mapped GPIO controller support.
Code taken from Linux Kernel and adopted for barebox.

Signed-off-by: Alexander Shiyan 
---
 drivers/gpio/Kconfig|   10 +
 drivers/gpio/Makefile   |5 +-
 drivers/gpio/gpio-generic.c |  428 +++
 drivers/gpio/gpio.c |5 +
 include/gpio.h  |1 +
 include/linux/basic_mmio_gpio.h |   69 +++
 6 files changed, 516 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpio/gpio-generic.c
 create mode 100644 include/linux/basic_mmio_gpio.h

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5500ad1..895eb68 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -6,10 +6,20 @@ if GPIOLIB
 
 menu "GPIO"
 
+config GPIO_GENERIC
+   bool
+
 config GPIO_BCM2835
bool "GPIO support for BCM2835"
depends on ARCH_BCM2835
 
+config GPIO_GENERIC_PLATFORM
+   bool "Generic memory-mapped GPIO controller support"
+   select GPIO_GENERIC
+   help
+ Say yes here to support basic platform memory-mapped
+ GPIO controllers
+
 config GPIO_PL061
bool "PrimeCell PL061 GPIO support"
depends on ARM_AMBA
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 993ab89..1ef345c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -1,4 +1,5 @@
-obj-$(CONFIG_GPIOLIB) += gpio.o
+obj-$(CONFIG_GPIOLIB)  += gpio.o
 obj-$(CONFIG_GPIO_BCM2835) += gpio-bcm2835.o
+obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
 obj-$(CONFIG_GPIO_PL061)   += gpio-pl061.o
-obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o
+obj-$(CONFIG_GPIO_STMPE)   += gpio-stmpe.o
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c
new file mode 100644
index 000..a2fc400
--- /dev/null
+++ b/drivers/gpio/gpio-generic.c
@@ -0,0 +1,428 @@
+/*
+ * Generic driver for memory-mapped GPIO controllers.
+ *
+ * Based on linux driver by:
+ *  Copyright 2008 MontaVista Software, Inc.
+ *  Copyright 2008,2010 Anton Vorontsov 
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static void bgpio_write8(void __iomem *reg, unsigned int data)
+{
+   writeb(data, reg);
+}
+
+static unsigned int bgpio_read8(void __iomem *reg)
+{
+   return readb(reg);
+}
+
+static void bgpio_write16(void __iomem *reg, unsigned int data)
+{
+   writew(data, reg);
+}
+
+static unsigned int bgpio_read16(void __iomem *reg)
+{
+   return readw(reg);
+}
+
+static void bgpio_write32(void __iomem *reg, unsigned int data)
+{
+   writel(data, reg);
+}
+
+static unsigned int bgpio_read32(void __iomem *reg)
+{
+   return readl(reg);
+}
+
+static unsigned int bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
+{
+   return 1 << pin;
+}
+
+static unsigned int bgpio_pin2mask_be(struct bgpio_chip *bgc, unsigned int pin)
+{
+   return 1 << (bgc->bits - 1 - pin);
+}
+
+static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+   struct bgpio_chip *bgc = to_bgpio_chip(gc);
+
+   return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio);
+}
+
+static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+   struct bgpio_chip *bgc = to_bgpio_chip(gc);
+   unsigned int mask = bgc->pin2mask(bgc, gpio);
+
+   if (val)
+   bgc->data |= mask;
+   else
+   bgc->data &= ~mask;
+
+   bgc->write_reg(bgc->reg_dat, bgc->data);
+}
+
+static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
+int val)
+{
+   struct bgpio_chip *bgc = to_bgpio_chip(gc);
+   unsigned int mask = bgc->pin2mask(bgc, gpio);
+
+   if (val)
+   bgc->write_reg(bgc->reg_set, mask);
+   else
+   bgc->write_reg(bgc->reg_clr, mask);
+}
+
+static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+   struct bgpio_chip *bgc = to_bgpio_chip(gc);
+   unsigned int mask = bgc->pin2mask(bgc, gpio);
+
+   if (val)
+   bgc->data |= mask;
+   else
+   bgc->data &= ~mask;
+
+   bgc->write_reg(bgc->reg_set, bgc->data);
+}
+
+static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+   return 0;
+}
+
+static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
+   int val)
+{
+   gc->ops->set(gc, gpio, val);
+
+   return 0;
+}
+
+static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+   struct bgpio_chip *bgc = to_bgpio_chip(gc);
+
+   bgc->dir &= ~bgc->pin2mask(bgc, gpio);
+   bgc->write_reg(bgc->reg_dir, bgc->dir);
+
+   return 0;
+}
+
+static int bgpio_dir_out(stru

[PATCH 05/13] ARM: clps711x: Using COMMON_CLK

[Alexander Shiyan]

This patch adds support for COMMON_CLK API for CLPS711X targets.

Signed-off-by: Alexander Shiyan 
---
 arch/arm/Kconfig |1 +
 arch/arm/mach-clps711x/clock.c   |  109 ++
 arch/arm/mach-clps711x/devices.c |4 ++
 3 files changed, 68 insertions(+), 46 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c608454..6463746 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -40,6 +40,7 @@ config ARCH_CLPS711X
bool "Cirrus Logic EP711x/EP721x/EP731x"
select CLKDEV_LOOKUP
select CLOCKSOURCE_CLPS711X
+   select COMMON_CLK
select CPU_32v4T
 
 config ARCH_EP93XX
diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
index e957662..7658c9a 100644
--- a/arch/arm/mach-clps711x/clock.c
+++ b/arch/arm/mach-clps711x/clock.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -18,32 +19,37 @@
 #define CLPS711X_OSC_FREQ  3686400
 #define CLPS711X_EXT_FREQ  1300
 
-static struct clk {
-   unsigned long   rate;
-} uart_clk, bus_clk, timer_clk;
+enum clps711x_clks {
+   dummy, cpu, bus, uart, timer_hf, timer_lf, tc1, tc2, clk_max
+};
 
-unsigned long clk_get_rate(struct clk *clk)
-{
-   return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
+static struct {
+   const char  *name;
+   struct clk  *clk;
+} clks[clk_max] = {
+   { "dummy", },
+   { "cpu", },
+   { "bus", },
+   { "uart", },
+   { "timer_hf", },
+   { "timer_lf", },
+   { "tc1", },
+   { "tc2", },
+};
 
-int clk_enable(struct clk *clk)
-{
-   /* Do nothing */
-   return 0;
-}
-EXPORT_SYMBOL(clk_enable);
+static const char *tc_sel_clks[] = {
+   "timer_lf",
+   "timer_hf",
+};
 
-void clk_disable(struct clk *clk)
+static __init void clps711x_clk_register(enum clps711x_clks id)
 {
-   /* Do nothing */
+   clk_register_clkdev(clks[id].clk, clks[id].name, NULL);
 }
-EXPORT_SYMBOL(clk_disable);
 
-static int clocks_init(void)
+static __init int clps711x_clk_init(void)
 {
-   int pll, cpu;
+   unsigned int f_cpu, f_bus, f_uart, f_timer_hf, f_timer_lf, pll;
u32 tmp;
 
tmp = readl(PLLR) >> 24;
@@ -54,57 +60,68 @@ static int clocks_init(void)
 
tmp = readl(SYSFLG2);
if (tmp & SYSFLG2_CKMODE) {
-   cpu = CLPS711X_EXT_FREQ;
-   bus_clk.rate = CLPS711X_EXT_FREQ;
+   f_cpu = CLPS711X_EXT_FREQ;
+   f_bus = CLPS711X_EXT_FREQ;
} else {
-   cpu = pll;
-   if (cpu >= 36864000)
-   bus_clk.rate = cpu / 2;
+   f_cpu = pll;
+   if (f_cpu >= 36864000)
+   f_bus = f_cpu / 2;
else
-   bus_clk.rate = 36864000 / 2;
+   f_bus = 36864000 / 2;
}
 
-   uart_clk.rate = DIV_ROUND_CLOSEST(bus_clk.rate, 10);
+   f_uart = f_bus / 10;
 
if (tmp & SYSFLG2_CKMODE) {
tmp = readw(SYSCON2);
if (tmp & SYSCON2_OSTB)
-   timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
26);
+   f_timer_hf = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 26);
else
-   timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
24);
+   f_timer_hf = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 24);
} else
-   timer_clk.rate = DIV_ROUND_CLOSEST(cpu, 144);
+   f_timer_hf = DIV_ROUND_CLOSEST(f_cpu, 144);
 
+   f_timer_lf = DIV_ROUND_CLOSEST(f_timer_hf, 256);
+
+   /* Turn timers in free running mode */
tmp = readl(SYSCON1);
-   tmp &= ~SYSCON1_TC2M;   /* Free running mode */
-   tmp |= SYSCON1_TC2S;/* High frequency source */
+   tmp &= ~(SYSCON1_TC1M | SYSCON1_TC2M);
writel(tmp, SYSCON1);
 
-   return 0;
-}
-core_initcall(clocks_init);
-
-static struct clk_lookup clocks_lookups[] = {
-   CLKDEV_CON_ID("bus", &bus_clk),
-   CLKDEV_DEV_ID("clps711x_serial0", &uart_clk),
-   CLKDEV_DEV_ID("clps711x_serial1", &uart_clk),
-   CLKDEV_DEV_ID("clps711x-cs", &timer_clk),
-};
-
-static int clkdev_init(void)
-{
-   clkdev_add_table(clocks_lookups, ARRAY_SIZE(clocks_lookups));
+   clks[dummy].clk = clk_fixed(clks[dummy].name, 0);
+   clks[cpu].clk = clk_fixed(clks[cpu].name, f_cpu);
+   clks[bus].clk = clk_fixed(clks[bus].name, f_bus);
+   clks[uart].clk = clk_fixed(clks[uart].name, f_uart);
+   clks[timer_hf].clk = clk_fixed(clks[timer_hf].name, f_timer_hf);
+   clks[timer_lf].clk = clk_fixed(clks[timer_lf].name, f_timer_lf);
+   clks[tc1].clk = clk_mux(clks[tc1].name, IOMEM(SYSCON1), 5, 1,
+   tc_sel_clks, ARRAY_SIZE(tc_sel_clks));
+   clks[tc2].clk = clk_mux(clks[tc2].name, IOMEM(SYSCON1), 7, 1,
+   tc_sel_clks, ARRAY_SIZE(tc_s

[PATCH 04/13] ARM: clps711x: Add clocksource driver

[Alexander Shiyan]

This patch adds clocksource driver for CLPS711X targets and adds
support to platform to use this new driver.

Signed-off-by: Alexander Shiyan 
---
 arch/arm/Kconfig   |1 +
 arch/arm/mach-clps711x/clock.c |   51 -
 drivers/clocksource/Kconfig|4 ++
 drivers/clocksource/Makefile   |1 +
 drivers/clocksource/clps711x.c |   61 
 5 files changed, 92 insertions(+), 26 deletions(-)
 create mode 100644 drivers/clocksource/clps711x.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7ac134e..c608454 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -39,6 +39,7 @@ config ARCH_BCM2835
 config ARCH_CLPS711X
bool "Cirrus Logic EP711x/EP721x/EP731x"
select CLKDEV_LOOKUP
+   select CLOCKSOURCE_CLPS711X
select CPU_32v4T
 
 config ARCH_EP93XX
diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c
index 09cbaf9..e957662 100644
--- a/arch/arm/mach-clps711x/clock.c
+++ b/arch/arm/mach-clps711x/clock.c
@@ -9,25 +9,18 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
 #include 
 
+#define CLPS711X_OSC_FREQ  3686400
+#define CLPS711X_EXT_FREQ  1300
+
 static struct clk {
unsigned long   rate;
-} uart_clk, bus_clk;
-
-static uint64_t clocksource_read(void)
-{
-   return ~readw(TC2D);
-}
-
-static struct clocksource cs = {
-   .read   = clocksource_read,
-   .mask   = CLOCKSOURCE_MASK(16),
-};
+} uart_clk, bus_clk, timer_clk;
 
 unsigned long clk_get_rate(struct clk *clk)
 {
@@ -50,22 +43,19 @@ EXPORT_SYMBOL(clk_disable);
 
 static int clocks_init(void)
 {
-   int osc, ext, pll, cpu, timer;
+   int pll, cpu;
u32 tmp;
 
-   osc = 3686400;
-   ext = 1300;
-
tmp = readl(PLLR) >> 24;
if (tmp)
-   pll = (osc * tmp) / 2;
+   pll = (CLPS711X_OSC_FREQ * tmp) / 2;
else
pll = 73728000; /* Default value for old CPUs */
 
tmp = readl(SYSFLG2);
if (tmp & SYSFLG2_CKMODE) {
-   cpu = ext;
-   bus_clk.rate = cpu;
+   cpu = CLPS711X_EXT_FREQ;
+   bus_clk.rate = CLPS711X_EXT_FREQ;
} else {
cpu = pll;
if (cpu >= 36864000)
@@ -74,25 +64,23 @@ static int clocks_init(void)
bus_clk.rate = 36864000 / 2;
}
 
-   uart_clk.rate = bus_clk.rate / 10;
+   uart_clk.rate = DIV_ROUND_CLOSEST(bus_clk.rate, 10);
 
if (tmp & SYSFLG2_CKMODE) {
tmp = readw(SYSCON2);
if (tmp & SYSCON2_OSTB)
-   timer = ext / 26;
+   timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
26);
else
-   timer = 541440;
+   timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 
24);
} else
-   timer = cpu / 144;
+   timer_clk.rate = DIV_ROUND_CLOSEST(cpu, 144);
 
tmp = readl(SYSCON1);
tmp &= ~SYSCON1_TC2M;   /* Free running mode */
tmp |= SYSCON1_TC2S;/* High frequency source */
writel(tmp, SYSCON1);
 
-   clocks_calc_mult_shift(&cs.mult, &cs.shift, timer, NSEC_PER_SEC, 10);
-
-   return init_clock(&cs);
+   return 0;
 }
 core_initcall(clocks_init);
 
@@ -100,6 +88,7 @@ static struct clk_lookup clocks_lookups[] = {
CLKDEV_CON_ID("bus", &bus_clk),
CLKDEV_DEV_ID("clps711x_serial0", &uart_clk),
CLKDEV_DEV_ID("clps711x_serial1", &uart_clk),
+   CLKDEV_DEV_ID("clps711x-cs", &timer_clk),
 };
 
 static int clkdev_init(void)
@@ -109,3 +98,13 @@ static int clkdev_init(void)
return 0;
 }
 postcore_initcall(clkdev_init);
+
+static const char *clps711x_clocksrc_name = "clps711x-cs";
+
+static __init int clps711x_core_init(void)
+{
+   add_generic_device(clps711x_clocksrc_name, DEVICE_ID_SINGLE, NULL,
+  TC2D, SZ_2, IORESOURCE_MEM, NULL);
+   return 0;
+}
+coredevice_initcall(clps711x_core_init);
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 3f27cf2..9f3558b 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -10,6 +10,10 @@ config CLOCKSOURCE_BCM2835
bool
depends on ARCH_BCM2835
 
+config CLOCKSOURCE_CLPS711X
+   bool
+   depends on ARCH_CLPS711X
+
 config CLOCKSOURCE_NOMADIK
bool
depends on ARM
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index b0bc8bd..d919881 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_AMBA_SP804) += amba-sp804.o
 obj-$(CONFIG_ARM_SMP_TWD) += arm_smp_twd.o
 obj-$(CONFIG_CLOCKSOURCE_BCM2835) += bcm2835.o
+obj-$(CONFIG_CLOCKSOURCE_CLPS711X) += clps711x.o
 obj-$(CONFIG_CLOCKSOURCE_NOMADIK) += nomadik.o
diff --git a/drivers/clocksource/clps711x.c b/drivers/clocksource/clps711x.c
n

[PATCH 03/13] ARM: clps711x: Replace numeric PLL option with boolean for raise CPU frequency

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/boards/clep7212/lowlevel.c |8 +---
 arch/arm/mach-clps711x/Kconfig  |   13 ++---
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boards/clep7212/lowlevel.c 
b/arch/arm/boards/clep7212/lowlevel.c
index fcf8285..92fbb9b 100644
--- a/arch/arm/boards/clep7212/lowlevel.c
+++ b/arch/arm/boards/clep7212/lowlevel.c
@@ -14,13 +14,15 @@
 
 #include 
 
-#if (CONFIG_CLPS711X_CPU_PLL_MULT < 20) || (CONFIG_CLPS711X_CPU_PLL_MULT > 50)
-# error "CPU PLL multiplier out of range"
+#ifdef CONFIG_CLPS711X_RAISE_CPUFREQ
+# define CLPS711X_CPU_PLL_MULT 50
+#else
+# define CLPS711X_CPU_PLL_MULT 40
 #endif
 
 void __naked __bare_init barebox_arm_reset_vector(void)
 {
arm_cpu_lowlevel_init();
 
-   clps711x_barebox_entry(CONFIG_CLPS711X_CPU_PLL_MULT);
+   clps711x_barebox_entry(CLPS711X_CPU_PLL_MULT);
 }
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index d2873b4..b774c54 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -12,14 +12,13 @@ endchoice
 
 menu "CLPS711X specific settings"
 
-config CLPS711X_CPU_PLL_MULT
-   int "CPU PLL multiplier (20-50)"
-   range 20 50
-   default "40"
+config CLPS711X_RAISE_CPUFREQ
+   bool "Raise CPU frequency to 90 MHz"
+   depends on MACH_CLEP7212
help
- Define CPU PLL multiplier. PLL is calculated by formula:
-   PLL Frequency = (PLL Multiplier / 2) * 3686400 Hz
- Default value is 40, for achieve 73 MHz.
+ Raise CPU frequency to 90 MHz. This operation can be performed
+ only for devices which allow to operate at 90 MHz.
+ If option is not selected, CPU frequency will set to default 73 MHz.
 
 endmenu
 
-- 
1.7.3.4


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[PATCH 01/13] ARM: clep7212: Migrate to config-board

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/boards/clep7212/env/config   |   20 
 arch/arm/boards/clep7212/env/config-board |   14 ++
 2 files changed, 14 insertions(+), 20 deletions(-)
 delete mode 100644 arch/arm/boards/clep7212/env/config
 create mode 100644 arch/arm/boards/clep7212/env/config-board

diff --git a/arch/arm/boards/clep7212/env/config 
b/arch/arm/boards/clep7212/env/config
deleted file mode 100644
index e8f2c3a..000
--- a/arch/arm/boards/clep7212/env/config
+++ /dev/null
@@ -1,20 +0,0 @@
-#!/bin/sh
-
-global.hostname=clps711x
-
-# set to false if you do not want to have colors
-global.allow_color=true
-
-# user (used for network filenames)
-global.user=anonymous
-
-# timeout in seconds before the default boot entry is started
-global.autoboot_timeout=2
-
-# default boot entry (one of /env/boot/*)
-if [ -e /dev/nor0 ]; then
-   global.boot.default=nor
-fi
-
-# default bootargs
-global.linux.bootargs.base="earlyprintk console=ttyCL0,57600n8"
diff --git a/arch/arm/boards/clep7212/env/config-board 
b/arch/arm/boards/clep7212/env/config-board
new file mode 100644
index 000..3cf699a
--- /dev/null
+++ b/arch/arm/boards/clep7212/env/config-board
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+global.hostname=clps711x
+
+# Timeout in seconds before the default boot entry is started
+global.autoboot_timeout=2
+
+# Default boot entry (one of /env/boot/*)
+if [ -e /dev/nor0 ]; then
+   global.boot.default=nor
+fi
+
+# Board bootargs
+global.linux.bootargs.base="earlyprintk console=ttyCL0,57600n8"
-- 
1.7.3.4


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[PATCH 02/13] ARM: clps711x: Fix setup bus wait state scaling factor for 13Mhz mode

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan 
---
 arch/arm/mach-clps711x/lowlevel.c |   16 ++--
 1 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-clps711x/lowlevel.c 
b/arch/arm/mach-clps711x/lowlevel.c
index 193f61a..58306f2 100644
--- a/arch/arm/mach-clps711x/lowlevel.c
+++ b/arch/arm/mach-clps711x/lowlevel.c
@@ -21,12 +21,12 @@ void __naked __bare_init clps711x_barebox_entry(u32 pllmult)
 {
u32 cpu, bus;
 
-   /* Setup base clocking, Enable SDQM pins  */
-   writel(SYSCON3_CLKCTL0 | SYSCON3_CLKCTL1, SYSCON3);
-   asm("nop");
-
/* Check if we running from external 13 MHz clock */
if (!(readl(SYSFLG2) & SYSFLG2_CKMODE)) {
+   /* Setup bus wait state scaling factor to 2  */
+   writel(SYSCON3_CLKCTL0 | SYSCON3_CLKCTL1, SYSCON3);
+   asm("nop");
+
/* Check valid multiplier, default to 74 MHz */
if ((pllmult < 20) || (pllmult > 50))
pllmult = 40;
@@ -42,11 +42,15 @@ void __naked __bare_init clps711x_barebox_entry(u32 pllmult)
cpu = pllmult * 3686400;
 
if (cpu >= 36864000)
-   bus = cpu /2;
+   bus = cpu / 2;
else
bus = 36864000 / 2;
-   } else
+   } else {
bus = 1300;
+   /* Setup bus wait state scaling factor to 1  */
+   writel(0, SYSCON3);
+   asm("nop");
+   }
 
/* CLKEN select, SDRAM width=32 */
writel(SYSCON2_CLKENSL, SYSCON2);
-- 
1.7.3.4


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[PATCH 4/9] ARM: zynq: Add support for the Avnet Zedboard

[Steffen Trumtrar]

The Avnet ZedBoard is an evalboard with a Zynq-7020 based MPSoC.
There is also a Digilent ZedBoard, that is the same but only for
academic customers.

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/boards/avnet-zedboard/Makefile|   1 +
 arch/arm/boards/avnet-zedboard/board.c |  38 +++
 arch/arm/boards/avnet-zedboard/config.h|   4 +
 .../boards/avnet-zedboard/env/init/config-board|   7 +
 arch/arm/boards/avnet-zedboard/flash_header.c  |  56 
 arch/arm/boards/avnet-zedboard/lowlevel.c  | 249 ++
 arch/arm/configs/zedboard_defconfig| 356 +
 arch/arm/mach-zynq/Kconfig |   1 +
 arch/arm/mach-zynq/include/mach/zynq7000-regs.h|   2 +-
 arch/arm/mach-zynq/zynq.c  |   5 -
 10 files changed, 713 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boards/avnet-zedboard/Makefile
 create mode 100644 arch/arm/boards/avnet-zedboard/board.c
 create mode 100644 arch/arm/boards/avnet-zedboard/config.h
 create mode 100644 arch/arm/boards/avnet-zedboard/env/init/config-board
 create mode 100644 arch/arm/boards/avnet-zedboard/flash_header.c
 create mode 100644 arch/arm/boards/avnet-zedboard/lowlevel.c
 create mode 100644 arch/arm/configs/zedboard_defconfig

diff --git a/arch/arm/boards/avnet-zedboard/Makefile 
b/arch/arm/boards/avnet-zedboard/Makefile
new file mode 100644
index 000..5c05544
--- /dev/null
+++ b/arch/arm/boards/avnet-zedboard/Makefile
@@ -0,0 +1 @@
+obj-y += board.o lowlevel.o flash_header.o
diff --git a/arch/arm/boards/avnet-zedboard/board.c 
b/arch/arm/boards/avnet-zedboard/board.c
new file mode 100644
index 000..88e2484
--- /dev/null
+++ b/arch/arm/boards/avnet-zedboard/board.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2013 Steffen Trumtrar 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int zedboard_mem_init(void)
+{
+   arm_add_mem_device("ram0", SZ_1M, SZ_512M);
+
+   return 0;
+}
+mem_initcall(zedboard_mem_init);
+
+static int zedboard_console_init(void)
+{
+   zynq_add_uart1();
+
+   return 0;
+}
+console_initcall(zedboard_console_init);
diff --git a/arch/arm/boards/avnet-zedboard/config.h 
b/arch/arm/boards/avnet-zedboard/config.h
new file mode 100644
index 000..ca15136
--- /dev/null
+++ b/arch/arm/boards/avnet-zedboard/config.h
@@ -0,0 +1,4 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif /* __CONFIG_H */
diff --git a/arch/arm/boards/avnet-zedboard/env/init/config-board 
b/arch/arm/boards/avnet-zedboard/env/init/config-board
new file mode 100644
index 000..9957653
--- /dev/null
+++ b/arch/arm/boards/avnet-zedboard/env/init/config-board
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+# board defaults, do not change in running system. Change /env/config
+# instead
+
+global.hostname=ZedBoard
+global.linux.bootargs.base="console=ttyPS1,115200"
diff --git a/arch/arm/boards/avnet-zedboard/flash_header.c 
b/arch/arm/boards/avnet-zedboard/flash_header.c
new file mode 100644
index 000..e2bfaa0
--- /dev/null
+++ b/arch/arm/boards/avnet-zedboard/flash_header.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2012 Steffen Trumtrar 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+void __naked __flash_header_start go(void)
+{
+   __asm__ __volatile__ (
+   "b barebox_arm_reset_vector\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   "1: b 1b\n"
+   );
+}
+
+#define REG(a, v) { .addr = cpu_to_le32(a), .val = cpu_to_le32(v), }
+
+struct zynq_reg_entry __ps7reg_entry_section reg_entry[] = {
+   /* stop */
+   REG(0x, 0x),
+};
+
+struct zynq_flash_header __flash_header_section flash_header = {
+   .width_det  = WIDTH_DETECTION_MAGIC,
+   .image_id   = IMAGE

[PATCH 2/9] ARM: Zynq: Add new architecture zynq

[Steffen Trumtrar]

Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   2 +
 arch/arm/mach-zynq/Kconfig |  31 +
 arch/arm/mach-zynq/Makefile|   1 +
 arch/arm/mach-zynq/clocksource.c   |  58 +
 arch/arm/mach-zynq/devices.c   |  14 +++
 arch/arm/mach-zynq/include/mach/barebox.lds.h  |   9 ++
 arch/arm/mach-zynq/include/mach/debug_ll.h |  34 ++
 arch/arm/mach-zynq/include/mach/devices.h  |  13 ++
 .../arm/mach-zynq/include/mach/zynq-flash-header.h |  40 +++
 arch/arm/mach-zynq/include/mach/zynq7000-regs.h| 132 +
 arch/arm/mach-zynq/zynq.c  |  41 +++
 include/asm-generic/barebox.lds.h  |   3 +-
 13 files changed, 382 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-zynq/Kconfig
 create mode 100644 arch/arm/mach-zynq/Makefile
 create mode 100644 arch/arm/mach-zynq/clocksource.c
 create mode 100644 arch/arm/mach-zynq/devices.c
 create mode 100644 arch/arm/mach-zynq/include/mach/barebox.lds.h
 create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-zynq/include/mach/devices.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq-flash-header.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq7000-regs.h
 create mode 100644 arch/arm/mach-zynq/zynq.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 28332ec..8431fa8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -110,6 +110,10 @@ config ARCH_TEGRA
select CPU_ARM926T
select HAS_DEBUG_LL
 
+config ARCH_ZYNQ
+   bool "Xilinx Zynq-based boards"
+   select HAS_DEBUG_LL
+
 endchoice
 
 source arch/arm/cpu/Kconfig
@@ -126,6 +130,7 @@ source arch/arm/mach-pxa/Kconfig
 source arch/arm/mach-samsung/Kconfig
 source arch/arm/mach-versatile/Kconfig
 source arch/arm/mach-tegra/Kconfig
+source arch/arm/mach-zynq/Kconfig
 
 config ARM_ASM_UNIFIED
bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index fcb2969..ceb45dc 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -64,6 +64,7 @@ machine-$(CONFIG_ARCH_PXA):= pxa
 machine-$(CONFIG_ARCH_SAMSUNG) := samsung
 machine-$(CONFIG_ARCH_VERSATILE)   := versatile
 machine-$(CONFIG_ARCH_TEGRA)   := tegra
+machine-$(CONFIG_ARCH_ZYNQ):= zynq
 
 # Board directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
@@ -157,6 +158,7 @@ board-$(CONFIG_MACH_SABRELITE)  := 
freescale-mx6-sabrelite
 board-$(CONFIG_MACH_TX53)  := karo-tx53
 board-$(CONFIG_MACH_GUF_VINCELL)   := guf-vincell
 board-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK):= efika-mx-smartbook
+board-$(CONFIG_MACH_ZEDBOARD)  := avnet-zedboard
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
new file mode 100644
index 000..8eb67d2
--- /dev/null
+++ b/arch/arm/mach-zynq/Kconfig
@@ -0,0 +1,31 @@
+if ARCH_ZYNQ
+
+config ARCH_TEXT_BASE
+   hex
+   default 0x1ff0 if MACH_ZEDBOARD
+
+config BOARDINFO
+   default "ZedBoard" if MACH_ZEDBOARD
+
+choice
+   prompt "Xilinx Zynq type board"
+
+config ARCH_ZYNQ7000
+   bool "Zynq-7000"
+   select CPU_V7
+   select DRIVER_SERIAL_CADENCE
+
+endchoice
+
+if ARCH_ZYNQ7000
+
+choice
+   prompt "Zynq-7000 Board Type"
+
+config MACH_ZEDBOARD
+   bool "Avnet Zynq-7000 ZedBoard"
+
+endchoice
+endif
+
+endif
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
new file mode 100644
index 000..5d632b8
--- /dev/null
+++ b/arch/arm/mach-zynq/Makefile
@@ -0,0 +1 @@
+obj-y += zynq.o devices.o clocksource.o
diff --git a/arch/arm/mach-zynq/clocksource.c b/arch/arm/mach-zynq/clocksource.c
new file mode 100644
index 000..300a73e
--- /dev/null
+++ b/arch/arm/mach-zynq/clocksource.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2012 Steffen Trumtrar 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PRIVATE_TIMER_COUNTER  0x04
+#define PRIVATE_TIMER_CONTROL  0x08
+
+#define TIMER_CTRL_TIMER_EN0x1
+

[PATCH 1/9] serial: Add driver for Cadence UART

[Steffen Trumtrar]

Support for Cadence UART core.

Signed-off-by: Steffen Trumtrar 
---
 drivers/serial/Kconfig  |   4 +
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_cadence.c | 299 
 3 files changed, 304 insertions(+)
 create mode 100644 drivers/serial/serial_cadence.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index f61d670..a51510e 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -113,4 +113,8 @@ config DRIVER_SERIAL_OMAP4_USBBOOT
help
  Enable this to get console support over the usb bus used to boot an 
OMAP4
 
+config DRIVER_SERIAL_CADENCE
+   default n
+   bool "Cadence UART driver"
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 893e282..963a7df 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_DRIVER_SERIAL_ALTERA)+= 
serial_altera.o
 obj-$(CONFIG_DRIVER_SERIAL_ALTERA_JTAG)+= serial_altera_jtag.o
 obj-$(CONFIG_DRIVER_SERIAL_PXA)+= serial_pxa.o
 obj-$(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT)  += serial_omap4_usbboot.o
+obj-$(CONFIG_DRIVER_SERIAL_CADENCE)+= serial_cadence.o
diff --git a/drivers/serial/serial_cadence.c b/drivers/serial/serial_cadence.c
new file mode 100644
index 000..0ccb1b3
--- /dev/null
+++ b/drivers/serial/serial_cadence.c
@@ -0,0 +1,299 @@
+/*
+ * (c) 2012 Steffen Trumtrar 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CADENCE_UART_CONTROL   0x00
+#define CADENCE_UART_MODE  0x04
+#define CADENCE_UART_BAUD_GEN  0x18
+#define CADENCE_UART_CHANNEL_STS   0x2C
+#define CADENCE_UART_RXTXFIFO  0x30
+#define CADENCE_UART_BAUD_DIV  0x34
+
+#define CADENCE_CTRL_RXRES (1 << 0)
+#define CADENCE_CTRL_TXRES (1 << 1)
+#define CADENCE_CTRL_RXEN  (1 << 2)
+#define CADENCE_CTRL_RXDIS (1 << 3)
+#define CADENCE_CTRL_TXEN  (1 << 4)
+#define CADENCE_CTRL_TXDIS (1 << 5)
+#define CADENCE_CTRL_RSTTO (1 << 6)
+#define CADENCE_CTRL_STTBRK(1 << 7)
+#define CADENCE_CTRL_STPBRK(1 << 8)
+
+#define CADENCE_MODE_CLK_REF   (0 << 0)
+#define CADENCE_MODE_CLK_REF_DIV   (1 << 0)
+#define CADENCE_MODE_CHRL_6(3 << 1)
+#define CADENCE_MODE_CHRL_7(2 << 1)
+#define CADENCE_MODE_CHRL_8(0 << 1)
+#define CADENCE_MODE_PAR_EVEN  (0 << 3)
+#define CADENCE_MODE_PAR_ODD   (1 << 3)
+#define CADENCE_MODE_PAR_SPACE (2 << 3)
+#define CADENCE_MODE_PAR_MARK  (3 << 3)
+#define CADENCE_MODE_PAR_NONE  (4 << 3)
+
+#define CADENCE_STS_REMPTY (1 << 1)
+#define CADENCE_STS_RFUL   (1 << 2)
+#define CADENCE_STS_TEMPTY (1 << 3)
+#define CADENCE_STS_TFUL   (1 << 4)
+
+/*
+ * create default values for different platforms
+ */
+struct cadence_serial_devtype_data {
+   u32 ctrl;
+   u32 mode;
+};
+
+static struct cadence_serial_devtype_data cadence7000_data = {
+   .ctrl = CADENCE_CTRL_RXEN | CADENCE_CTRL_TXEN,
+   .mode = CADENCE_MODE_CLK_REF | CADENCE_MODE_CHRL_8 | 
CADENCE_MODE_PAR_NONE,
+};
+
+struct cadence_serial_priv {
+   struct console_device cdev;
+   int baudrate;
+   struct notifier_block notify;
+   void __iomem *regs;
+   /*struct clk *clk;*/
+   unsigned long clk;
+   struct cadence_serial_devtype_data *devtype;
+};
+
+static int cadence_serial_reset(struct console_device *cdev)
+{
+   struct cadence_serial_priv *priv = container_of(cdev,
+   struct cadence_serial_priv, cdev);
+
+   /* Soft-Reset Tx/Rx paths */
+   writel(CADENCE_CTRL_RXRES | CADENCE_CTRL_TXRES, priv->regs +
+   CADENCE_UART_CONTROL);
+
+   while (readl(priv->regs + CADENCE_UART_CONTROL) &
+   (CADENCE_CTRL_RXRES | CADENCE_CTRL_TXRES))
+   ;
+
+   return 0;
+}
+
+static int cadence_serial_setbaudrate(struct console_device *cdev, int 
baudrate)
+{
+   struct cadence_serial_priv *priv = container_of(cdev,
+   struct cadence_serial_priv, cdev);
+   unsigned int gen, div;
+   int calc_rate;
+   unsigned long clk;
+   int error;
+   int val;
+
+   clk = priv->clk;
+   priv->baudrate = baudrate;
+
+   /* disable transmitter and receiver */
+   val = readl(priv->regs + CADENCE_UAR

[PATCH 5/9] ARM: zynq: add clk support for zynq7000

[Steffen Trumtrar]

From: Josh Cartwright 

This adds support for the clocktree on zynq7000 SoCs.
The patch is grabed from clocks.c from the larger patch
ARM: zynq: add suppport for Zynq 7000 SoC
by Josh Cartwright and reformated a little bit.

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/mach-zynq/clk-zynq7000.c| 343 +++
 arch/arm/mach-zynq/include/mach/clkdev.h |   6 +
 2 files changed, 349 insertions(+)
 create mode 100644 arch/arm/mach-zynq/clk-zynq7000.c
 create mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h

diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
b/arch/arm/mach-zynq/clk-zynq7000.c
new file mode 100644
index 000..8dbde2b
--- /dev/null
+++ b/arch/arm/mach-zynq/clk-zynq7000.c
@@ -0,0 +1,343 @@
+/*
+ * Copyright (c) 2013 Josh Cartwright 
+ *
+ * Based on drivers/clk-zynq.c from Linux.
+ *
+ * Copyright (c) 2012 National Instruments
+ *
+ * Josh Cartwright 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ZYNQ_SLCR_BASE 0xF800
+
+enum zynq_clks {
+   dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1,
+   cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
+};
+
+static struct clk *clks[clks_max];
+
+struct zynq_pll_clk {
+   struct clk  clk;
+   void __iomem*pll_ctrl;
+};
+
+#define to_zynq_pll_clk(c) container_of(c, struct zynq_pll_clk, clk)
+
+#define PLL_CTRL_FDIV(x)   (((x) >> 12) & 0x7F)
+
+static unsigned long zynq_pll_recalc_rate(struct clk *clk,
+ unsigned long parent_rate)
+{
+   struct zynq_pll_clk *pll = to_zynq_pll_clk(clk);
+   return parent_rate * PLL_CTRL_FDIV(readl(pll->pll_ctrl));
+}
+
+static struct clk_ops zynq_pll_clk_ops = {
+   .recalc_rate = zynq_pll_recalc_rate,
+};
+
+static inline struct clk *zynq_pll_clk(const char *name, void __iomem 
*pll_ctrl)
+{
+   static const char *pll_parent = "ps_clk";
+   struct zynq_pll_clk *pll;
+   int ret;
+
+   pll = xzalloc(sizeof(*pll));
+   pll->pll_ctrl   = pll_ctrl;
+   pll->clk.ops= &zynq_pll_clk_ops;
+   pll->clk.name   = name;
+   pll->clk.parent_names   = &pll_parent;
+   pll->clk.num_parents= 1;
+
+   ret = clk_register(&pll->clk);
+   if (ret) {
+   free(pll);
+   return ERR_PTR(ret);
+   }
+
+   return &pll->clk;
+}
+
+struct zynq_periph_clk {
+   struct clk  clk;
+   void __iomem*clk_ctrl;
+};
+
+#define to_zynq_periph_clk(c)  container_of(c, struct zynq_periph_clk, c)
+
+static const u8 periph_clk_parent_map[] = {
+   0, 0, 1, 2
+};
+#define PERIPH_CLK_CTRL_SRC(x) (periph_clk_parent_map[((x) & 0x30) >> 4])
+#define PERIPH_CLK_CTRL_DIV(x) (((x) & 0x3F00) >> 8)
+
+static unsigned long zynq_periph_recalc_rate(struct clk *clk,
+unsigned long parent_rate)
+{
+   struct zynq_periph_clk *periph = to_zynq_periph_clk(clk);
+   return parent_rate / PERIPH_CLK_CTRL_DIV(readl(periph->clk_ctrl));
+}
+
+static int zynq_periph_get_parent(struct clk *clk)
+{
+   struct zynq_periph_clk *periph = to_zynq_periph_clk(clk);
+   return PERIPH_CLK_CTRL_SRC(readl(periph->clk_ctrl));
+}
+
+static const struct clk_ops zynq_periph_clk_ops = {
+   .recalc_rate= zynq_periph_recalc_rate,
+   .get_parent = zynq_periph_get_parent,
+};
+
+static struct clk *zynq_periph_clk(const char *name, void __iomem *clk_ctrl)
+{
+   static const char *peripheral_parents[] = {
+   "io_pll",
+   "arm_pll",
+   "ddr_pll",
+   };
+   struct zynq_periph_clk *periph;
+   int ret;
+
+   periph = xzalloc(sizeof(*periph));
+
+   periph->clk_ctrl= clk_ctrl;
+   periph->clk.name= name;
+   periph->clk.ops = &zynq_periph_clk_ops;
+   periph->clk.parent_names = peripheral_parents;
+   periph->clk.num_parents = ARRAY_SIZE(peripheral_parents);
+
+   ret = clk_register(&periph->clk);
+   if (ret) {
+   free(periph);
+   return ERR_PTR(ret);
+   }
+
+   return &periph->clk;
+}
+
+/* CPU Clock domain is modelled as a mux with 4 children subclks, whose
+ * derivative rates depend on CLK_621_TRUE
+ */
+
+struct zynq_cpu_clk {
+   struct clk  clk;
+   void __iome

[PATCH 9/9] ARM: zynq: remove clocksource

[Steffen Trumtrar]

With clkdev in place the generic arm_smp_twd can be used.

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/configs/zedboard_defconfig |  4 +++
 arch/arm/mach-zynq/Kconfig  |  1 +
 arch/arm/mach-zynq/Makefile |  2 +-
 arch/arm/mach-zynq/clk-zynq7000.c   |  3 +-
 arch/arm/mach-zynq/clocksource.c| 58 -
 arch/arm/mach-zynq/zynq.c   |  2 ++
 6 files changed, 10 insertions(+), 60 deletions(-)
 delete mode 100644 arch/arm/mach-zynq/clocksource.c

diff --git a/arch/arm/configs/zedboard_defconfig 
b/arch/arm/configs/zedboard_defconfig
index a9d52dd..0d546ff 100644
--- a/arch/arm/configs/zedboard_defconfig
+++ b/arch/arm/configs/zedboard_defconfig
@@ -250,6 +250,7 @@ CONFIG_CMD_VERSION=y
 # CONFIG_CMD_MAGICVAR is not set
 CONFIG_CMD_DEVINFO=y
 # CONFIG_CMD_UNCOMPRESS is not set
+CONFIG_CMD_CLK=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
 # CONFIG_NET_NFS is not set
@@ -295,6 +296,9 @@ CONFIG_DRIVER_SERIAL_CADENCE=y
 # CONFIG_USB is not set
 # CONFIG_VIDEO is not set
 # CONFIG_MCI is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_COMMON_CLK=y
+CONFIG_ARM_SMP_TWD=y
 
 #
 # MFD
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a4ce949..72c96b5 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -16,6 +16,7 @@ config ARCH_ZYNQ7000
select DRIVER_SERIAL_CADENCE
select CLKDEV_LOOKUP
select COMMON_CLK
+   select ARM_SMP_TWD
 
 endchoice
 
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index 5d632b8..459c957 100644
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -1 +1 @@
-obj-y += zynq.o devices.o clocksource.o
+obj-y += zynq.o devices.o clk-zynq7000.o
diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
b/arch/arm/mach-zynq/clk-zynq7000.c
index 74f08ad..83ae230 100644
--- a/arch/arm/mach-zynq/clk-zynq7000.c
+++ b/arch/arm/mach-zynq/clk-zynq7000.c
@@ -30,7 +30,7 @@
 
 enum zynq_clks {
dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1,
-   cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
+   cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max, arm_smp_twd
 };
 
 enum zynq_pll_type {
@@ -366,6 +366,7 @@ static int zynq_clock_probe(struct device_d *dev)
slcr_base + 0x120, slcr_base + 0x1C4);
 
clk_register_clkdev(clks[cpu_3x2x], NULL, "arm_smp_twd");
+   clkdev_add_physbase(clks[cpu_3x2x], CORTEXA9_SCU_TIMER_BASE_ADDR, NULL);
clk_register_clkdev(clks[uart0], NULL, "zynq_serial0");
clk_register_clkdev(clks[uart1], NULL, "zynq_serial1");
return 0;
diff --git a/arch/arm/mach-zynq/clocksource.c b/arch/arm/mach-zynq/clocksource.c
deleted file mode 100644
index 300a73e..000
--- a/arch/arm/mach-zynq/clocksource.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2012 Steffen Trumtrar 
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define PRIVATE_TIMER_COUNTER  0x04
-#define PRIVATE_TIMER_CONTROL  0x08
-
-#define TIMER_CTRL_TIMER_EN0x1
-#define TIMER_CTRL_AUTO_RELOAD 0x2
-#define TIMER_PRESCALER_SHIFT  0x8
-#define TIMER_PRESCALER0xFF
-
-static void __iomem *timer_base = (void *) CORTEXA9_SCU_TIMER_BASE_ADDR;
-
-static uint64_t zynq_clocksource_read(void)
-{
-   return readl(timer_base + PRIVATE_TIMER_COUNTER);
-}
-
-static struct clocksource cs = {
-   .read   = zynq_clocksource_read,
-   .mask   = CLOCKSOURCE_MASK(16),
-   .shift  = TIMER_PRESCALER_SHIFT,
-};
-
-static int zynq_timer_init(void)
-{
-   cs.mult = clocksource_hz2mult(3330, cs.shift);
-
-   /* set timer load register */
-   writel(0x, timer_base);
-
-   writel(TIMER_CTRL_TIMER_EN | TIMER_CTRL_AUTO_RELOAD |
-   (TIMER_PRESCALER << cs.shift),
-   timer_base + PRIVATE_TIMER_CONTROL);
-
-   init_clock(&cs);
-
-   return 0;
-}
-coredevice_initcall(zynq_timer_init);
diff --git a/arch/arm/mach-zynq/zynq.c b/arch/arm/mach-zynq/zynq.c
index 33fc1ab..d430d5f 100644
--- a/arch/arm/mach-zynq/zynq.c
+++ b/arch/arm/mach-zynq/zynq.c
@@ -21,6 +21,8 @@
 static int zynq_init(void)
 {
add_generic_device("zynq-clock", 0, NULL, ZYNQ_SLCR_BASE, 0x4000, 
IORESOURCE_MEM, NULL);
+   add_generic_device("smp_twd", 0, NULL, CORTEXA9_SCU_TIMER_BASE_ADDR,
+   0x4000, IORESOURCE_MEM, NULL);
return 0;
 }
 postcore_initcall(zynq_init);
-- 
1.8.2.rc2


___

[PATCH 7/9] ARM: zynq: clk: add pll type

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/mach-zynq/clk-zynq7000.c | 33 -
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
b/arch/arm/mach-zynq/clk-zynq7000.c
index 5a8a12a..0d3c3a8 100644
--- a/arch/arm/mach-zynq/clk-zynq7000.c
+++ b/arch/arm/mach-zynq/clk-zynq7000.c
@@ -33,10 +33,21 @@ enum zynq_clks {
cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
 };
 
+enum zynq_pll_type {
+   ZYNQ_PLL_ARM,
+   ZYNQ_PLL_DDR,
+   ZYNQ_PLL_IO,
+};
+
+#define PLL_ARM_LOCK   (1 << 0)
+#define PLL_DDR_LOCK   (1 << 1)
+#define PLL_IO_LOCK(1 << 2)
+
 static struct clk *clks[clks_max];
 
 struct zynq_pll_clk {
struct clk  clk;
+   u32 pll_lock;
void __iomem*pll_ctrl;
 };
 
@@ -51,11 +62,19 @@ static unsigned long zynq_pll_recalc_rate(struct clk *clk,
return parent_rate * PLL_CTRL_FDIV(readl(pll->pll_ctrl));
 }
 
+static int zynq_pll_enable(struct clk *clk)
+{
+   return 0;
+}
+
 static struct clk_ops zynq_pll_clk_ops = {
.recalc_rate = zynq_pll_recalc_rate,
+   .enable = zynq_pll_enable,
 };
 
-static inline struct clk *zynq_pll_clk(const char *name, void __iomem 
*pll_ctrl)
+static inline struct clk *zynq_pll_clk(enum zynq_pll_type type,
+  const char *name,
+  void __iomem *pll_ctrl)
 {
static const char *pll_parent = "ps_clk";
struct zynq_pll_clk *pll;
@@ -68,6 +87,18 @@ static inline struct clk *zynq_pll_clk(const char *name, 
void __iomem *pll_ctrl)
pll->clk.parent_names   = &pll_parent;
pll->clk.num_parents= 1;
 
+   switch(type) {
+   case ZYNQ_PLL_ARM:
+   pll->pll_lock = PLL_ARM_LOCK;
+   break;
+   case ZYNQ_PLL_DDR:
+   pll->pll_lock = PLL_DDR_LOCK;
+   break;
+   case ZYNQ_PLL_IO:
+   pll->pll_lock = PLL_IO_LOCK;
+   break;
+   }
+
ret = clk_register(&pll->clk);
if (ret) {
free(pll);
-- 
1.8.2.rc2


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[PATCH 8/9] ARM: zynq: clk: convert to platform driver

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/mach-zynq/Kconfig|  2 ++
 arch/arm/mach-zynq/clk-zynq7000.c | 25 ++---
 arch/arm/mach-zynq/zynq.c |  1 +
 3 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index cec749a..a4ce949 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -14,6 +14,8 @@ config ARCH_ZYNQ7000
bool "Zynq-7000"
select CPU_V7
select DRIVER_SERIAL_CADENCE
+   select CLKDEV_LOOKUP
+   select COMMON_CLK
 
 endchoice
 
diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
b/arch/arm/mach-zynq/clk-zynq7000.c
index 0d3c3a8..74f08ad 100644
--- a/arch/arm/mach-zynq/clk-zynq7000.c
+++ b/arch/arm/mach-zynq/clk-zynq7000.c
@@ -335,7 +335,7 @@ static struct clk *zynq_cpu_subclk(const char *name,
return &subclk->clk;
 }
 
-static int zynq_init_clks(void)
+static int zynq_clock_probe(struct device_d *dev)
 {
void __iomem *slcr_base = (void __iomem *) ZYNQ_SLCR_BASE;
unsigned long ps_clk_rate = 3330;
@@ -365,9 +365,28 @@ static int zynq_init_clks(void)
clks[cpu_1x] = zynq_cpu_subclk("cpu_1x", CPU_SUBCLK_1X,
slcr_base + 0x120, slcr_base + 0x1C4);
 
-   clk_register_clkdev(clks[cpu_3x2x], NULL, "smp_twd0");
+   clk_register_clkdev(clks[cpu_3x2x], NULL, "arm_smp_twd");
clk_register_clkdev(clks[uart0], NULL, "zynq_serial0");
clk_register_clkdev(clks[uart1], NULL, "zynq_serial1");
return 0;
 }
-postcore_initcall(zynq_init_clks);
+
+static __maybe_unused struct of_device_id zynq_clock_dt_ids[] = {
+   {
+   .compatible = "xlnx,zynq-clock",
+   }, {
+   /* sentinel */
+   }
+};
+
+static struct driver_d zynq_clock_driver = {
+   .probe  = zynq_clock_probe,
+   .name   = "zynq-clock",
+   .of_compatible = DRV_OF_COMPAT(zynq_clock_dt_ids),
+};
+
+static int zynq_clock_init(void)
+{
+   return platform_driver_register(&zynq_clock_driver);
+}
+postcore_initcall(zynq_clock_init);
diff --git a/arch/arm/mach-zynq/zynq.c b/arch/arm/mach-zynq/zynq.c
index 2043655..33fc1ab 100644
--- a/arch/arm/mach-zynq/zynq.c
+++ b/arch/arm/mach-zynq/zynq.c
@@ -20,6 +20,7 @@
 
 static int zynq_init(void)
 {
+   add_generic_device("zynq-clock", 0, NULL, ZYNQ_SLCR_BASE, 0x4000, 
IORESOURCE_MEM, NULL);
return 0;
 }
 postcore_initcall(zynq_init);
-- 
1.8.2.rc2


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[PATCH 0/9] ARM: add support for Zynq

[Steffen Trumtrar]

Hi!

This series adds basic support for Xilinx Zynq based SoCs.
Atm one can boot first stage from SD card and ... that is it.
Ethernet support is on its way, but not functional as of yet.

Regards,
str


Josh Cartwright (1):
  ARM: zynq: add clk support for zynq7000

Steffen Trumtrar (8):
  serial: Add driver for Cadence UART
  ARM: Zynq: Add new architecture zynq
  ARM: zynq: add zynq fsbl checksum script
  ARM: zynq: Add support for the Avnet Zedboard
  ARM: zynq: clk: replace define with header
  ARM: zynq: clk: add pll type
  ARM: zynq: clk: convert to platform driver
  ARM: zynq: remove clocksource

 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   2 +
 arch/arm/boards/avnet-zedboard/Makefile|   1 +
 arch/arm/boards/avnet-zedboard/board.c |  38 ++
 arch/arm/boards/avnet-zedboard/config.h|   4 +
 .../boards/avnet-zedboard/env/init/config-board|   7 +
 arch/arm/boards/avnet-zedboard/flash_header.c  |  56 +++
 arch/arm/boards/avnet-zedboard/lowlevel.c  | 249 +
 arch/arm/configs/zedboard_defconfig| 360 +++
 arch/arm/mach-zynq/Kconfig |  35 ++
 arch/arm/mach-zynq/Makefile|   1 +
 arch/arm/mach-zynq/clk-zynq7000.c  | 393 +
 arch/arm/mach-zynq/devices.c   |  14 +
 arch/arm/mach-zynq/include/mach/barebox.lds.h  |   9 +
 arch/arm/mach-zynq/include/mach/clkdev.h   |   6 +
 arch/arm/mach-zynq/include/mach/debug_ll.h |  34 ++
 arch/arm/mach-zynq/include/mach/devices.h  |  13 +
 .../arm/mach-zynq/include/mach/zynq-flash-header.h |  40 +++
 arch/arm/mach-zynq/include/mach/zynq7000-regs.h| 132 +++
 arch/arm/mach-zynq/zynq.c  |  39 ++
 drivers/serial/Kconfig |   4 +
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_cadence.c| 299 
 include/asm-generic/barebox.lds.h  |   3 +-
 scripts/Makefile   |   1 +
 scripts/zynq_checksum.c|  55 +++
 26 files changed, 1800 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/avnet-zedboard/Makefile
 create mode 100644 arch/arm/boards/avnet-zedboard/board.c
 create mode 100644 arch/arm/boards/avnet-zedboard/config.h
 create mode 100644 arch/arm/boards/avnet-zedboard/env/init/config-board
 create mode 100644 arch/arm/boards/avnet-zedboard/flash_header.c
 create mode 100644 arch/arm/boards/avnet-zedboard/lowlevel.c
 create mode 100644 arch/arm/configs/zedboard_defconfig
 create mode 100644 arch/arm/mach-zynq/Kconfig
 create mode 100644 arch/arm/mach-zynq/Makefile
 create mode 100644 arch/arm/mach-zynq/clk-zynq7000.c
 create mode 100644 arch/arm/mach-zynq/devices.c
 create mode 100644 arch/arm/mach-zynq/include/mach/barebox.lds.h
 create mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h
 create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-zynq/include/mach/devices.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq-flash-header.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq7000-regs.h
 create mode 100644 arch/arm/mach-zynq/zynq.c
 create mode 100644 drivers/serial/serial_cadence.c
 create mode 100644 scripts/zynq_checksum.c

-- 
1.8.2.rc2


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[PATCH 3/9] ARM: zynq: add zynq fsbl checksum script

[Steffen Trumtrar]

The bootrom only reads an image if the correct checksum is present in the
header. The calculation is pretty simple:
sum over all words from 0x20 to 0x44
Two of this words are the image length. That is why the checksum can not be
calculated until barebox_image_size is known.
The easiest solution is a program that has to be run after make.
Maybe this can be replaced with some linker-fu.

Signed-off-by: Steffen Trumtrar 
---
 scripts/Makefile|  1 +
 scripts/zynq_checksum.c | 55 +
 2 files changed, 56 insertions(+)
 create mode 100644 scripts/zynq_checksum.c

diff --git a/scripts/Makefile b/scripts/Makefile
index 08b325c..41c892e 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -12,6 +12,7 @@ hostprogs-$(CONFIG_ARCH_NETX)+= gen_netx_image
 hostprogs-$(CONFIG_ARCH_OMAP)+= omap_signGP mk-am35xx-spi-image
 hostprogs-$(CONFIG_ARCH_S5PCxx)  += s5p_cksum
 hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader
+hostprogs-$(CONFIG_ARCH_ZYNQ)   += zynq_checksum
 
 HOSTLOADLIBES_omap4_usbboot = -lpthread
 omap4_usbboot-objs   := usb_linux.o omap4_usbboot.o
diff --git a/scripts/zynq_checksum.c b/scripts/zynq_checksum.c
new file mode 100644
index 000..e814f86
--- /dev/null
+++ b/scripts/zynq_checksum.c
@@ -0,0 +1,55 @@
+#include 
+#include 
+#include 
+
+int main(int argc, char *argv[])
+{
+   FILE *ifile, *ofile;
+   unsigned int *buf;
+   const char *infile;
+   const char *outfile;
+   struct stat st;
+   unsigned int i;
+   unsigned long sum = 0;
+
+   infile = argv[1];
+   outfile = argv[2];
+
+   stat(infile, &st);
+
+   buf = malloc(sizeof(*buf) * st.st_size);
+   if (!buf) {
+   fprintf(stderr, "Unable to allocate buffer\n");
+   return -1;
+   }
+   ifile = fopen(infile, "rb");
+   if (!ifile) {
+   fprintf(stderr, "Cannot open %s for reading\n",
+   infile);
+   free(buf);
+   return -1;
+   }
+   ofile = fopen(outfile, "wb");
+   if (!ofile) {
+   fprintf(stderr, "Cannot open %s for writing\n",
+   outfile);
+   fclose(ifile);
+   free(buf);
+   return -1;
+   }
+
+   fread(buf, 4, st.st_size, ifile);
+
+   for (i = 0x8; i < 0x12; i++)
+   sum += buf[i];
+
+   sum = ~sum;
+   buf[i] = sum;
+
+   fwrite(buf, st.st_size / 4, 4, ofile);
+
+   fclose(ofile);
+   fclose(ifile);
+   free(buf);
+   return 0;
+}
-- 
1.8.2.rc2


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[PATCH 6/9] ARM: zynq: clk: replace define with header

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar 
---
 arch/arm/mach-zynq/clk-zynq7000.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/mach-zynq/clk-zynq7000.c 
b/arch/arm/mach-zynq/clk-zynq7000.c
index 8dbde2b..5a8a12a 100644
--- a/arch/arm/mach-zynq/clk-zynq7000.c
+++ b/arch/arm/mach-zynq/clk-zynq7000.c
@@ -25,10 +25,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
-#define ZYNQ_SLCR_BASE 0xF800
-
 enum zynq_clks {
dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1,
cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, clks_max
-- 
1.8.2.rc2


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Re: [PATCH] image and bss size decrease

[Juergen Beisert]

Hi Sascha,

Sascha Hauer wrote:
> [...]
> Also we make the bss smaller by allocating the FILE table and
> the gpio_desc table dynamically. The bss size is may become
> a problem on boards which run from SRAM. Here the malloc pool
> is in the big SDRAM area, but the bss is in SRAM, so it makes
> sense to move the big tables from bss to SDRAM by using malloc.

It would also be possible to instruct the linker to locate the BSS in the big 
SDRAM area. But that might interfere with very running early code using 
variables in BSS while the SDRAM isn't up and running yet.

jbe

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Re: [PATCH 7/9] menu: avoid errors when building submenus

[Sascha Hauer]

On Sun, Mar 10, 2013 at 11:29:17PM +0100, vj wrote:
> On Sun, Mar 10, 2013 at 2:16 PM, Jean-Christophe PLAGNIOL-VILLARD
>  wrote:
> > On 00:19 Sun 10 Mar , Vicente Bergas wrote:
> >> boot-menu-add-entry should not add menu entries to non-existent menus
> >> to solve the issue a new parameter is passed indicating the current menu
> > how this could happend?
> 
> This happens always a menu with "Boot: " entries is created.
> "Boot: " entries are created calling "boot-menu-add-entry" as
> "boot-template" suggests.
> All boot entries are expected to be editable or deleted, so, when the
> user requests, a new menu is build with all the entries to be edited
> or deleted.
> What happens is that "boot-menu-add-entry" adds all three entries at
> once, one for the boot menu, another for the still non-existent edit
> menu and a third one for the still non-existent delete menu.
> When the user selects the edit menu then "boot-menu-add-entry" adds
> again three entries, this time the non-existent menus are the boot and
> delete ones.
> Idem for the delete menu...
> When an item is added to a non-existent menu an error is reported, but
> it's not critical and the menu being created is shown correctly.
> This patch addresses that.

I see the problem, but I think we should either live with it or find a
better solution to the problem. I don't really want to increase the
complexity of the menu scripts. I had a hard time implementing it with
halfway correct behaviour. If now we have to add more complexity it
IMO shows we should rethink it.

Sascha


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Re: [PATCH 8/9] archos: add atag appender for all features

[Sascha Hauer]

On Sun, Mar 10, 2013 at 12:19:41AM +0100, Vicente Bergas wrote:
> 
> Signed-off-by: Vicente Bergas 
> ---
>  arch/arm/boards/archosg9/archos_features.c | 414 
> ++---
>  arch/arm/boards/archosg9/archos_features.h |  39 +++
>  2 files changed, 412 insertions(+), 41 deletions(-)
> 
> diff --git a/arch/arm/boards/archosg9/archos_features.c 
> b/arch/arm/boards/archosg9/archos_features.c

[...]

> +#ifdef INSERT_ATAG_HSDPA
> + features->hdr.tag = FTAG_HAS_HSDPA;
> + features->hdr.size = feature_tag_size(feature_tag_generic);
> +
> + memset(&features->u.generic, 0, sizeof(features->u.generic));
> +
> + features = feature_tag_next(features);
> +#endif
> +}
> +static void setup_feature_nfc(void)
> +{
> +#ifdef INSERT_ATAG_NFC
> + features->hdr.tag = FTAG_HAS_NFC;
> + features->hdr.size = feature_tag_size(feature_tag_generic);
> +
> + memset(&features->u.generic, 0, sizeof(features->u.generic));
> +
> + features = feature_tag_next(features);
> +#endif

So all features get an additional ifdef,...

>  }
>  static void setup_feature_none(void)
>  {
> @@ -191,6 +495,34 @@ static struct tag *setup_feature_list(struct tag * 
> params)
>   setup_feature_has_gpio_volume_keys();
>   setup_feature_screen();
>   setup_feature_turbo();
> + setup_feature_product_oem();
> + setup_feature_product_zone();
> + setup_feature_clock();
> + setup_feature_dcin();
> + setup_feature_ext_screen();
> + setup_feature_wifi();
> + setup_feature_bluetooth();
> + setup_feature_accelerometer();
> + setup_feature_gps();
> + setup_feature_harddisk_controller();
> + setup_feature_harddisk();
> + setup_feature_touchscreen();
> + setup_feature_mmcsd();
> + setup_feature_gpio_keys();
> + setup_feature_wifi_pa();
> + setup_feature_speaker();
> + setup_feature_battery();
> + setup_feature_electrical_shortcut();
> + setup_feature_gyroscope();
> + setup_feature_compass();
> + setup_feature_camera();
> + setup_feature_microphone();
> + setup_feature_ambient_light_sensor();
> + setup_feature_proximity_sensor();
> + setup_feature_gsm();
> + setup_feature_dect();
> + setup_feature_hsdpa();
> + setup_feature_nfc();

... they are all called unconditionally, many of them end up being
no-ops ...

>   setup_feature_none();
>  
>   fl->size = ((u32)features) - ((u32)(fl->data));
> diff --git a/arch/arm/boards/archosg9/archos_features.h 
> b/arch/arm/boards/archosg9/archos_features.h
> index 5769c6c..a3e1437 100644
> --- a/arch/arm/boards/archosg9/archos_features.h
> +++ b/arch/arm/boards/archosg9/archos_features.h
> @@ -1,6 +1,45 @@
>  #ifndef __ARCHOS_FEATURES_H
>  #define __ARCHOS_FEATURES_H
>  
> +#undef  INSERT_ATAG_PRODUCT_NAME
> +#undef  INSERT_ATAG_PRODUCT_SERIAL_NUMBER
> +#undef  INSERT_ATAG_PRODUCT_MAC_ADDRESS
> +#undef  INSERT_ATAG_BOARD_PCB_REVISION
> +#define INSERT_ATAG_SDRAM
> +#undef  INSERT_ATAG_PMIC
> +#define INSERT_ATAG_SERIAL_PORT
> +#define INSERT_ATAG_HAS_GPIO_VOLUME_KEYS
> +#define INSERT_ATAG_SCREEN
> +#define INSERT_ATAG_TURBO

And then you use a header file to configure this.

I don't see a point in obfuscating this so much. Please call only call
the features you want to have setup in the first place. For your own
debugging purposes it makes no difference whether you edit the C file
above or this header file. For different tablets with different features
you need to find another solution anyway.

Sascha

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[PATCH v2] DMO Realq7 support

[Sascha Hauer]

changes since v1:

- use phy_register_fixup_for_uid instead of fec pdata callback
- Use regular readl/writel instead of custom functions
- update defaultenv
- use lwl-y for mmdc calibration support
- use barebox_image_size

Sascha


Sascha Hauer (4):
  net: phy: micrel: Update id table from kernel
  ARM i.MX6: Add mmdc calibration support
  Add DMO RealQ7 board support
  Add DMO RealQ7 defconfig

 arch/arm/Makefile |   1 +
 arch/arm/boards/delphi-poc20/env/boot/mmc |  10 +
 arch/arm/boards/dmo-mx6-realq7/Makefile   |   2 +
 arch/arm/boards/dmo-mx6-realq7/board.c| 406 ++
 arch/arm/boards/dmo-mx6-realq7/config.h   |   4 +
 arch/arm/boards/dmo-mx6-realq7/env/boot/mmc   |  10 +
 arch/arm/boards/dmo-mx6-realq7/env/config-board   |   7 +
 arch/arm/boards/dmo-mx6-realq7/env/init/automount |  14 +
 arch/arm/boards/dmo-mx6-realq7/flash_header.c |  40 +
 arch/arm/boards/dmo-mx6-realq7/lowlevel.c | 155 
 arch/arm/configs/dmo-realq7_defconfig |  91 +++
 arch/arm/mach-imx/Kconfig |   6 +
 arch/arm/mach-imx/Makefile|   1 +
 arch/arm/mach-imx/imx6-mmdc.c | 868 ++
 arch/arm/mach-imx/include/mach/devices-imx6.h |  20 +
 arch/arm/mach-imx/include/mach/imx6-mmdc.h|   7 +
 include/linux/micrel_phy.h|   9 +-
 17 files changed, 1650 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/delphi-poc20/env/boot/mmc
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/Makefile
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/board.c
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/config.h
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/boot/mmc
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/config-board
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/init/automount
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/flash_header.c
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/lowlevel.c
 create mode 100644 arch/arm/configs/dmo-realq7_defconfig
 create mode 100644 arch/arm/mach-imx/imx6-mmdc.c
 create mode 100644 arch/arm/mach-imx/include/mach/imx6-mmdc.h

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[PATCH 3/4] Add DMO RealQ7 board support

[Sascha Hauer]

Signed-off-by: Sascha Hauer 
---
 arch/arm/Makefile |   1 +
 arch/arm/boards/delphi-poc20/env/boot/mmc |  10 +
 arch/arm/boards/dmo-mx6-realq7/Makefile   |   2 +
 arch/arm/boards/dmo-mx6-realq7/board.c| 406 ++
 arch/arm/boards/dmo-mx6-realq7/config.h   |   4 +
 arch/arm/boards/dmo-mx6-realq7/env/boot/mmc   |  10 +
 arch/arm/boards/dmo-mx6-realq7/env/config-board   |   7 +
 arch/arm/boards/dmo-mx6-realq7/env/init/automount |  14 +
 arch/arm/boards/dmo-mx6-realq7/flash_header.c |  40 +++
 arch/arm/boards/dmo-mx6-realq7/lowlevel.c | 155 +
 arch/arm/mach-imx/Kconfig |   6 +
 arch/arm/mach-imx/include/mach/devices-imx6.h |  20 ++
 12 files changed, 675 insertions(+)
 create mode 100644 arch/arm/boards/delphi-poc20/env/boot/mmc
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/Makefile
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/board.c
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/config.h
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/boot/mmc
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/config-board
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/env/init/automount
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/flash_header.c
 create mode 100644 arch/arm/boards/dmo-mx6-realq7/lowlevel.c

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index b98d6b8..aaf07ac 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -162,6 +162,7 @@ board-$(CONFIG_MACH_TX53)   := karo-tx53
 board-$(CONFIG_MACH_GUF_VINCELL)   := guf-vincell
 board-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK):= efika-mx-smartbook
 board-$(CONFIG_MACH_SABRESD)   := freescale-mx6-sabresd
+board-$(CONFIG_MACH_REALQ7):= dmo-mx6-realq7
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/boards/delphi-poc20/env/boot/mmc 
b/arch/arm/boards/delphi-poc20/env/boot/mmc
new file mode 100644
index 000..e311763
--- /dev/null
+++ b/arch/arm/boards/delphi-poc20/env/boot/mmc
@@ -0,0 +1,10 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+   boot-menu-add-entry "$0" "MMC"
+   exit
+fi
+
+global.bootm.image="/mnt/mmc/zImage"
+global.bootm.oftree="/mnt/mmc/oftree"
+global.linux.bootargs.dyn.root="root=mmcblk0p2 rootfstype=ext3 rootwait"
diff --git a/arch/arm/boards/dmo-mx6-realq7/Makefile 
b/arch/arm/boards/dmo-mx6-realq7/Makefile
new file mode 100644
index 000..e143009
--- /dev/null
+++ b/arch/arm/boards/dmo-mx6-realq7/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o flash_header.o lowlevel.o
+pbl-y += flash_header.o lowlevel.o
diff --git a/arch/arm/boards/dmo-mx6-realq7/board.c 
b/arch/arm/boards/dmo-mx6-realq7/board.c
new file mode 100644
index 000..4680981
--- /dev/null
+++ b/arch/arm/boards/dmo-mx6-realq7/board.c
@@ -0,0 +1,406 @@
+/*
+ * Copyright (C) 2012 Steffen Trumtrar, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static iomux_v3_cfg_t realq7_pads[] = {
+   MX6Q_PAD_SD2_CMD__AUDMUX_AUD4_RXC,
+   MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD,
+   MX6Q_PAD_SD2_CLK__AUDMUX_AUD4_RXFS,
+   MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD,
+   MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS,
+   MX6Q_PAD_KEY_ROW2__CAN1_RXCAN,
+   MX6Q_PAD_GPIO_7__CAN1_TXCAN,
+   MX6Q_PAD_CSI0_VSYNC__CHEETAH_TRACE_0,
+   MX6Q_PAD_CSI0_DAT4__CHEETAH_TRACE_1,
+   MX6Q_PAD_CSI0_DAT13__CHEETAH_TRACE_10,
+   MX6Q_PAD_CSI0_DAT14__CHEETAH_TRACE_11,
+   MX6Q_PAD_CSI0_DAT15__CHEETAH_TRACE_12,
+   MX6Q_PAD_CSI0_DAT16__CHEETAH_TRACE_13,
+   MX6Q_PAD_CSI0_DAT17__CHEETAH_TRACE_14,
+   MX6Q_PAD_CSI0_DAT18__CHEETAH_TRACE_15,
+   MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2,
+   MX6Q_PAD_CSI0_DAT6__CHEETAH_TRACE_3,
+   MX6Q_PAD_CSI0_DAT7__CHEETAH_TRACE_4,
+   MX6Q_PAD_CSI0_DAT8__CHEETAH_TRACE_5,
+   MX6Q_PAD_CSI0_DAT9__CHEETAH_TRACE_6,
+   MX6Q_PAD_CSI0_DAT10__CHEETAH_TRACE_7,
+   MX6Q_PAD_CSI0_DAT11__CHEETAH_TRACE_8,
+   MX6Q_PAD_CSI0_DAT12__CHEETAH_TRACE_9,
+   M

[PATCH 2/4] ARM i.MX6: Add mmdc calibration support

[Sascha Hauer]

This adds support for the various DDR calibration functions in the
i.MX6 MMDC.

Signed-off-by: Sascha Hauer 
---
 arch/arm/mach-imx/Makefile |   1 +
 arch/arm/mach-imx/imx6-mmdc.c  | 868 +
 arch/arm/mach-imx/include/mach/imx6-mmdc.h |   7 +
 3 files changed, 876 insertions(+)
 create mode 100644 arch/arm/mach-imx/imx6-mmdc.c
 create mode 100644 arch/arm/mach-imx/include/mach/imx6-mmdc.h

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 4adf522..b6319bb 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_IMX51) += imx51.o iomux-v3.o imx5.o clk-imx5.o
 obj-$(CONFIG_ARCH_IMX53) += imx53.o iomux-v3.o imx5.o clk-imx5.o esdctl-v4.o
 pbl-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o esdctl-v4.o
 obj-$(CONFIG_ARCH_IMX6) += imx6.o iomux-v3.o usb-imx6.o clk-imx6.o
+lwl-$(CONFIG_ARCH_IMX6) += imx6-mmdc.o
 obj-$(CONFIG_IMX_IIM)  += iim.o
 obj-$(CONFIG_NAND_IMX) += nand.o
 lwl-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += external-nand-boot.o
diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c
new file mode 100644
index 000..d1de593
--- /dev/null
+++ b/arch/arm/mach-imx/imx6-mmdc.c
@@ -0,0 +1,868 @@
+/*
+ * i.MX6 DDR controller calibration functions
+ * Based on Freescale code
+ *
+ * Copyright (C) 2013 Sascha Hauer 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+
+#define P0_IPS (void __iomem *)MX6_MMDC_P0_BASE_ADDR
+#define P1_IPS (void __iomem *)MX6_MMDC_P1_BASE_ADDR
+
+#define MDCTL  0x000
+#define MDPDC  0x004
+#define MDSCR  0x01c
+#define MDMISC 0x018
+#define MDREF  0x020
+#define MAPSR  0x404
+#define MPZQHWCTRL 0x800
+#define MPWLGCR0x808
+#define MPWLDECTRL00x80c
+#define MPWLDECTRL10x810
+#define MPPDCMPR1  0x88c
+#define MPSWDAR0x894
+#define MPRDDLCTL  0x848
+#define MPMUR  0x8b8
+#define MPDGCTRL0  0x83c
+#define MPDGCTRL1  0x840
+#define MPRDDLCTL  0x848
+#define MPWRDLCTL  0x850
+#define MPRDDLHWCTL0x860
+#define MPWRDLHWCTL0x864
+#define MPDGHWST0  0x87c
+#define MPDGHWST1  0x880
+#define MPDGHWST2  0x884
+#define MPDGHWST3  0x888
+
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x5a8)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x5b0)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x524)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x51c)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x518)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x50c)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x5b8)
+#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7   ((void __iomem 
*)MX6_IOMUXC_BASE_ADDR + 0x5c0)
+
+int mmdc_do_write_level_calibration(void)
+{
+   u32 esdmisc_val, zq_val;
+   int errorcount = 0;
+   u32 val;
+   u32 ddr_mr1 = 0x4;
+
+   /* disable DDR logic power down timer */
+   val = readl((P0_IPS + MDPDC));
+   val &= 0x00ff;
+   writel(val, (P0_IPS + MDPDC)),
+
+   /* disable Adopt power down timer */
+   val = readl((P0_IPS + MAPSR));
+   val |= 0x1;
+   writel(val, (P0_IPS + MAPSR));
+
+   pr_debug("Start write leveling calibration \n");
+
+   /*
+* disable auto refresh and ZQ calibration
+* before proceeding with Write Leveling calibration
+*/
+   esdmisc_val = readl(P0_IPS + MDREF);
+   writel(0xC000, (P0_IPS + MDREF));
+   zq_val = readl(P0_IPS + MPZQHWCTRL);
+   writel(zq_val & ~(0x3), (P0_IPS + MPZQHWCTRL));
+
+   /*
+* Configure the external DDR device to enter write leveling mode
+* through Load Mode Register command
+* Register setting:
+* Bits[31:16] MR1 value (0x0080 write leveling enable)
+* Bit[9] set WL_EN to enable MMDC DQS output
+* Bits[6:4] set CMD bits for Load Mode Register programming
+* Bits[2:0] set CMD_BA to 0x1 for DDR MR1 programming
+*/
+   writel(0x00808231, P0_IPS + MDSCR);
+
+   /* Activate automatic calibration by setting MPWLGCR[HW_WL_EN] */
+   writel(0x0001, P0_IPS + MPWLGCR);
+
+   

[PATCH 4/4] Add DMO RealQ7 defconfig

[Sascha Hauer]

Signed-off-by: Sascha Hauer 
---
 arch/arm/configs/dmo-realq7_defconfig | 91 +++
 1 file changed, 91 insertions(+)
 create mode 100644 arch/arm/configs/dmo-realq7_defconfig

diff --git a/arch/arm/configs/dmo-realq7_defconfig 
b/arch/arm/configs/dmo-realq7_defconfig
new file mode 100644
index 000..d063e97
--- /dev/null
+++ b/arch/arm/configs/dmo-realq7_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARCH_IMX=y
+CONFIG_ARCH_IMX6=y
+CONFIG_MACH_REALQ7=y
+CONFIG_IMX_IIM=y
+CONFIG_IMX_IIM_FUSE_BLOW=y
+CONFIG_THUMB2_BAREBOX=y
+CONFIG_CMD_ARM_MMUINFO=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_ARM_UNWIND=y
+CONFIG_PBL_IMAGE=y
+CONFIG_MMU=y
+CONFIG_TEXT_BASE=0x8fc0
+CONFIG_MALLOC_SIZE=0x4000
+CONFIG_MALLOC_TLSF=y
+CONFIG_KALLSYMS=y
+CONFIG_LONGHELP=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/dmo-mx6-realq7/env"
+CONFIG_RESET_SOURCE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_OFTREE_PROBE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_WD=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_NFS=y
+CONFIG_NET_PING=y
+CONFIG_NET_RESOLV=y
+CONFIG_DRIVER_NET_FEC_IMX=y
+CONFIG_DRIVER_SPI_IMX=y
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
+CONFIG_DISK_AHCI=y
+CONFIG_DISK_AHCI_IMX=y
+CONFIG_MCI=y
+CONFIG_MCI_IMX_ESDHC=y
+CONFIG_MFD_STMPE=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_IMX=y
+CONFIG_GPIO_STMPE=y
+CONFIG_FS_TFTP=y
+CONFIG_FS_NFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_WRITE=y
+CONFIG_FS_FAT_LFN=y
-- 
1.8.2.rc2


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[PATCH 1/4] net: phy: micrel: Update id table from kernel

[Sascha Hauer]

To get more phy ids.

Signed-off-by: Sascha Hauer 
---
 include/linux/micrel_phy.h | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
index adfe8c0..9dbb41a 100644
--- a/include/linux/micrel_phy.h
+++ b/include/linux/micrel_phy.h
@@ -21,8 +21,15 @@
 #define PHY_ID_KSZ8021 0x00221555
 #define PHY_ID_KSZ8041 0x00221510
 #define PHY_ID_KSZ8051 0x00221550
-/* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */
+/* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
 #define PHY_ID_KSZ8001 0x0022161A
+/* same id: KS8081, KS8091 */
+#define PHY_ID_KSZ8081 0x00221560
+#define PHY_ID_KSZ8061 0x00221570
+#define PHY_ID_KSZ9031 0x00221620
+
+#define PHY_ID_KSZ886X 0x00221430
+#define PHY_ID_KSZ8863 0x00221435
 
 /* struct phy_device dev_flags definitions */
 #define MICREL_PHY_50MHZ_CLK   0x0001
-- 
1.8.2.rc2


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Re: [PATCH] net: fec: Use standard phy type defines

[Sascha Hauer]

On Sun, Mar 10, 2013 at 02:17:57PM +0100, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
> On 12:03 Sat 09 Mar , Sascha Hauer wrote:
> > I've never seen a board using sevenwire, so remove this from
> > the fec driver. Also, since we now have standard phy type
> > defines in include/linux/phy.h, use them in the fec platform_data
> > instead of a fec specific enum.
> 
> drop the phy_init too

Can do in a later patch.

Sascha

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