Re: [PATCH for next] PCM051: Fixup DDRPLL
On Thu, Aug 29, 2013 at 02:54:15PM +0200, Teresa Gámez wrote: > The correct DDRPLL for PCM051 is 303MHz. > > Signed-off-by: Teresa Gámez Applied, thanks Sascha > --- > As the board runs also fine with 266MHz. There > is no need to fix it in master. > > arch/arm/boards/pcm051/lowlevel.c |2 +- > arch/arm/mach-omap/include/mach/am33xx-clock.h |1 + > 2 files changed, 2 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/boards/pcm051/lowlevel.c > b/arch/arm/boards/pcm051/lowlevel.c > index 078e83b..48578cd 100644 > --- a/arch/arm/boards/pcm051/lowlevel.c > +++ b/arch/arm/boards/pcm051/lowlevel.c > @@ -68,7 +68,7 @@ static int pcm051_board_init(void) > if (running_in_sdram()) > return 0; > > - pll_init(MPUPLL_M_600, 25, DDRPLL_M_266); > + pll_init(MPUPLL_M_600, 25, DDRPLL_M_303); > > am335x_sdram_init(0x18B, &MT41J256M8HX15E_2x256M8_cmd, > &MT41J256M8HX15E_2x256M8_regs, > diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h > b/arch/arm/mach-omap/include/mach/am33xx-clock.h > index b3c7519..ecd90b2 100644 > --- a/arch/arm/mach-omap/include/mach/am33xx-clock.h > +++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h > @@ -49,6 +49,7 @@ > /* DDR Freq is 266 MHZ for now*/ > /* Set Fdll = 400 MHZ , Fdll = M * 2 * CLKINP/ N + 1; clkout = Fdll /(2 * > M2) */ > #define DDRPLL_M_266 266 > +#define DDRPLL_M_303 303 > #define DDRPLL_M_400 400 > #define DDRPLL_N (OSC - 1) > #define DDRPLL_M21 > -- > 1.7.0.4 > > > ___ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] net/phy: support of mmd register read and write
On Fri, Aug 30, 2013 at 10:01:20AM +0200, Jan Weitzel wrote:
> Add function for indirect access of the mmd registers, based on linux.
> phy_read_mmd_indirect
> phy_write_mmd_indirect
>
> Also clean some private mmd functions
>
> Signed-off-by: Jan Weitzel
Applied, thanks
Sascha
> ---
> arch/arm/boards/dmo-mx6-realq7/board.c | 14 ++--
> arch/arm/boards/tqma6x/board.c | 14 ++--
> drivers/net/phy/phy.c | 63
>
> include/linux/phy.h|4 ++
> 4 files changed, 73 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/boards/dmo-mx6-realq7/board.c
> b/arch/arm/boards/dmo-mx6-realq7/board.c
> index 69d93f8..628f5cb 100644
> --- a/arch/arm/boards/dmo-mx6-realq7/board.c
> +++ b/arch/arm/boards/dmo-mx6-realq7/board.c
> @@ -58,23 +58,15 @@ static iomux_v3_cfg_t realq7_pads_gpio[] = {
> MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
> };
>
> -static void mmd_write_reg(struct phy_device *dev, int device, int reg, int
> val)
> -{
> - phy_write(dev, 0x0d, device);
> - phy_write(dev, 0x0e, reg);
> - phy_write(dev, 0x0d, (1 << 14) | device);
> - phy_write(dev, 0x0e, val);
> -}
> -
> static int ksz9031rn_phy_fixup(struct phy_device *dev)
> {
> /*
>* min rx data delay, max rx/tx clock delay,
>* min rx/tx control delay
>*/
> - mmd_write_reg(dev, 2, 4, 0);
> - mmd_write_reg(dev, 2, 5, 0);
> - mmd_write_reg(dev, 2, 8, 0x003ff);
> + phy_write_mmd_indirect(dev, 4, 2, 0);
> + phy_write_mmd_indirect(dev, 5, 2, 0);
> + phy_write_mmd_indirect(dev, 8, 2, 0x03ff);
>
> return 0;
> }
> diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c
> index 9e81a1d..3e051a5 100644
> --- a/arch/arm/boards/tqma6x/board.c
> +++ b/arch/arm/boards/tqma6x/board.c
> @@ -58,23 +58,15 @@ static iomux_v3_cfg_t tqma6x_pads_gpio[] = {
> MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
> };
>
> -static void mmd_write_reg(struct phy_device *dev, int device, int reg, int
> val)
> -{
> - phy_write(dev, 0x0d, device);
> - phy_write(dev, 0x0e, reg);
> - phy_write(dev, 0x0d, (1 << 14) | device);
> - phy_write(dev, 0x0e, val);
> -}
> -
> static int ksz9031rn_phy_fixup(struct phy_device *dev)
> {
> /*
>* min rx data delay, max rx/tx clock delay,
>* min rx/tx control delay
>*/
> - mmd_write_reg(dev, 2, 4, 0);
> - mmd_write_reg(dev, 2, 5, 0);
> - mmd_write_reg(dev, 2, 8, 0x003ff);
> + phy_write_mmd_indirect(dev, 4, 2, 0);
> + phy_write_mmd_indirect(dev, 5, 2, 0);
> + phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
>
> return 0;
> }
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index 112ff13..db00e38 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -632,6 +632,69 @@ int genphy_read_status(struct phy_device *phydev)
> return 0;
> }
>
> +static inline void mmd_phy_indirect(struct phy_device *phydev, int prtad,
> + int devad)
> +{
> + /* Write the desired MMD Devad */
> + phy_write(phydev, MII_MMD_CTRL, devad);
> +
> + /* Write the desired MMD register address */
> + phy_write(phydev, MII_MMD_DATA, prtad);
> +
> + /* Select the Function : DATA with no post increment */
> + phy_write(phydev, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
> +}
> +
> +/**
> + * phy_read_mmd_indirect - reads data from the MMD registers
> + * @phy_device: phy device
> + * @prtad: MMD Address
> + * @devad: MMD DEVAD
> + *
> + * Description: it reads data from the MMD registers (clause 22 to access to
> + * clause 45) of the specified phy address.
> + * To read these register we have:
> + * 1) Write reg 13 // DEVAD
> + * 2) Write reg 14 // MMD Address
> + * 3) Write reg 13 // MMD Data Command for MMD DEVAD
> + * 3) Read reg 14 // Read MMD data
> + */
> +int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
> +{
> + u32 ret;
> +
> + mmd_phy_indirect(phydev, prtad, devad);
> +
> + /* Read the content of the MMD's selected register */
> + ret = phy_read(phydev, MII_MMD_DATA);
> +
> + return ret;
> +}
> +
> +/**
> + * phy_write_mmd_indirect - writes data to the MMD registers
> + * @phy_device: phy device
> + * @prtad: MMD Address
> + * @devad: MMD DEVAD
> + * @data: data to write in the MMD register
> + *
> + * Description: Write data from the MMD registers of the specified
> + * phy address.
> + * To write these register we have:
> + * 1) Write reg 13 // DEVAD
> + * 2) Write reg 14 // MMD Address
> + * 3) Write reg 13 // MMD Data Command for MMD DEVAD
> + * 3) Write reg 14 // Write MMD data
> + */
> +void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
> +u16 data)
> +{
> + mmd_phy_indirect(phydev, prtad, devad);
> +
> + /* Write the data into MMD's selected register */
> + phy_write(phydev, MII_MMD_DATA, data);
Re: [PATCHi v2] i2c-omap: fix am33xx and omap3 fclk_rate
On Fri, Aug 30, 2013 at 02:45:32PM +0200, Jan Weitzel wrote:
> commit f64ed12b accidentally swap fclk_rate from am33xx and omap3.
> Revert this change.
>
> Signed-off-by: Jan Weitzel
Applied, thanks
Sascha
> ---
> v2:
> Fix also omap3 fclk_rate
> Rename patch "i2c-omap: fix am33xx fclk_rate"
>
> drivers/i2c/busses/i2c-omap.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index b2a74c0..2eb5133 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -246,7 +246,7 @@ struct omap_i2c_driver_data {
> static struct omap_i2c_driver_data omap3_data = {
> .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
> OMAP_I2C_FLAG_BUS_SHIFT_2,
> - .fclk_rate =48000,
> + .fclk_rate =96000,
> .regs = (u8 *) reg_map,
> };
>
> @@ -259,7 +259,7 @@ static struct omap_i2c_driver_data omap4_data = {
> static struct omap_i2c_driver_data am33xx_data = {
> .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
> OMAP_I2C_FLAG_BUS_SHIFT_NONE,
> - .fclk_rate =96000,
> + .fclk_rate =48000,
> .regs = (u8 *) omap4_reg_map,
> };
>
> --
> 1.7.0.4
>
>
> ___
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/1] arm: mmu: catch NULL pointer dereferences
For high vectors if memory start at 0x0. We have to
live without being able to catch NULL pointer dereferences.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/cpu/mmu.c | 27 +--
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index e3ea3b6..2e69b16 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -218,9 +218,9 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
/*
* Map vectors and zero page
*/
-static void vectors_init(void)
+static void vectors_init(bool zero_valid_addr)
{
- u32 *exc, *zero = NULL;
+ u32 *exc;
void *vectors;
u32 cr;
@@ -235,10 +235,19 @@ static void vectors_init(void)
* page table for the high vectors and zero page
*/
exc = arm_create_pte(0xfff0);
- zero = arm_create_pte(0x0);
- /* Set the zero page to faulting */
- zero[0] = 0;
+ /*
+* Memory start at 0x0. We have to
+* live without being able to catch NULL pointer dereferences
+*/
+ if (!zero_valid_addr) {
+ u32 *zero = NULL;
+
+ zero = arm_create_pte(0x0);
+
+ /* Set the zero page to faulting */
+ zero[0] = 0;
+ }
} else {
/*
* Otherwise map the vectors to the zero page. We have to
@@ -267,6 +276,7 @@ static int mmu_init(void)
{
struct memory_bank *bank;
int i;
+ bool is_start_zero = 0;
arm_set_cache_functions();
@@ -303,7 +313,12 @@ static int mmu_init(void)
create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
PMD_TYPE_SECT);
- vectors_init();
+ for_each_memory_bank(bank) {
+ if (bank->start == 0x0)
+ is_start_zero = 1;
+ }
+
+ vectors_init(is_start_zero);
/*
* First remap sdram cached using sections.
--
1.8.4.rc1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/1] bootm: add global bootm.{image/initrd}.loadaddr support
To be able to pass the loadaddr of the image and the initrd.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
commands/bootm.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/commands/bootm.c b/commands/bootm.c
index 6ce2ca9..60c2ece 100644
--- a/commands/bootm.c
+++ b/commands/bootm.c
@@ -241,6 +241,19 @@ static char *bootm_image_name_and_no(const char *name, int
*no)
#define BOOTM_OPTS BOOTM_OPTS_COMMON
#endif
+unsigned long long getenv_loadaddr(const char *name)
+{
+ const char *valstr = getenv(name);
+
+ if (!valstr)
+ return UIMAGE_SOME_ADDRESS;
+
+ if (valstr[0] == '\0')
+ return UIMAGE_SOME_ADDRESS;
+
+ return simple_strtoull(valstr, NULL, 0);
+}
+
static int do_bootm(int argc, char *argv[])
{
int opt;
@@ -260,6 +273,8 @@ static int do_bootm(int argc, char *argv[])
oftree = getenv("global.bootm.oftree");
os_file = getenv("global.bootm.image");
+ data.os_address = getenv_loadaddr("global.bootm.image.loadaddr");
+ data.initrd_address = getenv_loadaddr("global.bootm.initrd.loadaddr");
if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD))
initrd_file = getenv("global.bootm.initrd");
@@ -436,9 +451,12 @@ static int bootm_init(void)
{
globalvar_add_simple("bootm.image");
+ globalvar_add_simple("bootm.image.loadaddr");
globalvar_add_simple("bootm.oftree");
- if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD))
+ if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD)) {
globalvar_add_simple("bootm.initrd");
+ globalvar_add_simple("bootm.initrd.loadaddr");
+ }
return 0;
}
@@ -470,7 +488,9 @@ BAREBOX_CMD_END
BAREBOX_MAGICVAR(bootargs, "Linux Kernel parameters");
BAREBOX_MAGICVAR_NAMED(global_bootm_image, global.bootm.image, "bootm default
boot image");
+BAREBOX_MAGICVAR_NAMED(global_bootm_image_loadaddr,
global.bootm.image.loadaddr, "bootm default boot image loadaddr");
BAREBOX_MAGICVAR_NAMED(global_bootm_initrd, global.bootm.initrd, "bootm
default initrd");
+BAREBOX_MAGICVAR_NAMED(global_bootm_initrd_loadaddr,
global.bootm.initrd.loadaddr, "bootm default initrd loadaddr");
static struct binfmt_hook binfmt_uimage_hook = {
.type = filetype_uimage,
--
1.8.4.rc1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
