[PATCH 1/3] ARM: i.MX DFI FS700-M60: Add SPI NOR flash support
Signed-off-by: Sascha Hauer
---
arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi
b/arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi
index 04bb213..67b2138 100644
--- a/arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -31,6 +31,22 @@
};
};
+&ecspi3 {
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio4 24 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3_1>, <&pinctrl_ecspi3_cs>;
+ status = "okay";
+
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25vf040b", "m25p80";
+ spi-max-frequency = <2000>;
+ reg = <0>;
+ };
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>;
@@ -53,6 +69,14 @@
>;
};
};
+
+ ecspi3 {
+ pinctrl_ecspi3_cs: ecspi3_csgrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x8000 /*
SPI NOR chipselect */
+ >;
+ };
+ };
};
&i2c2 {
--
1.8.5.2
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[PATCH 3/3] ARM: i.MX DFI FS700-M60: Update for new boards
This adds support for new board variants. Now Supported are:
- i.MX6q module with 1GiB Micron RAM
- i.MX6d/q modules with 1GiB/2GiB Nanya RAM
- i.MX6s modules with 512MiB/1GiB Nanya RAM
This has been tested on:
- i.MX6q module with 1GiB Micron RAM
- i.MX6d module with 2GiB Nanya RAM
- i.MX6s module with 1GiB Nanya RAM
The possible RAM equipment is:
- For the 512MiB module: 2x Nanya nt5cb128m16fp-di
- For the 1GiB modules: 2x Nanya nt5cc256m16cp or 4x Micron MT41K128M16JT-125
- For the 2GiB module: 4x Nanya nt5cc256m16cp
The 512MiB Nanya board is assumed to work with the same DCD table
as the 1GiB Nanya board. The variant is detected by mirroring at
512MiB, but this hasn't been tested by Pengutronix.
Signed-off-by: Sascha Hauer
---
arch/arm/boards/dfi-fs700-m60/Makefile | 5 +-
arch/arm/boards/dfi-fs700-m60/board.c | 31 +
.../flash-header-fs700-m60-6q-micron.imxcfg| 104 +
.../flash-header-fs700-m60-6q-nanya.imxcfg | 102
.../dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg | 128 -
.../dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg | 40 +++
arch/arm/boards/dfi-fs700-m60/lowlevel.c | 71 +++-
arch/arm/dts/imx6qdl-dfi-fs700-m60.dtsi| 4 -
images/Makefile.imx| 15 ++-
9 files changed, 339 insertions(+), 161 deletions(-)
create mode 100644
arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
create mode 100644
arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg
delete mode 100644
arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg
diff --git a/arch/arm/boards/dfi-fs700-m60/Makefile
b/arch/arm/boards/dfi-fs700-m60/Makefile
index 28d4f29..2d0ec7c 100644
--- a/arch/arm/boards/dfi-fs700-m60/Makefile
+++ b/arch/arm/boards/dfi-fs700-m60/Makefile
@@ -1,5 +1,4 @@
obj-y += board.o
-obj-y += flash-header-fs700-m60-6s.dcd.o flash-header-fs700-m60-6q.dcd.o
-extra-y += flash-header-fs700-m60-6s.dcd.S flash-header-fs700-m60-6q.dcd.S
-extra-y += flash-header-fs700-m60-6s.dcd flash-header-fs700-m60-6q.dcd
+extra-y += flash-header-fs700-m60-6s.dcd.S
flash-header-fs700-m60-6q-nanya.dcd.S flash-header-fs700-m60-6q-micron.dcd.S
+extra-y += flash-header-fs700-m60-6s.dcd flash-header-fs700-m60-6q-nanya.dcd
flash-header-fs700-m60-6q-micron.dcd
lwl-y += lowlevel.o
diff --git a/arch/arm/boards/dfi-fs700-m60/board.c
b/arch/arm/boards/dfi-fs700-m60/board.c
index 7544ec1..cefb6ce 100644
--- a/arch/arm/boards/dfi-fs700-m60/board.c
+++ b/arch/arm/boards/dfi-fs700-m60/board.c
@@ -39,6 +39,37 @@
#include
#include
+/*
+ * This board can have 512MiB, 1GiB or 2GiB of SDRAM. The actual amount of
SDRAM
+ * is detected using mirror detection in lowlevel init and is stored in the
first
+ * SDRAM address from the lowlevel code.
+ */
+static int dfi_fs700_m60_mem_init(void)
+{
+ u32 memsize;
+
+ if (!of_machine_is_compatible("dfi,fs700-m60"))
+ return 0;
+
+ memsize = *(u32 *)0x1000;
+
+ /* play safe if we find some corrupted amount of SDRAM */
+ switch (memsize) {
+ case SZ_512M:
+ case SZ_1G:
+ case SZ_2G:
+ break;
+ default:
+ pr_err("unknown SDRAM size 0x%08x defaulting to 512MiB\n",
memsize);
+ memsize = SZ_512M;
+ }
+
+ arm_add_mem_device("ram0", 0x1000, memsize);
+
+ return 0;
+}
+mem_initcall(dfi_fs700_m60_mem_init);
+
static int ar8031_phy_fixup(struct phy_device *dev)
{
u16 val;
diff --git
a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
new file mode 100644
index 000..835d0c7
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
@@ -0,0 +1,104 @@
+loadaddr 0x2780
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020e050c 0x0030
+wm 32 0x020e0510 0x00020030
+wm 32 0x020e0514 0x00020030
+wm 32 0x020e0518 0x0030
+wm 32 0x020e051c 0x0030
+wm 32 0x020e0520 0x00020030
+wm 32 0x020e0524 0x0030
+wm 32 0x020e0528 0x00020030
+wm 32 0x020e056c 0x00020030
+wm 32 0x020e0578 0x00020030
+wm 32 0x020e057c 0x00020030
+wm 32 0x020e0588 0x00020030
+wm 32 0x020e058c 0x
+wm 32 0x020e0590 0x3000
+wm 32 0x020e0594 0x00020030
+wm 32 0x020e0598 0x3000
+wm 32 0x020e059c 0x3030
+wm 32 0x020e05a0 0x3030
+wm 32 0x020e05a8 0x0030
+wm 32 0x020e05ac 0x00020030
+wm 32 0x020e05b0 0x0030
+wm 32 0x020e05b4 0x00020030
+wm 32 0x020e05bc 0x00020030
+wm 32 0x020e05b8 0x0030
+wm 32 0x020e05c0 0x0030
+wm 32 0x020e05c4 0x00020030
+wm 32 0x020e0748 0x0030
+wm 32 0x020e074c 0x0030
+wm 32 0x020e0750 0x0002
+wm 32 0x020e0758 0x
+wm 32 0x020e0774 0x0002
+wm 32 0x020e0784 0x0030
+wm 32 0x020e0788 0x0030
+wm 32 0x020e078c 0x0030
+wm 32 0x020e0794 0x0030
+wm 32 0x020e0798 0x000c
+w
[PATCH 2/3] ARM: i.MX DFI FS700-M60: Add SPI NOR flash update handler
Signed-off-by: Sascha Hauer
Conflicts:
arch/arm/boards/dfi-fs700-m60/board.c
---
arch/arm/boards/dfi-fs700-m60/board.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/dfi-fs700-m60/board.c
b/arch/arm/boards/dfi-fs700-m60/board.c
index 96f1b0e..7544ec1 100644
--- a/arch/arm/boards/dfi-fs700-m60/board.c
+++ b/arch/arm/boards/dfi-fs700-m60/board.c
@@ -19,6 +19,9 @@
#define pr_fmt(fmt) "dfi-fs700-m60: " fmt
#include
+#include
+#include
+#include
#include
#include
#include
@@ -64,13 +67,22 @@ static int ar8031_phy_fixup(struct phy_device *dev)
static int dfi_fs700_m60_init(void)
{
+ unsigned flag_spi = 0, flag_mmc = 0;
+
if (!of_machine_is_compatible("dfi,fs700-m60"))
return 0;
phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
ar8031_phy_fixup);
+ if (bootsource_get() == BOOTSOURCE_SPI)
+ flag_spi |= BBU_HANDLER_FLAG_DEFAULT;
+ else
+ flag_mmc |= BBU_HANDLER_FLAG_DEFAULT;
+
imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc3.boot0",
- BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0);
+ flag_mmc, NULL, 0, 0);
+ imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0",
+ flag_spi, NULL, 0, 0);
armlinux_set_architecture(MACH_TYPE_MX6Q_SABRESD);
--
1.8.5.2
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Re: [PATCH 1/2] mci: Support the correct version for eMMC
On Fri, Jan 10, 2014 at 10:05:32AM +0100, Markus Niebel wrote: > From: Markus Niebel > > eMMC is available up to version 4.5 but the > correct version is not decoded. Change version > definitions to support more minor verions, add > missing versions and parse the minor versions from > ext_csd. > > After this, card detection code and devinfo reports > correct versions. > > Handling is inspired by u-boot code. > > Signed-off-by: Markus Niebel Applied, thanks I also stumbled upon the wrong production dates. Thanks for finxing. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/3] mci: add DSR support
Hello Sascha,
Am 10.01.2014 12:18, wrote Sascha Hauer:
> Hi Markus,
>
> On Fri, Jan 10, 2014 at 10:29:49AM +0100, Markus Niebel wrote:
>> From: Markus Niebel
>>
>> The eMMC and the SD-Card specifications describe the optional SET_DSR
>> command.
>> During measurements at our lab we found that some cards implementing this
>> feature
>> having really strong driver strengts per default. This can lead to voltage
>> peaks
>> above the specification of the host on signal edges for data sent from a
>> card to
>> the host.
>>
>> Since availability of a given card type may be shorter than the time a
>> certain
>> hardware will be produced it is useful to have support for this command
>> (Alternative
>> would be changing termination resistors and adapting the driver strength of
>> the
>> host to the used card.)
>
> So not all cards support this command. Have you tested it with cards
> that do not support it to make sure they still work? With eMMC you know
> at board level whether or not this command is supported, but with SD
> cards you don't.
>
No tests done with SD-cards (SD card spec states, that DSR can be implemented,
but we found no card, that implements this feature).
On the eMMC side we did tests with TQMa53 (barebox and u-boot) and TQMa6
(u-boot only) and also with i.MX28 based platform:
if a card does not support DSR - CMD4 is never sent
if a card supports DSR but board does not activate the feature - CMD4 is never
sent
if a card supports DSR and board code requests the feature - CMD4 is sent with
the
configured value.
Would it be a good idea to document the feature as intended for non removable
cards
where the exact value is known?
> Sascha
>
Markus
>>
>> Signed-off-by: Markus Niebel
>> ---
>> drivers/mci/mci-core.c | 27 +++
>> include/mci.h |3 +++
>> 2 files changed, 30 insertions(+)
>>
>> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
>> index a232679..2c91ff2 100644
>> --- a/drivers/mci/mci-core.c
>> +++ b/drivers/mci/mci-core.c
>> @@ -102,6 +102,20 @@ static void mci_setup_cmd(struct mci_cmd *p, unsigned
>> cmd, unsigned arg, unsigne
>> }
>>
>> /**
>> + * configure optional DSR value
>> + * @param mci_dev MCI instance
>> + * @return Transaction status (0 on success)
>> + */
>> +static int mci_set_dsr(struct mci *mci)
>> +{
>> +struct mci_cmd cmd;
>> +
>> +mci_setup_cmd(&cmd, MMC_CMD_SET_DSR,
>> +(mci->host->dsr_val >> 16) | 0x, MMC_RSP_NONE);
>> +return mci_send_cmd(mci, &cmd, NULL);
>> +}
>> +
>> +/**
>> * Setup SD/MMC card's blocklength to be used for future transmitts
>> * @param mci_dev MCI instance
>> * @param len Blocklength in bytes
>> @@ -836,6 +850,15 @@ static void mci_extract_card_capacity_from_csd(struct
>> mci *mci)
>> dev_dbg(&mci->dev, "Capacity: %u MiB\n", (unsigned)(mci->capacity >>
>> 20));
>> }
>>
>> +/**
>> + * Extract card's DSR implementation state from CSD
>> + * @param mci MCI instance
>> + */
>> +static void mci_extract_card_dsr_imp_from_csd(struct mci *mci)
>> +{
>> +mci->dsr_imp = UNSTUFF_BITS(mci->csd, 76, 1);
>> +}
>> +
>> static int mmc_compare_ext_csds(struct mci *mci, unsigned bus_width)
>> {
>> u8 *bw_ext_csd;
>> @@ -1058,6 +1081,7 @@ static int mci_startup(struct mci *mci)
>> mci_detect_version_from_csd(mci);
>> mci_extract_max_tran_speed_from_csd(mci);
>> mci_extract_block_lengths_from_csd(mci);
>> +mci_extract_card_dsr_imp_from_csd(mci);
>>
>> /* sanitiy? */
>> if (mci->read_bl_len > SECTOR_SIZE) {
>> @@ -1074,6 +1098,9 @@ static int mci_startup(struct mci *mci)
>> dev_dbg(&mci->dev, "Read block length: %u, Write block length: %u\n",
>> mci->read_bl_len, mci->write_bl_len);
>>
>> +if (mci->dsr_imp && mci->host->use_dsr)
>> +mci_set_dsr(mci);
>> +
>> if (!mmc_host_is_spi(host)) { /* cmd not supported in spi */
>> dev_dbg(&mci->dev, "Select the card, and put it into Transfer
>> Mode\n");
>> /* Select the card, and put it into Transfer Mode */
>> diff --git a/include/mci.h b/include/mci.h
>> index 0f10e8a..d3a553e 100644
>> --- a/include/mci.h
>> +++ b/include/mci.h
>> @@ -294,6 +294,8 @@ struct mci_host {
>> unsigned clock; /**< Current clock used to talk to the card */
>> unsigned bus_width; /**< used data bus width to the card */
>> unsigned max_req_size;
>> +unsigned dsr_val; /**< optional dsr value */
>> +int use_dsr;/**< optional dsr usage flag */
>>
>> /** init the host interface */
>> int (*init)(struct mci_host*, struct device_d*);
>> @@ -344,6 +346,7 @@ struct mci {
>> unsigned write_bl_len;
>> uint64_t capacity; /**< Card's data capacity in bytes */
>> int ready_for_use; /** true if already probed */
>> +int dsr_imp;/**< DSR implementation state from CSD */
>> char *ext_csd;
>> int probe;
>> struct
Re: [PATCH 1/3] mci: add DSR support
Hi Markus,
On Fri, Jan 10, 2014 at 10:29:49AM +0100, Markus Niebel wrote:
> From: Markus Niebel
>
> The eMMC and the SD-Card specifications describe the optional SET_DSR command.
> During measurements at our lab we found that some cards implementing this
> feature
> having really strong driver strengts per default. This can lead to voltage
> peaks
> above the specification of the host on signal edges for data sent from a card
> to
> the host.
>
> Since availability of a given card type may be shorter than the time a certain
> hardware will be produced it is useful to have support for this command
> (Alternative
> would be changing termination resistors and adapting the driver strength of
> the
> host to the used card.)
So not all cards support this command. Have you tested it with cards
that do not support it to make sure they still work? With eMMC you know
at board level whether or not this command is supported, but with SD
cards you don't.
Sascha
>
> Signed-off-by: Markus Niebel
> ---
> drivers/mci/mci-core.c | 27 +++
> include/mci.h |3 +++
> 2 files changed, 30 insertions(+)
>
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index a232679..2c91ff2 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -102,6 +102,20 @@ static void mci_setup_cmd(struct mci_cmd *p, unsigned
> cmd, unsigned arg, unsigne
> }
>
> /**
> + * configure optional DSR value
> + * @param mci_dev MCI instance
> + * @return Transaction status (0 on success)
> + */
> +static int mci_set_dsr(struct mci *mci)
> +{
> + struct mci_cmd cmd;
> +
> + mci_setup_cmd(&cmd, MMC_CMD_SET_DSR,
> + (mci->host->dsr_val >> 16) | 0x, MMC_RSP_NONE);
> + return mci_send_cmd(mci, &cmd, NULL);
> +}
> +
> +/**
> * Setup SD/MMC card's blocklength to be used for future transmitts
> * @param mci_dev MCI instance
> * @param len Blocklength in bytes
> @@ -836,6 +850,15 @@ static void mci_extract_card_capacity_from_csd(struct
> mci *mci)
> dev_dbg(&mci->dev, "Capacity: %u MiB\n", (unsigned)(mci->capacity >>
> 20));
> }
>
> +/**
> + * Extract card's DSR implementation state from CSD
> + * @param mci MCI instance
> + */
> +static void mci_extract_card_dsr_imp_from_csd(struct mci *mci)
> +{
> + mci->dsr_imp = UNSTUFF_BITS(mci->csd, 76, 1);
> +}
> +
> static int mmc_compare_ext_csds(struct mci *mci, unsigned bus_width)
> {
> u8 *bw_ext_csd;
> @@ -1058,6 +1081,7 @@ static int mci_startup(struct mci *mci)
> mci_detect_version_from_csd(mci);
> mci_extract_max_tran_speed_from_csd(mci);
> mci_extract_block_lengths_from_csd(mci);
> + mci_extract_card_dsr_imp_from_csd(mci);
>
> /* sanitiy? */
> if (mci->read_bl_len > SECTOR_SIZE) {
> @@ -1074,6 +1098,9 @@ static int mci_startup(struct mci *mci)
> dev_dbg(&mci->dev, "Read block length: %u, Write block length: %u\n",
> mci->read_bl_len, mci->write_bl_len);
>
> + if (mci->dsr_imp && mci->host->use_dsr)
> + mci_set_dsr(mci);
> +
> if (!mmc_host_is_spi(host)) { /* cmd not supported in spi */
> dev_dbg(&mci->dev, "Select the card, and put it into Transfer
> Mode\n");
> /* Select the card, and put it into Transfer Mode */
> diff --git a/include/mci.h b/include/mci.h
> index 0f10e8a..d3a553e 100644
> --- a/include/mci.h
> +++ b/include/mci.h
> @@ -294,6 +294,8 @@ struct mci_host {
> unsigned clock; /**< Current clock used to talk to the card */
> unsigned bus_width; /**< used data bus width to the card */
> unsigned max_req_size;
> + unsigned dsr_val; /**< optional dsr value */
> + int use_dsr;/**< optional dsr usage flag */
>
> /** init the host interface */
> int (*init)(struct mci_host*, struct device_d*);
> @@ -344,6 +346,7 @@ struct mci {
> unsigned write_bl_len;
> uint64_t capacity; /**< Card's data capacity in bytes */
> int ready_for_use; /** true if already probed */
> + int dsr_imp;/**< DSR implementation state from CSD */
> char *ext_csd;
> int probe;
> struct param_d *param_probe;
> --
> 1.7.9.5
>
>
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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[PATCH 2/8] bootm: introduce bootm_load_os helper
The common bootm code used to load uImage contents to SDRAM
before calling into the handlers if possible. This makes the
handlers complicated since they have to handle many cases. Instead,
introduce a helper to load the os after the handlers have figured
out a good load address.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 24 ++-
arch/blackfin/lib/blackfin_linux.c | 6 +++--
arch/nios2/lib/bootm.c | 6 +++--
arch/ppc/lib/ppclinux.c| 6 +++--
common/bootm.c | 49 +++---
include/boot.h | 2 ++
6 files changed, 61 insertions(+), 32 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index c0e4e15..7401f2f 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -28,32 +28,22 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
unsigned long initrd_start = 0, initrd_size = 0, initrd_end = 0;
struct memory_bank *bank;
unsigned long load_address;
+ int ret;
- if (data->os_res) {
- load_address = data->os_res->start;
- } else if (data->os_address != UIMAGE_INVALID_ADDRESS) {
- load_address = data->os_address;
- } else {
+ if (data->os_address == UIMAGE_INVALID_ADDRESS) {
bank = list_first_entry(&memory_banks,
struct memory_bank, list);
load_address = bank->start + SZ_32K;
if (bootm_verbose(data))
printf("no os load address, defaulting to 0x%08lx\n",
load_address);
+ } else {
+ load_address = data->os_address;
}
- if (!data->os_res && data->os) {
- data->os_res = uimage_load_to_sdram(data->os,
- data->os_num, load_address);
- if (!data->os_res)
- return -ENOMEM;
- }
-
- if (!data->os_res) {
- data->os_res = file_to_sdram(data->os_file, load_address);
- if (!data->os_res)
- return -ENOMEM;
- }
+ ret = bootm_load_os(data, load_address);
+ if (ret)
+ return ret;
kernel = data->os_res->start + data->os_entry;
diff --git a/arch/blackfin/lib/blackfin_linux.c
b/arch/blackfin/lib/blackfin_linux.c
index bb3c774..2561a7e 100644
--- a/arch/blackfin/lib/blackfin_linux.c
+++ b/arch/blackfin/lib/blackfin_linux.c
@@ -41,9 +41,11 @@ static int do_bootm_linux(struct image_data *idata)
int (*appl)(char *cmdline);
const char *cmdline = linux_bootargs_get();
char *cmdlinedest = (char *) CMD_LINE_ADDR;
+ int ret;
- if (!idata->os_res)
- return -EINVAL;
+ ret = bootm_load_os(idata, idata->os_address);
+ if (ret)
+ return ret;
appl = (void *)(idata->os_address + idata->os_entry);
printf("Starting Kernel at 0x%p\n", appl);
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index cc96290..77da119 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -36,9 +36,11 @@ static int do_bootm_linux(struct image_data *idata)
{
void (*kernel)(int, int, int, const char *);
const char *commandline = linux_bootargs_get();
+ int ret;
- if (!idata->os_res)
- return -EINVAL;
+ ret = bootm_load_os(idata, idata->os_address);
+ if (ret)
+ return ret;
kernel = (void *)(idata->os_address + idata->os_entry);
diff --git a/arch/ppc/lib/ppclinux.c b/arch/ppc/lib/ppclinux.c
index 7c30ac3..e25efec 100644
--- a/arch/ppc/lib/ppclinux.c
+++ b/arch/ppc/lib/ppclinux.c
@@ -47,9 +47,11 @@ static int do_bootm_linux(struct image_data *data)
{
void(*kernel)(void *, void *, unsigned long,
unsigned long, unsigned long);
+ int ret;
- if (!data->os_res)
- return -EINVAL;
+ ret = bootm_load_os(data, data->os_address);
+ if (ret)
+ return ret;
data->oftree = of_get_fixed_tree(data->of_root_node);
if (!data->oftree) {
diff --git a/common/bootm.c b/common/bootm.c
index 2da6e59..5ad10d9 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -45,6 +45,46 @@ static struct image_handler *bootm_find_handler(enum
filetype filetype,
return NULL;
}
+/*
+ * bootm_load_os() - load OS to RAM
+ *
+ * @data: image data context
+ * @load_address: The address where the OS should be loaded to
+ *
+ * This loads the OS to a RAM location. load_address must be a valid
+ * address. If the image_data doesn't have a OS specified it's considered
+ * an error.
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+int bootm_load_os(struct image_data *data, unsigned long load_address)
+{
+ if (data->os_res)
+ return 0;
+
+ if (load
[PATCH 3/8] ARM: bootm: move os loading to do_bootm_linux
__do_bootm_linux is called from the uImage, zImage and raw handlers.
In case of the zImage handler the kernel will already be loaded and
the kernel load code in __do_bootm_linux will do nothing. Move the
loading code to do_bootm_linux so that __do_bootm_linux will always
be called with the kernel already loaded.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 37 +++--
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 7401f2f..6f84cb3 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -26,24 +26,6 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
{
unsigned long kernel;
unsigned long initrd_start = 0, initrd_size = 0, initrd_end = 0;
- struct memory_bank *bank;
- unsigned long load_address;
- int ret;
-
- if (data->os_address == UIMAGE_INVALID_ADDRESS) {
- bank = list_first_entry(&memory_banks,
- struct memory_bank, list);
- load_address = bank->start + SZ_32K;
- if (bootm_verbose(data))
- printf("no os load address, defaulting to 0x%08lx\n",
- load_address);
- } else {
- load_address = data->os_address;
- }
-
- ret = bootm_load_os(data, load_address);
- if (ret)
- return ret;
kernel = data->os_res->start + data->os_entry;
@@ -104,6 +86,25 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
static int do_bootm_linux(struct image_data *data)
{
+ struct memory_bank *bank;
+ unsigned long load_address;
+ int ret;
+
+ load_address = data->os_address;
+
+ if (load_address == UIMAGE_INVALID_ADDRESS) {
+ bank = list_first_entry(&memory_banks,
+ struct memory_bank, list);
+ load_address = bank->start + SZ_32K;
+ if (bootm_verbose(data))
+ printf("no os load address, defaulting to 0x%08lx\n",
+ load_address);
+ }
+
+ ret = bootm_load_os(data, load_address);
+ if (ret)
+ return ret;
+
return __do_bootm_linux(data, 0);
}
--
1.8.5.2
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[PATCH 4/8] bootm: introduce bootm_load_initrd helper
Make the bootm handlers simpler by factoring out an initrd load
function.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 15 ---
common/bootm.c | 38 ++
include/boot.h | 1 +
3 files changed, 43 insertions(+), 11 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 6f84cb3..3604df0 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -31,7 +31,7 @@ static int __do_bootm_linux(struct image_data *data, int swap)
initrd_start = data->initrd_address;
- if (data->initrd_file && initrd_start == UIMAGE_INVALID_ADDRESS) {
+ if (initrd_start == UIMAGE_INVALID_ADDRESS) {
initrd_start = data->os_res->start + SZ_8M;
if (bootm_verbose(data)) {
@@ -40,16 +40,9 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
}
}
- if (data->initrd) {
- data->initrd_res = uimage_load_to_sdram(data->initrd,
- data->initrd_num, initrd_start);
- if (!data->initrd_res)
- return -ENOMEM;
- } else if (data->initrd_file) {
- data->initrd_res = file_to_sdram(data->initrd_file,
initrd_start);
- if (!data->initrd_res)
- return -ENOMEM;
- }
+ ret = bootm_load_initrd(data, initrd_start);
+ if (ret)
+ return ret;
if (data->initrd_res) {
initrd_start = data->initrd_res->start;
diff --git a/common/bootm.c b/common/bootm.c
index 5ad10d9..9ccbe8f 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -85,6 +85,44 @@ int bootm_load_os(struct image_data *data, unsigned long
load_address)
return -EINVAL;
}
+/*
+ * bootm_load_initrd() - load initrd to RAM
+ *
+ * @data: image data context
+ * @load_address: The address where the initrd should be loaded to
+ *
+ * This loads the initrd to a RAM location. load_address must be a valid
+ * address. If the image_data doesn't have a initrd specified this function
+ * still returns successful as an initrd is optional. Check data->initrd_res
+ * to see if an initrd has been loaded.
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+int bootm_load_initrd(struct image_data *data, unsigned long load_address)
+{
+ if (data->initrd_res)
+ return 0;
+
+ if (data->initrd) {
+ data->initrd_res = uimage_load_to_sdram(data->initrd,
+ data->initrd_num, load_address);
+ if (!data->initrd_res)
+ return -ENOMEM;
+
+ return 0;
+ }
+
+ if (data->initrd_file) {
+ data->initrd_res = file_to_sdram(data->initrd_file,
load_address);
+ if (!data->initrd_res)
+ return -ENOMEM;
+
+ return 0;
+ }
+
+ return 0;
+}
+
static int bootm_open_os_uimage(struct image_data *data)
{
int ret;
diff --git a/include/boot.h b/include/boot.h
index 61ab5d0..0cb2949 100644
--- a/include/boot.h
+++ b/include/boot.h
@@ -109,6 +109,7 @@ static inline int linux_bootargs_overwrite(const char
*bootargs)
#endif
int bootm_load_os(struct image_data *data, unsigned long load_address);
+int bootm_load_initrd(struct image_data *data, unsigned long load_address);
#define UIMAGE_SOME_ADDRESS (UIMAGE_INVALID_ADDRESS - 1)
--
1.8.5.2
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[PATCH 8/8] ARM: bootm: pass free memory to __do_bootm_linux
This improves the initrd/devicetree placement in the bootm code.
We used to put the initrd at the start of the kernel + 8MiB. This
of course fails once the kernel gets bigger than 8MiB. Also the
place for the devicetree was allocated using malloc(). This can
lead to the problem that the devicetree is outside of the kernels
lowmem and thus not reachable for the kernel.
With this patch __do_bootm_linux gets a pointer to free space where
the devicetree and the initrd can be safely put.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 59 +---
1 file changed, 42 insertions(+), 17 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5a2780a..182655f 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -54,17 +54,18 @@ static int sdram_start_and_size(unsigned long *start,
unsigned long *size)
return 0;
}
-static int __do_bootm_linux(struct image_data *data, int swap)
+static int __do_bootm_linux(struct image_data *data, unsigned long free_mem,
int swap)
{
unsigned long kernel;
unsigned long initrd_start = 0, initrd_size = 0, initrd_end = 0;
+ int ret;
kernel = data->os_res->start + data->os_entry;
initrd_start = data->initrd_address;
if (initrd_start == UIMAGE_INVALID_ADDRESS) {
- initrd_start = data->os_res->start + SZ_8M;
+ initrd_start = PAGE_ALIGN(free_mem);
if (bootm_verbose(data)) {
printf("no initrd load address, defaulting to
0x%08lx\n",
@@ -80,18 +81,12 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
initrd_start = data->initrd_res->start;
initrd_end = data->initrd_res->end;
initrd_size = resource_size(data->initrd_res);
+ free_mem = PAGE_ALIGN(initrd_end);
}
- if (IS_ENABLED(CONFIG_OFTREE) && data->of_root_node) {
- of_add_initrd(data->of_root_node, initrd_start, initrd_end);
- if (initrd_end)
- of_add_reserve_entry(initrd_start, initrd_end);
- data->oftree = of_get_fixed_tree(data->of_root_node);
- fdt_add_reserve_map(data->oftree);
- of_print_cmdline(data->of_root_node);
- if (bootm_verbose(data) > 1)
- of_print_nodes(data->of_root_node, 0);
- }
+ ret = bootm_load_devicetree(data, free_mem);
+ if (ret)
+ return ret;
if (bootm_verbose(data)) {
printf("\nStarting kernel at 0x%08lx", kernel);
@@ -111,7 +106,7 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
static int do_bootm_linux(struct image_data *data)
{
- unsigned long load_address, mem_start, mem_size;
+ unsigned long load_address, mem_start, mem_size, mem_free;
int ret;
ret = sdram_start_and_size(&mem_start, &mem_size);
@@ -131,7 +126,16 @@ static int do_bootm_linux(struct image_data *data)
if (ret)
return ret;
- return __do_bootm_linux(data, 0);
+ /*
+* Put devicetree/initrd at maximum to 128MiB into RAM to not
+* risk to put it outside of lowmem.
+*/
+ if (mem_size > SZ_256M)
+ mem_free = mem_start + SZ_128M;
+ else
+ mem_free = PAGE_ALIGN(data->os_res->end + SZ_1M);
+
+ return __do_bootm_linux(data, mem_free, 0);
}
static struct image_handler uimage_handler = {
@@ -224,7 +228,7 @@ static int do_bootz_linux(struct image_data *data)
void *zimage;
u32 end;
unsigned long load_address = data->os_address;
- unsigned long mem_start, mem_size;
+ unsigned long mem_start, mem_size, mem_free;
ret = sdram_start_and_size(&mem_start, &mem_size);
if (ret)
@@ -309,7 +313,17 @@ static int do_bootz_linux(struct image_data *data)
goto err_out;
close(fd);
- return __do_bootm_linux(data, swap);
+
+ /*
+* Put devicetree/initrd at maximum to 128MiB into RAM to not
+* risk to put it outside of lowmem.
+*/
+ if (mem_size > SZ_256M)
+ mem_free = mem_start + SZ_128M;
+ else
+ mem_free = PAGE_ALIGN(data->os_res->end + SZ_1M);
+
+ return __do_bootm_linux(data, mem_free, swap);
err_out:
close(fd);
@@ -384,6 +398,7 @@ static int do_bootm_aimage(struct image_data *data)
void *buf;
int to_read;
struct android_header_comp *cmp;
+ unsigned long mem_free;
fd = open(data->os_file, O_RDONLY);
if (fd < 0) {
@@ -477,7 +492,17 @@ static int do_bootm_aimage(struct image_data *data)
}
close(fd);
- return __do_bootm_linux(data, 0);
+
+ /*
+* Put devicetree right after initrd if present or after the kernel
+* if not.
+*/
+ if (data->initrd_res)
+
[PATCH 5/8] bootm: introduce bootm_load_devicetree helper
Signed-off-by: Sascha Hauer
---
common/bootm.c | 63 ++
include/boot.h | 2 ++
2 files changed, 65 insertions(+)
diff --git a/common/bootm.c b/common/bootm.c
index 9ccbe8f..d62d011 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -123,6 +123,67 @@ int bootm_load_initrd(struct image_data *data, unsigned
long load_address)
return 0;
}
+/*
+ * bootm_load_devicetree() - load devicetree
+ *
+ * @data: image data context
+ * @load_address: The address where the devicetree should be loaded to
+ *
+ * This loads the devicetree to a RAM location. load_address must be a valid
+ * address. The resulting devicetree will be found at data->oftree.
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+int bootm_load_devicetree(struct image_data *data, unsigned long load_address)
+{
+ int fdt_size;
+ struct fdt_header *oftree;
+
+ if (data->oftree)
+ return 0;
+
+ if (!IS_ENABLED(CONFIG_OFTREE))
+ return 0;
+
+ if (!data->of_root_node)
+ return 0;
+
+ if (data->initrd_res) {
+ of_add_initrd(data->of_root_node, data->initrd_res->start,
+ data->initrd_res->end);
+ of_add_reserve_entry(data->initrd_res->start,
data->initrd_res->end);
+ }
+
+ oftree = of_get_fixed_tree(data->of_root_node);
+ if (!oftree)
+ return -EINVAL;
+
+ fdt_size = be32_to_cpu(oftree->totalsize);
+
+ data->oftree_res = request_sdram_region("oftree", load_address,
+ fdt_size);
+ if (!data->oftree_res) {
+ free(oftree);
+ return -ENOMEM;
+ }
+
+ memcpy((void *)data->oftree_res->start, oftree, fdt_size);
+
+ free(oftree);
+
+ oftree = (void *)data->oftree_res->start;
+
+ fdt_add_reserve_map(oftree);
+
+ of_print_cmdline(data->of_root_node);
+ if (bootm_verbose(data) > 1)
+ of_print_nodes(data->of_root_node, 0);
+
+ data->oftree = oftree;
+
+ return 0;
+}
+
static int bootm_open_os_uimage(struct image_data *data)
{
int ret;
@@ -412,6 +473,8 @@ err_out:
release_sdram_region(data->os_res);
if (data->initrd_res)
release_sdram_region(data->initrd_res);
+ if (data->oftree_res)
+ release_sdram_region(data->oftree_res);
if (data->initrd && data->initrd != data->os)
uimage_close(data->initrd);
if (data->os)
diff --git a/include/boot.h b/include/boot.h
index 0cb2949..bdd5477 100644
--- a/include/boot.h
+++ b/include/boot.h
@@ -61,6 +61,7 @@ struct image_data {
struct device_node *of_root_node;
struct fdt_header *oftree;
+ struct resource *oftree_res;
int verify;
int verbose;
@@ -110,6 +111,7 @@ static inline int linux_bootargs_overwrite(const char
*bootargs)
int bootm_load_os(struct image_data *data, unsigned long load_address);
int bootm_load_initrd(struct image_data *data, unsigned long load_address);
+int bootm_load_devicetree(struct image_data *data, unsigned long load_address);
#define UIMAGE_SOME_ADDRESS (UIMAGE_INVALID_ADDRESS - 1)
--
1.8.5.2
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[PATCH 7/8] ARM: bootm: determine RAM start in separate function
We have two places in which we determine the RAM start address.
Put the code in a separate function. Let this function also figure
out the space available from beginning of RAM.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 55 ++--
1 file changed, 45 insertions(+), 10 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 11ff98c..5a2780a 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -22,6 +22,38 @@
#include
#include
+/*
+ * sdram_start_and_size() - determine place for putting the
kernel/oftree/initrd
+ *
+ * @start: returns the start address of the first RAM bank
+ * @size: returns the usable space at the beginning of the first RAM bank
+ *
+ * This function returns the base address of the first RAM bank and the free
+ * space found there.
+ *
+ * return: 0 for success, negative error code otherwise
+ */
+static int sdram_start_and_size(unsigned long *start, unsigned long *size)
+{
+ struct memory_bank *bank;
+ struct resource *res;
+
+ bank = list_first_entry_or_null(&memory_banks, struct memory_bank,
+ list);
+ if (!bank)
+ return -EINVAL;
+
+ res = list_first_entry_or_null(&bank->res->children, struct resource,
+ sibling);
+ if (!res)
+ return -EINVAL;
+
+ *start = bank->start;
+ *size = res->start - bank->start;
+
+ return 0;
+}
+
static int __do_bootm_linux(struct image_data *data, int swap)
{
unsigned long kernel;
@@ -79,16 +111,17 @@ static int __do_bootm_linux(struct image_data *data, int
swap)
static int do_bootm_linux(struct image_data *data)
{
- struct memory_bank *bank;
- unsigned long load_address;
+ unsigned long load_address, mem_start, mem_size;
int ret;
+ ret = sdram_start_and_size(&mem_start, &mem_size);
+ if (ret)
+ return ret;
+
load_address = data->os_address;
if (load_address == UIMAGE_INVALID_ADDRESS) {
- bank = list_first_entry(&memory_banks,
- struct memory_bank, list);
- load_address = bank->start + SZ_32K;
+ load_address = mem_start + SZ_32K;
if (bootm_verbose(data))
printf("no os load address, defaulting to 0x%08lx\n",
load_address);
@@ -191,20 +224,22 @@ static int do_bootz_linux(struct image_data *data)
void *zimage;
u32 end;
unsigned long load_address = data->os_address;
+ unsigned long mem_start, mem_size;
- if (load_address == UIMAGE_INVALID_ADDRESS) {
- struct memory_bank *bank = list_first_entry(&memory_banks,
- struct memory_bank, list);
+ ret = sdram_start_and_size(&mem_start, &mem_size);
+ if (ret)
+ return ret;
+ if (load_address == UIMAGE_INVALID_ADDRESS) {
/*
* The kernel should stay in the first 128MiB of RAM,
recommended
* is 32MiB into RAM so that relocation prior to decompression
* can be avoided.
*/
if (mem_size > SZ_64M)
- data->os_address = bank->start + SZ_32M;
+ data->os_address = mem_start + SZ_32M;
else
- data->os_address = bank->start + SZ_8M;
+ data->os_address = mem_start + SZ_8M;
load_address = data->os_address;
if (bootm_verbose(data))
--
1.8.5.2
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[PATCH 1/8] list: add list_first_entry_or_null()
Signed-off-by: Sascha Hauer --- include/linux/list.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/linux/list.h b/include/linux/list.h index 5ae90b4..bc63ece 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -292,6 +292,17 @@ static inline void list_splice_init(struct list_head *list, list_entry((head)->prev, type, member) /** + * list_first_entry_or_null - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member:the name of the list_struct within the struct. + * + * Note that if the list is empty, it returns NULL. + */ +#define list_first_entry_or_null(ptr, type, member) \ + (!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL) + +/** * list_for_each - iterate over a list * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. -- 1.8.5.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
bootm + devicetree + much memory
Current bootm implementation on ARM has the problem with systems with much memory. The devicetree is allocated with malloc(). On some systems the malloc area is outside of the kernels lowmem, so the kernel can't access the devicetree anymore. The complexity of the current code makes it hard to solve, so this series contains several patches to make the bootm code simpler before the actual problem is solved. Sascha Sascha Hauer (8): list: add list_first_entry_or_null() bootm: introduce bootm_load_os helper ARM: bootm: move os loading to do_bootm_linux bootm: introduce bootm_load_initrd helper bootm: introduce bootm_load_devicetree helper ARM: bootm: locate zImage higher into RAM ARM: bootm: determine RAM start in separate function ARM: bootm: pass free memory to __do_bootm_linux arch/arm/lib/bootm.c | 164 - arch/blackfin/lib/blackfin_linux.c | 6 +- arch/nios2/lib/bootm.c | 6 +- arch/ppc/lib/ppclinux.c| 6 +- common/bootm.c | 150 +++-- include/boot.h | 5 ++ include/linux/list.h | 11 +++ 7 files changed, 278 insertions(+), 70 deletions(-) ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 6/8] ARM: bootm: locate zImage higher into RAM
The zImage should be placed where it won't be overwritten by the
uncompressed image, otherwise the kernel decompressing code has
to relocate the zImage before decompression. As Kernels tend to
become bigger put it into 32MiB into RAM if we have enough RAM
available.
Signed-off-by: Sascha Hauer
---
arch/arm/lib/bootm.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 3604df0..11ff98c 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -195,7 +195,17 @@ static int do_bootz_linux(struct image_data *data)
if (load_address == UIMAGE_INVALID_ADDRESS) {
struct memory_bank *bank = list_first_entry(&memory_banks,
struct memory_bank, list);
- data->os_address = bank->start + SZ_8M;
+
+ /*
+* The kernel should stay in the first 128MiB of RAM,
recommended
+* is 32MiB into RAM so that relocation prior to decompression
+* can be avoided.
+*/
+ if (mem_size > SZ_64M)
+ data->os_address = bank->start + SZ_32M;
+ else
+ data->os_address = bank->start + SZ_8M;
+
load_address = data->os_address;
if (bootm_verbose(data))
printf("no os load address, defaulting to 0x%08lx\n",
--
1.8.5.2
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[PATCH 1/2] ARM: i.MX: Add correct SoC type detection for i.MX6
Using the ANATOP_SI_REV register we can only distinguish between
i.MX6q/d and i.MX6dl/s SoCs. Take the number of cores into account
to get the exact SoC type.
Signed-off-by: Sascha Hauer
---
arch/arm/mach-imx/imx6.c | 10 +--
arch/arm/mach-imx/include/mach/imx6.h | 49 +--
2 files changed, 49 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ed1edd7..13d8bfa 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -86,10 +86,16 @@ int imx6_init(void)
switch (imx6_cpu_type()) {
case IMX6_CPUTYPE_IMX6Q:
- cputypestr = "i.MX6 Dual/Quad";
+ cputypestr = "i.MX6 Quad";
+ break;
+ case IMX6_CPUTYPE_IMX6D:
+ cputypestr = "i.MX6 Dual";
break;
case IMX6_CPUTYPE_IMX6DL:
- cputypestr = "i.MX6 Solo/DualLite";
+ cputypestr = "i.MX6 DualLite";
+ break;
+ case IMX6_CPUTYPE_IMX6S:
+ cputypestr = "i.MX6 Solo";
break;
default:
cputypestr = "unknown i.MX6";
diff --git a/arch/arm/mach-imx/include/mach/imx6.h
b/arch/arm/mach-imx/include/mach/imx6.h
index 4b2b1c7..1898d81 100644
--- a/arch/arm/mach-imx/include/mach/imx6.h
+++ b/arch/arm/mach-imx/include/mach/imx6.h
@@ -9,24 +9,47 @@ void imx6_init_lowlevel(void);
#define IMX6_ANATOP_SI_REV 0x260
-#define IMX6_CPUTYPE_IMX6Q 0x63
-#define IMX6_CPUTYPE_IMX6DL0x61
+#define IMX6_CPUTYPE_IMX6S 0x161
+#define IMX6_CPUTYPE_IMX6DL0x261
+#define IMX6_CPUTYPE_IMX6D 0x263
+#define IMX6_CPUTYPE_IMX6Q 0x463
-static inline int imx6_cpu_type(void)
+#define SCU_CONFIG 0x04
+
+static inline int scu_get_core_count(void)
+{
+ unsigned long base;
+ unsigned int ncores;
+
+ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
+
+ ncores = readl(base + SCU_CONFIG);
+ return (ncores & 0x03) + 1;
+}
+
+static inline int __imx6_cpu_type(void)
{
uint32_t val;
+ val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
+ val = (val >> 16) & 0xff;
+
+ val |= scu_get_core_count() << 8;
+
+ return val;
+}
+
+static inline int imx6_cpu_type(void)
+{
if (!cpu_is_mx6())
return 0;
- val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
-
- return (val >> 16) & 0xff;
+ return __imx6_cpu_type();
}
-static inline int cpu_is_mx6q(void)
+static inline int cpu_is_mx6s(void)
{
- return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q;
+ return imx6_cpu_type() == IMX6_CPUTYPE_IMX6S;
}
static inline int cpu_is_mx6dl(void)
@@ -34,4 +57,14 @@ static inline int cpu_is_mx6dl(void)
return imx6_cpu_type() == IMX6_CPUTYPE_IMX6DL;
}
+static inline int cpu_is_mx6d(void)
+{
+ return imx6_cpu_type() == IMX6_CPUTYPE_IMX6D;
+}
+
+static inline int cpu_is_mx6q(void)
+{
+ return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q;
+}
+
#endif /* __MACH_IMX6_H */
--
1.8.5.2
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[PATCH 2/2] ARM: i.MX6: correct work flow of PFDs from uboot-sources
From: Jesús Guitarte
PFDs need to be gate/ungate after PLL lock to reset PFDs to right state.
Otherwise PFDs may lose correct state in state-machine, then no output
clock.
For i.MX6DL and i.MX6SL, ROM have taken care of PFD396 already since the
bus clock needs it.
This patch is backported from
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/cpu/arm_cortexa8/mx6/generic.c?h=imx_v2009.08_3.0.35_4.1.0&id=b7c5badf94ffbe6cd0845efbb75e16e05e3af404
And resolve issues with booting from MMC/SD cards
Signed-off-by: Jesús Guitarte
Signed-off-by: Sascha Hauer
---
arch/arm/mach-imx/imx6.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 13d8bfa..304b1c0 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
@@ -27,6 +28,7 @@ void imx6_init_lowlevel(void)
{
void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
void __iomem *aips2 = (void *)MX6_AIPS2_ON_BASE_ADDR;
+ int is_imx6q = __imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q;
/*
* Set all MPROTx to be non-bufferable, trusted for R/W,
@@ -56,6 +58,35 @@ void imx6_init_lowlevel(void)
writel(0x, 0x020c4078);
writel(0x, 0x020c407c);
writel(0x, 0x020c4080);
+
+ /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
+* to make sure PFD is working right, otherwise, PFDs may
+* not output clock after reset, MX6DL and MX6SL have added 396M pfd
+* workaround in ROM code, as bus clock need it
+*/
+ writel(BM_ANADIG_PFD_480_PFD3_CLKGATE |
+ BM_ANADIG_PFD_480_PFD2_CLKGATE |
+ BM_ANADIG_PFD_480_PFD1_CLKGATE |
+ BM_ANADIG_PFD_480_PFD0_CLKGATE,
+ MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
+ writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
+ (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD1_CLKGATE |
+ BM_ANADIG_PFD_528_PFD0_CLKGATE,
+ MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
+
+ writel(BM_ANADIG_PFD_480_PFD3_CLKGATE |
+ BM_ANADIG_PFD_480_PFD2_CLKGATE |
+ BM_ANADIG_PFD_480_PFD1_CLKGATE |
+ BM_ANADIG_PFD_480_PFD0_CLKGATE,
+ MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
+ writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
+ (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD2_CLKGATE |
+ BM_ANADIG_PFD_528_PFD1_CLKGATE |
+ BM_ANADIG_PFD_528_PFD0_CLKGATE,
+ MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
+
}
int imx6_init(void)
--
1.8.5.2
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Re: [PATCH 2/3] mci: imx-esdhc: add DSR support
Hello, > Hello. > > Пятница, 10 января 2014, 10:29 +01:00 от Markus Niebel > : >> From: Markus Niebel >> >> having DSR support in mci-core we need a way to >> forward the DSR value to the driver. Add it to >> platform data for imx-esdhc > ... >> diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c >> index 7664e7b..deb44b0 100644 >> --- a/drivers/mci/imx-esdhc.c >> +++ b/drivers/mci/imx-esdhc.c >> @@ -582,6 +582,8 @@ static int fsl_esdhc_probe(struct device_d *dev) >> if (host->mci.f_min < 20) >> host->mci.f_min = 20; >> host->mci.f_max = rate; >> +host->mci.use_dsr = pdata->use_dsr; >> +host->mci.dsr_val = pdata->dsr_val; > > What happen if device is probed from devicetree? Thanks for pointing this out. As the cover says - just a RFC. We have working code for device tree under linux here. My proposal is to pass the DSR value as an optional property to the host controller - then it could be parsed by mci_of_parse - but this needs to be in sync with the kernel. Yes and the setting from pdata should be optional - since pdata is NULL in case of device tree. Will collect comments and prepare a second round. Markus > > --- > ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 1/2] ARM: i.MX53: dts: move QSB pmic to own file
There are two versions of the i.MX53 LOCO:
- the MCIMX53-START board
- the MCIMX53-START-R board
The MCIMX53-START-R has a mc34708 pmic and is otherwise the similar to the
MCIMX53-START. To prepare for the START-R, move all common nodes to a new
imx53-qsb-common.dtsi
and remove everything but the board name and pmic from the imx53-qsb.dts.
Signed-off-by: Steffen Trumtrar
---
Changes in V2:
- move dts-v1 from imx53-qsb-common.dtsi to imx53-qsb.dts
arch/arm/dts/imx53-qsb-common.dtsi | 224 +
arch/arm/dts/imx53-qsb.dts | 210 +-
2 files changed, 226 insertions(+), 208 deletions(-)
create mode 100644 arch/arm/dts/imx53-qsb-common.dtsi
diff --git a/arch/arm/dts/imx53-qsb-common.dtsi
b/arch/arm/dts/imx53-qsb-common.dtsi
new file mode 100644
index 000..f2f912b
--- /dev/null
+++ b/arch/arm/dts/imx53-qsb-common.dtsi
@@ -0,0 +1,224 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx53.dtsi"
+
+/ {
+ chosen {
+ linux,stdout-path = "/soc/aips@5000/serial@53fbc000";
+
+ environment@0 {
+ compatible = "barebox,environment";
+ device-path = &esdhc1, "partname:barebox-environment";
+ };
+ };
+
+ display@di0 {
+ compatible = "fsl,imx-parallel-display";
+ crtcs = <&ipu 0>;
+ interface-pix-fmt = "rgb565";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp0_1>;
+ status = "disabled";
+ display-timings {
+ claawvga {
+ native-mode;
+ clock-frequency = <2700>;
+ hactive = <800>;
+ vactive = <480>;
+ hback-porch = <40>;
+ hfront-porch = <60>;
+ vback-porch = <10>;
+ vfront-porch = <10>;
+ hsync-len = <20>;
+ vsync-len = <10>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio1 8 0>;
+ linux,code = <116>; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio2 14 0>;
+ linux,code = <115>; /* KEY_VOLUMEUP */
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio2 15 0>;
+ linux,code = <114>; /* KEY_VOLUMEDOWN */
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pin_gpio7_7>;
+
+ user {
+ label = "Heartbeat";
+ gpios = <&gpio7 7 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+
+ reg_3p2v: 3p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P2V";
+ regulator-min-microvolt = <320>;
+ regulator-max-microvolt = <320>;
+ regulator-always-on;
+ };
+ };
+
+ sound {
+ compatible = "fsl,imx53-qsb-sgtl5000",
+"fsl,imx-audio-sgtl5000";
+ model = "imx53-qsb-sgtl5000";
+ ssi-controller = <&ssi2>;
+ audio-codec = <&sgtl5000>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <2>;
+ mux-ext-port = <5>;
+ };
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1_1>;
+ cd-gpios = <&gpio3 13 0>;
+ status = "okay";
+ #address-cells = <1
[PATCH v2 2/2] ARM: i.MX53: dts: add support for MCIMX53-START-R
The start-r QSB has a different pmic than the older start QSB.
Add a new dts for the QSRB and let barebox generate two images when
LOCO is selected.
Signed-off-by: Steffen Trumtrar
---
Changes in V2:
- add newlines after every DT-node
- add phandle names to pmic-nodes
arch/arm/boards/freescale-mx53-loco/lowlevel.c | 13 ++
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/imx53-qsrb.dts| 157 +
images/Makefile.imx| 5 +
4 files changed, 177 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx53-qsrb.dts
diff --git a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
index 7556a2e..c9e057a 100644
--- a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
@@ -15,3 +15,16 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2)
imx53_barebox_entry(fdt);
}
+
+extern char __dtb_imx53_qsrb_start[];
+
+ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2)
+{
+ uint32_t fdt;
+
+ arm_cpu_lowlevel_init();
+
+ fdt = (uint32_t)__dtb_imx53_qsrb_start - get_runtime_offset();
+
+ imx53_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bc314e9..ec46c4f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_AM33XX) += \
dtb-$(CONFIG_ARCH_IMX51) += imx51-babbage.dtb \
imx51-genesi-efika-sb.dtb
dtb-$(CONFIG_ARCH_IMX53) += imx53-qsb.dtb \
+ imx53-qsrb.dtb \
imx53-voipac-bsb.dtb
dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
imx6dl-dfi-fs700-m60-6s.dtb \
@@ -29,7 +30,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
pbl-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o
pbl-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o
pbl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o
-pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o
+pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o
pbl-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o
pbl-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o
imx6dl-dfi-fs700-m60-6s.dtb.o
pbl-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore.dtb.o
diff --git a/arch/arm/dts/imx53-qsrb.dts b/arch/arm/dts/imx53-qsrb.dts
new file mode 100644
index 000..aed9862
--- /dev/null
+++ b/arch/arm/dts/imx53-qsrb.dts
@@ -0,0 +1,157 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx53-qsb-common.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Quick Start-R Board";
+ compatible = "fsl,imx53-qsb", "fsl,imx53";
+};
+
+&iomuxc {
+ i2c1 {
+ /* open drain */
+ pinctrl_i2c1_qsrb: i2c1grp-1 {
+ fsl,pins = <
+ MX53_PAD_CSI0_DAT8__I2C1_SDA 0x41ec
+ MX53_PAD_CSI0_DAT9__I2C1_SCL 0x41ec
+ >;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_qsrb>;
+
+ pmic: ripley@8 {
+ compatible = "fsl,mc34708";
+ reg = <0x08>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <23 0x8>;
+ regulators {
+ sw1_reg: sw1a {
+ regulator-name = "SW1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <1437500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sw1b_reg: sw1b {
+ regulator-name = "SW1B";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <1437500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sw2_reg: sw2 {
+ regulator-name = "SW2";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <1437500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sw3_reg: sw3 {
+ regulator-name = "SW3";
+ regulator-min-microvolt = <65>;
+
Re: [PATCH 2/2] ARM: i.MX53: dts: add support for MCIMX53-START-R
On Fri, Jan 10, 2014 at 10:36:56AM +0100, Sascha Hauer wrote:
> On Thu, Jan 09, 2014 at 03:40:08PM +0100, Steffen Trumtrar wrote:
> > The start-r QSB has a different pmic than the older start QSB.
> > Add a new dts for the QSRB and let barebox generate two images when
> > LOCO is selected.
> >
> > Signed-off-by: Steffen Trumtrar
> > ---
> > arch/arm/boards/freescale-mx53-loco/lowlevel.c | 13 +++
> > arch/arm/dts/Makefile | 3 +-
> > arch/arm/dts/imx53-qsrb.dts| 141
> > +
> > images/Makefile.imx| 5 +
> > 4 files changed, 161 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/dts/imx53-qsrb.dts
> >
> > diff --git a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> > b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> > index 7556a2e..c9e057a 100644
> > --- a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> > +++ b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> > @@ -15,3 +15,16 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2)
> >
> > imx53_barebox_entry(fdt);
> > }
> > +
> > +extern char __dtb_imx53_qsrb_start[];
> > +
> > +ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2)
> > +{
> > + uint32_t fdt;
> > +
> > + arm_cpu_lowlevel_init();
> > +
> > + fdt = (uint32_t)__dtb_imx53_qsrb_start - get_runtime_offset();
> > +
> > + imx53_barebox_entry(fdt);
> > +}
>
> For the record: This introduces a new image for the r board. Should we
> want to later we could use the code from arch/ppc/mach-mpc85xx/fsl_i2c.c
> to detect the board version and merge both images into one again.
>
> > + pmic: ripley@8 {
> > + compatible = "fsl,mc34708";
> > + reg = <0x08>;
> > + interrupt-parent = <&gpio5>;
> > + interrupts = <23 0x8>;
> > + regulators {
> > + mc34708__sw1a {
> > + regulator-name = "SW1";
> > + regulator-min-microvolt = <65>;
> > + regulator-max-microvolt = <1437500>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > + mc34708__sw1b {
>
> There should be a blank line between the end of a node and the beginning
> of a new one.
>
Oops...you are right :-(
Will fix.
str
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Re: [PATCH v3] of: find also nodes by mixture of alias and path
On Mon, Jan 06, 2014 at 01:45:43PM +0100, Jan Weitzel wrote:
> Let of_find_node_by_path_or_alias also find a node starting with an alias
> followed by a path like "i2c0/tps@24"
>
> Signed-off-by: Jan Weitzel
Applied, thanks
Sascha
> ---
> v2: rename ret to node
> v3: use strchr
> drivers/of/base.c | 23 ++-
> 1 files changed, 22 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/of/base.c b/drivers/of/base.c
> index ea2d879..6e5e7d6 100644
> --- a/drivers/of/base.c
> +++ b/drivers/of/base.c
> @@ -1378,11 +1378,32 @@ EXPORT_SYMBOL(of_find_node_by_path);
> struct device_node *of_find_node_by_path_or_alias(struct device_node *root,
> const char *str)
> {
> + struct device_node *node;
> + const char *slash;
> + char *alias;
> + size_t len = 0;
> +
> if (*str == '/')
> return of_find_node_by_path_from(root, str);
> - else
> +
> + slash = strchr(str, '/');
> +
> + if (!slash)
> return of_find_node_by_alias(root, str);
>
> + len = slash - str + 1;
> + alias = xmalloc(len);
> + strlcpy(alias, str, len);
> +
> + node = of_find_node_by_alias(root, alias);
> +
> + if (!node)
> + goto out;
> +
> + node = of_find_node_by_path_from(node, slash);
> +out:
> + free(alias);
> + return node;
> }
> EXPORT_SYMBOL(of_find_node_by_path_or_alias);
>
> --
> 1.7.0.4
>
>
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Re: [PATCH 2/2] ARM: i.MX53: dts: add support for MCIMX53-START-R
On Thu, Jan 09, 2014 at 03:40:08PM +0100, Steffen Trumtrar wrote:
> The start-r QSB has a different pmic than the older start QSB.
> Add a new dts for the QSRB and let barebox generate two images when
> LOCO is selected.
>
> Signed-off-by: Steffen Trumtrar
> ---
> arch/arm/boards/freescale-mx53-loco/lowlevel.c | 13 +++
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/imx53-qsrb.dts| 141
> +
> images/Makefile.imx| 5 +
> 4 files changed, 161 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/imx53-qsrb.dts
>
> diff --git a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> index 7556a2e..c9e057a 100644
> --- a/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> +++ b/arch/arm/boards/freescale-mx53-loco/lowlevel.c
> @@ -15,3 +15,16 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2)
>
> imx53_barebox_entry(fdt);
> }
> +
> +extern char __dtb_imx53_qsrb_start[];
> +
> +ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2)
> +{
> + uint32_t fdt;
> +
> + arm_cpu_lowlevel_init();
> +
> + fdt = (uint32_t)__dtb_imx53_qsrb_start - get_runtime_offset();
> +
> + imx53_barebox_entry(fdt);
> +}
For the record: This introduces a new image for the r board. Should we
want to later we could use the code from arch/ppc/mach-mpc85xx/fsl_i2c.c
to detect the board version and merge both images into one again.
> + pmic: ripley@8 {
> + compatible = "fsl,mc34708";
> + reg = <0x08>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <23 0x8>;
> + regulators {
> + mc34708__sw1a {
> + regulator-name = "SW1";
> + regulator-min-microvolt = <65>;
> + regulator-max-microvolt = <1437500>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> + mc34708__sw1b {
There should be a blank line between the end of a node and the beginning
of a new one.
Sascha
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Re: [PATCH 2/3] mci: imx-esdhc: add DSR support
Hello. Пятница, 10 января 2014, 10:29 +01:00 от Markus Niebel : > From: Markus Niebel > > having DSR support in mci-core we need a way to > forward the DSR value to the driver. Add it to > platform data for imx-esdhc ... > diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c > index 7664e7b..deb44b0 100644 > --- a/drivers/mci/imx-esdhc.c > +++ b/drivers/mci/imx-esdhc.c > @@ -582,6 +582,8 @@ static int fsl_esdhc_probe(struct device_d *dev) > if (host->mci.f_min < 20) > host->mci.f_min = 20; > host->mci.f_max = rate; > + host->mci.use_dsr = pdata->use_dsr; > + host->mci.dsr_val = pdata->dsr_val; What happen if device is probed from devicetree? --- ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 2/3] mci: imx-esdhc: add DSR support
From: Markus Niebel
having DSR support in mci-core we need a way to
forward the DSR value to the driver. Add it to
platform data for imx-esdhc
TODO: implement the same for other host controller
drivers
Signed-off-by: Markus Niebel
---
arch/arm/mach-imx/include/mach/esdhc.h |2 ++
drivers/mci/imx-esdhc.c|2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/include/mach/esdhc.h
b/arch/arm/mach-imx/include/mach/esdhc.h
index add1691..fb7380a 100644
--- a/arch/arm/mach-imx/include/mach/esdhc.h
+++ b/arch/arm/mach-imx/include/mach/esdhc.h
@@ -42,5 +42,7 @@ struct esdhc_platform_data {
enum cd_types cd_type;
unsigned caps;
char *devname;
+ unsigned dsr_val;
+ int use_dsr;
};
#endif /* __ASM_ARCH_IMX_ESDHC_H */
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 7664e7b..deb44b0 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -582,6 +582,8 @@ static int fsl_esdhc_probe(struct device_d *dev)
if (host->mci.f_min < 20)
host->mci.f_min = 20;
host->mci.f_max = rate;
+ host->mci.use_dsr = pdata->use_dsr;
+ host->mci.dsr_val = pdata->dsr_val;
mci_of_parse(&host->mci);
--
1.7.9.5
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[RFC] mci: add DSR support
This is an example to add DSR support to barebox. Why this feature is considered as useful is described in the first patch. Second patch shows how to pass values and third patch shows how this can be supported for a board. Tested with TQMa53 and a 4.41 Micron eMMC with DSR support. [PATCH 1/3] mci: add DSR support [PATCH 2/3] mci: imx-esdhc: add DSR support [PATCH 3/3] boards: tqma53: add DSR support for eMMC ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 3/3] boards: tqma53: add DSR support for eMMC
From: Markus Niebel
all eMMC cards with DSR support used on different
revisions of TQMa53 needs the same DSR value.
just apply it.
Signed-off-by: Markus Niebel
---
arch/arm/boards/tqma53/board.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boards/tqma53/board.c b/arch/arm/boards/tqma53/board.c
index 9069f7c..cc98de9 100644
--- a/arch/arm/boards/tqma53/board.c
+++ b/arch/arm/boards/tqma53/board.c
@@ -39,6 +39,8 @@
#include
#include
+#define TQMA53_EMMC_DSR 0x0100u
+
static struct fec_platform_data fec_info = {
.xcv_type = PHY_INTERFACE_MODE_RMII,
};
@@ -221,6 +223,8 @@ static struct esdhc_platform_data tqma53_sd3_data = {
.cd_type = ESDHC_CD_PERMANENT,
.wp_type = ESDHC_WP_NONE,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
+ .use_dsr = 1,
+ .dsr_val = TQMA53_EMMC_DSR,
};
static int tqma53_devices_init(void)
--
1.7.9.5
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[PATCH 1/3] mci: add DSR support
From: Markus Niebel
The eMMC and the SD-Card specifications describe the optional SET_DSR command.
During measurements at our lab we found that some cards implementing this
feature
having really strong driver strengts per default. This can lead to voltage peaks
above the specification of the host on signal edges for data sent from a card to
the host.
Since availability of a given card type may be shorter than the time a certain
hardware will be produced it is useful to have support for this command
(Alternative
would be changing termination resistors and adapting the driver strength of the
host to the used card.)
Signed-off-by: Markus Niebel
---
drivers/mci/mci-core.c | 27 +++
include/mci.h |3 +++
2 files changed, 30 insertions(+)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index a232679..2c91ff2 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -102,6 +102,20 @@ static void mci_setup_cmd(struct mci_cmd *p, unsigned cmd,
unsigned arg, unsigne
}
/**
+ * configure optional DSR value
+ * @param mci_dev MCI instance
+ * @return Transaction status (0 on success)
+ */
+static int mci_set_dsr(struct mci *mci)
+{
+ struct mci_cmd cmd;
+
+ mci_setup_cmd(&cmd, MMC_CMD_SET_DSR,
+ (mci->host->dsr_val >> 16) | 0x, MMC_RSP_NONE);
+ return mci_send_cmd(mci, &cmd, NULL);
+}
+
+/**
* Setup SD/MMC card's blocklength to be used for future transmitts
* @param mci_dev MCI instance
* @param len Blocklength in bytes
@@ -836,6 +850,15 @@ static void mci_extract_card_capacity_from_csd(struct mci
*mci)
dev_dbg(&mci->dev, "Capacity: %u MiB\n", (unsigned)(mci->capacity >>
20));
}
+/**
+ * Extract card's DSR implementation state from CSD
+ * @param mci MCI instance
+ */
+static void mci_extract_card_dsr_imp_from_csd(struct mci *mci)
+{
+ mci->dsr_imp = UNSTUFF_BITS(mci->csd, 76, 1);
+}
+
static int mmc_compare_ext_csds(struct mci *mci, unsigned bus_width)
{
u8 *bw_ext_csd;
@@ -1058,6 +1081,7 @@ static int mci_startup(struct mci *mci)
mci_detect_version_from_csd(mci);
mci_extract_max_tran_speed_from_csd(mci);
mci_extract_block_lengths_from_csd(mci);
+ mci_extract_card_dsr_imp_from_csd(mci);
/* sanitiy? */
if (mci->read_bl_len > SECTOR_SIZE) {
@@ -1074,6 +1098,9 @@ static int mci_startup(struct mci *mci)
dev_dbg(&mci->dev, "Read block length: %u, Write block length: %u\n",
mci->read_bl_len, mci->write_bl_len);
+ if (mci->dsr_imp && mci->host->use_dsr)
+ mci_set_dsr(mci);
+
if (!mmc_host_is_spi(host)) { /* cmd not supported in spi */
dev_dbg(&mci->dev, "Select the card, and put it into Transfer
Mode\n");
/* Select the card, and put it into Transfer Mode */
diff --git a/include/mci.h b/include/mci.h
index 0f10e8a..d3a553e 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -294,6 +294,8 @@ struct mci_host {
unsigned clock; /**< Current clock used to talk to the card */
unsigned bus_width; /**< used data bus width to the card */
unsigned max_req_size;
+ unsigned dsr_val; /**< optional dsr value */
+ int use_dsr;/**< optional dsr usage flag */
/** init the host interface */
int (*init)(struct mci_host*, struct device_d*);
@@ -344,6 +346,7 @@ struct mci {
unsigned write_bl_len;
uint64_t capacity; /**< Card's data capacity in bytes */
int ready_for_use; /** true if already probed */
+ int dsr_imp;/**< DSR implementation state from CSD */
char *ext_csd;
int probe;
struct param_d *param_probe;
--
1.7.9.5
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Re: [PATCH 0/3] gpiolib: add checks and error message
On Thu, Jan 09, 2014 at 09:58:36PM +0400, Antony Pavlov wrote: > This patchseries adds additional trivial checks and error message. > > [PATCH 1/3] gpiolib: gpio_request(): print message on error > [PATCH 2/3] gpiolib: gpio_free: clear gpio's "label" field too > [PATCH 3/3] gpiolib: gpiolib command: show label only for requested Applied, thanks Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/2] mci: Support the correct version for eMMC
From: Markus Niebel
eMMC is available up to version 4.5 but the
correct version is not decoded. Change version
definitions to support more minor verions, add
missing versions and parse the minor versions from
ext_csd.
After this, card detection code and devinfo reports
correct versions.
Handling is inspired by u-boot code.
Signed-off-by: Markus Niebel
---
drivers/mci/mci-core.c | 38 ++
include/mci.h | 21 +
2 files changed, 43 insertions(+), 16 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index a232679..9bdcdbe 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -695,7 +695,6 @@ static void mci_set_bus_width(struct mci *mci, unsigned
width)
static void mci_detect_version_from_csd(struct mci *mci)
{
int version;
- char *vstr;
if (mci->version == MMC_VERSION_UNKNOWN) {
/* the version is coded in the bits 127:126 (left aligned) */
@@ -703,32 +702,52 @@ static void mci_detect_version_from_csd(struct mci *mci)
switch (version) {
case 0:
- vstr = "1.2";
mci->version = MMC_VERSION_1_2;
break;
case 1:
- vstr = "1.4";
mci->version = MMC_VERSION_1_4;
break;
case 2:
- vstr = "2.2";
mci->version = MMC_VERSION_2_2;
break;
case 3:
- vstr = "3.0";
mci->version = MMC_VERSION_3;
break;
case 4:
- vstr = "4.0";
mci->version = MMC_VERSION_4;
break;
default:
- vstr = "unknown, fallback to 1.2";
+ printf("unknown card version, fallback to 1.2\n");
mci->version = MMC_VERSION_1_2;
break;
}
+ }
+}
- dev_info(&mci->dev, "detected card version %s\n", vstr);
+/**
+ * correct the version from ext_csd data if it's not an SD-card, detected
+ * version is at least 4 and we have ext_csd data
+ */
+static void mci_correct_version_from_ext_csd(struct mci *mci)
+{
+ if (!IS_SD(mci) && (mci->version >= MMC_VERSION_4) && mci->ext_csd) {
+ switch (mci->ext_csd[EXT_CSD_REV]) {
+ case 1:
+ mci->version = MMC_VERSION_4_1;
+ break;
+ case 2:
+ mci->version = MMC_VERSION_4_2;
+ break;
+ case 3:
+ mci->version = MMC_VERSION_4_3;
+ break;
+ case 5:
+ mci->version = MMC_VERSION_4_41;
+ break;
+ case 6:
+ mci->version = MMC_VERSION_4_5;
+ break;
+ }
}
}
@@ -1093,6 +1112,9 @@ static int mci_startup(struct mci *mci)
if (err)
return err;
+ mci_correct_version_from_ext_csd(mci);
+ printf("detected %s card version %d.%d\n", IS_SD(mci) ? "SD" : "MMC",
+ (mci->version >> 8) & 0xf, mci->version & 0xff);
mci_extract_card_capacity_from_csd(mci);
if (IS_SD(mci))
diff --git a/include/mci.h b/include/mci.h
index 0f10e8a..65f90ca 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -31,18 +31,23 @@
/* Firmware revisions for SD cards */
#define SD_VERSION_SD 0x2
-#define SD_VERSION_2 (SD_VERSION_SD | 0x20)
-#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10)
-#define SD_VERSION_1_10(SD_VERSION_SD | 0x1a)
+#define SD_VERSION_2 (SD_VERSION_SD | 0x200)
+#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100)
+#define SD_VERSION_1_10(SD_VERSION_SD | 0x10a)
/* Firmware revisions for MMC cards */
#define MMC_VERSION_MMC0x1
#define MMC_VERSION_UNKNOWN(MMC_VERSION_MMC)
-#define MMC_VERSION_1_2(MMC_VERSION_MMC | 0x12)
-#define MMC_VERSION_1_4(MMC_VERSION_MMC | 0x14)
-#define MMC_VERSION_2_2(MMC_VERSION_MMC | 0x22)
-#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30)
-#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40)
+#define MMC_VERSION_1_2(MMC_VERSION_MMC | 0x102)
+#define MMC_VERSION_1_4(MMC_VERSION_MMC | 0x104)
+#define MMC_VERSION_2_2(MMC_VERSION_MMC | 0x202)
+#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300)
+#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400)
+#define MMC_VERSION_4_1(MMC_VERSION_MMC | 0x401)
+#define MMC_VERSION_4_2(MMC_VERSION_MMC | 0x402)
+#define MMC_VERSION_4_3
[PATCH 2/2] mci: production year for eMMC 4.41 and later
From: Markus Niebel
Year is coded in 4 bits of CID. eMMC 4.41
adds a new interpretation rule: production
year for 4.41 cards and newer is between 2010
and 2025 with 0 corresponding to 2013.
This fix was inspired by currect kernel code.
Signed-off-by: Markus Niebel
---
drivers/mci/mci-core.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 9bdcdbe..7161af1 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -717,7 +717,7 @@ static void mci_detect_version_from_csd(struct mci *mci)
mci->version = MMC_VERSION_4;
break;
default:
- printf("unknown card version, fallback to 1.2\n");
+ printf("unknown card version, fallback to 1.02\n");
mci->version = MMC_VERSION_1_2;
break;
}
@@ -1398,10 +1398,17 @@ static unsigned extract_mtd_month(struct mci *mci)
*/
static unsigned extract_mtd_year(struct mci *mci)
{
+ unsigned year;
if (IS_SD(mci))
- return UNSTUFF_BITS(mci->cid, 12, 8) + 2000;
- else
+ year = UNSTUFF_BITS(mci->cid, 12, 8) + 2000;
+ else if (mci->version < MMC_VERSION_4_41)
return UNSTUFF_BITS(mci->cid, 8, 4) + 1997;
+ else {
+ year = UNSTUFF_BITS(mci->cid, 8, 4) + 1997;
+ if (year < 2010)
+ year += 16;
+ }
+ return year;
}
static void mci_print_caps(unsigned caps)
@@ -1448,7 +1455,7 @@ static void mci_info(struct device_d *dev)
(mci->version >> 4) & 0xf, mci->version & 0xf);
} else {
printf(" Attached is an SD Card (Version: %u.%u)\n",
- (mci->version >> 4) & 0xf, mci->version & 0xf);
+ (mci->version >> 8) & 0xf, mci->version & 0xff);
}
printf(" Capacity: %u MiB\n", (unsigned)(mci->capacity >> 20));
--
1.7.9.5
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Re: [PATCH] Make number of GPT partitions a configurable option
On Fri, Jan 10, 2014 at 09:24:24AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 09:02 Fri 10 Jan , Sascha Hauer wrote: > > On Thu, Jan 09, 2014 at 09:59:33PM +0530, Santosh Sivaraj wrote: > > > * Santosh Sivaraj wrote (on 2014-01-09 21:36:41 > > > +0530): > > > > > > adding list, missed it. > > > > > > > > > > > > Can we instead allocate the partitions dynamically? This limitation > > > > > > to > > > > > > eight partitions we currently have is not nice, but making it > > > > > > configurable is not a proper fix. > > > > > > > > > > agreed but a limit will be good too > > > > > > > > > > Best Regards, > > > > > J. > > > > > > > > > > > > Sascha > > > > > > > > > > > > > > We could keep a configurable maximum, with a high default, but do the > > > > allocation > > > > dynamically. I will try to send in a patch, we can discuss how it needs > > > > to be > > > > done over it. > > > > It shouldn't be configurable in Kconfig. That's not a question a user > > should have to answer when configuring barebox. I high default would be > > fine with me though since memory usually is an infinite resource in > > barebox. > > I'm more thiking of a broken EFI GPT that have 1000s of partition > > do we really need to handle that Indeed it seems we can assume that something is wrong when a device has 1000s of partitions. So where do we set the border? 64? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] Make number of GPT partitions a configurable option
On 09:02 Fri 10 Jan , Sascha Hauer wrote: > On Thu, Jan 09, 2014 at 09:59:33PM +0530, Santosh Sivaraj wrote: > > * Santosh Sivaraj wrote (on 2014-01-09 21:36:41 +0530): > > > > adding list, missed it. > > > > > > > > > > Can we instead allocate the partitions dynamically? This limitation to > > > > > eight partitions we currently have is not nice, but making it > > > > > configurable is not a proper fix. > > > > > > > > agreed but a limit will be good too > > > > > > > > Best Regards, > > > > J. > > > > > > > > > > Sascha > > > > > > > > > > > We could keep a configurable maximum, with a high default, but do the > > > allocation > > > dynamically. I will try to send in a patch, we can discuss how it needs > > > to be > > > done over it. > > It shouldn't be configurable in Kconfig. That's not a question a user > should have to answer when configuring barebox. I high default would be > fine with me though since memory usually is an infinite resource in > barebox. I'm more thiking of a broken EFI GPT that have 1000s of partition do we really need to handle that Best Regards, J. > > Sascha > > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 01/10] ARM: imx6: pull imx6qdl-pingrp.h from linux
On Tue, Jan 07, 2014 at 07:12:47PM +0100, Lucas Stach wrote:
> From: Lucas Stach
>
> This makes it possible to pull other DT changes from
> the linux kernel repo. Plus it will make it possible
> to slim down the i.MX6 dtbs at a later point.
>
> Signed-off-by: Lucas Stach
Applied, thanks
Sascha
> ---
> arch/arm/dts/imx6dl.dtsi | 1 +
> arch/arm/dts/imx6q.dtsi | 1 +
> arch/arm/dts/imx6qdl-pingrp.h | 526
> ++
> 3 files changed, 528 insertions(+)
> create mode 100644 arch/arm/dts/imx6qdl-pingrp.h
>
> diff --git a/arch/arm/dts/imx6dl.dtsi b/arch/arm/dts/imx6dl.dtsi
> index e9cb589..cdf31c7 100644
> --- a/arch/arm/dts/imx6dl.dtsi
> +++ b/arch/arm/dts/imx6dl.dtsi
> @@ -9,6 +9,7 @@
> */
>
> #include "imx6dl-pinfunc.h"
> +#include "imx6qdl-pingrp.h"
> #include "imx6qdl.dtsi"
>
> / {
> diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
> index 0377cce..84ed89e 100644
> --- a/arch/arm/dts/imx6q.dtsi
> +++ b/arch/arm/dts/imx6q.dtsi
> @@ -9,6 +9,7 @@
> */
>
> #include "imx6q-pinfunc.h"
> +#include "imx6qdl-pingrp.h"
> #include "imx6qdl.dtsi"
>
> / {
> diff --git a/arch/arm/dts/imx6qdl-pingrp.h b/arch/arm/dts/imx6qdl-pingrp.h
> new file mode 100644
> index 000..8d71b13
> --- /dev/null
> +++ b/arch/arm/dts/imx6qdl-pingrp.h
> @@ -0,0 +1,526 @@
> +/*
> + * Copyright (C) 2013 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + */
> +
> +#ifndef __DTS_IMX6QDL_PINGRP_H
> +#define __DTS_IMX6QDL_PINGRP_H
> +
> +#define MX6QDL_AUDMUX_PINGRP1 \
> + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 \
> + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 \
> + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 \
> + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
> +
> +#define MX6QDL_AUDMUX_PINGRP2 \
> + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 \
> + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 \
> + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 \
> + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
> +
> +#define MX6QDL_AUDMUX_PINGRP3 \
> + MX6QDL_PAD_DISP0_DAT16__AUD5_TXC0x130b0 \
> + MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0 \
> + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD0x130b0 \
> +
> +#define MX6QDL_AUDMUX_PINGRP4 \
> + MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0 \
> + MX6QDL_PAD_EIM_D25__AUD5_RXC0x130b0 \
> + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD0x130b0
> +
> +#define MX6QDL_ECSPI1_PINGRP1 \
> + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 \
> + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 \
> + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
> +
> +#define MX6QDL_ECSPI1_PINGRP2 \
> + MX6QDL_PAD_KEY_COL1__ECSPI1_MISO0x100b1 \
> + MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI0x100b1 \
> + MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK0x100b1
> +
> +#define MX6QDL_ECSPI3_PINGRP1 \
> + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 \
> + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 \
> + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
> +
> +#define MX6QDL_ENET_PINGRP1 \
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 \
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 \
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b0 \
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 \
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 \
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 \
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 \
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 \
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 \
> + MX6QDL_PAD_GPIO_16__ENET_REF_CLK0x4001b0a8
> +
> +#define MX6QDL_ENET_PINGRP2 \
> + MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 \
> + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 \
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0
Re: Porting barebox (devicetree) to Variscite iMX6 SOM
On Thu, Jan 09, 2014 at 02:20:33AM -0500, Michael Burkey wrote: > A few more comments & questions regarding getting the Variscite SOM up > and working (and it's pretty close to fully working at this point): > > First off, what works: > > 1) Booting from NAND, SD, etc to barebox > 2) Nand programming under barebox > 3) GPIO > 4) I2C > 5) USB > 6) RS232 > etc. > > Basically, things are working pretty wellup to the point of > starting the Linux Kernel. > > Whenever I try to do a "bootm" of pretty much any image type, I run > into issues. I *think* I have everything setup properly on the Linux > command line in the way of bootargs (but I'm still checking a couple > of things). It doesn't matter whether I am launching the kernel from a > partition (NAND), USB, memory, etc. The result is the same regardless. > It *does* decode the kernel header properly, display the version, the > correct load address, etc -- so that's not the issue. > > One thing is that I am using an older kernel that is not setup for > devicetree -- which is hopefully not a major problem. Basically, > everything is specified "the old way" in the kernel platform/board > files (and it works fine from u-boot). And, at least for now, moving > to a newer kernel isn't an option. > > Under barebox, I either get a "launching kernel with devicetree" and > then it hangs, Ok, this is expected since your kernel does not have devicetree support > or, if I do an "oftree -f" and then do a bootm, That's the correct thing to do. With this it should work. > I get > an "unable to dereference NULL pointer" and a restart. You could enable: [*] enable arm exception handling support [*] enable stack unwinding support and [*] kallsyms With this barebox prints a backtrace giving a clue where the NULL pointer deref happens. > > Any quick guesses, suggestions as to what I may be doing wrong? > Is there a proper way to tell barebox (when started with devicetree) > to NOT try to send the devicetree on to the kernel? > > Also, for the moment, I am using Kobs-NG under Linux to actually > program barebox itself into NAND. Once there, it works fine and I can > use barebox itself to program the other NAND partitions. Is adding > support for writing out the FCB/DBBT to the first NAND blocks anywhere > in the current (near-term) to do list for barebox? I noticed that it > looked like you had something similar to this already in barebox for a > couple of the other, earlier iMX cores. > > > Lastly, once I do get this semi-final issue fixed, what is the best > way to submit the code for the Variscite SOM to the main barebox tree > for everyone else to have access to? Just post the patches to the list. I'll include them then. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/2] ARM: i.MX51: Sync DT files with kernel
On Fri, Jan 10, 2014 at 11:58:00AM +0400, Alexander Shiyan wrote: > Hello. > > Пятница, 10 января 2014, 8:39 +01:00 от Sascha Hauer : > > On Wed, Jan 08, 2014 at 09:44:15AM +0400, Alexander Shiyan wrote: > > > This patch includes update i.MX51 template and porting some barebox > > > DTS files to use new template. > > > > > > Signed-off-by: Alexander Shiyan > > > > Applied, thanks > > Can you post imx51-genesi-efika-sb.dts into the kernel mainline to handle > further > possible updates by kernel community? I want to do that once I have USB working on the efika without additional patches. The kernel still misses ULPI support. Without USB the efika is not much more than a paperweight. But you are right, for the sake of better maintenance it should be in the kernel. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] Make number of GPT partitions a configurable option
On Thu, Jan 09, 2014 at 09:59:33PM +0530, Santosh Sivaraj wrote: > * Santosh Sivaraj wrote (on 2014-01-09 21:36:41 +0530): > > adding list, missed it. > > > > > > > > Can we instead allocate the partitions dynamically? This limitation to > > > > eight partitions we currently have is not nice, but making it > > > > configurable is not a proper fix. > > > > > > agreed but a limit will be good too > > > > > > Best Regards, > > > J. > > > > > > > > Sascha > > > > > > > > We could keep a configurable maximum, with a high default, but do the > > allocation > > dynamically. I will try to send in a patch, we can discuss how it needs to > > be > > done over it. It shouldn't be configurable in Kconfig. That's not a question a user should have to answer when configuring barebox. I high default would be fine with me though since memory usually is an infinite resource in barebox. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: Porting barebox (devicetree) to Variscite iMX6 SOM
On Thu, Jan 09, 2014 at 02:59:33PM -0500, Michael Burkey wrote: > Sascha, > > Since I am still having issues with the kernel booting -- and needed a > bit of a break to clear my mind -- I decided to delve into the initial > barebox bootup from NAND a bit more. > > Correct me if I am wrong, but how I understand things right now... > > The iMX6 requires a BCB header prior to the actual barebox partition > (e.g. nand0.bootstream). This bootstream partition would contain the > BCB data specific to the iMX6 (i.e. an FCB and at least a partial > DBBT). Yes, right. > > It also looks like this functionality is already present in barebox > for the MX23/28 series of parts (i.e. the "bcb" command). Yes. > > I also have the source for kobs-ng v1.3, which does properly generate > the BCB for the MX6 series (and is what I am currently using to flash > barebox into NAND). Yes, kobs works for me aswell on i.MX6 > > So, basically, it sounds like what I need to do is migrate the bcb.c > file from the arm/mach-mxs folder into the MX6 portion of the tree and > then update it based on the datasheet and the "known good" parameters > from kobs-ng v1.3 (which look fairly similar to the definitions you > already have in place for the MX23/28 FCB). > > Does this sound like a reasonable plan of action? Indeed. I tried Doing that myself, but it didn't work, probably some little piece was missing. I also started to port the original kobs code to barebox, but was distracted. I can give you the code I have so far if you like. > > It really looks like life with the iMX6 would be much easier if I had > a SPI-NOR on this SOM, instead of NAND only. Yeah, indeed. I usually recommend our customers to not rely on NAND for booting. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
