[PATCH] i.MX6: bbu: Barebox update support for NAND.
This patch implements updating barebox on i.MX6 NAND. In userspace
similar task is performed by freescale kobs-ng utility.
To use this bbu profile nand handler should be registered in board
code with 'imx6_bbu_internal_nand_register_handler' function.
Signed-off-by: Dmitry Lavnikevich d.lavnikev...@sam-solutions.com
Signed-off-by: Grigory Milev g.mi...@sam-solutions.com
---
arch/arm/mach-imx/imx-bbu-internal.c | 745 -
arch/arm/mach-imx/include/mach/bbu.h | 9 +
arch/arm/mach-imx/include/mach/imx6-regs.h | 1 +
3 files changed, 747 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-imx/imx-bbu-internal.c
b/arch/arm/mach-imx/imx-bbu-internal.c
index 9861c07..4443575 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -16,28 +16,67 @@
* GNU General Public License for more details.
*/
-#define IMX_INTERNAL_NAND_BBU
-
#include common.h
+#include command.h
+#include environment.h
#include malloc.h
-#include bbu.h
-#include filetype.h
+#include nand.h
+#include sizes.h
#include errno.h
-#include fs.h
+#include io.h
#include fcntl.h
-#include sizes.h
-#include linux/mtd/mtd-abi.h
-#include linux/stat.h
+#include libbb.h
+#include fs.h
#include ioctl.h
#include mach/bbu.h
#include mach/imx-flash-header.h
+#include linux/err.h
+#include linux/mtd/nand.h
+
+#define GPMI_TIMING0 0x0070
+#defineGPMI_TIMING0_ADDRESS_SETUP_MASK (0xff 16)
+#defineGPMI_TIMING0_ADDRESS_SETUP_OFFSET 16
+#defineGPMI_TIMING0_DATA_HOLD_MASK (0xff 8)
+#defineGPMI_TIMING0_DATA_HOLD_OFFSET 8
+#defineGPMI_TIMING0_DATA_SETUP_MASK0xff
+#defineGPMI_TIMING0_DATA_SETUP_OFFSET 0
+
+#define BCH_FLASH0LAYOUT0 0x0080
+#defineBCH_FLASHLAYOUT0_NBLOCKS_MASK (0xff 24)
+#defineBCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24
+#defineBCH_FLASHLAYOUT0_META_SIZE_MASK (0xff 16)
+#defineBCH_FLASHLAYOUT0_META_SIZE_OFFSET 16
+#defineBCH_FLASHLAYOUT0_ECC0_MASK (0x1f 11)
+#defineBCH_FLASHLAYOUT0_ECC0_OFFSET11
+#defineBCH_FLASHLAYOUT0_DATA0_SIZE_MASK0x3ff
+#defineBCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET 0
+
+#define BCH_FLASH0LAYOUT1 0x0090
+#defineBCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0x 16)
+#defineBCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET 16
+#defineBCH_FLASHLAYOUT1_ECCN_MASK (0x1f 11)
+#defineBCH_FLASHLAYOUT1_ECCN_OFFSET11
+#defineBCH_FLASHLAYOUT1_DATAN_SIZE_MASK0x3ff
+#defineBCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET 0
+
+#define ECC_BLOCK_SIZE 512
+#define SEARCH_EXPONENT 2
+#define PAGES_PER_STRIDE 64
+#define SEARCH_AREA_SIZE_IN_STRIDES (1 SEARCH_EXPONENT)
+#define SEARCH_AREA_SIZE_IN_PAGES \
+ (SEARCH_AREA_SIZE_IN_STRIDES * PAGES_PER_STRIDE)
+
+#define IMX_INTERNAL_NAND_BBU
+
#define FLASH_HEADER_OFFSET_MMC0x400
#define IMX_INTERNAL_FLAG_NAND (1 0)
#define IMX_INTERNAL_FLAG_KEEP_DOSPART (1 1)
#define IMX_INTERNAL_FLAG_ERASE(1 2)
+#define TYPICAL_NAND_READ_SIZE 2048
+
struct imx_internal_bbu_handler {
struct bbu_handler handler;
const void *dcd;
@@ -48,6 +87,140 @@ struct imx_internal_bbu_handler {
unsigned long flags;
};
+struct mx6_nand_timing {
+ u8 data_setup;
+ u8 data_hold;
+ u8 address_setup;
+ u8 dsample_time;
+ u8 nand_timing_state;
+ u8 tREA;
+ u8 tRLOH;
+ u8 tRHOH;
+};
+
+struct mx6_tm_timing2 {
+ u32 read_latency;
+ u32 preamble_delay;
+ u32 ce_delay;
+ u32 postamble_delay;
+ u32 cmd_add_pause;
+ u32 data_pause;
+};
+
+struct mx6_onfi {
+ u32 onfi_sync_enable;
+ u32 onfi_sync_speed;
+ u32 read_latency;
+ u32 ce_delay;
+ u32 preamble_delay;
+ u32 postamble_delay;
+ u32 cmdadd_pause;
+ u32 data_pause;
+ u32 busy_timeout;
+};
+
+struct mx6_fcb {
+ u32 checksum;
+ u32 fingerprint;
+ u32 version;
+ struct mx6_nand_timing timing;
+ u32 page_data_size;
+ u32 total_page_size;
+ u32 sectors_per_block;
+ u32 number_of_nands;/* not used by ROM code */
+ u32 total_internal_die; /* not used by ROM code */
+ u32 cell_type; /* not used by ROM code */
+ u32 ecc_blockn_type;
+ u32 ecc_block0_size;
+ u32 ecc_blockn_size;
+ u32 ecc_block0_type;
+ u32 metadata_size;
+ u32 ecc_blocks_per_page;
+ u32 rsrvd[7];/* not used by ROM code */
+ u32 rsrvd_unspec[2]; /* not
[PATCH] ARM: socfpga: socrates: fix ENTRY_FUNCTION
The commit
ARM: Make ENTRY_FUNCTION more robust
changed the behaviour of the ENTRY_FUNCTION. For the Socrates the call to
__barebox_arm_head() was not removed. Do so now otherwise the Socrates will
not be able to boot barebox.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
arch/arm/boards/ebv-socrates/lowlevel.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c
b/arch/arm/boards/ebv-socrates/lowlevel.c
index e93ae38..035df70 100644
--- a/arch/arm/boards/ebv-socrates/lowlevel.c
+++ b/arch/arm/boards/ebv-socrates/lowlevel.c
@@ -49,8 +49,6 @@ ENTRY_FUNCTION(start_socfpga_socrates, r0, r1, r2)
{
uint32_t fdt;
- __barebox_arm_head();
-
arm_cpu_lowlevel_init();
fdt = (uint32_t)__dtb_socfpga_cyclone5_socrates_start -
get_runtime_offset();
--
1.9.0
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Re: [PATCH 1/5] mtd: Update internal API to support 64-bit device size
On Tue, Mar 11, 2014 at 08:50:44AM +0100, Alexander Aring wrote: On Tue, Mar 11, 2014 at 06:29:22AM +0100, Sascha Hauer wrote: offset but we should do it right at first time. Yes, right. We should make this uint64_t. There are also more things which needs a uint64_t like the offset parameter of libmtd_* functions. :-/ The libmtd functions should be 64bit already. The remaining bits are in Dmitrys series. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/5] mtd: Update internal API to support 64-bit device size
On Mon, Mar 10, 2014 at 02:39:49PM +0300, Dmitry Lavnikevich wrote:
MTD internal API presently uses 32-bit values to represent device
size. This patch updates them to 64-bits but leaves the external API
unchanged.
In general, changing from 32-bit to 64-bit values cause little
or no changes to the majority of the code with the following
exceptions:
- printk message formats;
- division and modulus of 64-bit values (mtd_div_by_wb,
mtd_div_by_eb may be used in some of such cases).
Was tested on phyFLEX i.MX6.
changed master_offset to 64bit aswell and applied this series.
Thanks
Sascha
Signed-off-by: Dmitry Lavnikevich d.lavnikev...@sam-solutions.com
Signed-off-by: Grigory Milev g.mi...@sam-solutions.com
---
commands/nandtest.c | 2 +-
commands/partition.c| 11 ++-
drivers/mtd/core.c | 2 +-
drivers/mtd/devices/m25p80.c| 5 +++--
drivers/mtd/devices/mtd_dataflash.c | 2 +-
drivers/mtd/mtdoob.c| 2 +-
drivers/mtd/mtdraw.c| 2 +-
include/linux/mtd/mtd-abi.h | 12 +++-
include/linux/mtd/mtd.h | 9 -
lib/libmtd.c| 10 +-
10 files changed, 38 insertions(+), 19 deletions(-)
diff --git a/commands/nandtest.c b/commands/nandtest.c
index 0da5444..c64f244 100644
--- a/commands/nandtest.c
+++ b/commands/nandtest.c
@@ -277,7 +277,7 @@ static int do_nandtest(int argc, char *argv[])
}
if (length + flash_offset meminfo.size) {
printf(Length 0x%08llx + offset 0x%08llx exceeds
- device size 0x%08x\n, length,
+ device size 0x%08llx\n, length,
flash_offset, meminfo.size);
goto err;
}
diff --git a/commands/partition.c b/commands/partition.c
index 6d37471..f825722 100644
--- a/commands/partition.c
+++ b/commands/partition.c
@@ -42,10 +42,11 @@
#define PART_ADD_DEVNAME (1 0)
static int mtd_part_do_parse_one(char *devname, const char *partstr,
- char **endp, unsigned long *offset,
- off_t devsize, size_t *retsize, unsigned int
pflags)
+ char **endp, loff_t *offset,
+ loff_t devsize, size_t *retsize,
+ unsigned int pflags)
{
- ulong size;
+ loff_t size;
char *end;
char buf[PATH_MAX] = {};
unsigned long flags = 0;
@@ -114,8 +115,8 @@ static int do_addpart(int argc, char *argv[])
{
char *devname;
char *endp;
- unsigned long offset = 0;
- off_t devsize;
+ loff_t offset = 0;
+ loff_t devsize;
struct stat s;
int opt;
unsigned int flags = PART_ADD_DEVNAME;
diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c
index 6db1c6d..7efb03c 100644
--- a/drivers/mtd/core.c
+++ b/drivers/mtd/core.c
@@ -397,7 +397,7 @@ int add_mtd_device(struct mtd_info *mtd, char *devname,
int device_id)
mtd-cdev.mtd = mtd;
if (IS_ENABLED(CONFIG_PARAMETER)) {
- dev_add_param_int_ro(mtd-class_dev, size, mtd-size, %u);
+ dev_add_param_int_ro(mtd-class_dev, size, mtd-size,
%llu);
dev_add_param_int_ro(mtd-class_dev, erasesize,
mtd-erasesize, %u);
dev_add_param_int_ro(mtd-class_dev, writesize,
mtd-oobsize, %u);
dev_add_param_int_ro(mtd-class_dev, oobsize, mtd-oobsize,
%u);
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 9594011..757a717 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -273,8 +273,9 @@ static int erase_sector(struct m25p *flash, u32 offset,
u32 command)
static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct m25p *flash = mtd_to_m25p(mtd);
- u32 addr, len;
+ u32 addr;
uint32_t rem;
+ uint64_t len;
dev_dbg(flash-spi-dev, %s at 0x%llx, len %lld\n,
__func__, (long long)instr-addr,
@@ -896,7 +897,7 @@ static int m25p_probe(struct device_d *dev)
flash-mtd.type = MTD_NORFLASH;
flash-mtd.writesize = 1;
flash-mtd.flags = MTD_CAP_NORFLASH;
- flash-mtd.size = info-sector_size * info-n_sectors;
+ flash-mtd.size = (uint64_t)info-sector_size * info-n_sectors;
flash-mtd.erase = m25p80_erase;
flash-mtd.read = m25p80_read;
diff --git a/drivers/mtd/devices/mtd_dataflash.c
b/drivers/mtd/devices/mtd_dataflash.c
index cdc0120..fa31b61 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -625,7 +625,7 @@ add_dataflash_otp(struct spi_device *spi, char *name,
device = priv-mtd;
device-name = (pdata pdata-name) ? pdata-name : dataflash;
- device-size = nr_pages * pagesize;
+ device-size =
Re: [PATCH] ARM: socfpga: socrates: fix ENTRY_FUNCTION
On Wed, Mar 12, 2014 at 09:06:05AM +0100, Steffen Trumtrar wrote:
The commit
ARM: Make ENTRY_FUNCTION more robust
changed the behaviour of the ENTRY_FUNCTION. For the Socrates the call to
__barebox_arm_head() was not removed. Do so now otherwise the Socrates will
not be able to boot barebox.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
Applied, thanks
Sascha
---
arch/arm/boards/ebv-socrates/lowlevel.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c
b/arch/arm/boards/ebv-socrates/lowlevel.c
index e93ae38..035df70 100644
--- a/arch/arm/boards/ebv-socrates/lowlevel.c
+++ b/arch/arm/boards/ebv-socrates/lowlevel.c
@@ -49,8 +49,6 @@ ENTRY_FUNCTION(start_socfpga_socrates, r0, r1, r2)
{
uint32_t fdt;
- __barebox_arm_head();
-
arm_cpu_lowlevel_init();
fdt = (uint32_t)__dtb_socfpga_cyclone5_socrates_start -
get_runtime_offset();
--
1.9.0
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--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH 1/5] mtd: Update internal API to support 64-bit device size
Hi Sascha, On Wed, Mar 12, 2014 at 09:28:48PM +0100, Sascha Hauer wrote: On Mon, Mar 10, 2014 at 02:39:49PM +0300, Dmitry Lavnikevich wrote: MTD internal API presently uses 32-bit values to represent device size. This patch updates them to 64-bits but leaves the external API unchanged. In general, changing from 32-bit to 64-bit values cause little or no changes to the majority of the code with the following exceptions: - printk message formats; - division and modulus of 64-bit values (mtd_div_by_wb, mtd_div_by_eb may be used in some of such cases). Was tested on phyFLEX i.MX6. changed master_offset to 64bit aswell and applied this series. ok, cool! But.. damn it there is still a ugly comment in lib/libmtd.c: NOTE: No support for 64 bit sizes yet! hehe. :-) - Alex ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/8] clocksource: add dummy software-only clocksource
On Tue, Mar 11, 2014 at 01:34:34AM +0400, Antony Pavlov wrote: This driver is very handy for initial barebox porting. It was used for running barebox on DiGiC2-based camera and initial porting barebox to Loongson-1 and ar9331. Signed-off-by: Antony Pavlov antonynpav...@gmail.com Signed-off-by: Sascha Hauer s.ha...@pengutronix.de Reported-by: Alexander Aring alex.ar...@gmail.com Reported-by: Alexander Shiyan shc_w...@mail.ru --- drivers/clocksource/Kconfig | 9 +++ drivers/clocksource/Makefile | 1 + drivers/clocksource/dummy.c | 56 3 files changed, 66 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4ef25ec..f9e00ff 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -14,6 +14,15 @@ config CLOCKSOURCE_CLPS711X bool depends on ARCH_CLPS711X +config CLOCKSOURCE_DUMMY + bool Enable dummy software-only clocksource + default n You can drop the default n, no is the default already. Could you add some help text mentioning that this clocksource is for early bringup only and doesn't provide correct timing? + +config CLOCKSOURCE_DUMMY_RATE + int compile loglevel copy/paste ;) ? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/5] mtd: Update internal API to support 64-bit device size
On Wed, Mar 12, 2014 at 09:51:46PM +0100, Alexander Aring wrote: Hi Sascha, On Wed, Mar 12, 2014 at 09:28:48PM +0100, Sascha Hauer wrote: On Mon, Mar 10, 2014 at 02:39:49PM +0300, Dmitry Lavnikevich wrote: MTD internal API presently uses 32-bit values to represent device size. This patch updates them to 64-bits but leaves the external API unchanged. In general, changing from 32-bit to 64-bit values cause little or no changes to the majority of the code with the following exceptions: - printk message formats; - division and modulus of 64-bit values (mtd_div_by_wb, mtd_div_by_eb may be used in some of such cases). Was tested on phyFLEX i.MX6. changed master_offset to 64bit aswell and applied this series. ok, cool! But.. damn it there is still a ugly comment in lib/libmtd.c: NOTE: No support for 64 bit sizes yet! Maybe this should be removed by somebody who has tested this code with devices 4GB. I don't have the hardware for this. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] ARM: i.MX25: freescale-mx25-3stack: Remove USBH2 pin setting
From: Fabio Estevam fabio.este...@freescale.com
mx25-3stack only uses USBH1 and USBOTG, so remove USBH2 related pin setting.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/boards/freescale-mx25-3ds/3stack.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/boards/freescale-mx25-3ds/3stack.c
b/arch/arm/boards/freescale-mx25-3ds/3stack.c
index f10..f2f838f 100644
--- a/arch/arm/boards/freescale-mx25-3ds/3stack.c
+++ b/arch/arm/boards/freescale-mx25-3ds/3stack.c
@@ -180,21 +180,6 @@ static iomux_v3_cfg_t imx25_pads[] = {
MX25_PAD_UART1_TXD__UART1_TXD,
MX25_PAD_UART1_RTS__UART1_RTS,
MX25_PAD_UART1_CTS__UART1_CTS,
- /* USBH2 */
- MX25_PAD_D9__USBH2_PWR,
- MX25_PAD_D8__USBH2_OC,
- MX25_PAD_LD0__USBH2_CLK,
- MX25_PAD_LD1__USBH2_DIR,
- MX25_PAD_LD2__USBH2_STP,
- MX25_PAD_LD3__USBH2_NXT,
- MX25_PAD_LD4__USBH2_DATA0,
- MX25_PAD_LD5__USBH2_DATA1,
- MX25_PAD_LD6__USBH2_DATA2,
- MX25_PAD_LD7__USBH2_DATA3,
- MX25_PAD_HSYNC__USBH2_DATA4,
- MX25_PAD_VSYNC__USBH2_DATA5,
- MX25_PAD_LSCLK__USBH2_DATA6,
- MX25_PAD_OE_ACD__USBH2_DATA7,
/* i2c */
MX25_PAD_I2C1_CLK__I2C1_CLK,
MX25_PAD_I2C1_DAT__I2C1_DAT,
--
1.8.1.2
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Porting barebox to Novena: misc questions
Hi, I've finally managed to get U-Boot's SPL to configure DDR3 and load barebox off of a FAT partition on an i.MX6DL. I also have a barebox build with most features turned on, and I'm running into a number of problems. barebox is able to load a zImage off of the FAT partition, set up ATAGs, and jump to it. So I have the basics done. But there are lots of little things that aren't working. When I boot without an Ethernet cable plugged in, the timeout command takes a very long time to complete. It generally freezes at Hit any key to stop autoboot: 3 and tends to ignore input for around ten seconds. How can I prevent this from happening, short of compiling out FEC support? The usb command just hangs the system. It should at least detect the other ASIX Ethernet port. I have usbh1 configured identically to sabrelite. Is there something else I need to configure? The usbserial command returns usbserial: No such device. Like usb, I have usbotg configured the same as sabrelite. It doesn't work with dr_mode set to either host or otg. How can I pass the correct ram size to Linux? The comment on barebox_arm_entry() notes that [memsize] doesn't necessarily have to be the full SDRAM, and indeed I notice that barebox hangs if I pass it the full 3840 MB passed from U-Boot. So I'm currently limiting it to 1GB in my start_imx6dl_kosagi_novena_6dl routine. Do I need to somehow add the remainder as another bank somewhere? Or modify the bank size in my kosagi_novena_init() in board.c? Finally, I was unable to get barebox to boot with MMU support. For some reason it kept trying to allocate memory just outside of allocated RAM. Is there any benefit to running with the MMU enabled on i.MX6? Sean ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/8] clocksource: add dummy software-only clocksource
On Wed, 12 Mar 2014 21:50:41 +0100 Sascha Hauer s.ha...@pengutronix.de wrote: On Tue, Mar 11, 2014 at 01:34:34AM +0400, Antony Pavlov wrote: This driver is very handy for initial barebox porting. It was used for running barebox on DiGiC2-based camera and initial porting barebox to Loongson-1 and ar9331. Signed-off-by: Antony Pavlov antonynpav...@gmail.com Signed-off-by: Sascha Hauer s.ha...@pengutronix.de Reported-by: Alexander Aring alex.ar...@gmail.com Reported-by: Alexander Shiyan shc_w...@mail.ru --- drivers/clocksource/Kconfig | 9 +++ drivers/clocksource/Makefile | 1 + drivers/clocksource/dummy.c | 56 3 files changed, 66 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4ef25ec..f9e00ff 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -14,6 +14,15 @@ config CLOCKSOURCE_CLPS711X bool depends on ARCH_CLPS711X +config CLOCKSOURCE_DUMMY + bool Enable dummy software-only clocksource + default n You can drop the default n, no is the default already. Could you add some help text mentioning that this clocksource is for early bringup only and doesn't provide correct timing? Ok, I'll write a help text. Yesterday I got working davinci hardware clocksource :) So I have no dependency on dummy clocksource for Davinci. What is about the rest of davinci patches? + +config CLOCKSOURCE_DUMMY_RATE + int compile loglevel copy/paste ;) ? :) -- Best regards, Antony Pavlov ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
