[PATCH] ARM: [phyFLEX,phyCARD]-i.MX6: rename define in flash-headers
The files flash-header-*.imxfg contains two defines which are use in include files flash-header-phytec-*.h. The first define is SETUP_MDCFG0. In the second define name some RAM size value were used, e.g. SETUP_S_DL_512MB_1GB or SETUP_1GIB_2GIB_4GIB. It's better to name also the second define after the register names, here MMDC1_MDCTL and MMDC1_MDASP, because these values changes for every RAM configurations and it's consistent with the first define. Signed-off-by: Stefan Christ s.chr...@phytec.de --- .../flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg| 4 +++- .../phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg | 4 +++- .../phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg | 5 +++-- arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h| 3 ++- .../phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg | 2 +- .../phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg | 2 +- .../phytec-phyflex-imx6/flash-header-phytec-pfla02-2gib.imxcfg | 2 +- .../phytec-phyflex-imx6/flash-header-phytec-pfla02-4gib.imxcfg | 2 +- arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02.h | 2 +- .../phytec-phyflex-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg | 2 +- arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl.h | 2 +- .../phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg | 2 +- 12 files changed, 19 insertions(+), 13 deletions(-) diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg index 481e085..62a24ed 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg @@ -1,5 +1,7 @@ -#define SETUP_1GIB_2GIB\ +#define SETUP_MDCFG0 \ wm 32 0x021b000c 0x54597955;\ + +#define SETUP_MDOR_MDASP_MDCTL \ wm 32 0x021b0030 0x00591023;\ wm 32 0x021b0040 0x0027;\ wm 32 0x021b 0x831a diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg index b21bd89..bab726d 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg +++ b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg @@ -1,5 +1,7 @@ -#define SETUP_1GIB_2GIB\ +#define SETUP_MDCFG0 \ wm 32 0x021b000c 0x3a3f7975;\ + +#define SETUP_MDOR_MDASP_MDCTL \ wm 32 0x021b0030 0x003f1023;\ wm 32 0x021b0040 0x0017;\ wm 32 0x021b 0xc21a diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg index 858b6d7..512f6cb 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg +++ b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg @@ -1,6 +1,7 @@ - -#define SETUP_1GIB_2GIB\ +#define SETUP_MDCFG0 \ wm 32 0x021b000c 0x54597955;\ + +#define SETUP_MDOR_MDASP_MDCTL \ wm 32 0x021b0030 0x00591023;\ wm 32 0x021b0040 0x0027;\ wm 32 0x021b 0xc31a diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h index aecaf16..a03b8dc 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h +++ b/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h @@ -58,7 +58,8 @@ wm 32 0x021b002c 0x26d2 wm 32 0x021b0008 0x09444040 wm 32 0x021b0004 0x00025576 -SETUP_1GIB_2GIB +SETUP_MDCFG0 +SETUP_MDOR_MDASP_MDCTL wm 32 0x021b001c 0x04088032 wm 32 0x021b001c 0x0408803a diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg b/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg index e414b6e..75dc982 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg @@ -1,7 +1,7 @@ #define SETUP_MDCFG0\ wm 32 0x021b000c 0x565c9b85 -#define SETUP_1GIB_2GIB_4GIB \ +#define SETUP_MDASP_MDCTL \ wm 32 0x021b0040 0x0027;\ wm 32 0x021b 0x831a diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg b/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg index f6061f2..1f1fbe5 100644 ---
[PATCH 2/4] net: enc28j60: fix set mac function signature
Fixes:
drivers/net/enc28j60.c: In function 'enc28j60_probe':
drivers/net/enc28j60.c:947:20: warning: assignment from incompatible pointer
type
edev-set_ethaddr = enc28j60_set_ethaddr;
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
drivers/net/enc28j60.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 76b3df63f6ec..6550c59fc8d2 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -422,7 +422,7 @@ static int enc28j60_get_ethaddr(struct eth_device *edev,
unsigned char *m)
* Program the hardware MAC address from dev-dev_addr.
*/
static int enc28j60_set_ethaddr(struct eth_device *edev,
- unsigned char *mac_addr)
+ const unsigned char *mac_addr)
{
int ret;
struct enc28j60_net *priv = edev-priv;
--
2.1.4
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[PATCH 4/4] pinctrl: imx-iomux-v2: correct names in EXPORT_SYMBOL macros
The functions have been renamed, but this has not been reflected in the
EXPORT_SYMBOL macros. Do that now.
Fixes several errors like this:
drivers/pinctrl/imx-iomux-v2.c:61:15: error:
'mxc_iomux_mode' undeclared here (not in a function)
EXPORT_SYMBOL(mxc_iomux_mode);
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
drivers/pinctrl/imx-iomux-v2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/imx-iomux-v2.c b/drivers/pinctrl/imx-iomux-v2.c
index 2622d9a2d654..1e0e8e9fd672 100644
--- a/drivers/pinctrl/imx-iomux-v2.c
+++ b/drivers/pinctrl/imx-iomux-v2.c
@@ -58,7 +58,7 @@ int imx_iomux_mode(unsigned int pin_mode)
return ret;
}
-EXPORT_SYMBOL(mxc_iomux_mode);
+EXPORT_SYMBOL(imx_iomux_mode);
/*
* This function configures the pad value for a IOMUX pin.
@@ -83,7 +83,7 @@ void imx_iomux_set_pad(enum iomux_pins pin, u32 config)
l |= config (field * 10);
writel(l, reg);
}
-EXPORT_SYMBOL(mxc_iomux_set_pad);
+EXPORT_SYMBOL(imx_iomux_set_pad);
/*
* This function enables/disables the general purpose function for a particular
@@ -104,7 +104,7 @@ void imx_iomux_set_gpr(enum iomux_gp_func gp, bool en)
writel(l, base + IOMUXGPR);
}
-EXPORT_SYMBOL(mxc_iomux_set_gpr);
+EXPORT_SYMBOL(imx_iomux_set_gpr);
int imx_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count)
{
--
2.1.4
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[PATCH 1/4] video: backlight-pwm: depend on GPIOLIB
The PWM backlight driver does not only control PWMs but also GPIOs. Fixes: In file included from include/gpio.h:4:0, from drivers/video/backlight-pwm.c:27: arch/arm/include/asm/gpio.h:5:23: fatal error: mach/gpio.h: No such file or directory Signed-off-by: Lucas Stach l.st...@pengutronix.de --- drivers/video/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 8e6ae99b9516..921b603a288d 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -100,7 +100,7 @@ config DRIVER_VIDEO_BACKLIGHT config DRIVER_VIDEO_BACKLIGHT_PWM bool PWM backlight support - depends on PWM + depends on PWM GPIOLIB depends on DRIVER_VIDEO_BACKLIGHT help Enable this to get support for backlight devices driven by a PWM. -- 2.1.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v1] commands: Add dhrystone
On Fr, 2015-07-24 at 13:41 +0200, Daniel Schultz wrote:
At the end of the do_dhrystone function:
if (user_time TOO_SMALL_TIME) {
number_of_runs = number_of_runs * 10;
new_argv[0] = argv[0];
sprintf(tmp_str, %i, number_of_runs);
new_argv[1] = tmp_str;
printf(Measured time too small to obtain meaningful results\n);
printf(or a timer wrap happend. I will increase the number\n);
printf(of runs by *10 to %d\n, number_of_runs);
printf(user_time: %llu ns\n, user_time);
do_dhrystone(2, new_argv);
...
I'm sure there is a better solution.
Why not just loop for a few seconds?
Regards,
Jan
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Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH 4/5] PPC/PCM030: fix reference clock
Hi Sascha,
On Monday 27 July 2015 07:42:40 Sascha Hauer wrote:
On Fri, Jul 24, 2015 at 03:42:05PM +0200, Juergen Borleis wrote:
The PCM030 CPU module comes with a 33.333 MHz instead of a 33.33 MHz
crystal reference. If such a special reference is in use, the USB PLL
needs a tweak to create a correct frequency. Without this tweak the USB
does not work correctly.
Signed-off-by: Juergen Borleis j...@pengutronix.de
---
arch/ppc/boards/pcm030/config.h | 2 +-
arch/ppc/boards/pcm030/pcm030.c | 9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/ppc/boards/pcm030/config.h
b/arch/ppc/boards/pcm030/config.h index 1521811..3fe1f28 100644
--- a/arch/ppc/boards/pcm030/config.h
+++ b/arch/ppc/boards/pcm030/config.h
@@ -25,7 +25,7 @@
#include mach/mpc5xxx.h
-#define CFG_MPC5XXX_CLKIN /* ... running at 33.33MHz */
+#define CFG_MPC5XXX_CLKIN 3000 /* ... running at 33.333MHz */
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
#define CFG_HID0_FINAL HID0_ICE
diff --git a/arch/ppc/boards/pcm030/pcm030.c
b/arch/ppc/boards/pcm030/pcm030.c index a7fa21d..376891a 100644
--- a/arch/ppc/boards/pcm030/pcm030.c
+++ b/arch/ppc/boards/pcm030/pcm030.c
@@ -32,6 +32,7 @@
#include memory.h
#include linux/sizes.h
#include linux/stat.h
+#include asm/io.h
#include fs.h
static struct fec_platform_data fec_info = {
@@ -43,6 +44,14 @@ static int devices_init (void)
struct stat s;
int ret;
+#if CFG_MPC5XXX_CLKIN == 3000
+ /*
+* Make USB work due to the special base crystal frequency:
+* 33,3330MHz * 16 = 533,328MHz main clock, but should be 528 MHz Clock
+*/
+ out_be32((void *)MPC5XXX_CDM_48_FDC, 0x0001);
+#endif
What's the point of having this #if? It's always true.
From my notes back from 2008 this tweak is only required if the reference
frequency is 33,333 MHz. And AFAIK there are 33,33 MHz variants of the
PCM030 out in the wild (or 33,0 MHz?).
But checking other platform's code the value written seems more or less random.
The only important thing seems to be: this register must be setup. Its reset
value is 0x and the kernel does not touch this register.
I will remove the #if/#endif in v2.
jbe
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