Re: [PATCH 1/3] watchdog: remove wrong uses of timeout_cur

2019-10-24 Thread Oleksij Rempel 
Hi,

How about using this variable to start watchdog(s) on kernel boot?


Am 24.10.19 um 17:24 schrieb Ahmad Fatoum:
> The barebox watchdog poller uses the struct watchdog.timeout_cur as
> the timeout value to configure the watchdog with.
>
> There's no need for the device driver to set this. I didn't know that
> when I wrote the drivers, but I do now, hence this commit.
>
> Signed-off-by: Ahmad Fatoum 
> ---
>  drivers/watchdog/stm32_iwdg.c  | 1 -
>  drivers/watchdog/stpmic1_wdt.c | 1 -
>  2 files changed, 2 deletions(-)
>
> diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
> index 20536cb4ab2d..4d252e558c32 100644
> --- a/drivers/watchdog/stm32_iwdg.c
> +++ b/drivers/watchdog/stm32_iwdg.c
> @@ -256,7 +256,6 @@ static int stm32_iwdg_probe(struct device_d *dev)
>   wdd->set_timeout = stm32_iwdg_set_timeout;
>   wdd->timeout_max = (RLR_MAX + 1) * data->max_prescaler * 1000;
>   wdd->timeout_max /= wd->rate * 1000;
> - wdd->timeout_cur = wdd->timeout_max;
>
>   ret = watchdog_register(wdd);
>   if (ret) {
> diff --git a/drivers/watchdog/stpmic1_wdt.c b/drivers/watchdog/stpmic1_wdt.c
> index eb8c43f716a8..f79b7e8c2768 100644
> --- a/drivers/watchdog/stpmic1_wdt.c
> +++ b/drivers/watchdog/stpmic1_wdt.c
> @@ -175,7 +175,6 @@ static int stpmic1_wdt_probe(struct device_d *dev)
>   wdd->hwdev = dev;
>   wdd->set_timeout = stpmic1_wdt_set_timeout;
>   wdd->timeout_max = PMIC_WDT_MAX_TIMEOUT;
> - wdd->timeout_cur = PMIC_WDT_DEFAULT_TIMEOUT;
>
>   /* have the watchdog reset, not power-off the system */
>   regmap_write_bits(wdt->regmap, MAIN_CR, RREQ_EN, RREQ_EN);
>


--
Regards,
Oleksij

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Re: [PATCH] sandbox: add_image: mmap block devices

2019-10-24 Thread Ahmad Fatoum 
On 10/24/19 6:02 PM, Robert Karszniewicz wrote:
> This makes it possible to mount block devices from the host machine,
> which have been passed as arguments to --image
> 
> Signed-off-by: Robert Karszniewicz 
> ---
>  arch/sandbox/os/common.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/sandbox/os/common.c b/arch/sandbox/os/common.c
> index 86118822a..805ac8eef 100644
> --- a/arch/sandbox/os/common.c
> +++ b/arch/sandbox/os/common.c
> @@ -39,6 +39,8 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
>  /*
>   * ...except the ones needed to connect with barebox
>   */
> @@ -260,6 +262,12 @@ static int add_image(char *str, char *devname_template, 
> int *devname_number)
>   hf->size = s.st_size;
>   hf->devname = strdup(devname);
>  
> + if (S_ISBLK(s.st_mode)) {
> + if (-1 == ioctl(fd, BLKGETSIZE64, >size)) {

This looks out of place for barebox, the -1 should be on the right side.

> + perror("ioctl");
> + goto err_out;
> + }
> + }
>   hf->base = (unsigned long)mmap(NULL, hf->size,
>   PROT_READ | (readonly ? 0 : PROT_WRITE),
>   MAP_SHARED, fd, 0);
> 


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[PATCH] sandbox: add_image: mmap block devices

2019-10-24 Thread Robert Karszniewicz 
This makes it possible to mount block devices from the host machine,
which have been passed as arguments to --image

Signed-off-by: Robert Karszniewicz 
---
 arch/sandbox/os/common.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/sandbox/os/common.c b/arch/sandbox/os/common.c
index 86118822a..805ac8eef 100644
--- a/arch/sandbox/os/common.c
+++ b/arch/sandbox/os/common.c
@@ -39,6 +39,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 /*
  * ...except the ones needed to connect with barebox
  */
@@ -260,6 +262,12 @@ static int add_image(char *str, char *devname_template, 
int *devname_number)
hf->size = s.st_size;
hf->devname = strdup(devname);
 
+   if (S_ISBLK(s.st_mode)) {
+   if (-1 == ioctl(fd, BLKGETSIZE64, >size)) {
+   perror("ioctl");
+   goto err_out;
+   }
+   }
hf->base = (unsigned long)mmap(NULL, hf->size,
PROT_READ | (readonly ? 0 : PROT_WRITE),
MAP_SHARED, fd, 0);
-- 
2.11.0


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[PATCH 1/3] watchdog: remove wrong uses of timeout_cur

2019-10-24 Thread Ahmad Fatoum 
The barebox watchdog poller uses the struct watchdog.timeout_cur as
the timeout value to configure the watchdog with.

There's no need for the device driver to set this. I didn't know that
when I wrote the drivers, but I do now, hence this commit.

Signed-off-by: Ahmad Fatoum 
---
 drivers/watchdog/stm32_iwdg.c  | 1 -
 drivers/watchdog/stpmic1_wdt.c | 1 -
 2 files changed, 2 deletions(-)

diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
index 20536cb4ab2d..4d252e558c32 100644
--- a/drivers/watchdog/stm32_iwdg.c
+++ b/drivers/watchdog/stm32_iwdg.c
@@ -256,7 +256,6 @@ static int stm32_iwdg_probe(struct device_d *dev)
wdd->set_timeout = stm32_iwdg_set_timeout;
wdd->timeout_max = (RLR_MAX + 1) * data->max_prescaler * 1000;
wdd->timeout_max /= wd->rate * 1000;
-   wdd->timeout_cur = wdd->timeout_max;
 
ret = watchdog_register(wdd);
if (ret) {
diff --git a/drivers/watchdog/stpmic1_wdt.c b/drivers/watchdog/stpmic1_wdt.c
index eb8c43f716a8..f79b7e8c2768 100644
--- a/drivers/watchdog/stpmic1_wdt.c
+++ b/drivers/watchdog/stpmic1_wdt.c
@@ -175,7 +175,6 @@ static int stpmic1_wdt_probe(struct device_d *dev)
wdd->hwdev = dev;
wdd->set_timeout = stpmic1_wdt_set_timeout;
wdd->timeout_max = PMIC_WDT_MAX_TIMEOUT;
-   wdd->timeout_cur = PMIC_WDT_DEFAULT_TIMEOUT;
 
/* have the watchdog reset, not power-off the system */
regmap_write_bits(wdt->regmap, MAIN_CR, RREQ_EN, RREQ_EN);
-- 
2.23.0


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[PATCH 2/3] watchdog: rename timeout_curr to poller_timeout_curr internally

2019-10-24 Thread Ahmad Fatoum 
timeout_curr is the timeout programmed into the watchdog hardware every
500 milliseconds. If watchdog poller support is disabled, it serves
no purpose, prefix it with poller_ to better communicate this fact.

No functional change.

Signed-off-by: Ahmad Fatoum 
---
 drivers/watchdog/wd_core.c | 10 +-
 include/watchdog.h |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/watchdog/wd_core.c b/drivers/watchdog/wd_core.c
index e6e5ddecd2f8..5b984db8586a 100644
--- a/drivers/watchdog/wd_core.c
+++ b/drivers/watchdog/wd_core.c
@@ -45,7 +45,7 @@ static int watchdog_set_cur(struct param_d *param, void *priv)
 {
struct watchdog *wd = priv;
 
-   if (wd->timeout_cur > wd->timeout_max)
+   if (wd->poller_timeout_cur > wd->timeout_max)
return -EINVAL;
 
return 0;
@@ -55,7 +55,7 @@ static void watchdog_poller_cb(void *priv);
 
 static void watchdog_poller_start(struct watchdog *wd)
 {
-   _watchdog_set_timeout(wd, wd->timeout_cur);
+   _watchdog_set_timeout(wd, wd->poller_timeout_cur);
poller_call_async(>poller, 500 * MSECOND,
watchdog_poller_cb, wd);
 
@@ -134,8 +134,8 @@ int watchdog_register(struct watchdog *wd)
if (!wd->timeout_max)
wd->timeout_max = 60 * 60 * 24;
 
-   if (!wd->timeout_cur || wd->timeout_cur > wd->timeout_max)
-   wd->timeout_cur = wd->timeout_max;
+   if (!wd->poller_timeout_cur || wd->poller_timeout_cur > wd->timeout_max)
+   wd->poller_timeout_cur = wd->timeout_max;
 
p = dev_add_param_uint32_ro(>dev, "timeout_max",
>timeout_max, "%u");
@@ -143,7 +143,7 @@ int watchdog_register(struct watchdog *wd)
return PTR_ERR(p);
 
p = dev_add_param_uint32(>dev, "timeout_cur", watchdog_set_cur, 
NULL,
-   >timeout_cur, "%u", wd);
+   >poller_timeout_cur, "%u", wd);
if (IS_ERR(p))
return PTR_ERR(p);
 
diff --git a/include/watchdog.h b/include/watchdog.h
index 0db4263a31ce..68c6b00233d9 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -22,7 +22,7 @@ struct watchdog {
struct device_d dev;
unsigned int priority;
unsigned int timeout_max;
-   unsigned int timeout_cur;
+   unsigned int poller_timeout_cur;
unsigned int poller_enable;
struct poller_async poller;
struct list_head list;
-- 
2.23.0


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[PATCH 3/3] watchdog: add timeout_cur parameter only when poller is enabled

2019-10-24 Thread Ahmad Fatoum 
timeout_curr is the timeout programmed into the watchdog hardware every
500 milliseconds. If watchdog poller support is disabled, it still
shows up as a configurable device parameter, but has no effect.

Improve user experience by having it show up only if watchdog poller
support was compiled in. This is already the case for the autoping
parameter. The timeout_max parameter is a generic parameter and will
remain unchanged.

Signed-off-by: Ahmad Fatoum 
---
 drivers/watchdog/wd_core.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/watchdog/wd_core.c b/drivers/watchdog/wd_core.c
index 5b984db8586a..1ce5a360eb61 100644
--- a/drivers/watchdog/wd_core.c
+++ b/drivers/watchdog/wd_core.c
@@ -134,20 +134,21 @@ int watchdog_register(struct watchdog *wd)
if (!wd->timeout_max)
wd->timeout_max = 60 * 60 * 24;
 
-   if (!wd->poller_timeout_cur || wd->poller_timeout_cur > wd->timeout_max)
-   wd->poller_timeout_cur = wd->timeout_max;
-
p = dev_add_param_uint32_ro(>dev, "timeout_max",
>timeout_max, "%u");
if (IS_ERR(p))
return PTR_ERR(p);
 
-   p = dev_add_param_uint32(>dev, "timeout_cur", watchdog_set_cur, 
NULL,
-   >poller_timeout_cur, "%u", wd);
-   if (IS_ERR(p))
-   return PTR_ERR(p);
-
if (IS_ENABLED(CONFIG_WATCHDOG_POLLER)) {
+   if (!wd->poller_timeout_cur ||
+   wd->poller_timeout_cur > wd->timeout_max)
+   wd->poller_timeout_cur = wd->timeout_max;
+
+   p = dev_add_param_uint32(>dev, "timeout_cur", 
watchdog_set_cur,
+   NULL, >poller_timeout_cur, "%u", wd);
+   if (IS_ERR(p))
+   return PTR_ERR(p);
+
ret = watchdog_register_poller(wd);
if (ret)
return ret;
-- 
2.23.0


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Re: [PATCH 2/5] firmware-zynqmp: extend driver with fpga relavant functions

2019-10-24 Thread Michael Tretter 
On Thu, 24 Oct 2019 10:26:51 +, Thomas Hämmerle wrote:
> From: Thomas Haemmerle 
> 
> Port functions from xlnx-linux to get FPGA status and invoke bitstream
> loading.
> 
> Signed-off-by: Thomas Haemmerle 

Reviewed-by: Michael Tretter 

> ---
>  arch/arm/mach-zynqmp/firmware-zynqmp.c | 47 
> ++
>  .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h |  8 
>  2 files changed, 55 insertions(+)
> 
> diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c 
> b/arch/arm/mach-zynqmp/firmware-zynqmp.c
> index f2187e9..18a1a51 100644
> --- a/arch/arm/mach-zynqmp/firmware-zynqmp.c
> +++ b/arch/arm/mach-zynqmp/firmware-zynqmp.c
> @@ -508,6 +508,51 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, 
> u32 arg1, u32 arg2,
>  arg1, arg2, out);
>  }
>  
> +/**
> + * zynqmp_pm_fpga_load - Perform the fpga load
> + * @address: Address to write to
> + * @size:pl bitstream size
> + * @flags:   Flags are used to specify the type of Bitstream file -
> + *   defined in ZYNQMP_FPGA_BIT_*-macros
> + *
> + * This function provides access to xilfpga library to transfer
> + * the required bitstream into PL.
> + *
> + * Return:   Returns status, either success or error+reason
> + */
> +static int zynqmp_pm_fpga_load(u64 address, u32 size, u32 flags)
> +{
> + if (!address || !size)
> + return -EINVAL;
> +
> + return zynqmp_pm_invoke_fn(PM_FPGA_LOAD,
> + lower_32_bits(address), upper_32_bits(address),
> + size, flags, NULL);
> +}
> +
> +/**
> + * zynqmp_pm_fpga_get_status - Read value from PCAP status register
> + * @value:   Value to read
> + *
> + * This function provides access to the xilfpga library to get
> + * the PCAP status
> + *
> + * Return:   Returns status, either success or error+reason
> + */
> +static int zynqmp_pm_fpga_get_status(u32 *value)
> +{
> + u32 ret_payload[PAYLOAD_ARG_CNT];
> + int ret = 0;
> +
> + if (!value)
> + return -EINVAL;
> +
> + ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
> + *value = ret_payload[1];
> +
> + return ret;
> +}
> +
>  static const struct zynqmp_eemi_ops eemi_ops = {
>   .get_api_version = zynqmp_pm_get_api_version,
>   .query_data = zynqmp_pm_query_data,
> @@ -521,6 +566,8 @@ static const struct zynqmp_eemi_ops eemi_ops = {
>   .clock_setparent = zynqmp_pm_clock_setparent,
>   .clock_getparent = zynqmp_pm_clock_getparent,
>   .ioctl = zynqmp_pm_ioctl,
> + .fpga_getstatus = zynqmp_pm_fpga_get_status,
> + .fpga_load = zynqmp_pm_fpga_load,
>  };
>  
>  /**
> diff --git a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h 
> b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> index 9e7a2e3..f19d73d 100644
> --- a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> +++ b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> @@ -17,6 +17,12 @@
>  
>  #define PAYLOAD_ARG_CNT 4
>  
> +#define ZYNQMP_FPGA_BIT_AUTH_DDR BIT(1)
> +#define ZYNQMP_FPGA_BIT_AUTH_OCM BIT(2)
> +#define ZYNQMP_FPGA_BIT_ENC_USR_KEY  BIT(3)
> +#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY  BIT(4)
> +#define ZYNQMP_FPGA_BIT_ONLY_BIN BIT(5)
> +

I was not sure if the flags belong to the firmware interface or into
the driver that uses the interface. While unlikely, other drivers might
use the calls as well and, thus, here is the right place.

Michael

>  enum pm_ioctl_id {
>   IOCTL_SET_PLL_FRAC_MODE = 8,
>   IOCTL_GET_PLL_FRAC_MODE,
> @@ -61,6 +67,8 @@ struct zynqmp_eemi_ops {
>   int (*clock_setparent)(u32 clock_id, u32 parent_id);
>   int (*clock_getparent)(u32 clock_id, u32 *parent_id);
>   int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out);
> + int (*fpga_getstatus)(u32 *status);
> + int (*fpga_load)(u64 address, u32 size, u32 flags);
>  };
>  
>  const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void);

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Re: [PATCH 3/5] firmware: zynqmp-fpga: introduce driver to load bitstream to FPGA

2019-10-24 Thread Michael Tretter 
On Thu, 24 Oct 2019 10:26:51 +, Thomas Hämmerle wrote:
> From: Thomas Haemmerle 
> 
> The driver provides functionalities to check and load a bitstream to FPGA.
> A boolean parameter to check if FPGA is already programmed is
> added.
> 
> Signed-off-by: Thomas Haemmerle 
> ---
>  arch/arm/configs/zynqmp_defconfig  |   1 +
>  .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h |   2 +
>  drivers/firmware/Kconfig   |   5 +
>  drivers/firmware/Makefile  |   1 +
>  drivers/firmware/zynqmp-fpga.c | 315 
> +
>  5 files changed, 324 insertions(+)
>  create mode 100644 drivers/firmware/zynqmp-fpga.c
> 
> diff --git a/arch/arm/configs/zynqmp_defconfig 
> b/arch/arm/configs/zynqmp_defconfig
> index 4dea964..834212e 100644
> --- a/arch/arm/configs/zynqmp_defconfig
> +++ b/arch/arm/configs/zynqmp_defconfig
> @@ -35,4 +35,5 @@ CONFIG_CMD_OFTREE=y
>  CONFIG_CMD_TIME=y
>  CONFIG_DRIVER_SERIAL_CADENCE=y
>  # CONFIG_SPI is not set
> +CONFIG_FIRMWARE_ZYNQMP_PL=y
>  CONFIG_DIGEST=y
> diff --git a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h 
> b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> index f19d73d..6fcfba5 100644
> --- a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> +++ b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
> @@ -23,6 +23,8 @@
>  #define ZYNQMP_FPGA_BIT_ENC_DEV_KEY  BIT(4)
>  #define ZYNQMP_FPGA_BIT_ONLY_BIN BIT(5)
>  
> +#define ZYNQMP_PCAP_STATUS_FPGA_DONE BIT(3)
> +

Should be part of the previous patch.

>  enum pm_ioctl_id {
>   IOCTL_SET_PLL_FRAC_MODE = 8,
>   IOCTL_GET_PLL_FRAC_MODE,
> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
> index 710b500..3113f40 100644
> --- a/drivers/firmware/Kconfig
> +++ b/drivers/firmware/Kconfig
> @@ -14,4 +14,9 @@ config FIRMWARE_ALTERA_SOCFPGA
>   bool "Altera SoCFPGA fpga loader"
>   depends on ARCH_SOCFPGA
>   select FIRMWARE
> + 
> +config FIRMWARE_ZYNQMP_FPGA
> + bool "Xilinx ZynqMP FPGA loader"
> + depends on ARCH_ZYNQMP
> + select FIRMWARE
>  endmenu
> diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
> index c3a3c34..b162b08 100644
> --- a/drivers/firmware/Makefile
> +++ b/drivers/firmware/Makefile
> @@ -1,2 +1,3 @@
>  obj-$(CONFIG_FIRMWARE_ALTERA_SERIAL) += altera_serial.o
>  obj-$(CONFIG_FIRMWARE_ALTERA_SOCFPGA) += socfpga.o
> +obj-$(CONFIG_FIRMWARE_ZYNQMP_FPGA) += zynqmp-fpga.o
> diff --git a/drivers/firmware/zynqmp-fpga.c b/drivers/firmware/zynqmp-fpga.c
> new file mode 100644
> index 000..6a32d28
> --- /dev/null
> +++ b/drivers/firmware/zynqmp-fpga.c
> @@ -0,0 +1,315 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Xilinx Zynq MPSoC PL loading
> + *
> + * Copyright (c) 2018 Thomas Haemmerle 
> + *
> + * based on U-Boot zynqmppl code
> + *
> + * (C) Copyright 2015 - 2016, Xilinx, Inc,
> + * Michal Simek 
> + * Siva Durga Prasad  *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define ZYNQMP_PM_VERSION_1_1((1 << 16) | 1)

A macro ZYNQMP_PM_VERSION(MAJOR, MINOR) would be more intuitive.

> +
> +#define ZYNQMP_PM_FEATURE_BYTE_ORDER_IRREL   BIT(0)
> +
> +#define ZYNQMP_PM_VERSION_1_0_FEATURES   0
> +#define ZYNQMP_PM_VERSION_1_1_FEATURES  ZYNQMP_PM_FEATURE_BYTE_ORDER_IRREL
> +
> +#define DUMMY_WORD   0x
> +
> +#define XILINX_BYTE_ORDER_BIT0
> +#define XILINX_BYTE_ORDER_BIN1
> +
> +struct fpgamgr {
> + struct firmware_handler fh;
> + struct device_d dev;
> + const struct zynqmp_eemi_ops *eemi_ops;
> + int programmed;
> + char *buf;
> + size_t size;
> + u32 features;
> +};
> +
> +/* Xilinx binary format header */
> +static const u32 bin_format[] = {
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + 0x00bb,
> + 0x11220044,
> + DUMMY_WORD,
> + DUMMY_WORD,
> + 0xaa995566,
> +};
> +
> +static void copy_words_swapped(u32 *dst, const u32 *src, size_t size)
> +{
> + int i;
> +
> + for (i = 0; i < size; i++)
> + dst[i] = __swab32(src[i]);
> +}
> +
> +static int get_byte_order(const u32 *buf, size_t size)
> +{
> + u32 buf_check[ARRAY_SIZE(bin_format)];
> +
> + memcpy(buf_check, buf, ARRAY_SIZE(buf_check));
> + if (memcmp(buf_check, bin_format, sizeof(buf_check)) == 0)
> + return XILINX_BYTE_ORDER_BIT;
> +
> + copy_words_swapped(buf_check, buf, ARRAY_SIZE(buf_check));
> + if (memcmp(buf_check, bin_format, sizeof(buf_check)) == 0)
> + return XILINX_BYTE_ORDER_BIN;
> +
> + return -EINVAL;
> +}

The function does not only find the byte order, but

Re: [PATCH 1/5] ARM: zynqmp: dts: move firmware node to src tree

2019-10-24 Thread Michael Tretter 
On Thu, 24 Oct 2019 10:26:50 +, Thomas Hämmerle wrote:
> From: Michael Tretter 
> 
> The firmware node will be added to the mainline device tree. As it will
> eventually enter Barebox via a device tree sync, add it to the src tree
> already.

Not sure, but I think that we should wait with the device tree changes
until they arrive via a sync with the kernel tree.

Michael

> 
> Signed-off-by: Michael Tretter 
> ---
>  arch/arm/dts/zynqmp-zcu104-revA.dts |  1 -
>  arch/arm/dts/zynqmp.dtsi| 17 -
>  dts/src/arm64/xilinx/zynqmp.dtsi|  7 +++
>  3 files changed, 7 insertions(+), 18 deletions(-)
>  delete mode 100644 arch/arm/dts/zynqmp.dtsi
> 
> diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts 
> b/arch/arm/dts/zynqmp-zcu104-revA.dts
> index c03112d..8b8dd84 100644
> --- a/arch/arm/dts/zynqmp-zcu104-revA.dts
> +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
> @@ -8,5 +8,4 @@
>   */
>  
>  #include 
> -#include "zynqmp.dtsi"
>  #include "zynqmp-clk.dtsi"
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> deleted file mode 100644
> index 59984ee..000
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ /dev/null
> @@ -1,17 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * dts file for Xilinx ZynqMP
> - *
> - * (C) Copyright 2014 - 2015, Xilinx, Inc.
> - *
> - * Michal Simek 
> - */
> -
> -/ {
> - firmware {
> - zynqmp_firmware: zynqmp-firmware {
> - compatible = "xlnx,zynqmp-firmware";
> - method = "smc";
> - };
> - };
> -};
> diff --git a/dts/src/arm64/xilinx/zynqmp.dtsi 
> b/dts/src/arm64/xilinx/zynqmp.dtsi
> index 9aa6734..9115eae 100644
> --- a/dts/src/arm64/xilinx/zynqmp.dtsi
> +++ b/dts/src/arm64/xilinx/zynqmp.dtsi
> @@ -115,6 +115,13 @@
>   method = "smc";
>   };
>  
> + firmware {
> + zynqmp_firmware: zynqmp-firmware {
> + compatible = "xlnx,zynqmp-firmware";
> + method = "smc";
> + };
> + };
> +
>   timer {
>   compatible = "arm,armv8-timer";
>   interrupt-parent = <>;

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[PATCH 5/5] firmware: zynqmp-fpga: print Xilinx bitstream header

2019-10-24 Thread Thomas Hämmerle 
From: Michael Tretter 

The bitstream header has 5 fields, that start with a char for the type.
Four fields have a big-ending length and a null-terminated string for
the design name, the part number, and the date and time of creation. The
last field is a big-endian 32 bit unsigned int for the size of the
bitstream.

Print this info when loading the bitstream.

Signed-off-by: Michael Tretter 
---
 drivers/firmware/zynqmp-fpga.c | 51 ++
 1 file changed, 51 insertions(+)

diff --git a/drivers/firmware/zynqmp-fpga.c b/drivers/firmware/zynqmp-fpga.c
index 6a32d28..7bf880f 100644
--- a/drivers/firmware/zynqmp-fpga.c
+++ b/drivers/firmware/zynqmp-fpga.c
@@ -39,6 +39,19 @@ struct fpgamgr {
u32 features;
 };
 
+struct bs_header {
+   __be16 length;
+   u8 padding[9];
+   __be16 size;
+   char entries[0];
+} __attribute__ ((packed));
+
+struct bs_header_entry {
+   char type;
+   __be16 length;
+   char data[0];
+} __attribute__ ((packed));
+
 /* Xilinx binary format header */
 static const u32 bin_format[] = {
DUMMY_WORD,
@@ -100,6 +113,42 @@ static int get_header_length(const char *buf, size_t size)
return -EINVAL;
 }
 
+static void zynqmp_fpga_show_header(const struct device_d *dev,
+struct bs_header *header, size_t size)
+{
+   struct bs_header_entry *entry;
+   unsigned int i;
+   unsigned int length;
+
+   for (i = 0; i < size - sizeof(*header); i += sizeof(*entry) + length) {
+   entry = (struct bs_header_entry *)>entries[i];
+   length = __be16_to_cpu(entry->length);
+
+   switch (entry->type) {
+   case 'a':
+   printf("Design: %s\n", entry->data);
+   break;
+   case 'b':
+   printf("Part number: %s\n", entry->data);
+   break;
+   case 'c':
+   printf("Date: %s\n", entry->data);
+   break;
+   case 'd':
+   printf("Time: %s\n", entry->data);
+   break;
+   case 'e':
+   /* Size entry does not have a length but is be32 int */
+   printf("Size: %d bytes\n",
+  (length << 16) + (entry->data[0] << 8) + 
entry->data[1]);
+   return;
+   default:
+   dev_warn(dev, "Invalid header entry: %c", entry->type);
+   return;
+   }
+   }
+}
+
 static int fpgamgr_program_finish(struct firmware_handler *fh)
 {
struct fpgamgr *mgr = container_of(fh, struct fpgamgr, fh);
@@ -121,6 +170,8 @@ static int fpgamgr_program_finish(struct firmware_handler 
*fh)
status = header_length;
goto err_free;
}
+   zynqmp_fpga_show_header(>dev,
+ (struct bs_header *)mgr->buf, header_length);
 
byte_order = get_byte_order((u32 *)>buf[header_length],
mgr->size - header_length);
-- 
2.7.4


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[PATCH 1/5] ARM: zynqmp: dts: move firmware node to src tree

2019-10-24 Thread Thomas Hämmerle 
From: Michael Tretter 

The firmware node will be added to the mainline device tree. As it will
eventually enter Barebox via a device tree sync, add it to the src tree
already.

Signed-off-by: Michael Tretter 
---
 arch/arm/dts/zynqmp-zcu104-revA.dts |  1 -
 arch/arm/dts/zynqmp.dtsi| 17 -
 dts/src/arm64/xilinx/zynqmp.dtsi|  7 +++
 3 files changed, 7 insertions(+), 18 deletions(-)
 delete mode 100644 arch/arm/dts/zynqmp.dtsi

diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts 
b/arch/arm/dts/zynqmp-zcu104-revA.dts
index c03112d..8b8dd84 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -8,5 +8,4 @@
  */
 
 #include 
-#include "zynqmp.dtsi"
 #include "zynqmp-clk.dtsi"
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
deleted file mode 100644
index 59984ee..000
--- a/arch/arm/dts/zynqmp.dtsi
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * dts file for Xilinx ZynqMP
- *
- * (C) Copyright 2014 - 2015, Xilinx, Inc.
- *
- * Michal Simek 
- */
-
-/ {
-   firmware {
-   zynqmp_firmware: zynqmp-firmware {
-   compatible = "xlnx,zynqmp-firmware";
-   method = "smc";
-   };
-   };
-};
diff --git a/dts/src/arm64/xilinx/zynqmp.dtsi b/dts/src/arm64/xilinx/zynqmp.dtsi
index 9aa6734..9115eae 100644
--- a/dts/src/arm64/xilinx/zynqmp.dtsi
+++ b/dts/src/arm64/xilinx/zynqmp.dtsi
@@ -115,6 +115,13 @@
method = "smc";
};
 
+   firmware {
+   zynqmp_firmware: zynqmp-firmware {
+   compatible = "xlnx,zynqmp-firmware";
+   method = "smc";
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <>;
-- 
2.7.4


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[PATCH 2/5] firmware-zynqmp: extend driver with fpga relavant functions

2019-10-24 Thread Thomas Hämmerle 
From: Thomas Haemmerle 

Port functions from xlnx-linux to get FPGA status and invoke bitstream
loading.

Signed-off-by: Thomas Haemmerle 
---
 arch/arm/mach-zynqmp/firmware-zynqmp.c | 47 ++
 .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h |  8 
 2 files changed, 55 insertions(+)

diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c 
b/arch/arm/mach-zynqmp/firmware-zynqmp.c
index f2187e9..18a1a51 100644
--- a/arch/arm/mach-zynqmp/firmware-zynqmp.c
+++ b/arch/arm/mach-zynqmp/firmware-zynqmp.c
@@ -508,6 +508,51 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 
arg1, u32 arg2,
   arg1, arg2, out);
 }
 
+/**
+ * zynqmp_pm_fpga_load - Perform the fpga load
+ * @address:   Address to write to
+ * @size:  pl bitstream size
+ * @flags: Flags are used to specify the type of Bitstream file -
+ * defined in ZYNQMP_FPGA_BIT_*-macros
+ *
+ * This function provides access to xilfpga library to transfer
+ * the required bitstream into PL.
+ *
+ * Return: Returns status, either success or error+reason
+ */
+static int zynqmp_pm_fpga_load(u64 address, u32 size, u32 flags)
+{
+   if (!address || !size)
+   return -EINVAL;
+
+   return zynqmp_pm_invoke_fn(PM_FPGA_LOAD,
+   lower_32_bits(address), upper_32_bits(address),
+   size, flags, NULL);
+}
+
+/**
+ * zynqmp_pm_fpga_get_status - Read value from PCAP status register
+ * @value: Value to read
+ *
+ * This function provides access to the xilfpga library to get
+ * the PCAP status
+ *
+ * Return: Returns status, either success or error+reason
+ */
+static int zynqmp_pm_fpga_get_status(u32 *value)
+{
+   u32 ret_payload[PAYLOAD_ARG_CNT];
+   int ret = 0;
+
+   if (!value)
+   return -EINVAL;
+
+   ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
+   *value = ret_payload[1];
+
+   return ret;
+}
+
 static const struct zynqmp_eemi_ops eemi_ops = {
.get_api_version = zynqmp_pm_get_api_version,
.query_data = zynqmp_pm_query_data,
@@ -521,6 +566,8 @@ static const struct zynqmp_eemi_ops eemi_ops = {
.clock_setparent = zynqmp_pm_clock_setparent,
.clock_getparent = zynqmp_pm_clock_getparent,
.ioctl = zynqmp_pm_ioctl,
+   .fpga_getstatus = zynqmp_pm_fpga_get_status,
+   .fpga_load = zynqmp_pm_fpga_load,
 };
 
 /**
diff --git a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h 
b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
index 9e7a2e3..f19d73d 100644
--- a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
+++ b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
@@ -17,6 +17,12 @@
 
 #define PAYLOAD_ARG_CNT 4
 
+#define ZYNQMP_FPGA_BIT_AUTH_DDR   BIT(1)
+#define ZYNQMP_FPGA_BIT_AUTH_OCM   BIT(2)
+#define ZYNQMP_FPGA_BIT_ENC_USR_KEYBIT(3)
+#define ZYNQMP_FPGA_BIT_ENC_DEV_KEYBIT(4)
+#define ZYNQMP_FPGA_BIT_ONLY_BIN   BIT(5)
+
 enum pm_ioctl_id {
IOCTL_SET_PLL_FRAC_MODE = 8,
IOCTL_GET_PLL_FRAC_MODE,
@@ -61,6 +67,8 @@ struct zynqmp_eemi_ops {
int (*clock_setparent)(u32 clock_id, u32 parent_id);
int (*clock_getparent)(u32 clock_id, u32 *parent_id);
int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out);
+   int (*fpga_getstatus)(u32 *status);
+   int (*fpga_load)(u64 address, u32 size, u32 flags);
 };
 
 const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void);
-- 
2.7.4


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[PATCH 4/5] ARM: zynqmp: dts: move pcap node to src tree

2019-10-24 Thread Thomas Hämmerle 
From: Thomas Haemmerle 

The pcap node will be added to the mainline device tree. As it will
eventually enter Barebox via a device tree sync, add it to the src tree
already.

Signed-off-by: Thomas Haemmerle 
---
 dts/src/arm64/xilinx/zynqmp.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/dts/src/arm64/xilinx/zynqmp.dtsi b/dts/src/arm64/xilinx/zynqmp.dtsi
index 9115eae..1d1e531 100644
--- a/dts/src/arm64/xilinx/zynqmp.dtsi
+++ b/dts/src/arm64/xilinx/zynqmp.dtsi
@@ -119,6 +119,9 @@
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
method = "smc";
+   zynqmp_pcap: pcap {
+   compatible = "xlnx,zynqmp-pcap-fpga";
+   };
};
};
 
-- 
2.7.4


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[PATCH 3/5] firmware: zynqmp-fpga: introduce driver to load bitstream to FPGA

2019-10-24 Thread Thomas Hämmerle 
From: Thomas Haemmerle 

The driver provides functionalities to check and load a bitstream to FPGA.
A boolean parameter to check if FPGA is already programmed is
added.

Signed-off-by: Thomas Haemmerle 
---
 arch/arm/configs/zynqmp_defconfig  |   1 +
 .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h |   2 +
 drivers/firmware/Kconfig   |   5 +
 drivers/firmware/Makefile  |   1 +
 drivers/firmware/zynqmp-fpga.c | 315 +
 5 files changed, 324 insertions(+)
 create mode 100644 drivers/firmware/zynqmp-fpga.c

diff --git a/arch/arm/configs/zynqmp_defconfig 
b/arch/arm/configs/zynqmp_defconfig
index 4dea964..834212e 100644
--- a/arch/arm/configs/zynqmp_defconfig
+++ b/arch/arm/configs/zynqmp_defconfig
@@ -35,4 +35,5 @@ CONFIG_CMD_OFTREE=y
 CONFIG_CMD_TIME=y
 CONFIG_DRIVER_SERIAL_CADENCE=y
 # CONFIG_SPI is not set
+CONFIG_FIRMWARE_ZYNQMP_PL=y
 CONFIG_DIGEST=y
diff --git a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h 
b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
index f19d73d..6fcfba5 100644
--- a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
+++ b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h
@@ -23,6 +23,8 @@
 #define ZYNQMP_FPGA_BIT_ENC_DEV_KEYBIT(4)
 #define ZYNQMP_FPGA_BIT_ONLY_BIN   BIT(5)
 
+#define ZYNQMP_PCAP_STATUS_FPGA_DONE   BIT(3)
+
 enum pm_ioctl_id {
IOCTL_SET_PLL_FRAC_MODE = 8,
IOCTL_GET_PLL_FRAC_MODE,
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 710b500..3113f40 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -14,4 +14,9 @@ config FIRMWARE_ALTERA_SOCFPGA
bool "Altera SoCFPGA fpga loader"
depends on ARCH_SOCFPGA
select FIRMWARE
+   
+config FIRMWARE_ZYNQMP_FPGA
+   bool "Xilinx ZynqMP FPGA loader"
+   depends on ARCH_ZYNQMP
+   select FIRMWARE
 endmenu
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index c3a3c34..b162b08 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_FIRMWARE_ALTERA_SERIAL) += altera_serial.o
 obj-$(CONFIG_FIRMWARE_ALTERA_SOCFPGA) += socfpga.o
+obj-$(CONFIG_FIRMWARE_ZYNQMP_FPGA) += zynqmp-fpga.o
diff --git a/drivers/firmware/zynqmp-fpga.c b/drivers/firmware/zynqmp-fpga.c
new file mode 100644
index 000..6a32d28
--- /dev/null
+++ b/drivers/firmware/zynqmp-fpga.c
@@ -0,0 +1,315 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Xilinx Zynq MPSoC PL loading
+ *
+ * Copyright (c) 2018 Thomas Haemmerle 
+ *
+ * based on U-Boot zynqmppl code
+ *
+ * (C) Copyright 2015 - 2016, Xilinx, Inc,
+ * Michal Simek 
+ * Siva Durga Prasad  *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ZYNQMP_PM_VERSION_1_1  ((1 << 16) | 1)
+
+#define ZYNQMP_PM_FEATURE_BYTE_ORDER_IRREL BIT(0)
+
+#define ZYNQMP_PM_VERSION_1_0_FEATURES 0
+#define ZYNQMP_PM_VERSION_1_1_FEATURES  ZYNQMP_PM_FEATURE_BYTE_ORDER_IRREL
+
+#define DUMMY_WORD 0x
+
+#define XILINX_BYTE_ORDER_BIT  0
+#define XILINX_BYTE_ORDER_BIN  1
+
+struct fpgamgr {
+   struct firmware_handler fh;
+   struct device_d dev;
+   const struct zynqmp_eemi_ops *eemi_ops;
+   int programmed;
+   char *buf;
+   size_t size;
+   u32 features;
+};
+
+/* Xilinx binary format header */
+static const u32 bin_format[] = {
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   0x00bb,
+   0x11220044,
+   DUMMY_WORD,
+   DUMMY_WORD,
+   0xaa995566,
+};
+
+static void copy_words_swapped(u32 *dst, const u32 *src, size_t size)
+{
+   int i;
+
+   for (i = 0; i < size; i++)
+   dst[i] = __swab32(src[i]);
+}
+
+static int get_byte_order(const u32 *buf, size_t size)
+{
+   u32 buf_check[ARRAY_SIZE(bin_format)];
+
+   memcpy(buf_check, buf, ARRAY_SIZE(buf_check));
+   if (memcmp(buf_check, bin_format, sizeof(buf_check)) == 0)
+   return XILINX_BYTE_ORDER_BIT;
+
+   copy_words_swapped(buf_check, buf, ARRAY_SIZE(buf_check));
+   if (memcmp(buf_check, bin_format, sizeof(buf_check)) == 0)
+   return XILINX_BYTE_ORDER_BIN;
+
+   return -EINVAL;
+}
+
+static int get_header_length(const char *buf, size_t size)
+{
+   u32 *buf_u32;
+   int p;
+
+   for (p = 0; p < size; p++) {
+   buf_u32 = (u32 *)[p];
+   if (*buf_u32 == DUMMY_WORD)
+   return p;
+   }
+   return -EINVAL;
+}
+
+static int fpgamgr_program_finish(struct firmware_handler *fh)
+{
+   struct fpgamgr *mgr = container_of(fh, struct fpgamgr, fh);
+   char *buf_aligned;

[PATCH 0/5] ARM: zynqmp: add support for bitstream loading

2019-10-24 Thread Thomas Hämmerle 
From: Thomas Haemmerle 

Michael Tretter (2):
  ARM: zynqmp: dts: move firmware node to src tree
  firmware: zynqmp-fpga: print Xilinx bitstream header

Thomas Haemmerle (3):
  firmware-zynqmp: extend driver with fpga relavant functions
  firmware: zynqmp-fpga: introduce driver to load bitstream to FPGA
  ARM: zynqmp: dts: move pcap node to src tree

 arch/arm/configs/zynqmp_defconfig  |   1 +
 arch/arm/dts/zynqmp-zcu104-revA.dts|   1 -
 arch/arm/dts/zynqmp.dtsi   |  17 -
 arch/arm/mach-zynqmp/firmware-zynqmp.c |  47 +++
 .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h |  10 +
 drivers/firmware/Kconfig   |   5 +
 drivers/firmware/Makefile  |   1 +
 drivers/firmware/zynqmp-fpga.c | 366 +
 dts/src/arm64/xilinx/zynqmp.dtsi   |  10 +
 9 files changed, 440 insertions(+), 18 deletions(-)
 delete mode 100644 arch/arm/dts/zynqmp.dtsi
 create mode 100644 drivers/firmware/zynqmp-fpga.c

-- 
2.7.4


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Re: [PATCH 1/6] Documentation: efi: emphasize watchdog deactivation on ExitBootServices

2019-10-24 Thread Sascha Hauer 
On Wed, Oct 23, 2019 at 06:55:56PM +0200, Ahmad Fatoum wrote:
> The UEFI specification paragraph quoted above notes:
> > The watchdog timer is only used during boot services. On successful
> > completion of ExitBootServices() the watchdog timer is disabled.
> 
> Thus disabling the watchdog is _the_ only proper behavior. Adjust the
> wording accordingly.
> 
> Cc: Oleksij Rempel 
> Signed-off-by: Ahmad Fatoum 
> ---
>  Documentation/boards/efi.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

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Re: flash barebox to NAND

2019-10-24 Thread Sascha Hauer 
On Wed, Oct 23, 2019 at 03:47:49PM +0200, Mihaita Ivascu wrote:
> On Wed, Oct 23, 2019 at 3:33 PM Sascha Hauer  wrote:
> >
> > On Wed, Oct 23, 2019 at 11:39:00AM +0200, Mihaita Ivascu wrote:
> > > Hello all,
> > >
> > >   I would like to know what possibilities do I have to flash a barebox
> > > image to mtd partition from Linux?
> > >  Using ubifs commands does not work. the barebox will not boot so
> > > probably additional info needs to be written except the barebox image
> > > itself.
> >
> > On i.MX a bootloader image can't be written to Nand directly. In barebox
> > you can update barebox with the barebox_update command which has support
> > for the special image format requirements of the i.MX6. I currently
> > don't know any userspace code that can do this, apart from mfgtools or
> > other tools from the NXP universe that I have never used. Somebody told
> > me he wanted to port the i.MX6 barebox update code to userspace, but
> > unfortunately I can't remember who it was and I can't find any pointers
> > to it.
> >
> > Regards,
> >   Sascha
> >
> 
>Thanks for your detailed answer.
>so there is no way to update a barebox on NAND from Linux except
> from the barebox itself(using barebox_update command) ?
>Yes I am trying with mfgtools but no success. NXP does not support
> barebox just u-boot and I was not successful on adding mfgtools/UTP
> support in barebox.
>And using the u-boot konbs-ng command for flashing bootloader to
> NAND is faulty and the reason is documented in the NXP community.
>   Surely somebody from barebox community must have had the need before
> to update the barebox otherway than using barebox_update from the
> barebox itself.

One way to update barebox indirectly from Linux is to put the new
barebox image to some known place in the rootfs. Now in barebox
write a small script:

/env/init/bbu.sh:

#!/bin/sh

if [ -f /mnt/mmc0.0/boot/barebox-update.bin ]; then
barebox_update -y /mnt/mmc0.0/boot/barebox-update.bin
reset
fi

Then again under Linux delete that file when the running barebox version
(as read from the device tree or kernel commandline) matches the update
image.

Sascha

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Re: [PATCH 1/6] Documentation: efi: emphasize watchdog deactivation on ExitBootServices

2019-10-24 Thread Oleksij Rempel 
On Wed, Oct 23, 2019 at 06:55:56PM +0200, Ahmad Fatoum wrote:
> The UEFI specification paragraph quoted above notes:
> > The watchdog timer is only used during boot services. On successful
> > completion of ExitBootServices() the watchdog timer is disabled.
> 
> Thus disabling the watchdog is _the_ only proper behavior. Adjust the
> wording accordingly.
> 
> Cc: Oleksij Rempel 
> Signed-off-by: Ahmad Fatoum 
> ---
>  Documentation/boards/efi.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/boards/efi.rst b/Documentation/boards/efi.rst
> index 2178c9ab4293..f04b1d32378b 100644
> --- a/Documentation/boards/efi.rst
> +++ b/Documentation/boards/efi.rst
> @@ -350,7 +350,7 @@ 
> https://uefi.org/sites/default/files/resources/UEFI_Spec_2_1_D.pdf
>  
>  Current linux kernel (v5.0) will execute ExitBootServices() during the early
>  boot stage and thus will automatically disable the (U)EFI watchdog. Since it 
> is
> -a proper behavior according to the (U)EFI specification, it is impossible to
> +the proper behavior according to the (U)EFI specification, it is impossible 
> to
>  protect full boot chain by using this watchdog only. It is recommended to use
>  an alternative hardware watchdog, preferably started before the bootloader. 
> If (U)EFI
>  firmware lacks this feature, the bootloader should be able to start an 
> alternative
> -- 
> 2.23.0
> 
> 

Reviewed-by: 

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[PATCH] efi: populate boot source instance

2019-10-24 Thread Ahmad Fatoum 
We already determine the boot source variable at core init level, but so
far we didn't populate the instance because the numbering of the block
devices isn't known that early. Introduce a helper to check if a block
device is the boot source and if it is, have the block device driver
populate the missing boot source instance.

Signed-off-by: Ahmad Fatoum 
---
 drivers/block/efi-block-io.c | 17 +
 drivers/efi/efi-device.c |  8 +++-
 include/efi/efi-device.h |  1 +
 3 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/drivers/block/efi-block-io.c b/drivers/block/efi-block-io.c
index d167d814c2a4..39dbfb0f7ada 100644
--- a/drivers/block/efi-block-io.c
+++ b/drivers/block/efi-block-io.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001
 #define EFI_BLOCK_IO_PROTOCOL_REVISION3 ((2<<16) | (31))
@@ -145,6 +146,7 @@ static int is_bio_usbdev(struct efi_device *efidev)
 static int efi_bio_probe(struct efi_device *efidev)
 {
int ret;
+   int instance;
struct efi_bio_priv *priv;
struct efi_block_io_media *media;
 
@@ -159,10 +161,14 @@ static int efi_bio_probe(struct efi_device *efidev)
efi_bio_print_info(priv);
priv->dev = >dev;
 
-   if (is_bio_usbdev(efidev))
-   priv->blk.cdev.name = xasprintf("usbdisk%d", 
cdev_find_free_index("usbdisk"));
-   else
-   priv->blk.cdev.name = xasprintf("disk%d", 
cdev_find_free_index("disk"));
+   if (is_bio_usbdev(efidev)) {
+   instance = cdev_find_free_index("usbdisk");
+   priv->blk.cdev.name = xasprintf("usbdisk%d", instance);
+   } else {
+   instance = cdev_find_free_index("disk");
+   priv->blk.cdev.name = xasprintf("disk%d", instance);
+   }
+
priv->blk.blockbits = ffs(media->block_size) - 1;
priv->blk.num_blocks = media->last_block + 1;
priv->blk.ops = _bio_ops;
@@ -174,6 +180,9 @@ static int efi_bio_probe(struct efi_device *efidev)
if (ret)
return ret;
 
+   if (efi_get_bootsource() == efidev)
+   bootsource_set_instance(instance);
+
parse_partition_table(>blk);
 
return 0;
diff --git a/drivers/efi/efi-device.c b/drivers/efi/efi-device.c
index 68d81caf010b..a1aac2dd31be 100644
--- a/drivers/efi/efi-device.c
+++ b/drivers/efi/efi-device.c
@@ -398,13 +398,19 @@ static int is_bio_usbdev(struct efi_device *efidev)
return 0;
 }
 
+static struct efi_device *bootdev;
+
+struct efi_device *efi_get_bootsource(void)
+{
+   return bootdev;
+}
+
 static void efi_set_bootsource(void)
 {
enum bootsource src = BOOTSOURCE_UNKNOWN;
int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
 
efi_handle_t *efi_parent;
-   struct efi_device *bootdev;
 
if (!efi_loaded_image->parent_handle)
goto out;
diff --git a/include/efi/efi-device.h b/include/efi/efi-device.h
index 15c293bb1b8f..5eaf1f260d56 100644
--- a/include/efi/efi-device.h
+++ b/include/efi/efi-device.h
@@ -43,5 +43,6 @@ static inline int efi_driver_register(struct efi_driver 
*efidrv)
 
 int efi_connect_all(void);
 void efi_register_devices(void);
+struct efi_device *efi_get_bootsource(void);
 
 #endif /* __EFI_EFI_DEVICE_H */
-- 
2.23.0


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[PATCH v6 1/2] Documentation: add watchdog documentation

2019-10-24 Thread Oleksij Rempel 
Signed-off-by: Oleksij Rempel 
---
 Documentation/user/user-manual.rst |  1 +
 Documentation/user/watchdog.rst| 85 ++
 2 files changed, 86 insertions(+)
 create mode 100644 Documentation/user/watchdog.rst

diff --git a/Documentation/user/user-manual.rst 
b/Documentation/user/user-manual.rst
index f04981c3f0..41fdb8805c 100644
--- a/Documentation/user/user-manual.rst
+++ b/Documentation/user/user-manual.rst
@@ -34,6 +34,7 @@ Contents:
state
random
debugging
+   watchdog
 
 * :ref:`search`
 * :ref:`genindex`
diff --git a/Documentation/user/watchdog.rst b/Documentation/user/watchdog.rst
new file mode 100644
index 00..26e347d5f6
--- /dev/null
+++ b/Documentation/user/watchdog.rst
@@ -0,0 +1,85 @@
+Watchdog Support
+
+
+Barebox Watchdog Functionality
+--
+
+In some cases we are not able to influence the hardware design anymore or while
+developing one needs to be able to feed the watchdog to disable it from within
+the bootloader. For these scenarios barebox provides the watchdog framework
+with the following functionality and at least ``CONFIG_WATCHDOG`` should be
+enabled.
+
+Polling
+~~~
+
+Watchdog polling/feeding allows to feed the watchdog and keep it running on one
+side and to not reset the system on the other side. It is needed on hardware
+with short-time watchdogs. For example the Atheros ar9331 watchdog has a
+maximal timeout of 7 seconds, so it may reset even on netboot.
+Or it can be used on systems where the watchdog is already running and can't be
+disabled, an example for that is the watchdog of the i.MX2 series.
+This functionally can be seen as a threat, since in error cases barebox will
+continue to feed the watchdog even if that is not desired. So, depending on
+your needs ``CONFIG_WATCHDOG_POLLER`` can be enabled or disabled at compile
+time. Even if barebox was built with watchdog polling support, it is not
+enabled by default. To start polling from command line run:
+
+.. code-block:: console
+
+  wdog0.autoping=1
+
+The poller interval is not configurable, but fixed at 500ms and the watchdog
+timeout is configured by default to the maximum of the supported values by
+hardware. To change the timeout used by the poller, run:
+
+.. code-block:: console
+
+  wdog0.timeout_cur=7
+
+To read the current watchdog's configuration, run:
+
+.. code-block:: console
+
+  devinfo wdog0
+
+The output may look as follows where ``timeout_cur`` and ``timeout_max`` are
+measured in seconds:
+
+.. code-block:: console
+
+  barebox@DPTechnics DPT-Module:/ devinfo wdog0
+  Parameters:
+autoping: 1 (type: bool)
+timeout_cur: 7 (type: uint32)
+timeout_max: 10 (type: uint32)
+
+Use barebox' environment to persist these changes between reboots:
+
+.. code-block:: console
+
+  nv dev.wdog0.autoping=1
+  nv dev.wdog0.timeout_cur=7
+
+Boot Watchdog Timeout
+~
+
+With this functionality barebox may start a watchdog or update the timeout of
+an already-running one, just before kicking the boot image. It can be
+configured temporarily via
+
+.. code-block:: console
+
+  global boot.watchdog_timeout=10
+
+or persistently by
+
+.. code-block:: console
+
+  nv boot.watchdog_timeout=10
+
+where the used value again is measured in seconds.
+
+On a system with multiple watchdogs, the watchdog with the highest positive
+priority is the one affected by the ``boot.watchdog_timeout`` parameter.  If
+multiple watchdogs share the same priority, only one will be started.
-- 
2.23.0


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[PATCH v6 2/2] doc: watchdog: add note about danger of autoping

2019-10-24 Thread Oleksij Rempel 
Signed-off-by: Oleksij Rempel 
---
 Documentation/user/watchdog.rst | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/user/watchdog.rst b/Documentation/user/watchdog.rst
index 26e347d5f6..02bd576a89 100644
--- a/Documentation/user/watchdog.rst
+++ b/Documentation/user/watchdog.rst
@@ -29,6 +29,12 @@ enabled by default. To start polling from command line run:
 
   wdog0.autoping=1
 
+**NOTE** Using this feature might have the effect that the watchdog is
+effectively disabled. In case barebox is stuck in a loop that includes feeding
+the watchdog, then the watchdog will never trigger. Only use this feature
+during development or when a bad watchdog design (Short watchdog timeout
+enabled as boot default) doesn't give you another choice.
+
 The poller interval is not configurable, but fixed at 500ms and the watchdog
 timeout is configured by default to the maximum of the supported values by
 hardware. To change the timeout used by the poller, run:
-- 
2.23.0


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