from:"Tim Sander"

Re: [PATCH v7] Terasic DE0-Nano-SoC: add support

2016-02-26 Thread Tim Sander

Hi

Am Freitag, 26. Februar 2016, 08:25:06 schrieb Sascha Hauer:
> On Thu, Feb 25, 2016 at 11:29:42AM +0100, Tim Sander wrote:
> > v7: eof whitespace fixes
> > 
> > A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
> > The pretty similar Socrates Board was taken as a starting point with
> > pulling in the memory timings/pinmux from
> > http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardware
> > Design
> > 
> > Signed-off-by: Tim Sander <t...@krieglstein.org>
> 
> Applied, thanks. Please provide a Changelog next time, otherwise it's
> hard to guess what you actually changed.
I only included the change for the last patch not the whole stuff, so if i 
understand correctly i will include all changelog files the next time.
 
> BTW I noticed the xload defconfig does not build anymore with this patch
> applied because the image gets too big. I searched for the reason at got
> a step closer. The SDRAM sequencer code is compiled into the image
> multiple times, one time for each board. The intention was that the
> linker throws away the unused copies via -ffunction-section and
> --gc-sections. Unfortunately this does not work because the functions in
> the different copies all end up with the same name. So for example we
> have mem_precharge_and_activate() three times in the image. Only one
> version is used, but the others can't be thrown away because they are in
> the same section.
One thing that comes to mind is gcc -flto. My experience shows that it works
much nicer than gc-sections. It hurts on large code bases though but i guess 
this can be neglected with barebox.

> I hope we can solve this, otherwise we have to split the xloader
> defconfigs into multiple configs.
It would be indeed nicer if the compiler could sort that out.

Best regards
Tim


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[PATCH v7] Terasic DE0-Nano-SoC: add support

2016-02-25 Thread Tim Sander

v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 674 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c|  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 227 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  34 ++
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 1910 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 5a755c9..9241b66 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..919bfc8
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,35 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /*
+* min rx data delay, max rx/tx clock delay,
+* min rx/tx control delay
+*/
+   phy_write_mmd_indirect(dev, 4, 2, 0);
+   phy_write_mmd_indirect(dev, 5, 2, 0);
+   phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+   return 0;
+}
+
+static int socfpga_init(void)
+{
+   if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/config.h
@@ -0,0 +1 @@
+/* nothing */
diff --git a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c 
b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
new file mode 100644
index 000..4e9ac7f
--- /dev/null
+++ b/arch/ar

[PATCH v6] Terasic DE0-Nano-SoC: add support

2016-02-25 Thread Tim Sander

v6: proper whitespaces, sorry severly firewall impaired

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c|  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  34 ++
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 1912 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 1029e8f..4d572a6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..919bfc8
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,35 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /*
+* min rx data delay, max rx/tx clock delay,
+* min rx/tx control delay
+*/
+   phy_write_mmd_indirect(dev, 4, 2, 0);
+   phy_write_mmd_indirect(dev, 5, 2, 0);
+   phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+   return 0;
+}
+
+static int socfpga_init(void)
+{
+   if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/config.h
@@ -0,0 +1 @@
+/* nothing */
diff --git a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c 
b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
new file mode 100644
index 000..

[PATCH v5] Terasic DE0-Nano-SoC: add support

2016-02-12 Thread Tim Sander

v5: remove led functions,
  rename socfpga_console_init -> socfpga_init
  use more specific device tree identifier, needs a kernel dts addition 
though:
add "terasic,de0-nano-soc" to compatible string in dts file of the 
board.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

---
Signed-off-by: Tim Sander <t...@krieglstein.org>
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c|  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  34 ++
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 1912 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 1029e8f..4d572a6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..919bfc8
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,35 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /*
+* min rx data delay, max rx/tx clock delay,
+* min rx/tx control delay
+*/
+   phy_write_mmd_indirect(dev, 4, 2, 0);
+   phy_write_mmd_indirect(dev, 5, 2, 0);
+   phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+   return 0;
+}
+
+static int socfpga_init(void)
+{
+   if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/config.h
@@ -

Re: [PATCH v4] Terasic DE0-Nano-SoC: add support

2016-02-12 Thread Tim Sander

Hi Sascha

Thanks for your hints.
Am Freitag, 12. Februar 2016, 09:33:20 schrieb Sascha Hauer:
> Hi Tim,
> 
> On Thu, Feb 11, 2016 at 03:40:41PM +0100, Tim Sander wrote:
> > Hi
> > 
> > Am Montag, 1. Februar 2016, 11:08:10 schrieb Andrey Smirnov:
> > ...
> > 
> > > > diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c
> > > > b/arch/arm/boards/terasic-de0-nano-soc/board.c new file mode 100644
> > > > index 000..22f8291
> > > > --- /dev/null
> > > > +++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
> > > > @@ -0,0 +1,37 @@
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +
> > > > +static int phy_fixup(struct phy_device *dev)
> > > > +{
> > > > +   /* min rx data delay */
> > > > +   phy_write(dev, 0x0b, 0x8105);
> > > > +   phy_write(dev, 0x0c, 0x);
> > > > +
> > > > +   /* max rx/tx clock delay, min rx/tx control delay */
> > > > +   phy_write(dev, 0x0b, 0x8104);
> > > > +   phy_write(dev, 0x0c, 0xa0d0);
> > > > +   phy_write(dev, 0x0b, 0x104);
> > > > +
> > > > +   return 0;
> > > > +}
> > > > +
> > > > +static int socfpga_console_init(void)
> > > 
> > > I know that this names comes from the source code for SoCKit, but I'd
> > > argue that the name of this function should be changed to something
> > > more descriptive. This function doesn't really initialize console in
> > > any way and just happen to be executed on "console_initcall" level of
> > > execution.
> > > 
> > > > +{
> > > > +   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
> > 
> > The string above will be replaced with "terasic,de0-nano-soc" but see
> > below...> 
> > > > +   return 0;
> > > 
> > > Since Altera is not really a vendor of this board and, I'd suggest the
> > > compatibility string be renamed to "terrasic,de0-nano-soc"
> > 
> > Besides that the company is named Terasic i concur with you but there
> > is one problem: I have now just patched the kernel with the folowing patch
> > to add the device tree compatiblility information needed:
> > 
> > diff --git a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
> > b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts index
> > 555e9caf21e1..3a427423168e 100644
> > --- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
> > +++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
> > @@ -18,7 +18,7 @@
> > 
> >  / {
> >  
> > model = "Terasic DE-0(Atlas)";
> > 
> > -   compatible = "altr,socfpga-cyclone5", "altr,socfpga";
> > +   compatible = "terasic,de0-nano-soc"," altr,socfpga-cyclone5",
> > "altr,socfpga";> 
> > chosen {
> > 
> > bootargs = "earlyprintk";
> 
> Ok, barebox finds a device tree compatible to "terasic,de0-nano-soc" on
> the SD card, but thinks it itself is not compatible to that. It seems
> the patch above has no effect. Could you check with of_dump that
> /compatible is indeed what you expect it to be?

> Note that you have a typo in your compatible string. "
> altr,socfpga-cyclone5" should be "altr,socfpga-cyclone5". That should cause
> your problem
> though.
Well i found out that i forgot to add the "terasic,de0-nano-soc" string to the 
dts file within barebox. So just adding it in board.c and in linux kernel dts 
didn't suffice.

Best regards
Tim


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Re: [PATCH v4] Terasic DE0-Nano-SoC: add support

2016-02-11 Thread Tim Sander

Hi

Am Montag, 1. Februar 2016, 11:08:10 schrieb Andrey Smirnov:
...
> > diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c
> > b/arch/arm/boards/terasic-de0-nano-soc/board.c new file mode 100644
> > index 000..22f8291
> > --- /dev/null
> > +++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
> > @@ -0,0 +1,37 @@
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +static int phy_fixup(struct phy_device *dev)
> > +{
> > +   /* min rx data delay */
> > +   phy_write(dev, 0x0b, 0x8105);
> > +   phy_write(dev, 0x0c, 0x);
> > +
> > +   /* max rx/tx clock delay, min rx/tx control delay */
> > +   phy_write(dev, 0x0b, 0x8104);
> > +   phy_write(dev, 0x0c, 0xa0d0);
> > +   phy_write(dev, 0x0b, 0x104);
> > +
> > +   return 0;
> > +}
> > +
> > +static int socfpga_console_init(void)
> 
> I know that this names comes from the source code for SoCKit, but I'd
> argue that the name of this function should be changed to something
> more descriptive. This function doesn't really initialize console in
> any way and just happen to be executed on "console_initcall" level of
> execution.
> 
> > +{
> > +   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
The string above will be replaced with "terasic,de0-nano-soc" but see below...
> > +   return 0;
> 
> Since Altera is not really a vendor of this board and, I'd suggest the
> compatibility string be renamed to "terrasic,de0-nano-soc"
Besides that the company is named Terasic i concur with you but there 
is one problem: I have now just patched the kernel with the folowing patch to 
add the device tree compatiblility information needed:

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts 
b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
index 555e9caf21e1..3a427423168e 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
@@ -18,7 +18,7 @@
 
 / {
model = "Terasic DE-0(Atlas)";
-   compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+   compatible = "terasic,de0-nano-soc"," altr,socfpga-cyclone5", 
"altr,socfpga";
 
chosen {
bootargs = "earlyprintk";
-- 
1.9.1

But now i have  the barebox bootmessage which states the following on boot:
--
blspec: blspec_scan_directory: mmc loader/entries
blspec: blspec_scan_directory: /mnt/mmc0.2 loader/entries
blspec: ignoring entry with incompatible devicetree "terasic,de0-nano-soc"
--

Looking into loader/entries on the SD-card shows the follwing contents of 
socfpga_cyclone5_de0_sockit.conf:
--
title   PTXdist - HBM-Altera Soc Test socfpga_cyclone5_de0_sockit
version 4.4.1
options root=/dev/mmcblk0p3 rootwait rootfstype=ext4 rw
linux   /boot/zImage
devicetree  /boot/socfpga_cyclone5_de0_sockit.dtb
--

dtc -I dtb -O dts socfpga_cyclone5_de0_sockit.dtb |head outputs
--
/dts-v1/;

/memreserve/0x 0x1000;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "Terasic DE-0(Atlas)";
compatible = "terasic,de0-nano-soc", " altr,socfpga-cyclone5", 
"altr,socfpga";

--

All files are taken directly from the SD-card so i am pretty sure i made no 
errors there.
But currently i fail to see why this error occurs? I seems to me that all the 
device tree
magic is in place but unfortunatly barebox does not seem to know...

Best Regards
Tim

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Re: [PATCH v3] Terasic DE0-Nano-SoC: add support

2016-02-02 Thread Tim Sander

On Monday 01 February 2016 19:31:53 Trent Piepho wrote:
> On Mon, 2016-02-01 at 15:07 +0100, Tim Sander wrote:
> 
> > v3: forgot to amend my changes in v2.
> > 
> > +
> > +static int socfpga_console_init(void)
> > +{
> > +   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
> > +   return 0;
> 
> 
> Seems like this should be a board specific check instead of a generic
> one, since it's programming board specific phy timing values to a board
> specific PHY.
I am not sure, but as outlined below i think this is also due to the 
compatible string of the coresponding dts within the linux kernel.
At least i first tried a more specific dts compatible string and that failed 
to boot.
> 
> > +
> > +   if (IS_ENABLED(CONFIG_PHYLIB))
> > +   phy_register_fixup_for_uid(PHY_ID_KSZ9021,
> > MICREL_PHY_ID_MASK, phy_fixup);
 +
> > +   return 0;
> > +}
> 
> 
> 
> > +
> > +static inline void ledon(int led)
> > +{
> > +   u32 val;
> > +
> > +   val = readl(0xFF709000);
> > +   val |= 1 << (led + 24);
> > +   writel(val, 0xFF709000);
> 
> 
> There a macro CYCLONE5_GPIO1_BASE that could be used instead of
> 0xFF709000.
> 
> 
> > +
> > +   val = readl(0xFF709004);
> > +   val |= 1 << (led + 24);
> > +   writel(val, 0xFF709004);
> > +}
> > +
> > +static inline void ledoff(int led)
> > +{
> > +   u32 val;
> > +
> > +   val = readl(0xFF709000);
> > +   val &= ~(1 << (led + 24));
> > +   writel(val, 0xFF709000);
> > +
> > +   val = readl(0xFF709004);
> > +   val &= ~(1 << (led + 24));
> > +   writel(val, 0xFF709004);
> > +}
> 
> 
> 
> 
> > +#include 
> > +#include "socfpga.dtsi"
> > +
> > +/ {
> > +   model = "Terasic DE0-Nano-SoC (Atlas)";
> > +   compatible = "altr,socfpga-cyclone5", "altr,socfpga";
> 
> 
> Wouldn't the right thing to do here be to have a compatible entry for
> this board type?  Like the existing "terasic,sockit" or something more
> specific.
Well the problem at this point is that due to the boardspecs the compatible 
string has to be AFAIK the same as the one used in the linux kernel. 
Unfortunatly the coresponding dts file also has no more specific compatible 
string.

Best regards
Tim

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[PATCH v2] Terasic DE0-Nano-SoC: add support

2016-02-01 Thread Tim Sander

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from 
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Its only tested at room temperatures and i am not 100% sure about the device 
tree:
 One known problem is the fact that the board identifier is pretty generic but 
 its the same in the linux kernel so i resorted to that.

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  37 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c| 102 
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 136 +
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 2042 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 1029e8f..4d572a6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..22f8291
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,37 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /* min rx data delay */
+   phy_write(dev, 0x0b, 0x8105);
+   phy_write(dev, 0x0c, 0x);
+
+   /* max rx/tx clock delay, min rx/tx control delay */
+   phy_write(dev, 0x0b, 0x8104);
+   phy_write(dev, 0x0c, 0xa0d0);
+   phy_write(dev, 0x0b, 0x104);
+
+   return 0;
+}
+
+static int socfpga_console_init(void)
+{
+   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_console_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-n

Re: [PATCH] Terasic DE0 NANO-SoC: add support

2016-02-01 Thread Tim Sander

Am Montag, 1. Februar 2016, 15:48:03 schrieb Antony Pavlov:
> On Mon, 01 Feb 2016 13:06:22 +0100
> 
> Steffen Trumtrar <s.trumt...@pengutronix.de> wrote:
> > Tim Sander writes:
> > > Below is a Patch for supporting the Terasic DE0 NANO-SoC with barebox.
> > > The pretty similar Socrates Board was taken as a starting point with
> > > pulling in the memory timings/pinmux from
> > > http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwa
> > > reDesign> > 
> > > Its only tested at room temperatures and i am not 100% sure about the 
> > > device tree:
> > >  One known problem is the fact that the board identifier is pretty
> > >  generic but its the same in the linux kernel so i resorted to that.
> > > 
> > > Signed-off-by: Tim Sander <t...@krieglstein.org>
> > > ---
> > > 
> > >  arch/arm/boards/Makefile   |   1 +
> > >  arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
> > >  arch/arm/boards/terasic-de0-nano-soc/board.c   |  37 ++
> > >  arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
> > >  .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675
> > >  + arch/arm/boards/terasic-de0-nano-soc/lowlevel.c 
> > >| 102 
> > >  .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
> > >  arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
> > >  .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
> > >  .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
> > >  .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
> > >  .../sequencer_auto_inst_init.c | 161 +
> > >  .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
> > >  arch/arm/configs/socfpga-xload_defconfig   |   1 +
> > >  arch/arm/configs/socfpga_defconfig |   1 +
> > >  arch/arm/dts/Makefile  |   1 +
> > >  arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 136 +
> > >  arch/arm/mach-socfpga/Kconfig  |   4 +
> > >  images/Makefile.socfpga|   8 +
> > >  19 files changed, 2042 insertions(+)
> > >  create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
> > >  create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
> > >  create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
> > >  create mode 100644
> > >  arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c create
> > >  mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c create
> > >  mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
> > >  create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
> > >  create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
> > >  create mode 100644
> > >  arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h create mode
> > >  100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
> > >  create mode 100644
> > >  arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c create
> > >  mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
> > >  create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > 
> > (...)
> > 
> > > diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts new file mode 100644
> > > index ..5d1840451382
> > > --- /dev/null
> > > +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > @@ -0,0 +1,136 @@
> > > +/*
> > > + *  Copyright (C) 2013 Steffen Trumtrar <s.trumt...@pengutronix.de>
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License as published by
> > > + * the Free Software Foundation; either version 2 of the License, or
> > > + * (at your option) any later version.
> > > + *
> > > + * This program is distributed in the hope that it will be useful,
> > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > + * GNU General Public License for more details.
> > > + *
> > > + * You should have received a copy of the GNU General Public License
> > > + * along with this program.  If not, see

Re: [PATCH] Terasic DE0 NANO-SoC: add support

2016-02-01 Thread Tim Sander

Hi Steffen

Am Montag, 1. Februar 2016, 14:03:39 schrieb Steffen Trumtrar:
(...)
> > > > 
> > > > > diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > > > b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts new file mode
> > > > > 100644
> > > > > index ..5d1840451382
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > > > @@ -0,0 +1,136 @@
> > > > > +/*
> > > > > + *  Copyright (C) 2013 Steffen Trumtrar 
> > > > > + *
> > > > > + * This program is free software; you can redistribute it and/or
> > > > > modify
> > > > > + * it under the terms of the GNU General Public License as
> > > > > published by
> > > > > + * the Free Software Foundation; either version 2 of the License,
> > > > > or
> > > > > + * (at your option) any later version.
> > > > > + *
> > > > > + * This program is distributed in the hope that it will be useful,
> > > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > > > + * GNU General Public License for more details.
> > > > > + *
> > > > > + * You should have received a copy of the GNU General Public
> > > > > License
> > > > > + * along with this program.  If not, see
> > > > > .
> > > > > + */
> > > > > +
> > > > > +#include 
> > > > 
> > > > This is the wrong DT.
> > > > What you AFAIK want is the socfgpa_cyclone5_de0_sockit.dts
This one is not beeing found. Did you mean socfpga_cyclone5_de0_nano_soc.dts.
Which is also not there. I do *think* that the Sockit board has a similar 
layout. So i deliberately choose this file. Should i copy and adapt this file?

> > > > The "Terasic DE0-Nano" is the same as the "Terasic DE-0" or isn't it?
> > > > From the website it at least seems like it.
> > 
> > According to the DE0-Nano-SoC_QSG.pdf document:
> > "Whats the difference between the DE0-Nano-SoC kit and the Atlas-SoC kit?
> > 
> > The hardware is the same for the DE0-Nano-SoC kit and the Atlas-SoC kit.
> > The only difference is the getting-started process for the two kits. Users
> > can freely use the DE0-Nano-SoC kit resources on the Atlas-SoC kit and
> > vice versa."
> > 
> > > > With the other dts you then should be able to remove
> > > > 
> > > > > +#include "socfpga.dtsi"
> > > > > +
> > > > > +/ {
> > > > > +   model = "Terasic DE0-Nano(Atlas)";
> > 
> > So with that it would be more precise to name it DE0-Nano-SoC (Atlas)?
> > It would be than different to that in the linux kernel?
> 
> IIRC Dinh, who did the dts, initially started with an even more confusing
> naming and ended with this.
> It seems reasonable to me, to fix the model name in linux to match the dts
> name, i.e. "DE0-Nano-SoC". I don't know how the "Atlas" fits in there
> though.
The Atlas part is just plain weird. But if someone is grepping for Atlas 
support its at least nice to have it in there.

Best regards
Tim



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[PATCH v3] Terasic DE0-Nano-SoC: add support

2016-02-01 Thread Tim Sander

v3: forgot to amend my changes in v2.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from 
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Its only tested at room temperatures and i am not 100% sure about the device 
tree:
 One known problem is the fact that the board identifier is pretty generic but 
 its the same in the linux kernel so i resorted to that.

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  37 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c| 102 
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 136 +
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 2042 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 1029e8f..4d572a6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..22f8291
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,37 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /* min rx data delay */
+   phy_write(dev, 0x0b, 0x8105);
+   phy_write(dev, 0x0c, 0x);
+
+   /* max rx/tx clock delay, min rx/tx control delay */
+   phy_write(dev, 0x0b, 0x8104);
+   phy_write(dev, 0x0c, 0xa0d0);
+   phy_write(dev, 0x0b, 0x104);
+
+   return 0;
+}
+
+static int socfpga_console_init(void)
+{
+   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_console_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index 000..da84fa5
--- /dev/nul

[PATCH v4] Terasic DE0-Nano-SoC: add support

2016-02-01 Thread Tim Sander

v4: use the amended patch not the old one, doh. Sorry for the noise.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from 
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Its only tested at room temperatures and i am not 100% sure about the device 
tree:
 One known problem is the fact that the board identifier is pretty generic but 
 its the same in the linux kernel so i resorted to that.

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  37 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c| 102 
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  34 ++
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 1940 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 1029e8f..4d572a6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index 000..8c927fe
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index 000..22f8291
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,37 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /* min rx data delay */
+   phy_write(dev, 0x0b, 0x8105);
+   phy_write(dev, 0x0c, 0x);
+
+   /* max rx/tx clock delay, min rx/tx control delay */
+   phy_write(dev, 0x0b, 0x8104);
+   phy_write(dev, 0x0c, 0xa0d0);
+   phy_write(dev, 0x0b, 0x104);
+
+   return 0;
+}
+
+static int socfpga_console_init(void)
+{
+   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_console_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index

[PATCH] Terasic DE0 NANO-SoC: add support

2016-02-01 Thread Tim Sander

Below is a Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from 
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Its only tested at room temperatures and i am not 100% sure about the device 
tree:
 One known problem is the fact that the board identifier is pretty generic but 
its the 
 same in the linux kernel so i resorted to that.

Signed-off-by: Tim Sander <t...@krieglstein.org>
---
 arch/arm/boards/Makefile   |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile  |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c   |  37 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h  |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c| 102 
 .../boards/terasic-de0-nano-soc/pinmux_config.c| 240 
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c | 161 +
 .../terasic-de0-nano-soc/sequencer_defines.h   | 160 +
 arch/arm/configs/socfpga-xload_defconfig   |   1 +
 arch/arm/configs/socfpga_defconfig |   1 +
 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 136 +
 arch/arm/mach-socfpga/Kconfig  |   4 +
 images/Makefile.socfpga|   8 +
 19 files changed, 2042 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 
arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 2e58f15f3533..1813d5f673fe 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)+= 
sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328) += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)  += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)  += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)   += solidrun-microsom/
diff --git a/arch/arm/boards/terasic-de0-nano-soc/Makefile 
b/arch/arm/boards/terasic-de0-nano-soc/Makefile
new file mode 100644
index ..8c927fe291a6
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c 
b/arch/arm/boards/terasic-de0-nano-soc/board.c
new file mode 100644
index ..22f8291b3069
--- /dev/null
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -0,0 +1,37 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int phy_fixup(struct phy_device *dev)
+{
+   /* min rx data delay */
+   phy_write(dev, 0x0b, 0x8105);
+   phy_write(dev, 0x0c, 0x);
+
+   /* max rx/tx clock delay, min rx/tx control delay */
+   phy_write(dev, 0x0b, 0x8104);
+   phy_write(dev, 0x0c, 0xa0d0);
+   phy_write(dev, 0x0b, 0x104);
+
+   return 0;
+}
+
+static int socfpga_console_init(void)
+{
+   if (!of_machine_is_compatible("altr,socfpga-cyclone5"))
+   return 0;
+
+   if (IS_ENABLED(CONFIG_PHYLIB))
+   phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 
phy_fixup);
+
+   return 0;
+}
+console_initcall(socfpga_console_init);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/config.h 
b/arch/arm/boards/terasic-de0-nano-soc/config.h
new file mode 100644
index ..da84fa5f6b78
---

Re: [PATCH v7] Terasic DE0-Nano-SoC: add support

[PATCH v7] Terasic DE0-Nano-SoC: add support

[PATCH v6] Terasic DE0-Nano-SoC: add support

[PATCH v5] Terasic DE0-Nano-SoC: add support

Re: [PATCH v4] Terasic DE0-Nano-SoC: add support

Re: [PATCH v4] Terasic DE0-Nano-SoC: add support

Re: [PATCH v3] Terasic DE0-Nano-SoC: add support

[PATCH v2] Terasic DE0-Nano-SoC: add support

Re: [PATCH] Terasic DE0 NANO-SoC: add support

Re: [PATCH] Terasic DE0 NANO-SoC: add support

[PATCH v3] Terasic DE0-Nano-SoC: add support

[PATCH v4] Terasic DE0-Nano-SoC: add support

[PATCH] Terasic DE0 NANO-SoC: add support

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