Re: [PATCH] ARM i.MX6: query silicon revision

2012-09-03 Thread Steffen Trumtrar 
On Sat, Sep 01, 2012 at 10:53:41AM +0200, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 On 15:55 Fri 31 Aug , Steffen Trumtrar wrote:
  Read silicon revision from ???-register.
  This is based on a7683867463481bfea84af4d60af832ddfb3da7f from u-boot.
  The address 0x020c8260 is used and decoded. I haven't found that in my
  datasheet, so I must trust the code to be correct.
  At least on a SabreLite v1.0 I get the correct version though.
  
  Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
  ---
   arch/arm/mach-imx/imx6.c |   36 +++-
   1 file changed, 35 insertions(+), 1 deletion(-)
  
  diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
  index b6067d7..9c90444 100644
  --- a/arch/arm/mach-imx/imx6.c
  +++ b/arch/arm/mach-imx/imx6.c
  @@ -19,7 +19,7 @@
   #include common.h
   #include io.h
   #include sizes.h
  -#include mach/imx6-regs.h
  +#include mach/imx-regs.h
   
   #include gpio.h
   
  @@ -35,6 +35,40 @@ void *imx_gpio_base[] = {
   
   int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
   
  +static u32 mx6_silicon_revision;
  +static char *mx6_rev_string = unknown;
  +
  +int imx_silicon_revision(void)
  +{
  +   return mx6_silicon_revision;
  +}
  +
  +static int query_silicon_revision(void)
  +{
  +   void __iomem *anatop = (void *) MX6_ANATOP_BASE_ADDR;
  +   u32 rev, reg;
  +
  +   reg = readl(anatop + 0x260);
  +   /* read mx6 variant: quad, dual, solo */
  +   //rev = (reg  4)  0xff000;
 ??

Tnx. I will fix that.

Regards,

Steffen

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[PATCH] ARM i.MX6: query silicon revision

2012-08-31 Thread Steffen Trumtrar 
Read silicon revision from ???-register.
This is based on a7683867463481bfea84af4d60af832ddfb3da7f from u-boot.
The address 0x020c8260 is used and decoded. I haven't found that in my
datasheet, so I must trust the code to be correct.
At least on a SabreLite v1.0 I get the correct version though.

Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
 arch/arm/mach-imx/imx6.c |   36 +++-
 1 file changed, 35 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index b6067d7..9c90444 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -19,7 +19,7 @@
 #include common.h
 #include io.h
 #include sizes.h
-#include mach/imx6-regs.h
+#include mach/imx-regs.h
 
 #include gpio.h
 
@@ -35,6 +35,40 @@ void *imx_gpio_base[] = {
 
 int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
 
+static u32 mx6_silicon_revision;
+static char *mx6_rev_string = unknown;
+
+int imx_silicon_revision(void)
+{
+   return mx6_silicon_revision;
+}
+
+static int query_silicon_revision(void)
+{
+   void __iomem *anatop = (void *) MX6_ANATOP_BASE_ADDR;
+   u32 rev, reg;
+
+   reg = readl(anatop + 0x260);
+   /* read mx6 variant: quad, dual, solo */
+   //rev = (reg  4)  0xff000;
+   rev = (reg  0xff) + 0x10;
+   switch (rev) {
+   case 0x10:
+   mx6_silicon_revision = IMX_CHIP_REV_1_0;
+   mx6_rev_string = 1.0;
+   break;
+   case 0x11:
+   mx6_silicon_revision = IMX_CHIP_REV_1_1;
+   mx6_rev_string = 1.1;
+   break;
+   default:
+   mx6_silicon_revision = 0;
+   }
+
+   return 0;
+}
+core_initcall(query_silicon_revision);
+
 void imx6_init_lowlevel(void)
 {
void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
-- 
1.7.10.4


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