Re: [PATCH 0/5] Zynq support for barebox

2013-03-08 Thread Steffen Trumtrar
Hi,

On Fri, Mar 08, 2013 at 01:20:47PM +0100, Michal Simek wrote:
> Hi,
> 
> 2013/3/8 Steffen Trumtrar :
> > On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
> >> On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> >> > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> >> [..]
> >> > > > I have some patches laying around, that have support for booting 
> >> > > > first stage
> >> > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because 
> >> > > > I'm not
> >> > > > completely satisfied with them in one or two places. (The 
> >> > > > clocksource seems to
> >> > > > be inverse to what barebox expects, which would be a quick fix, and 
> >> > > > barebox boots
> >> > > > uuultra slow, if I do everything according to the TRM)
> >> > > > At the moment, I do not have access to the board though. But I hope 
> >> > > > I can get a
> >> > > > hand on it in the next days.
> >> > >
> >> > > If you have a chance to send out what you have, I'd be curious to see
> >> > > it.  Fortunately I have several Zynq boards to play with.
> >> > >
> >> >
> >> > Hi!
> >> >
> >> > Have a look at
> >> > http://git.pengutronix.de/?p=str/barebox.git;a=summary
> >> >
> >> > I "stole" your clk driver and added it to my patch stack :-)
> >> > Current state for ZedBoard:
> >> > - boot first stage from SD-Card
> >> > - barebox.bin needs to be processed with
> >> > ./scripts/zynq_checksum barebox.bin BOOT.bin
> >> > to have the checksum in the BootROM header
> >> > - clocksource is arm_smp_tmd at seems accurate
> >> > - the BootROM needs about 4-5 seconds to copy barebox from
> >> >   SD to the OCM. I guess, I need to mess with the SD setup
> >> >   in the BootROM somehow
> >> > - just enough clkdev to use the timer
> >> > - all pinctrl, clk setup etc happens in the lowlevel init
> 
> Nice. What's the difference between this barebox and u-boot?
> I remember that discussion on u-boot mailing list.
> Is it just that Kconfig stuff and driver initialization?
> 
> What about DT support? Initialized u-boot from device tree?
> Is it there?
> 

Well, I don't actually know, what u-boot can do, as I do not follow it.
barebox uses Kconfig, the linux driver model, a lot less #ifdefs, has
support for a compressed bootloader, that extracts itself, the environment
system is IHMO way better than in u-boot, a menu, where you can select the
bootsource etc, you can boot images via tftp with "bootm /mnt/tftp/zImage",
you can boot zImage, uImage, ... with appended DT, with separate DT,
there is support for DT probing of devices.
What I like the most: if you know linux kernel and its structure, you know
barebox and its structure (well, mostly).

> 
> >> Thanks for sharing this! I'll be looking to get board support for the
> >> zc702 on top of your work this weekend (I have several Zynq boards, but
> >> none of them are ZedBoards).  I'm also in the process of porting the
> >> uboot zynq_gem driver.
> >
> > First, \o/. I don't know how the two differ. But I would guess, that
> > you can pretty much copy the lowlevel stuff et al.
> > Only the DDR timing stuff may make problems.
> 
> Difference is only in connection out of chip. How barebox handle this?

barebox has /arch/arm/boards/avnet-zedboard/board.c, here you can define
the boardspecific pincontrol etc. Well, like the platformcode in the kernel.
For the zynq there is no pinctrl driver though, as I have to write it first :-)

Clocks are handled like in linux. With clockdev and clocktree.

ATM this is all hardcoded in the lowlevel init.

> Serial IP selections, ddr size, mmc, etc.
> 
> 
> > Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
> > As far as I can tell at the moment, this is a driver for a
> > Cadence IP gem. And the zynq uses exactly that IP core.
> > Alas, I have problems with the dma_alloc_coherent call in its
> > probe function.
> 
> Nice. I will look forward on input from this. We need to use this IP
> in linux kernel too.
> 
> >
> > The same goes for the UART driver and other cores. We should not start
> > developing Xilinx drivers for everything, if in reality we have IP cores
> > from other providers.
> 
> definitely.
> 
> > The same goes for Linux. I haven't managed to boot mainline linux yet,
> > but I saw that there are multiple bindings and drivers for Xilinx.
> > And the TRM clearly states, that WDT, GEM, SPI, UART and TTC are all
> > Cadence IP cores.
> 
> yep, pl330, cadence gem, spi not sure, wdt also not sure, xilinx uart
> is in the mainline
> and none reports that there is cadence serial driver too.
> TTC is also news for me.
> If you can point me to them, that will be great.
> 
Well, I don't know if there are drivers for all those IPs, but if there
aren't any, they should be called cadence-something with the according
bindings. Oh, and Arasan-something for the SD-Controller.

Well, maybe those IPs are even not really developed by

Re: [PATCH 0/5] Zynq support for barebox

2013-03-08 Thread Jean-Christophe PLAGNIOL-VILLARD
On 07:39 Fri 08 Mar , Steffen Trumtrar wrote:
> On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
> > On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> > > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> > [..]
> > > > > I have some patches laying around, that have support for booting 
> > > > > first stage
> > > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because 
> > > > > I'm not
> > > > > completely satisfied with them in one or two places. (The clocksource 
> > > > > seems to
> > > > > be inverse to what barebox expects, which would be a quick fix, and 
> > > > > barebox boots
> > > > > uuultra slow, if I do everything according to the TRM)
> > > > > At the moment, I do not have access to the board though. But I hope I 
> > > > > can get a
> > > > > hand on it in the next days.
> > > > 
> > > > If you have a chance to send out what you have, I'd be curious to see
> > > > it.  Fortunately I have several Zynq boards to play with.
> > > > 
> > > 
> > > Hi!
> > > 
> > > Have a look at
> > > http://git.pengutronix.de/?p=str/barebox.git;a=summary
> > > 
> > > I "stole" your clk driver and added it to my patch stack :-)
> > > Current state for ZedBoard:
> > >   - boot first stage from SD-Card
> > >   - barebox.bin needs to be processed with
> > >   ./scripts/zynq_checksum barebox.bin BOOT.bin
> > >   to have the checksum in the BootROM header
> > >   - clocksource is arm_smp_tmd at seems accurate
> > >   - the BootROM needs about 4-5 seconds to copy barebox from
> > > SD to the OCM. I guess, I need to mess with the SD setup
> > > in the BootROM somehow
> > >   - just enough clkdev to use the timer
> > >   - all pinctrl, clk setup etc happens in the lowlevel init
> 
> Hi Josh!
> 
> > 
> > Hey Steffen-
> > 
> > Thanks for sharing this! I'll be looking to get board support for the
> > zc702 on top of your work this weekend (I have several Zynq boards, but
> > none of them are ZedBoards).  I'm also in the process of porting the
> > uboot zynq_gem driver.
> 
> First, \o/. I don't know how the two differ. But I would guess, that
> you can pretty much copy the lowlevel stuff et al.
> Only the DDR timing stuff may make problems.
> 
> Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
> As far as I can tell at the moment, this is a driver for a
> Cadence IP gem. And the zynq uses exactly that IP core.
> Alas, I have problems with the dma_alloc_coherent call in its
> probe function.
this should not give you any trouble execpt if you do not able the l2cache
correctly

I did the port and test that drivers on Cortex-A5
and Nicolas and I work on it to share the code with the kernel

U-Boot does not implement it correctly anyway

Best Regards,
J.
> 
> The same goes for the UART driver and other cores. We should not start
> developing Xilinx drivers for everything, if in reality we have IP cores
> from other providers.
> 
> The same goes for Linux. I haven't managed to boot mainline linux yet,
> but I saw that there are multiple bindings and drivers for Xilinx.
> And the TRM clearly states, that WDT, GEM, SPI, UART and TTC are all
> Cadence IP cores.
> 
> > Do you have plans for submitting this to the list?
> 
> Yes, definitely! I need to cleanup the patches a little and want to
> be sure that I didn't do anything stupidly wrong. The problem with
> dma_alloc is at least a hint, that I maybe did.
> 
> Regards,
> Steffen
> 
> -- 
> Pengutronix e.K.   | |
> Industrial Linux Solutions | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
> Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |
> 
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Re: [PATCH 0/5] Zynq support for barebox

2013-03-08 Thread Steffen Trumtrar
On Fri, Mar 08, 2013 at 10:10:11AM -0600, Josh Cartwright wrote:
> On Fri, Mar 08, 2013 at 07:39:18AM +0100, Steffen Trumtrar wrote:
> > On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
> > > On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> > > > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> > > [..]
> > > > > > I have some patches laying around, that have support for booting 
> > > > > > first stage
> > > > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because 
> > > > > > I'm not
> > > > > > completely satisfied with them in one or two places. (The 
> > > > > > clocksource seems to
> > > > > > be inverse to what barebox expects, which would be a quick fix, and 
> > > > > > barebox boots
> > > > > > uuultra slow, if I do everything according to the TRM)
> > > > > > At the moment, I do not have access to the board though. But I hope 
> > > > > > I can get a
> > > > > > hand on it in the next days.
> > > > > 
> > > > > If you have a chance to send out what you have, I'd be curious to see
> > > > > it.  Fortunately I have several Zynq boards to play with.
> > > > > 
> > > > 
> > > > Hi!
> > > > 
> > > > Have a look at
> > > > http://git.pengutronix.de/?p=str/barebox.git;a=summary
> > > > 
> > > > I "stole" your clk driver and added it to my patch stack :-)
> > > > Current state for ZedBoard:
> > > > - boot first stage from SD-Card
> > > > - barebox.bin needs to be processed with
> > > > ./scripts/zynq_checksum barebox.bin BOOT.bin
> > > > to have the checksum in the BootROM header
> > > > - clocksource is arm_smp_tmd at seems accurate
> > > > - the BootROM needs about 4-5 seconds to copy barebox from
> > > >   SD to the OCM. I guess, I need to mess with the SD setup
> > > >   in the BootROM somehow
> > > > - just enough clkdev to use the timer
> > > > - all pinctrl, clk setup etc happens in the lowlevel init
> > 
> > Hi Josh!
> > 
> > > Hey Steffen-
> > > 
> > > Thanks for sharing this! I'll be looking to get board support for the
> > > zc702 on top of your work this weekend (I have several Zynq boards, but
> > > none of them are ZedBoards).  I'm also in the process of porting the
> > > uboot zynq_gem driver.
> > 
> > First, \o/. I don't know how the two differ. But I would guess, that
> > you can pretty much copy the lowlevel stuff et al.
> > Only the DDR timing stuff may make problems.
> > 
> > Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
> > As far as I can tell at the moment, this is a driver for a
> > Cadence IP gem. And the zynq uses exactly that IP core.
> > Alas, I have problems with the dma_alloc_coherent call in its
> > probe function.
> 
> Doh!  I certainly did not want to duplicate a driver unnecessarily.
> I'll keep this in mind going forward.
>

Just a quick note: it seems that the macb can be used. I didn't manage to
get a connection yet. But I can talk to the phy, get a link etc.

So, the linux macb driver should work two.

Regards,
Steffen


-- 
Pengutronix e.K.   | |
Industrial Linux Solutions | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-08 Thread Josh Cartwright
On Fri, Mar 08, 2013 at 07:39:18AM +0100, Steffen Trumtrar wrote:
> On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
> > On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> > > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> > [..]
> > > > > I have some patches laying around, that have support for booting 
> > > > > first stage
> > > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because 
> > > > > I'm not
> > > > > completely satisfied with them in one or two places. (The clocksource 
> > > > > seems to
> > > > > be inverse to what barebox expects, which would be a quick fix, and 
> > > > > barebox boots
> > > > > uuultra slow, if I do everything according to the TRM)
> > > > > At the moment, I do not have access to the board though. But I hope I 
> > > > > can get a
> > > > > hand on it in the next days.
> > > > 
> > > > If you have a chance to send out what you have, I'd be curious to see
> > > > it.  Fortunately I have several Zynq boards to play with.
> > > > 
> > > 
> > > Hi!
> > > 
> > > Have a look at
> > > http://git.pengutronix.de/?p=str/barebox.git;a=summary
> > > 
> > > I "stole" your clk driver and added it to my patch stack :-)
> > > Current state for ZedBoard:
> > >   - boot first stage from SD-Card
> > >   - barebox.bin needs to be processed with
> > >   ./scripts/zynq_checksum barebox.bin BOOT.bin
> > >   to have the checksum in the BootROM header
> > >   - clocksource is arm_smp_tmd at seems accurate
> > >   - the BootROM needs about 4-5 seconds to copy barebox from
> > > SD to the OCM. I guess, I need to mess with the SD setup
> > > in the BootROM somehow
> > >   - just enough clkdev to use the timer
> > >   - all pinctrl, clk setup etc happens in the lowlevel init
> 
> Hi Josh!
> 
> > Hey Steffen-
> > 
> > Thanks for sharing this! I'll be looking to get board support for the
> > zc702 on top of your work this weekend (I have several Zynq boards, but
> > none of them are ZedBoards).  I'm also in the process of porting the
> > uboot zynq_gem driver.
> 
> First, \o/. I don't know how the two differ. But I would guess, that
> you can pretty much copy the lowlevel stuff et al.
> Only the DDR timing stuff may make problems.
> 
> Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
> As far as I can tell at the moment, this is a driver for a
> Cadence IP gem. And the zynq uses exactly that IP core.
> Alas, I have problems with the dma_alloc_coherent call in its
> probe function.

Doh!  I certainly did not want to duplicate a driver unnecessarily.
I'll keep this in mind going forward.

> The same goes for the UART driver and other cores. We should not start
> developing Xilinx drivers for everything, if in reality we have IP cores
> from other providers.

Absolutely.

Thanks,

   Josh

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-08 Thread Michal Simek
Hi,

2013/3/8 Steffen Trumtrar :
> On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
>> On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
>> > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
>> [..]
>> > > > I have some patches laying around, that have support for booting first 
>> > > > stage
>> > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because 
>> > > > I'm not
>> > > > completely satisfied with them in one or two places. (The clocksource 
>> > > > seems to
>> > > > be inverse to what barebox expects, which would be a quick fix, and 
>> > > > barebox boots
>> > > > uuultra slow, if I do everything according to the TRM)
>> > > > At the moment, I do not have access to the board though. But I hope I 
>> > > > can get a
>> > > > hand on it in the next days.
>> > >
>> > > If you have a chance to send out what you have, I'd be curious to see
>> > > it.  Fortunately I have several Zynq boards to play with.
>> > >
>> >
>> > Hi!
>> >
>> > Have a look at
>> > http://git.pengutronix.de/?p=str/barebox.git;a=summary
>> >
>> > I "stole" your clk driver and added it to my patch stack :-)
>> > Current state for ZedBoard:
>> > - boot first stage from SD-Card
>> > - barebox.bin needs to be processed with
>> > ./scripts/zynq_checksum barebox.bin BOOT.bin
>> > to have the checksum in the BootROM header
>> > - clocksource is arm_smp_tmd at seems accurate
>> > - the BootROM needs about 4-5 seconds to copy barebox from
>> >   SD to the OCM. I guess, I need to mess with the SD setup
>> >   in the BootROM somehow
>> > - just enough clkdev to use the timer
>> > - all pinctrl, clk setup etc happens in the lowlevel init

Nice. What's the difference between this barebox and u-boot?
I remember that discussion on u-boot mailing list.
Is it just that Kconfig stuff and driver initialization?

What about DT support? Initialized u-boot from device tree?
Is it there?


>> Thanks for sharing this! I'll be looking to get board support for the
>> zc702 on top of your work this weekend (I have several Zynq boards, but
>> none of them are ZedBoards).  I'm also in the process of porting the
>> uboot zynq_gem driver.
>
> First, \o/. I don't know how the two differ. But I would guess, that
> you can pretty much copy the lowlevel stuff et al.
> Only the DDR timing stuff may make problems.

Difference is only in connection out of chip. How barebox handle this?
Serial IP selections, ddr size, mmc, etc.


> Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
> As far as I can tell at the moment, this is a driver for a
> Cadence IP gem. And the zynq uses exactly that IP core.
> Alas, I have problems with the dma_alloc_coherent call in its
> probe function.

Nice. I will look forward on input from this. We need to use this IP
in linux kernel too.

>
> The same goes for the UART driver and other cores. We should not start
> developing Xilinx drivers for everything, if in reality we have IP cores
> from other providers.

definitely.

> The same goes for Linux. I haven't managed to boot mainline linux yet,
> but I saw that there are multiple bindings and drivers for Xilinx.
> And the TRM clearly states, that WDT, GEM, SPI, UART and TTC are all
> Cadence IP cores.

yep, pl330, cadence gem, spi not sure, wdt also not sure, xilinx uart
is in the mainline
and none reports that there is cadence serial driver too.
TTC is also news for me.
If you can point me to them, that will be great.


>> Do you have plans for submitting this to the list?
>
> Yes, definitely! I need to cleanup the patches a little and want to
> be sure that I didn't do anything stupidly wrong. The problem with
> dma_alloc is at least a hint, that I maybe did.

Nice discussion. Would like to look at it with you but

Hopefully next next week I will have more time to look at your patches
and try it.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-07 Thread Steffen Trumtrar
On Thu, Mar 07, 2013 at 04:46:25PM -0600, Josh Cartwright wrote:
> On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> > On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> [..]
> > > > I have some patches laying around, that have support for booting first 
> > > > stage
> > > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because I'm 
> > > > not
> > > > completely satisfied with them in one or two places. (The clocksource 
> > > > seems to
> > > > be inverse to what barebox expects, which would be a quick fix, and 
> > > > barebox boots
> > > > uuultra slow, if I do everything according to the TRM)
> > > > At the moment, I do not have access to the board though. But I hope I 
> > > > can get a
> > > > hand on it in the next days.
> > > 
> > > If you have a chance to send out what you have, I'd be curious to see
> > > it.  Fortunately I have several Zynq boards to play with.
> > > 
> > 
> > Hi!
> > 
> > Have a look at
> > http://git.pengutronix.de/?p=str/barebox.git;a=summary
> > 
> > I "stole" your clk driver and added it to my patch stack :-)
> > Current state for ZedBoard:
> > - boot first stage from SD-Card
> > - barebox.bin needs to be processed with
> > ./scripts/zynq_checksum barebox.bin BOOT.bin
> > to have the checksum in the BootROM header
> > - clocksource is arm_smp_tmd at seems accurate
> > - the BootROM needs about 4-5 seconds to copy barebox from
> >   SD to the OCM. I guess, I need to mess with the SD setup
> >   in the BootROM somehow
> > - just enough clkdev to use the timer
> > - all pinctrl, clk setup etc happens in the lowlevel init

Hi Josh!

> 
> Hey Steffen-
> 
> Thanks for sharing this! I'll be looking to get board support for the
> zc702 on top of your work this weekend (I have several Zynq boards, but
> none of them are ZedBoards).  I'm also in the process of porting the
> uboot zynq_gem driver.

First, \o/. I don't know how the two differ. But I would guess, that
you can pretty much copy the lowlevel stuff et al.
Only the DDR timing stuff may make problems.

Second: No! Don't! I'm trying to get drivers/net/macb.c running on Zynq.
As far as I can tell at the moment, this is a driver for a
Cadence IP gem. And the zynq uses exactly that IP core.
Alas, I have problems with the dma_alloc_coherent call in its
probe function.

The same goes for the UART driver and other cores. We should not start
developing Xilinx drivers for everything, if in reality we have IP cores
from other providers.

The same goes for Linux. I haven't managed to boot mainline linux yet,
but I saw that there are multiple bindings and drivers for Xilinx.
And the TRM clearly states, that WDT, GEM, SPI, UART and TTC are all
Cadence IP cores.

> Do you have plans for submitting this to the list?

Yes, definitely! I need to cleanup the patches a little and want to
be sure that I didn't do anything stupidly wrong. The problem with
dma_alloc is at least a hint, that I maybe did.

Regards,
Steffen

-- 
Pengutronix e.K.   | |
Industrial Linux Solutions | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-07 Thread Josh Cartwright
On Wed, Mar 06, 2013 at 06:28:50PM +0100, Steffen Trumtrar wrote:
> On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
[..]
> > > I have some patches laying around, that have support for booting first 
> > > stage
> > > from a SD-Card on a ZedBoard. I didn't send them as of yet, because I'm 
> > > not
> > > completely satisfied with them in one or two places. (The clocksource 
> > > seems to
> > > be inverse to what barebox expects, which would be a quick fix, and 
> > > barebox boots
> > > uuultra slow, if I do everything according to the TRM)
> > > At the moment, I do not have access to the board though. But I hope I can 
> > > get a
> > > hand on it in the next days.
> > 
> > If you have a chance to send out what you have, I'd be curious to see
> > it.  Fortunately I have several Zynq boards to play with.
> > 
> 
> Hi!
> 
> Have a look at
> http://git.pengutronix.de/?p=str/barebox.git;a=summary
> 
> I "stole" your clk driver and added it to my patch stack :-)
> Current state for ZedBoard:
>   - boot first stage from SD-Card
>   - barebox.bin needs to be processed with
>   ./scripts/zynq_checksum barebox.bin BOOT.bin
>   to have the checksum in the BootROM header
>   - clocksource is arm_smp_tmd at seems accurate
>   - the BootROM needs about 4-5 seconds to copy barebox from
> SD to the OCM. I guess, I need to mess with the SD setup
> in the BootROM somehow
>   - just enough clkdev to use the timer
>   - all pinctrl, clk setup etc happens in the lowlevel init

Hey Steffen-

Thanks for sharing this! I'll be looking to get board support for the
zc702 on top of your work this weekend (I have several Zynq boards, but
none of them are ZedBoards).  I'm also in the process of porting the
uboot zynq_gem driver.

Do you have plans for submitting this to the list?

Thanks again,

   Josh

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-06 Thread Steffen Trumtrar
On Tue, Mar 05, 2013 at 11:09:29AM -0600, Josh Cartwright wrote:
> On Sun, Mar 03, 2013 at 03:58:10PM +0100, Steffen Trumtrar wrote:
> > Hi!
> > 
> > On Sat, Mar 02, 2013 at 07:20:12PM -0600, Josh Cartwright wrote:
> > > In San Francisco a couple weeks ago (ELC2013), Thomas Petazzoni
> > > informally mentioned barebox in passing, so I decided to toy with it a
> > > bit...
> > > 
> > > This patchset adds basic support for the Zynq SoC to barebox.  So far,
> > > it's only been tested as a 'secondary' bootloader (after u-boot).  Also
> > > added is support for the zc702 development board.
> > > 
> > 
> > I have some patches laying around, that have support for booting first stage
> > from a SD-Card on a ZedBoard. I didn't send them as of yet, because I'm not
> > completely satisfied with them in one or two places. (The clocksource seems 
> > to
> > be inverse to what barebox expects, which would be a quick fix, and barebox 
> > boots
> > uuultra slow, if I do everything according to the TRM)
> > At the moment, I do not have access to the board though. But I hope I can 
> > get a
> > hand on it in the next days.
> 
> If you have a chance to send out what you have, I'd be curious to see
> it.  Fortunately I have several Zynq boards to play with.
> 

Hi!

Have a look at
http://git.pengutronix.de/?p=str/barebox.git;a=summary

I "stole" your clk driver and added it to my patch stack :-)
Current state for ZedBoard:
- boot first stage from SD-Card
- barebox.bin needs to be processed with
./scripts/zynq_checksum barebox.bin BOOT.bin
to have the checksum in the BootROM header
- clocksource is arm_smp_tmd at seems accurate
- the BootROM needs about 4-5 seconds to copy barebox from
  SD to the OCM. I guess, I need to mess with the SD setup
  in the BootROM somehow
- just enough clkdev to use the timer
- all pinctrl, clk setup etc happens in the lowlevel init

Regards,
Steffen

-- 
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Industrial Linux Solutions | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-05 Thread Josh Cartwright
On Sun, Mar 03, 2013 at 03:58:10PM +0100, Steffen Trumtrar wrote:
> Hi!
> 
> On Sat, Mar 02, 2013 at 07:20:12PM -0600, Josh Cartwright wrote:
> > In San Francisco a couple weeks ago (ELC2013), Thomas Petazzoni
> > informally mentioned barebox in passing, so I decided to toy with it a
> > bit...
> > 
> > This patchset adds basic support for the Zynq SoC to barebox.  So far,
> > it's only been tested as a 'secondary' bootloader (after u-boot).  Also
> > added is support for the zc702 development board.
> > 
> 
> I have some patches laying around, that have support for booting first stage
> from a SD-Card on a ZedBoard. I didn't send them as of yet, because I'm not
> completely satisfied with them in one or two places. (The clocksource seems to
> be inverse to what barebox expects, which would be a quick fix, and barebox 
> boots
> uuultra slow, if I do everything according to the TRM)
> At the moment, I do not have access to the board though. But I hope I can get 
> a
> hand on it in the next days.

If you have a chance to send out what you have, I'd be curious to see
it.  Fortunately I have several Zynq boards to play with.

   Josh

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Re: [PATCH 0/5] Zynq support for barebox

2013-03-03 Thread Steffen Trumtrar
Hi!

On Sat, Mar 02, 2013 at 07:20:12PM -0600, Josh Cartwright wrote:
> In San Francisco a couple weeks ago (ELC2013), Thomas Petazzoni
> informally mentioned barebox in passing, so I decided to toy with it a
> bit...
> 
> This patchset adds basic support for the Zynq SoC to barebox.  So far,
> it's only been tested as a 'secondary' bootloader (after u-boot).  Also
> added is support for the zc702 development board.
> 

I have some patches laying around, that have support for booting first stage
from a SD-Card on a ZedBoard. I didn't send them as of yet, because I'm not
completely satisfied with them in one or two places. (The clocksource seems to
be inverse to what barebox expects, which would be a quick fix, and barebox 
boots
uuultra slow, if I do everything according to the TRM)
At the moment, I do not have access to the board though. But I hope I can get a
hand on it in the next days.
What I do not have atm is the clkdev stuff, that you already have.

Regards,
Steffen

> The first two patches are simple typos I found getting acclimated to the
> barebox source.
> 
> Josh Cartwright (5):
>   trivial: doc: fix typos in mach-arm.dox
>   defaultenv: fixed mismatched braces in bin/boot
>   ARM: zynq: add driver for Zynq uarts
>   ARM: zynq: add support for Zynq 7000 SoC
>   ARM: zynq: add support for zc702 development board
> 
>  arch/arm/Kconfig   |   9 +
>  arch/arm/Makefile  |   2 +
>  arch/arm/boards/zynq-zc702/Makefile|   1 +
>  arch/arm/boards/zynq-zc702/config.h|   0
>  arch/arm/boards/zynq-zc702/devices.c   |  70 ++
>  arch/arm/boards/zynq-zc702/lowlevel.c  |  28 +++
>  arch/arm/mach-arm.dox  |   4 +-
>  arch/arm/mach-zynq/Kconfig |  22 ++
>  arch/arm/mach-zynq/Makefile|   1 +
>  arch/arm/mach-zynq/clocks.c| 341 
> +
>  arch/arm/mach-zynq/include/mach/clkdev.h   |   7 +
>  arch/arm/mach-zynq/include/mach/debug_ll.h |  21 ++
>  arch/arm/mach-zynq/include/mach/slcr.h |  26 +++
>  arch/arm/mach-zynq/reset.c |  28 +++
>  defaultenv/bin/boot|   2 +-
>  drivers/serial/Kconfig |   6 +
>  drivers/serial/Makefile|   1 +
>  drivers/serial/serial_zynq.c   | 144 
>  18 files changed, 710 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm/boards/zynq-zc702/Makefile
>  create mode 100644 arch/arm/boards/zynq-zc702/config.h
>  create mode 100644 arch/arm/boards/zynq-zc702/devices.c
>  create mode 100644 arch/arm/boards/zynq-zc702/lowlevel.c
>  create mode 100644 arch/arm/mach-zynq/Kconfig
>  create mode 100644 arch/arm/mach-zynq/Makefile
>  create mode 100644 arch/arm/mach-zynq/clocks.c
>  create mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
>  create mode 100644 arch/arm/mach-zynq/include/mach/slcr.h
>  create mode 100644 arch/arm/mach-zynq/reset.c
>  create mode 100644 drivers/serial/serial_zynq.c
> 
> -- 
> 1.8.1.2
> 
> 
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[PATCH 0/5] Zynq support for barebox

2013-03-02 Thread Josh Cartwright
In San Francisco a couple weeks ago (ELC2013), Thomas Petazzoni
informally mentioned barebox in passing, so I decided to toy with it a
bit...

This patchset adds basic support for the Zynq SoC to barebox.  So far,
it's only been tested as a 'secondary' bootloader (after u-boot).  Also
added is support for the zc702 development board.

The first two patches are simple typos I found getting acclimated to the
barebox source.

Josh Cartwright (5):
  trivial: doc: fix typos in mach-arm.dox
  defaultenv: fixed mismatched braces in bin/boot
  ARM: zynq: add driver for Zynq uarts
  ARM: zynq: add support for Zynq 7000 SoC
  ARM: zynq: add support for zc702 development board

 arch/arm/Kconfig   |   9 +
 arch/arm/Makefile  |   2 +
 arch/arm/boards/zynq-zc702/Makefile|   1 +
 arch/arm/boards/zynq-zc702/config.h|   0
 arch/arm/boards/zynq-zc702/devices.c   |  70 ++
 arch/arm/boards/zynq-zc702/lowlevel.c  |  28 +++
 arch/arm/mach-arm.dox  |   4 +-
 arch/arm/mach-zynq/Kconfig |  22 ++
 arch/arm/mach-zynq/Makefile|   1 +
 arch/arm/mach-zynq/clocks.c| 341 +
 arch/arm/mach-zynq/include/mach/clkdev.h   |   7 +
 arch/arm/mach-zynq/include/mach/debug_ll.h |  21 ++
 arch/arm/mach-zynq/include/mach/slcr.h |  26 +++
 arch/arm/mach-zynq/reset.c |  28 +++
 defaultenv/bin/boot|   2 +-
 drivers/serial/Kconfig |   6 +
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_zynq.c   | 144 
 18 files changed, 710 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/boards/zynq-zc702/Makefile
 create mode 100644 arch/arm/boards/zynq-zc702/config.h
 create mode 100644 arch/arm/boards/zynq-zc702/devices.c
 create mode 100644 arch/arm/boards/zynq-zc702/lowlevel.c
 create mode 100644 arch/arm/mach-zynq/Kconfig
 create mode 100644 arch/arm/mach-zynq/Makefile
 create mode 100644 arch/arm/mach-zynq/clocks.c
 create mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h
 create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-zynq/include/mach/slcr.h
 create mode 100644 arch/arm/mach-zynq/reset.c
 create mode 100644 drivers/serial/serial_zynq.c

-- 
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