Instead of using internal devicetree files, use the official ones from
/dts/src/arm.
Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
arch/arm/dts/socfpga.dtsi | 659 +
arch/arm/dts/socfpga_cyclone5.dtsi | 78
arch/arm/dts/socfpga_cyclone5_socdk.dts| 43 +-
arch/arm/dts/socfpga_cyclone5_sockit.dts | 45 +-
arch/arm/dts/socfpga_cyclone5_socrates.dts | 33 +-
5 files changed, 49 insertions(+), 809 deletions(-)
delete mode 100644 arch/arm/dts/socfpga_cyclone5.dtsi
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 14c0654b2ad0..d4d498be1301 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -1,595 +1,12 @@
-/*
- * Copyright (C) 2012 Altera www.altera.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see http://www.gnu.org/licenses/.
- */
-
-/include/ skeleton.dtsi
-
/ {
- #address-cells = 1;
- #size-cells = 1;
-
aliases {
- ethernet0 = gmac0;
- ethernet1 = gmac1;
- serial0 = uart0;
- serial1 = uart1;
- gpio0 = gpio0;
- gpio1 = gpio1;
- gpio2 = gpio2;
mmc0 = mmc;
};
- cpus {
- #address-cells = 1;
- #size-cells = 0;
-
- cpu@0 {
- compatible = arm,cortex-a9;
- device_type = cpu;
- reg = 0;
- next-level-cache = L2;
- };
- cpu@1 {
- compatible = arm,cortex-a9;
- device_type = cpu;
- reg = 1;
- next-level-cache = L2;
- };
- };
-
- intc: intc@fffed000 {
- compatible = arm,cortex-a9-gic;
- #interrupt-cells = 3;
- interrupt-controller;
- reg = 0xfffed000 0x1000,
- 0xfffec100 0x100;
- };
-
soc {
- #address-cells = 1;
- #size-cells = 1;
- compatible = simple-bus;
- device_type = soc;
- interrupt-parent = intc;
- ranges;
-
- amba {
- compatible = arm,amba-bus;
- #address-cells = 1;
- #size-cells = 1;
- ranges;
-
- pdma: pdma@ffe01000 {
- compatible = arm,pl330, arm,primecell;
- reg = 0xffe01000 0x1000;
- interrupts = 0 180 4;
- #dma-cells = 1;
- #dma-channels = 8;
- #dma-requests = 32;
- };
- };
-
- clkmgr@ffd04000 {
- compatible = altr,clk-mgr;
- reg = 0xffd04000 0x1000;
-
- clocks {
- #address-cells = 1;
- #size-cells = 0;
-
- osc: osc1 {
- #clock-cells = 0;
- compatible = fixed-clock;
- };
-
- f2s_periph_ref_clk: f2s_periph_ref_clk {
- #clock-cells = 0;
- compatible = fixed-clock;
- clock-frequency = 1000;
- };
-
- main_pll: main_pll {
- #address-cells = 1;
- #size-cells = 0;
- #clock-cells = 0;
- compatible =
altr,socfpga-pll-clock;
- clocks = osc;
- reg = 0x40;
-
- mpuclk: mpuclk {
- #clock-cells = 0;
-
