Re: [PATCH 2/9] ARM: Zynq: Add new architecture zynq

2013-03-12 Thread Josh Cartwright 
On Mon, Mar 11, 2013 at 10:14:59AM +0100, Steffen Trumtrar wrote:
 Add basic support for the Xilinx Zynq-7000 EPP architecture.
 The Zynq-7000 is an embedded processing platform that combines a Cortex A9
 dualcore MPSoC with an Artix-7 FPGA.
 
 Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
[..]
 diff --git a/arch/arm/mach-zynq/include/mach/barebox.lds.h 
 b/arch/arm/mach-zynq/include/mach/barebox.lds.h
 new file mode 100644
 index 000..674a4ac
 --- /dev/null
 +++ b/arch/arm/mach-zynq/include/mach/barebox.lds.h
 @@ -0,0 +1,9 @@
 +#define PRE_IMAGE \
 + .pre_image : {  \
 + KEEP(*(.flash_header_start*))   \
 + . = 0x20;   \
 + KEEP(*(.flash_header_0x0*)) \
 + . = 0xa0;   \
 + KEEP(*(.ps7reg_entry_0x0A0))\
 + . = 0x8c0;  \

 + }
[..]
 diff --git a/arch/arm/mach-zynq/include/mach/zynq-flash-header.h 
 b/arch/arm/mach-zynq/include/mach/zynq-flash-header.h
 new file mode 100644
 index 000..a0251cb
 --- /dev/null
 +++ b/arch/arm/mach-zynq/include/mach/zynq-flash-header.h
 @@ -0,0 +1,40 @@
 +#ifndef __MACH_FLASH_HEADER_H
 +#define __MACH_FLASH_HEADER_H
 +
 +#include asm-generic/sections.h
 +
 +#define __flash_header_start __section(.flash_header_start)
 +
 +#define __flash_header_section   __section(.flash_header_0x0)
 +#define __ps7reg_entry_section   __section(.ps7reg_entry_0x0A0)
 +#define __image_len_section  __section(.image_len_0x08c0)
 +#define FLASH_HEADER_OFFSET  0x0
 +#define IMAGE_OFFSET 0x8c0
 +
 +#define DEST_BASE0x8c0
 +#define FLASH_HEADER_BASE(DEST_BASE + FLASH_HEADER_OFFSET)
 +
 +struct zynq_reg_entry {
 + __le32 addr;
 + __le32 val;
 +};

Was there a particular reason you kept the ps7reg_entry in a separate
section?  Since the register initialization section of BOOT.BIN is of
fixed size, it may make more sense/be simpler if you just pull it into
the zynq_flash_header (see below):


 +
 +#define WIDTH_DETECTION_MAGIC0xAA995566
 +#define IMAGE_IDENTIFICATION 0x584C4E58  /* XLNX */
 +
 +struct zynq_flash_header {
 + uint32_t width_det;
 + uint32_t image_id;
 + uint32_t enc_stat;
 + uint32_t user;
 + uint32_t flash_offset;
 + uint32_t length;
 + uint32_t res0;
 + uint32_t start_of_exec;
 + uint32_t total_len;
 + uint32_t res1;
 + uint32_t checksum;
 + uint32_t res2;
 +};

These should probably also be of type __le32.

struct zynq_flash_header {
__le32 width_det;
__le32 image_id;
__le32 enc_stat;
__le32 user;
__le32 flash_offset;
__le32 length;
__le32 res0;
__le32 start_of_exec;
__le32 total_len;
__le32 res1;
__le32 checksum;
__le32 res2[0x15];
struct {
        __le32 addr;
        __le32 val;
} reg_init[0x100];
__le32 res3[0x8];
};

Also, the REG() macro you've introduced in the board file seems
like it should go in this file instead.

#define REG(a,v){ .addr = cpu_to_le32(a), .val = cpu_to_le32(v) }
#define END_REG REG(0x, 0)

 +
 +#endif /* __MACH_FLASH_HEADER_H */
[..]

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[PATCH 2/9] ARM: Zynq: Add new architecture zynq

2013-03-11 Thread Steffen Trumtrar 
Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.

Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   2 +
 arch/arm/mach-zynq/Kconfig |  31 +
 arch/arm/mach-zynq/Makefile|   1 +
 arch/arm/mach-zynq/clocksource.c   |  58 +
 arch/arm/mach-zynq/devices.c   |  14 +++
 arch/arm/mach-zynq/include/mach/barebox.lds.h  |   9 ++
 arch/arm/mach-zynq/include/mach/debug_ll.h |  34 ++
 arch/arm/mach-zynq/include/mach/devices.h  |  13 ++
 .../arm/mach-zynq/include/mach/zynq-flash-header.h |  40 +++
 arch/arm/mach-zynq/include/mach/zynq7000-regs.h| 132 +
 arch/arm/mach-zynq/zynq.c  |  41 +++
 include/asm-generic/barebox.lds.h  |   3 +-
 13 files changed, 382 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-zynq/Kconfig
 create mode 100644 arch/arm/mach-zynq/Makefile
 create mode 100644 arch/arm/mach-zynq/clocksource.c
 create mode 100644 arch/arm/mach-zynq/devices.c
 create mode 100644 arch/arm/mach-zynq/include/mach/barebox.lds.h
 create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-zynq/include/mach/devices.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq-flash-header.h
 create mode 100644 arch/arm/mach-zynq/include/mach/zynq7000-regs.h
 create mode 100644 arch/arm/mach-zynq/zynq.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 28332ec..8431fa8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -110,6 +110,10 @@ config ARCH_TEGRA
select CPU_ARM926T
select HAS_DEBUG_LL
 
+config ARCH_ZYNQ
+   bool Xilinx Zynq-based boards
+   select HAS_DEBUG_LL
+
 endchoice
 
 source arch/arm/cpu/Kconfig
@@ -126,6 +130,7 @@ source arch/arm/mach-pxa/Kconfig
 source arch/arm/mach-samsung/Kconfig
 source arch/arm/mach-versatile/Kconfig
 source arch/arm/mach-tegra/Kconfig
+source arch/arm/mach-zynq/Kconfig
 
 config ARM_ASM_UNIFIED
bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index fcb2969..ceb45dc 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -64,6 +64,7 @@ machine-$(CONFIG_ARCH_PXA):= pxa
 machine-$(CONFIG_ARCH_SAMSUNG) := samsung
 machine-$(CONFIG_ARCH_VERSATILE)   := versatile
 machine-$(CONFIG_ARCH_TEGRA)   := tegra
+machine-$(CONFIG_ARCH_ZYNQ):= zynq
 
 # Board directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
@@ -157,6 +158,7 @@ board-$(CONFIG_MACH_SABRELITE)  := 
freescale-mx6-sabrelite
 board-$(CONFIG_MACH_TX53)  := karo-tx53
 board-$(CONFIG_MACH_GUF_VINCELL)   := guf-vincell
 board-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK):= efika-mx-smartbook
+board-$(CONFIG_MACH_ZEDBOARD)  := avnet-zedboard
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
new file mode 100644
index 000..8eb67d2
--- /dev/null
+++ b/arch/arm/mach-zynq/Kconfig
@@ -0,0 +1,31 @@
+if ARCH_ZYNQ
+
+config ARCH_TEXT_BASE
+   hex
+   default 0x1ff0 if MACH_ZEDBOARD
+
+config BOARDINFO
+   default ZedBoard if MACH_ZEDBOARD
+
+choice
+   prompt Xilinx Zynq type board
+
+config ARCH_ZYNQ7000
+   bool Zynq-7000
+   select CPU_V7
+   select DRIVER_SERIAL_CADENCE
+
+endchoice
+
+if ARCH_ZYNQ7000
+
+choice
+   prompt Zynq-7000 Board Type
+
+config MACH_ZEDBOARD
+   bool Avnet Zynq-7000 ZedBoard
+
+endchoice
+endif
+
+endif
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
new file mode 100644
index 000..5d632b8
--- /dev/null
+++ b/arch/arm/mach-zynq/Makefile
@@ -0,0 +1 @@
+obj-y += zynq.o devices.o clocksource.o
diff --git a/arch/arm/mach-zynq/clocksource.c b/arch/arm/mach-zynq/clocksource.c
new file mode 100644
index 000..300a73e
--- /dev/null
+++ b/arch/arm/mach-zynq/clocksource.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2012 Steffen Trumtrar s.trumt...@pengutronix.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include clock.h
+#include common.h
+#include init.h
+#include io.h
+#include mach/zynq7000-regs.h
+
+#define

Re: [PATCH 2/9] ARM: Zynq: Add new architecture zynq

2013-03-11 Thread Sascha Hauer 
On Mon, Mar 11, 2013 at 10:14:59AM +0100, Steffen Trumtrar wrote:
 Add basic support for the Xilinx Zynq-7000 EPP architecture.
 The Zynq-7000 is an embedded processing platform that combines a Cortex A9
 dualcore MPSoC with an Artix-7 FPGA.
 
 +
 +static void __iomem *timer_base = (void *) CORTEXA9_SCU_TIMER_BASE_ADDR;
 +
 +static uint64_t zynq_clocksource_read(void)
 +{
 + return readl(timer_base + PRIVATE_TIMER_COUNTER);
 +}
 +
 +static struct clocksource cs = {
 + .read   = zynq_clocksource_read,
 + .mask   = CLOCKSOURCE_MASK(16),
 + .shift  = TIMER_PRESCALER_SHIFT,
 +};
 +
 +static int zynq_timer_init(void)
 +{
 + cs.mult = clocksource_hz2mult(3330, cs.shift);

You should add clock support. Adding a first-shot clock support is
really simple:

struct clk = clk_fixed(timer, 3330);
clkdev_add_physbase(clk, CORTEXA9_SCU_TIMER_BASE_ADDR, NULL);


 +
 + /* set timer load register */
 + writel(0x, timer_base);
 +
 + writel(TIMER_CTRL_TIMER_EN | TIMER_CTRL_AUTO_RELOAD |
 + (TIMER_PRESCALER  cs.shift),
 + timer_base + PRIVATE_TIMER_CONTROL);
 +
 + init_clock(cs);
 +
 + return 0;
 +}
 +coredevice_initcall(zynq_timer_init);

Please make this a real driver.

 diff --git a/arch/arm/mach-zynq/devices.c b/arch/arm/mach-zynq/devices.c
 new file mode 100644
 index 000..2bb3c92
 --- /dev/null
 +++ b/arch/arm/mach-zynq/devices.c
 @@ -0,0 +1,14 @@
 +#include common.h
 +#include driver.h
 +#include mach/devices.h
 +
 +static inline struct device_d *zynq_add_device(char *name, int id, void 
 *base, int size, void *pdata)
 +{
 + return add_generic_device(name, id, NULL, (resource_size_t)base, size,
 +   IORESOURCE_MEM, pdata);
 +}
 +
 +struct device_d *zynq_add_uart(void *base, int id)
 +{
 + return zynq_add_device(cadence-uart, id, base, 0x1000, NULL);
 +}
 diff --git a/arch/arm/mach-zynq/include/mach/barebox.lds.h 
 b/arch/arm/mach-zynq/include/mach/barebox.lds.h
 new file mode 100644
 index 000..674a4ac
 --- /dev/null
 +++ b/arch/arm/mach-zynq/include/mach/barebox.lds.h
 @@ -0,0 +1,9 @@
 +#define PRE_IMAGE \
 + .pre_image : {  \
 + KEEP(*(.flash_header_start*))   \
 + . = 0x20;   \
 + KEEP(*(.flash_header_0x0*)) \
 + . = 0xa0;   \
 + KEEP(*(.ps7reg_entry_0x0A0))\
 + . = 0x8c0;  \
 + }
 diff --git a/arch/arm/mach-zynq/include/mach/debug_ll.h 
 b/arch/arm/mach-zynq/include/mach/debug_ll.h
 new file mode 100644
 index 000..4fbb387
 --- /dev/null
 +++ b/arch/arm/mach-zynq/include/mach/debug_ll.h
 @@ -0,0 +1,34 @@
 +/*
 + * based on mach-imx/include/mach/debug_ll.h
 + */
 +
 +#ifndef __MACH_DEBUG_LL_H__
 +#define __MACH_DEBUG_LL_H__
 +
 +#include io.h
 +#include mach/zynq7000-regs.h
 +
 +#ifndef ZYNQ_DEBUG_LL_UART_BASE
 +#warning define ZYNQ_DEBUG_LL_UART_BASE properly for debug_ll
 +#define ZYNQ_DEBUG_LL_UART_BASE ZYNQ_UART1_BASE_ADDR
 +#endif
 +
 +#define ZYNQ_UART_RXTXFIFO   0x30
 +#define ZYNQ_UART_CHANNEL_STS0x2C
 +
 +#define ZYNQ_UART_STS_TFUL   (1  4)
 +
 +static inline void PUTC_LL(int c)
 +{
 + void __iomem *base = (void *)ZYNQ_DEBUG_LL_UART_BASE;
 +
 + if (!base)
 + return;

This will never happen, right?

What makes sense though is to add a check whether this UART is enabled.
We do not have initialization code here, so if the UART is not enabled,
you will likely loop forever below. It can be annoying that the only
reason barebox doesn't work is the code you added for debugging.

 +
 + while ((readl(base + ZYNQ_UART_CHANNEL_STS)  ZYNQ_UART_STS_TFUL) != 0)
 + ;
 +
 + writel(c, base + ZYNQ_UART_RXTXFIFO);
 +}
 +
 +#endif
 diff --git a/arch/arm/mach-zynq/include/mach/zynq7000-regs.h 
 b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h
 new file mode 100644
 index 000..58fc712
 --- /dev/null
 +++ b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h
 @@ -0,0 +1,132 @@
 +/*
 + * (c) 2012 Steffen Trumtrar s.trumt...@pengutronix.de
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License as published by
 + * the Free Software Foundation; either version 2 of the License, or
 + * (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + */
 +
 +#define ZYNQ_UART0_BASE_ADDR 0xE000
 +#define ZYNQ_UART1_BASE_ADDR 0xE0001000
 +#define ZYNQ_I2C0_BASE_ADDR  0xE0004000
 +#define ZYNQ_I2C1_BASE_ADDR  0xE0005000
 +#define ZYNQ_SPI0_BASE_ADDR  0xE0006000

Re: [PATCH 2/9] ARM: Zynq: Add new architecture zynq

2013-03-11 Thread Josh Cartwright 
On Mon, Mar 11, 2013 at 10:14:59AM +0100, Steffen Trumtrar wrote:
 Add basic support for the Xilinx Zynq-7000 EPP architecture.
 The Zynq-7000 is an embedded processing platform that combines a Cortex A9
 dualcore MPSoC with an Artix-7 FPGA.
 
 Signed-off-by: Steffen Trumtrar s.trumt...@pengutronix.de
 ---
  arch/arm/Kconfig   |   5 +
  arch/arm/Makefile  |   2 +
  arch/arm/mach-zynq/Kconfig |  31 +
  arch/arm/mach-zynq/Makefile|   1 +
  arch/arm/mach-zynq/clocksource.c   |  58 +
  arch/arm/mach-zynq/devices.c   |  14 +++
  arch/arm/mach-zynq/include/mach/barebox.lds.h  |   9 ++
  arch/arm/mach-zynq/include/mach/debug_ll.h |  34 ++
  arch/arm/mach-zynq/include/mach/devices.h  |  13 ++
  .../arm/mach-zynq/include/mach/zynq-flash-header.h |  40 +++
  arch/arm/mach-zynq/include/mach/zynq7000-regs.h| 132 
 +
  arch/arm/mach-zynq/zynq.c  |  41 +++
  include/asm-generic/barebox.lds.h  |   3 +-
  13 files changed, 382 insertions(+), 1 deletion(-)
  create mode 100644 arch/arm/mach-zynq/Kconfig
  create mode 100644 arch/arm/mach-zynq/Makefile
  create mode 100644 arch/arm/mach-zynq/clocksource.c
  create mode 100644 arch/arm/mach-zynq/devices.c
  create mode 100644 arch/arm/mach-zynq/include/mach/barebox.lds.h
  create mode 100644 arch/arm/mach-zynq/include/mach/debug_ll.h
  create mode 100644 arch/arm/mach-zynq/include/mach/devices.h
  create mode 100644 arch/arm/mach-zynq/include/mach/zynq-flash-header.h
  create mode 100644 arch/arm/mach-zynq/include/mach/zynq7000-regs.h
  create mode 100644 arch/arm/mach-zynq/zynq.c
 
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index 28332ec..8431fa8 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -110,6 +110,10 @@ config ARCH_TEGRA
   select CPU_ARM926T
   select HAS_DEBUG_LL
  
 +config ARCH_ZYNQ
 + bool Xilinx Zynq-based boards
 + select HAS_DEBUG_LL
 +
  endchoice
  
  source arch/arm/cpu/Kconfig
 @@ -126,6 +130,7 @@ source arch/arm/mach-pxa/Kconfig
  source arch/arm/mach-samsung/Kconfig
  source arch/arm/mach-versatile/Kconfig
  source arch/arm/mach-tegra/Kconfig
 +source arch/arm/mach-zynq/Kconfig
  
  config ARM_ASM_UNIFIED
   bool
 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
 index fcb2969..ceb45dc 100644
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
 @@ -64,6 +64,7 @@ machine-$(CONFIG_ARCH_PXA)  := pxa
  machine-$(CONFIG_ARCH_SAMSUNG)   := samsung
  machine-$(CONFIG_ARCH_VERSATILE) := versatile
  machine-$(CONFIG_ARCH_TEGRA) := tegra
 +machine-$(CONFIG_ARCH_ZYNQ)  := zynq
  
  # Board directory name.  This list is sorted alphanumerically
  # by CONFIG_* macro name.
 @@ -157,6 +158,7 @@ board-$(CONFIG_MACH_SABRELITE):= 
 freescale-mx6-sabrelite
  board-$(CONFIG_MACH_TX53):= karo-tx53
  board-$(CONFIG_MACH_GUF_VINCELL) := guf-vincell
  board-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK)  := efika-mx-smartbook
 +board-$(CONFIG_MACH_ZEDBOARD):= avnet-zedboard
  
  machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
  
 diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
 new file mode 100644
 index 000..8eb67d2
 --- /dev/null
 +++ b/arch/arm/mach-zynq/Kconfig
 @@ -0,0 +1,31 @@
 +if ARCH_ZYNQ
 +
 +config ARCH_TEXT_BASE
 + hex
 + default 0x1ff0 if MACH_ZEDBOARD
 +
 +config BOARDINFO
 + default ZedBoard if MACH_ZEDBOARD
 +
 +choice
 + prompt Xilinx Zynq type board
 +
 +config ARCH_ZYNQ7000
 + bool Zynq-7000
 + select CPU_V7
 + select DRIVER_SERIAL_CADENCE
 +
 +endchoice
 +
 +if ARCH_ZYNQ7000
 +
 +choice
 + prompt Zynq-7000 Board Type
 +
 +config MACH_ZEDBOARD
 + bool Avnet Zynq-7000 ZedBoard
 +
 +endchoice
 +endif
 +
 +endif
 diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
 new file mode 100644
 index 000..5d632b8
 --- /dev/null
 +++ b/arch/arm/mach-zynq/Makefile
 @@ -0,0 +1 @@
 +obj-y += zynq.o devices.o clocksource.o
 diff --git a/arch/arm/mach-zynq/clocksource.c 
 b/arch/arm/mach-zynq/clocksource.c
 new file mode 100644
 index 000..300a73e
 --- /dev/null
 +++ b/arch/arm/mach-zynq/clocksource.c
 @@ -0,0 +1,58 @@
 +/*
 + * (C) Copyright 2012 Steffen Trumtrar s.trumt...@pengutronix.de
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General