Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
On Wed, 2018-05-02 at 10:46 -0700, Andrey Smirnov wrote: > On Wed, May 2, 2018 at 7:42 AM, Jan Lübbewrote: > > There is already code in drivers/watchdog/imxwd.c to handle this. > > Is that obsolete now? > > AFAIK, watchdog IP block doesn't have as precise information about > reset source as SRSR register on i.MX SoCs that have the latter. > There, this code supersedes imxwd.c. OTHO SoCs that don't have SRSR > (i.MX21, i.MX31, etc) still rely on code imxwd.c for reset source > detection. > > Hope this answers your question. Yes, thanks. I didn't realize that these were different registers. Regards, Jan -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
On Wed, May 2, 2018 at 7:42 AM, Jan Lübbewrote: > There is already code in drivers/watchdog/imxwd.c to handle this. Is > that obsolete now? > AFAIK, watchdog IP block doesn't have as precise information about reset source as SRSR register on i.MX SoCs that have the latter. There, this code supersedes imxwd.c. OTHO SoCs that don't have SRSR (i.MX21, i.MX31, etc) still rely on code imxwd.c for reset source detection. Hope this answers your question. Thanks, Andrey Smirnov > On Fri, 2018-04-20 at 18:05 -0700, Andrey Smirnov wrote: >> Signed-off-by: Andrey Smirnov >> --- >> arch/arm/mach-imx/imx6.c | 13 - >> arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++ >> 2 files changed, 14 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c >> index 88165adee..49610bf08 100644 >> --- a/arch/arm/mach-imx/imx6.c >> +++ b/arch/arm/mach-imx/imx6.c >> @@ -19,6 +19,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -173,10 +174,20 @@ int imx6_cpu_revision(void) >> return soc_revision; >> } >> >> +static const struct imx_reset_reason imx6_reset_reasons[] = { >> + { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 }, >> + { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 }, >> + { IMX_SRC_SRSR_JTAG_RESET,RESET_JTAG, 0 }, >> + { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 }, >> + { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 }, >> + { /* sentinel */ } >> +}; >> + >> int imx6_init(void) >> { >> const char *cputypestr; >> u32 mx6_silicon_revision; >> + void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR); >> >> imx6_init_lowlevel(); >> >> @@ -221,7 +232,7 @@ int imx6_init(void) >> } >> >> imx_set_silicon_revision(cputypestr, mx6_silicon_revision); >> - >> + imx_set_reset_reason(src + IMX6_SRC_SRSR, >> imx6_reset_reasons); >> imx6_setup_ipu_qos(); >> imx6ul_enet_clk_init(); >> >> diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h >> b/arch/arm/mach-imx/include/mach/reset-reason.h >> index 39afc4b28..f2544a303 100644 >> --- a/arch/arm/mach-imx/include/mach/reset-reason.h >> +++ b/arch/arm/mach-imx/include/mach/reset-reason.h >> @@ -14,6 +14,8 @@ >> #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9) >> #define IMX_SRC_SRSR_WARM_BOOT BIT(16) >> >> +#define IMX6_SRC_SRSR0x008 >> + >> struct imx_reset_reason { >> uint32_t mask; >> enum reset_src_type type; > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
There is already code in drivers/watchdog/imxwd.c to handle this. Is that obsolete now? On Fri, 2018-04-20 at 18:05 -0700, Andrey Smirnov wrote: > Signed-off-by: Andrey Smirnov> --- > arch/arm/mach-imx/imx6.c | 13 - > arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++ > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c > index 88165adee..49610bf08 100644 > --- a/arch/arm/mach-imx/imx6.c > +++ b/arch/arm/mach-imx/imx6.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -173,10 +174,20 @@ int imx6_cpu_revision(void) > return soc_revision; > } > > +static const struct imx_reset_reason imx6_reset_reasons[] = { > + { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 }, > + { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 }, > + { IMX_SRC_SRSR_JTAG_RESET,RESET_JTAG, 0 }, > + { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 }, > + { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 }, > + { /* sentinel */ } > +}; > + > int imx6_init(void) > { > const char *cputypestr; > u32 mx6_silicon_revision; > + void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR); > > imx6_init_lowlevel(); > > @@ -221,7 +232,7 @@ int imx6_init(void) > } > > imx_set_silicon_revision(cputypestr, mx6_silicon_revision); > - > + imx_set_reset_reason(src + IMX6_SRC_SRSR, > imx6_reset_reasons); > imx6_setup_ipu_qos(); > imx6ul_enet_clk_init(); > > diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h > b/arch/arm/mach-imx/include/mach/reset-reason.h > index 39afc4b28..f2544a303 100644 > --- a/arch/arm/mach-imx/include/mach/reset-reason.h > +++ b/arch/arm/mach-imx/include/mach/reset-reason.h > @@ -14,6 +14,8 @@ > #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9) > #define IMX_SRC_SRSR_WARM_BOOT BIT(16) > > +#define IMX6_SRC_SRSR0x008 > + > struct imx_reset_reason { > uint32_t mask; > enum reset_src_type type; -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
Signed-off-by: Andrey Smirnov--- arch/arm/mach-imx/imx6.c | 13 - arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 88165adee..49610bf08 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -173,10 +174,20 @@ int imx6_cpu_revision(void) return soc_revision; } +static const struct imx_reset_reason imx6_reset_reasons[] = { + { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 }, + { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 }, + { IMX_SRC_SRSR_JTAG_RESET,RESET_JTAG, 0 }, + { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 }, + { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 }, + { /* sentinel */ } +}; + int imx6_init(void) { const char *cputypestr; u32 mx6_silicon_revision; + void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR); imx6_init_lowlevel(); @@ -221,7 +232,7 @@ int imx6_init(void) } imx_set_silicon_revision(cputypestr, mx6_silicon_revision); - + imx_set_reset_reason(src + IMX6_SRC_SRSR, imx6_reset_reasons); imx6_setup_ipu_qos(); imx6ul_enet_clk_init(); diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h index 39afc4b28..f2544a303 100644 --- a/arch/arm/mach-imx/include/mach/reset-reason.h +++ b/arch/arm/mach-imx/include/mach/reset-reason.h @@ -14,6 +14,8 @@ #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9) #define IMX_SRC_SRSR_WARM_BOOT BIT(16) +#define IMX6_SRC_SRSR 0x008 + struct imx_reset_reason { uint32_t mask; enum reset_src_type type; -- 2.14.3 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox