Re: [PATCH v3 14/15] ARM: at91: microchip-ksz9477: provide board code fallback
Hello Sam,
On 2/4/19 20:01, Sam Ravnborg wrote:
> Hi Ahmad.
>
> On Mon, Apr 01, 2019 at 12:18:22PM +0200, Ahmad Fatoum wrote:
>> The newly added device tree based first stage fails to load the second
>> stage from MMC, which might be in relation to a preceding atmel_mci
>> "command/data timeout" message.
>
> I had similar troubles with MMC on at91sam9263.
> After some digging the fix was simple:
> See 5feabc1e6737742f1cf6a1c41921f68b4dbb5c10 ("arm: at91: fix clock to mci1
> for at91sam9263")
Might be clock related. But if I need to fit drivers into the PBL
as well, device tree in first-stage won't be viable anyway,
so I probably won't look further into this.
>
> Maybe you are hit by something as simple as this?
>
>> +
>> +static const struct devfs_partition sama5d3_xplained_nand0_partitions[] = {
>> +{
>> +.offset = 0x0,
>> +.size = SZ_256K,
>> +.flags = DEVFS_PARTITION_FIXED,
>> +.name = "at91bootstrap_raw",
>> +.bbname = "at91bootstrap",
>> +},
> Strange partition name now we use barebox as first stage.
Indeed.
>
>
>> +++ b/arch/arm/configs/microchip_ksz9477_evb_bootstrap_mmc_defconfig
>
> Naming confuses me.
> Do we stick to the name "first stage" or do we use "bootstrap"?
> For me they are the same, but I get confused when we use both.
For the at91sam9261ek the bootstrap defconfig is the one defining
AT91_BOOTSTRAP, so I figured I should follow suit..
>
>
> Sam
>
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Re: [PATCH v3 14/15] ARM: at91: microchip-ksz9477: provide board code fallback
On Mon, Apr 01, 2019 at 12:18:22PM +0200, Ahmad Fatoum wrote: > The newly added device tree based first stage fails to load the second > stage from MMC, which might be in relation to a preceding atmel_mci > "command/data timeout" message. > > Due to this and because it's not clear yet how viable it's to use the device > tree for the size-constrained first stage anyway, make CONFIG_OFDEVICE > configurable and provide a legacy board code based fallback whenever it's > unselected. The resulting image is 48K big with PBL_CONSOLE compared to > 72K for the device tree based version without PBL_CONSOLE. So where is the size limit for this SoC? > > If barebox can be shrunk further and the device tree support in the > first stage was fixed, this commit could be reverted for full device > tree goodness. > > The board code is a stripped down version of the sama5d3_xplained board's. > > Signed-off-by: Ahmad Fatoum > --- > .../arm/boards/microchip-ksz9477-evb/Makefile | 3 + > arch/arm/boards/microchip-ksz9477-evb/board.c | 127 ++ > .../boards/microchip-ksz9477-evb/lowlevel.c | 3 +- > ...rochip_ksz9477_evb_bootstrap_mmc_defconfig | 24 > arch/arm/mach-at91/Kconfig| 14 +- > 5 files changed, 167 insertions(+), 4 deletions(-) > create mode 100644 arch/arm/boards/microchip-ksz9477-evb/board.c > create mode 100644 > arch/arm/configs/microchip_ksz9477_evb_bootstrap_mmc_defconfig I'd like to keep the number of defconfigs small, I'm not keen on adding such a specialized defconfig. Do we need a full barebox as first stage anyway? I made good experience on i.MX with adding specialized lowlevel drivers for MMC and NAND. > + .ocms = 0, > + .trr= 4, > + .twb= 5, > + .rbnsel = 3, > + .nfsel = 1 > +}; > + > +static void ek_add_device_nand(void) ek_? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v3 14/15] ARM: at91: microchip-ksz9477: provide board code fallback
Hi Ahmad.
On Mon, Apr 01, 2019 at 12:18:22PM +0200, Ahmad Fatoum wrote:
> The newly added device tree based first stage fails to load the second
> stage from MMC, which might be in relation to a preceding atmel_mci
> "command/data timeout" message.
I had similar troubles with MMC on at91sam9263.
After some digging the fix was simple:
See 5feabc1e6737742f1cf6a1c41921f68b4dbb5c10 ("arm: at91: fix clock to mci1 for
at91sam9263")
Maybe you are hit by something as simple as this?
> +
> +static const struct devfs_partition sama5d3_xplained_nand0_partitions[] = {
> + {
> + .offset = 0x0,
> + .size = SZ_256K,
> + .flags = DEVFS_PARTITION_FIXED,
> + .name = "at91bootstrap_raw",
> + .bbname = "at91bootstrap",
> + },
Strange partition name now we use barebox as first stage.
> +++ b/arch/arm/configs/microchip_ksz9477_evb_bootstrap_mmc_defconfig
Naming confuses me.
Do we stick to the name "first stage" or do we use "bootstrap"?
For me they are the same, but I get confused when we use both.
Sam
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[PATCH v3 14/15] ARM: at91: microchip-ksz9477: provide board code fallback
The newly added device tree based first stage fails to load the second
stage from MMC, which might be in relation to a preceding atmel_mci
"command/data timeout" message.
Due to this and because it's not clear yet how viable it's to use the device
tree for the size-constrained first stage anyway, make CONFIG_OFDEVICE
configurable and provide a legacy board code based fallback whenever it's
unselected. The resulting image is 48K big with PBL_CONSOLE compared to
72K for the device tree based version without PBL_CONSOLE.
If barebox can be shrunk further and the device tree support in the
first stage was fixed, this commit could be reverted for full device
tree goodness.
The board code is a stripped down version of the sama5d3_xplained board's.
Signed-off-by: Ahmad Fatoum
---
.../arm/boards/microchip-ksz9477-evb/Makefile | 3 +
arch/arm/boards/microchip-ksz9477-evb/board.c | 127 ++
.../boards/microchip-ksz9477-evb/lowlevel.c | 3 +-
...rochip_ksz9477_evb_bootstrap_mmc_defconfig | 24
arch/arm/mach-at91/Kconfig| 14 +-
5 files changed, 167 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/boards/microchip-ksz9477-evb/board.c
create mode 100644
arch/arm/configs/microchip_ksz9477_evb_bootstrap_mmc_defconfig
diff --git a/arch/arm/boards/microchip-ksz9477-evb/Makefile
b/arch/arm/boards/microchip-ksz9477-evb/Makefile
index b08c4a93ca27..8d0379a3f59f 100644
--- a/arch/arm/boards/microchip-ksz9477-evb/Makefile
+++ b/arch/arm/boards/microchip-ksz9477-evb/Makefile
@@ -1 +1,4 @@
lwl-y += lowlevel.o
+ifeq ($(CONFIG_MACH_MICROCHIP_KSZ9477_EVB_DT),)
+obj-y += board.o
+endif
diff --git a/arch/arm/boards/microchip-ksz9477-evb/board.c
b/arch/arm/boards/microchip-ksz9477-evb/board.c
new file mode 100644
index ..455b9aca3ab0
--- /dev/null
+++ b/arch/arm/boards/microchip-ksz9477-evb/board.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2014 Bo Shen
+ */
+
+#include
+#include
+#include
+
+#if defined(CONFIG_NAND_ATMEL)
+static struct atmel_nand_data nand_pdata = {
+ .ale= 21,
+ .cle= 22,
+ .det_pin= -EINVAL,
+ .rdy_pin= -EINVAL,
+ .enable_pin = -EINVAL,
+ .ecc_mode = NAND_ECC_HW,
+ .has_pmecc = 1,
+ .pmecc_sector_size = 512,
+ .pmecc_corr_cap = 4,
+ .bus_width_16 = 1,
+ .on_flash_bbt = 1,
+};
+
+static struct sam9_smc_config sama5d3_xplained_nand_smc_config = {
+ .ncs_read_setup = 1,
+ .nrd_setup = 2,
+ .ncs_write_setup= 1,
+ .nwe_setup = 2,
+
+ .ncs_read_pulse = 5,
+ .nrd_pulse = 3,
+ .ncs_write_pulse= 5,
+ .nwe_pulse = 3,
+
+ .read_cycle = 8,
+ .write_cycle= 8,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE,
+ .tdf_cycles = 3,
+
+ .tclr = 3,
+ .tadl = 10,
+ .tar= 3,
+ .ocms = 0,
+ .trr= 4,
+ .twb= 5,
+ .rbnsel = 3,
+ .nfsel = 1
+};
+
+static void ek_add_device_nand(void)
+{
+ struct clk *clk = clk_get(NULL, "smc_clk");
+
+ clk_enable(clk);
+
+ /* setup bus-width (8 or 16) */
+ if (nand_pdata.bus_width_16)
+ sama5d3_xplained_nand_smc_config.mode |= AT91_SMC_DBW_16;
+ else
+ sama5d3_xplained_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+ /* configure chip-select 3 (NAND) */
+ sama5_smc_configure(0, 3, &sama5d3_xplained_nand_smc_config);
+
+ at91_add_device_nand(&nand_pdata);
+}
+#else
+static void ek_add_device_nand(void) {}
+#endif
+
+#if defined(CONFIG_MCI_ATMEL)
+/*
+ * MCI (SD/MMC)
+ */
+static struct atmel_mci_platform_data mci0_data = {
+ .bus_width = 8,
+ .detect_pin = AT91_PIN_PE0,
+ .wp_pin = -EINVAL,
+};
+
+static void ek_add_device_mci(void)
+{
+ /* MMC0 */
+ at91_add_device_mci(0, &mci0_data);
+}
+#else
+static void ek_add_device_mci(void) {}
+#endif
+
+static int sama5d3_xplained_mem_init(void)
+{
+ at91_add_device_sdram(0);
+
+ return 0;
+}
+mem_initcall(sama5d3_xplained_mem_init);
+
+static const struct devfs_partition sama5d3_xplained_nand0_partitions[] = {
+ {
+ .offset = 0x0,
+ .size = SZ_256K,
+ .flags = DEVFS_PARTITION_FIXED,
+ .name = "at91bootstrap_raw",
+ .bbname = "at91bootstrap",
+ }, {
+ .offset = DEVFS_PARTITION_APPEND, /* 256 KiB */
+ .size = SZ_1M,
+ .flags = DEVFS_PARTITION_FIXED,
+ .name = "self_raw",
+ .bbname = "self0",
+ }, {
+
