Hello Sam,
On 2/4/19 19:49, Sam Ravnborg wrote:
> Hi Ahmad.
>
> On Mon, Apr 01, 2019 at 12:18:18PM +0200, Ahmad Fatoum wrote:
>> Incoming microchip-ksz9477-evb first stage will add one more entry point
>> for the first stage. As there is a little reason to use the same piggy
>> data for both images (BOOT.BIN, the first stage, is limited to 64K), have
>> CONFIG_AT91_LOAD_BAREBOX_SRAM decide which stage should be built.
>>
>> Signed-off-by: Ahmad Fatoum
>> ---
>> arch/arm/mach-at91/Kconfig | 2 +-
>> images/Makefile.at91 | 12 +---
>> 2 files changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
>> index 8e1bf0629ab7..60f427d7d483 100644
>> --- a/arch/arm/mach-at91/Kconfig
>> +++ b/arch/arm/mach-at91/Kconfig
>> @@ -615,7 +615,7 @@ config AT91_BOOTSTRAP
>> select BOOTSTRAP
>>
>> config AT91_LOAD_BAREBOX_SRAM
>> -bool "at91 load barebox in sram"
>> +bool "at91 barebox image will be loaded into SRAM"
>> depends on SHELL_NONE || HAVE_AT91_LOAD_BAREBOX_SRAM
>> default y if SHELL_NONE
>>
>> diff --git a/images/Makefile.at91 b/images/Makefile.at91
>> index acdb591d2452..3f1dd57f6c58 100644
>> --- a/images/Makefile.at91
>> +++ b/images/Makefile.at91
>> @@ -4,12 +4,18 @@
>>
>> pblb-$(CONFIG_MACH_AT91SAM9X5EK) += start_at91sam9x5ek
>> FILE_barebox-at91sam9x5ek.img = start_at91sam9x5ek.pblb
>> -image-$(CONFIG_MACH_AT91SAM9X5EK) += barebox-at91sam9x5ek.img
>> +at91-barebox-$(CONFIG_MACH_AT91SAM9X5EK) += barebox-at91sam9x5ek.img
>>
>> pblb-$(CONFIG_MACH_AT91SAM9263EK) += start_at91sam9263ek
>> FILE_barebox-at91sam9263ek.img = start_at91sam9263ek.pblb
>> -image-$(CONFIG_MACH_AT91SAM9263EK) += barebox-at91sam9263ek.img
>> +at91-barebox-$(CONFIG_MACH_AT91SAM9263EK) += barebox-at91sam9263ek.img
>>
>> pblb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += start_sama5d3_xplained_ung8071
>> FILE_barebox-microchip-ksz9477-evb.img = start_sama5d3_xplained_ung8071.pblb
>> -image-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) +=
>> barebox-microchip-ksz9477-evb.img
>> +at91-barebox-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) +=
>> barebox-microchip-ksz9477-evb.img
>> +
>> +ifdef CONFIG_AT91_LOAD_BAREBOX_SRAM
>> +image-y += $(at91-boot-bin-y)
>> +else
>> +image-y += $(at91-barebox-y)
>> +endif
>
> I cannot follow what you do in the line "image-y += $(at91-boot-bin-y)".
> Could you try to elaborate.
I got the idea from images/Makefile.omap3, there multi-images are split
into two, separated by a Kconfig option, so you can either select building
all first stage multi-image bareboxes or build all second stages. This allows
separate entry points for each and enables use of ed04a7c3c ("pbl multiimage:
Allow to check image sizes") Sascha added.
To differentiate between first and second stage I used the
CONFIG_AT91_LOAD_BAREBOX_SRAM macro. Looking at it again, at91sam9x5ek and
at91sam9263ek should've had their entry points split as well for uniformity.
I talked about this with Sascha and his opinion is that we shouldn't have
stages at all. Everything needed for low level bootstrap (SDRAM init and
MMC access) should be made to fit into the PBL instead.
That way we can rename the PBL to BOOT.BIN and use the full barebox as
second stage. This means I'll need to strip down the drivers in v4..
Cheers
Ahmad
>
> Sam
>
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