Re: [PATCH] ARM: Rockchip: Update DTS for BPI-R2Pro for new HW-Rev
On Mon, Apr 11, 2022 at 01:44:47PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich
>
> New Hardware revision swapped the gmacs (wan is now gmac1).
> Previous Revision (v00) was not in public sale so devicetree
> can be savely changed.
>
> Signed-off-by: Frank Wunderlich
> ---
> arch/arm/dts/rk3568-bpi-r2-pro.dts | 28 ++--
> 1 file changed, 14 insertions(+), 14 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts
> b/arch/arm/dts/rk3568-bpi-r2-pro.dts
> index ef2e0c33e663..cc1bab37074a 100644
> --- a/arch/arm/dts/rk3568-bpi-r2-pro.dts
> +++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts
> @@ -120,20 +120,20 @@
> };
> };
>
> -&gmac0 {
> - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
> - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru
> CLK_MAC0_2TOP>;
> - assigned-clock-rates = <0>, <12500>;
> - clock_in_out = "input";
> - phy-handle = <&rgmii_phy0>;
> +&gmac1 {
> + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
> + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru
> CLK_MAC1_2TOP>;
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> phy-mode = "rgmii";
> pinctrl-names = "default";
> - pinctrl-0 = <&gmac0_miim
> - &gmac0_tx_bus2
> - &gmac0_rx_bus2
> - &gmac0_rgmii_clk
> - &gmac0_rgmii_bus>;
> - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&gmac1m1_miim
> + &gmac1m1_tx_bus2
> + &gmac1m1_rx_bus2
> + &gmac1m1_rgmii_clk
> + &gmac1m1_rgmii_bus>;
> +
> + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f */
> snps,reset-delays-us = <0 2 10>;
> @@ -367,8 +367,8 @@
> status = "disabled";
> };
>
> -&mdio0 {
> - rgmii_phy0: ethernet-phy@0 {
> +&mdio1 {
> + rgmii_phy1: ethernet-phy@0 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <0x0>;
> };
> --
> 2.25.1
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH 1/2] phy: freescale: imx8mq-usb: add support for i.MX8MP PHY
On Tue, Apr 12, 2022 at 09:52:40PM +0200, Lucas Stach wrote:
> This is a port of the Linux kernel commit 4708ee37826e
> by Li Jun . The USB3 PHY in the i.MX8MP is very
> close to the one in the i.MX8MQ and just needs a different setup
> routine.
>
> Signed-off-by: Lucas Stach
> ---
> drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 87 ++
> 1 file changed, 74 insertions(+), 13 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> index d3f9c1ba6ecf..fc5fb006b56c 100644
> --- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> +++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> @@ -2,20 +2,24 @@
> /* Copyright (c) 2017 NXP. */
>
> #include
> +#include
> +#include
> #include
> #include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> +#include
> #include
> #include
> +#include
> +#include
> +#include
> +#include
> +#include
>
>
> #define PHY_CTRL00x0
> #define PHY_CTRL0_REF_SSP_EN BIT(2)
> +#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
> +#define PHY_CTRL0_FSEL_24M 0x2a
>
> #define PHY_CTRL10x4
> #define PHY_CTRL1_RESET BIT(0)
> @@ -26,6 +30,11 @@
>
> #define PHY_CTRL20x8
> #define PHY_CTRL2_TXENABLEN0 BIT(8)
> +#define PHY_CTRL2_OTG_DISABLEBIT(9)
> +
> +#define PHY_CTRL60x18
> +#define PHY_CTRL6_ALT_CLK_EN BIT(1)
> +#define PHY_CTRL6_ALT_CLK_SELBIT(0)
>
> struct imx8mq_usb_phy {
> struct phy *phy;
> @@ -59,6 +68,44 @@ static int imx8mq_usb_phy_init(struct phy *phy)
> return 0;
> }
>
> +static int imx8mp_usb_phy_init(struct phy *phy)
> +{
> + struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
> + u32 value;
> +
> + /* USB3.0 PHY signal fsel for 24M ref */
> + value = readl(imx_phy->base + PHY_CTRL0);
> + value &= ~PHY_CTRL0_FSEL_MASK;
> + value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
> + writel(value, imx_phy->base + PHY_CTRL0);
> +
> + /* Disable alt_clk_en and use internal MPLL clocks */
> + value = readl(imx_phy->base + PHY_CTRL6);
> + value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
> + writel(value, imx_phy->base + PHY_CTRL6);
> +
> + value = readl(imx_phy->base + PHY_CTRL1);
> + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
> + value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
> + writel(value, imx_phy->base + PHY_CTRL1);
> +
> + value = readl(imx_phy->base + PHY_CTRL0);
> + value |= PHY_CTRL0_REF_SSP_EN;
> + writel(value, imx_phy->base + PHY_CTRL0);
> +
> + value = readl(imx_phy->base + PHY_CTRL2);
> + value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
> + writel(value, imx_phy->base + PHY_CTRL2);
> +
> + udelay(10);
> +
> + value = readl(imx_phy->base + PHY_CTRL1);
> + value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
> + writel(value, imx_phy->base + PHY_CTRL1);
> +
> + return 0;
> +}
> +
> static int imx8mq_phy_power_on(struct phy *phy)
> {
> struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
> @@ -75,12 +122,26 @@ static int imx8mq_phy_power_off(struct phy *phy)
> return 0;
> }
>
> -static struct phy_ops imx8mq_usb_phy_ops = {
> +static const struct phy_ops imx8mq_usb_phy_ops = {
> .init = imx8mq_usb_phy_init,
> .power_on = imx8mq_phy_power_on,
> .power_off = imx8mq_phy_power_off,
> };
>
> +static const struct phy_ops imx8mp_usb_phy_ops = {
> + .init = imx8mp_usb_phy_init,
> + .power_on = imx8mq_phy_power_on,
> + .power_off = imx8mq_phy_power_off,
> +};
> +
> +static const struct of_device_id imx8mq_usb_phy_of_match[] = {
> + {.compatible = "fsl,imx8mq-usb-phy",
> + .data = &imx8mq_usb_phy_ops,},
> + {.compatible = "fsl,imx8mp-usb-phy",
> + .data = &imx8mp_usb_phy_ops,},
> + { }
> +};
> +
> static struct phy *imx8mq_usb_phy_xlate(struct device_d *dev,
> struct of_phandle_args *args)
> {
> @@ -93,6 +154,7 @@ static int imx8mq_usb_phy_probe(struct device_d *dev)
> {
> struct phy_provider *phy_provider;
> struct imx8mq_usb_phy *imx_phy;
> + const struct phy_ops *phy_ops;
>
> imx_phy = xzalloc(sizeof(*imx_phy));
>
> @@ -106,7 +168,11 @@ static int imx8mq_usb_phy_probe(struct device_d *dev)
> if (IS_ERR(imx_phy->base))
> return PTR_ERR(imx_phy->base);
>
> - imx_phy->phy = phy_create(dev, NULL, &imx8mq_usb_phy_ops);
> + phy_ops = of_device_get_match_data(dev);
> + if (!phy_ops)
> + return -EINVAL;
> +
> + imx_phy->phy = phy_create(dev, NULL, phy_ops);
> if (IS_ERR(imx_phy->phy))
> return PTR_ERR(imx_phy->phy);
>
> @@ -117,11 +183,6 @@ static int im
Re: [PATCH v5 00/14] provide DSA support
On Wed, Apr 13, 2022 at 10:21:51AM +0200, Oleksij Rempel wrote: > changes v5: > - add dev_print_hex_dump() support > - drop rx_preprocessored packed on error > - dsa: drop of_device_ensure_probed > - dsa: rework Kconfig > - sja1105: link device config to the of_matching data. > - KSZ9477: add code origin comment > - ethlog: do not check on already registered monitor > > changes v4: > - ethlog: add patch description > - dsa: fix spelling > - dsa: make sure cpu port count incremented on every port > - dsa: rework error handling > - dsa: make sure port_enable/port_disable are optional > - dsa: make use of of_phy_register_fixed_link() > - sja1105: use dev_err instead of printf > - sja1105: do sanity check on dsa_register > - ksz9477: rework spi_write function > - ksz9477: do not clean PORT_TX/RX_ENABLE flags > > changes v3: > - remove no needed work artifact ksz9477_old.c > > changes v2: > - mane sure optional functions are called conditionally > - add support for ksz9477 and ksz9893 > - add ethlog, kind of replacement for tshark or tcpdump > > Oleksij Rempel (14): > net: add RX preprocessor support > net: add of_find_eth_device_by_node() function > net: phy: export of_phy_register_fixed_link() function > net: add DSA framework to support basic switch functionality > driver: add dev_get_priv() helper > net: port part of if_vlan header from kernel v5.17 > spi: port spi_sync_transfer() function from kernel v5.17 > net: mdio: add MDIO_DEVAD_NONE define > net: phy: make sure MDIO bus is probed if we search for the PHY > of_net: add rev-rmii support > net: dsa: add support for SJA11xx switches > net: dsa: add KSZ9477 switch SPI driver > hexdump: provide support for dev_print_hex_dump() > add ethlog command > > commands/Kconfig|8 + > commands/Makefile |1 + > commands/ethlog.c | 80 + > drivers/net/Kconfig | 31 + > drivers/net/Makefile|3 + > drivers/net/dsa.c | 444 > drivers/net/ksz9477.c | 566 + > drivers/net/phy/phy.c |5 +- > drivers/net/sja1105.c | 2987 +++ > drivers/of/of_net.c |1 + > include/driver.h|5 + > include/dsa.h | 90 + > include/linux/if_vlan.h | 56 + > include/linux/mdio.h|2 + > include/linux/phy.h |3 + > include/net.h | 15 + > include/platform_data/ksz9477_reg.h | 1665 +++ > include/printk.h| 14 +- > include/spi/spi.h | 24 + > lib/hexdump.c | 22 +- > net/eth.c | 20 +- > net/net.c | 14 + > 22 files changed, 6042 insertions(+), 14 deletions(-) > create mode 100644 commands/ethlog.c > create mode 100644 drivers/net/dsa.c > create mode 100644 drivers/net/ksz9477.c > create mode 100644 drivers/net/sja1105.c > create mode 100644 include/dsa.h > create mode 100644 include/linux/if_vlan.h > create mode 100644 include/platform_data/ksz9477_reg.h Applied, thanks Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] usb: xhci: Honor transfer timeouts
On Wed, Apr 13, 2022 at 05:57:10PM +0200, Lucas Stach wrote: > Hi Sascha, > > Am Montag, dem 14.12.2020 um 14:58 +0100 schrieb Sascha Hauer: > > The usb host submit_control_msg() and submit_bulk_msg() hooks pass a > > timeout value. Honor these values in the XHCI driver instead of just > > ignoring them. The USB net driver in barebox polls for receive packets > > by submitting an URB with a very low timeout, expecting it to timeout > > when no incoming packet is present. With the default timeout of 5 > > seconds the XHCI driver previously used barebox became unusable. > > Seems like this patch has not been applied. USB net on a XHCI host is > still unusable with current master. Applied now. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v1] net: phy: do not call adjust_link() form phy_device_attach()
phy_device_attach() is usually called from eth_open() to enable interface, configure MAC, etc. Some times we have situations like this: 1. find and configure PHY 2. define PHY as clock provider for MAC 3. reset and configure MAC 4. detect link and speed and configure MAC accordingly. Which works as expected unless we use fixed PHY. Since fixed-phy was handled differently by the PHY code, we did step 4. before step 3. In this case we will loose MAC speed configuration at least on designware-eqos Ethernet controller. With this change, we handle real PHY and virtual fixed-PHY in the same way. So, adjust_link() (step 4.) will be called after edev->open() (step 3.) as it should be for both variants. Signed-off-by: Oleksij Rempel --- drivers/net/phy/phy.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 85cdd7862f..adff9dadd1 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -54,6 +54,13 @@ int phy_update_status(struct phy_device *phydev) return ret; } + /* +* If the phy is a fixed-link, set it to active state to trigger +* MAC configuration +*/ + if (!phydev->bus && !phydev->link) + phydev->link = 1; + if (phydev->speed == oldspeed && phydev->duplex == oldduplex && phydev->link == oldlink) return 0; @@ -311,7 +318,7 @@ struct phy_device *of_phy_register_fixed_link(struct device_node *np, phydev->dev.parent = &edev->dev; phydev->registered = 1; - phydev->link = 1; + phydev->link = 0; if (of_property_read_u32(np, "speed", &phydev->speed)) return NULL; @@ -401,10 +408,6 @@ static int phy_device_attach(struct phy_device *phy, struct eth_device *edev, phy->adjust_link = adjust_link; - /* If the phy is a fixed-link, then call adjust_link directly */ - if (!phy->bus && adjust_link) - adjust_link(edev); - return 0; } -- 2.30.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v1] net: phy: add TI DP83TD510E T1L PHY support
Add basic driver for TI DP83TD510E T1L PHY
Signed-off-by: Oleksij Rempel
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/dp83td510.c | 45 +
3 files changed, 52 insertions(+)
create mode 100644 drivers/net/phy/dp83td510.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 9f74335443..cd20e1de27 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -29,6 +29,12 @@ config DP83867_PHY
help
Currently supports the DP83867 PHY.
+config DP83TD510_PHY
+ tristate "Texas Instruments DP83TD510 Ethernet 10Base-T1L PHY"
+ help
+ Support for the DP83TD510 Ethernet 10Base-T1L PHY. This PHY supports
+ a 10M single pair Ethernet connection for up to 1000 meter cable.
+
config LXT_PHY
bool "Driver for the Intel LXT PHYs"
help
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 54b83e06dd..83f46f11d3 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,4 +17,5 @@ obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
obj-$(CONFIG_MDIO_BUS_MUX_GPIO)+= mdio-mux-gpio.o
obj-$(CONFIG_DP83867_PHY) += dp83867.o
+obj-$(CONFIG_DP83TD510_PHY)+= dp83td510.o
diff --git a/drivers/net/phy/dp83td510.c b/drivers/net/phy/dp83td510.c
new file mode 100644
index 00..44c551e795
--- /dev/null
+++ b/drivers/net/phy/dp83td510.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+
+#define DP83TD510E_PHY_ID 0x2181
+
+#define DP83TD510E_PHY_STS 0x10
+#define DP83TD510E_LINK_STATUS BIT(0)
+
+static int dp83td510_read_status(struct phy_device *phydev)
+{
+ u16 phy_sts;
+
+ phy_sts = phy_read(phydev, DP83TD510E_PHY_STS);
+
+ phydev->link = !!(phy_sts & DP83TD510E_LINK_STATUS);
+ if (phydev->link) {
+ phydev->duplex = DUPLEX_FULL;
+ phydev->speed = SPEED_10;
+ } else {
+ phydev->speed = SPEED_UNKNOWN;
+ phydev->duplex = DUPLEX_UNKNOWN;
+ }
+
+ return 0;
+}
+
+static int dp83td510_config_init(struct phy_device *phydev)
+{
+ phydev->supported = SUPPORTED_10baseT_Full | SUPPORTED_Autoneg;
+ phydev->advertising = SUPPORTED_10baseT_Full | SUPPORTED_Autoneg;
+
+ return 0;
+}
+
+static struct phy_driver dp83td510_driver[] = {
+ {
+ PHY_ID_MATCH_MODEL(DP83TD510E_PHY_ID),
+ .drv.name = "TI DP83TD510E",
+ .read_status= dp83td510_read_status,
+ .config_init= dp83td510_config_init,
+ }
+};
+device_phy_drivers(dp83td510_driver);
--
2.30.2
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AM335x MLO failed to boot
Hello. I can't start the custom AM335x board after updating to version 2021.12.0. Perhaps this is a consequence of the "devfs: Do not create overlapping partitions" commit. Here is a debug output: Add partition nand0.MLO, device nand0 (0x-0x0002) Add partition nand0.boot, device nand0 (0x0002-0x0008) Add partition nand0.env, device nand0 (0x000a-0x0004) Add partition nand0.system, device nand0 (0x000e-0x0ff2) booting from NAND Add partition x, device nand0 (0x0002-0x0008) New partition x (0x0002-0x0009) on nand0.boot overlaps with partition nand0.boot (0x-0x0007), not creating it failed to open bbx booting failed What is the partition "x" in this case? How to fix this? Thanks! ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
