Re: [PATCH] ssb: Add PCI ID 0x4322 to PHU handling

2010-02-20 Thread Gábor Stefanik 
On Fri, Feb 19, 2010 at 7:02 PM, Larry Finger  wrote:
> Some of the N PHYs need a revision in the handling of the PMU.
>
> Signed-off-by: Larry Finger 
> ---
>
> John,
>
> This will be needed for some of the N PHY devices - 2.6.34 amterial.
>
> Larry
> ---
>
> Index: wireless-testing/drivers/ssb/driver_chipcommon_pmu.c
> ===
> --- wireless-testing.orig/drivers/ssb/driver_chipcommon_pmu.c
> +++ wireless-testing/drivers/ssb/driver_chipcommon_pmu.c
> @@ -332,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_
>        case 0x5354:
>                ssb_pmu0_pllinit_r0(cc, crystalfreq);
>                break;
> +       case 0x4322:
> +               if (cc->pmu.rev == 2) {
> +                       chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, 
> 0x000A);
> +                       chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, 
> 0x380005C0);
> +               }
> +               break;
>        default:
>                ssb_printk(KERN_ERR PFX
>                           "ERROR: PLL init unknown for device %04X\n",
> @@ -417,6 +423,7 @@ static void ssb_pmu_resources_init(struc
>
>        switch (bus->chip_id) {
>        case 0x4312:
> +       case 0x4322:
>                /* We keep the default settings:
>                 * min_msk = 0xCBB
>                 * max_msk = 0x7
> ___
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>

Typo in title - PHU should be PMU.

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[PATCH] ssb: Add PCI ID 0x4322 to PHU handling

2010-02-19 Thread Larry Finger 
Some of the N PHYs need a revision in the handling of the PMU.

Signed-off-by: Larry Finger 
---

John,

This will be needed for some of the N PHY devices - 2.6.34 amterial.

Larry
---

Index: wireless-testing/drivers/ssb/driver_chipcommon_pmu.c
===
--- wireless-testing.orig/drivers/ssb/driver_chipcommon_pmu.c
+++ wireless-testing/drivers/ssb/driver_chipcommon_pmu.c
@@ -332,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_
case 0x5354:
ssb_pmu0_pllinit_r0(cc, crystalfreq);
break;
+   case 0x4322:
+   if (cc->pmu.rev == 2) {
+   chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, 0x000A);
+   chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, 0x380005C0);
+   }
+   break;
default:
ssb_printk(KERN_ERR PFX
   "ERROR: PLL init unknown for device %04X\n",
@@ -417,6 +423,7 @@ static void ssb_pmu_resources_init(struc
 
switch (bus->chip_id) {
case 0x4312:
+   case 0x4322:
/* We keep the default settings:
 * min_msk = 0xCBB
 * max_msk = 0x7
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