[beagleboard] Re: Bus error on access to memory mapped GPIO[023]

[Igor Borges Tavares]

Luigi very good, I also had this problem, and your solution worked for me 
also.

But I still do not understand why it is necessary to export at least one 
pin on each port to be able to access the GPIO with mmap.
Someone can explain me?

Em terça-feira, 11 de junho de 2013 23h41min10s UTC-3, Jacek Radzikowski 
escreveu:
>
> Hello, 
>
> I'm getting bus errors whenever my program tries to access registers 
> controlling pins on GPIOs 0,2 or 3. I'm not trying to set pinmuxing, I 
> try to write to registers controlling the pins. 
> GPIO1 works fine and I can enable outputs by writing to the OE 
> register and change the values on the pins by writing to the OUT 
> register. 
>
> Here are some details of my simple test program: 
> The base addresses for the GPIO blocks are defined as follows: 
> const uint32_t gpioAddrs[] = 
> { 0x44E07000, 0x4804C000, 0x481AC000, 0x481AE000 }; 
>
> The memory blocks are mapped to process address space with the following 
> mmap: 
> gpios[i] = (uint32_t *) mmap(NULL, 0xfff, 
>  PROT_READ | PROT_WRITE, MAP_SHARED, gpioFd, 
> gpioAddrs[i]); 
>
> Printing values from OE, IN and OUT registers: 
> printf("i=%i\n",i); 
> printf("OUT[%i]=0x%08x\n",i,gpios[i][DATA_OUT_REG/4]); 
> printf("IN[%i]=0x%08x\n",i,gpios[i][DATA_IN_REG/4]); 
> printf("OE[%i]=0x%08x\n",i,gpios[i][GPIO_OE_REG/4]); 
>
> The full source is on gist: 
> https://gist.github.com/piranha32/4fd285cc8333eeb4ec39 
>
> Program works fine when 'i' is set to 1, crashes for 'i' set to 0,2 or 3. 
> Am I missing something obvious, or is this an overzealous memory 
> protection? 
>
> Board: BBBlack 
> Kernel: Linux beaglebone 3.8.13 #1 SMP Fri Jun 7 09:49:12 CEST 2013 
> armv7l GNU/Linux 
>
> thx, 
> j. 
>
>
> -- 
> Given a choice between two theories, take the one which is funnier 
>

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[beagleboard] Device tree load time [BBB]

[Igor Borges Tavares]

Hello everybody.

I have a project where I am using the BEAGLEBONE Black Revision C with the 
latest official Debian image.

I configured the device tree to use UART1 including using *RTSn* pin.

Everything is running properly and the *RTSn* pin is working well.

However, unfortunately, until the device tree is read and peripherals 
configured by the kernel, the RTSn pin it stays "low".

The system takes 14 seconds to set the pin as *RTSn* and put it in "HIGH" 
state, the default state for communication.

Does anyone know any way to configure that device more quickly? Or to force 
this pin and get "high" state before?

P.S: I can *not* change the hardware!

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