[beagleboard] Re: PRU0 base address
OK, the base address seems to be correct. Nevertheless CTRL-register isn ot readable, so it seems some important PRU-initialisations are missing. So is there any clock or power that has to be turned on for PRU? Am Dienstag, 4. November 2014 17:54:03 UTC+1 schrieb Karl Karpfen: > > OK, I'm sure it is a stupid question but I don't find it in AM335x > TRM...there the offset of PRU_CTRL-register is defined with 0x. But > what is the base address? I found a definition 0x4a322000 in one of > Starterware headers but this seems to be wrong. > > So what is correct base address for PRU0 registers and RAM areas? > > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[beagleboard] Re: PRU0 base address
The PRU does need to be enabled, typically by a Device Tree entry similar
to this:
fragment@4 {
target = <&pruss>;
__overlay__ {
status = "okay";
};
};
If using a cape of some kind, this would normally be in the device tree
setup for that cape.
If it's your own custom cape, you would need to add this to your device
tree file.
There may also be a suitable device tree overlay already installed in
/lib/firmware that you can simply enable, but I don't have my BBB in front
of me right now to check.
On Wednesday, November 5, 2014 11:19:34 PM UTC-8, Karl Karpfen wrote:
>
> OK, the base address seems to be correct. Nevertheless CTRL-register isn
> ot readable, so it seems some important PRU-initialisations are missing. So
> is there any clock or power that has to be turned on for PRU?
>
>
> Am Dienstag, 4. November 2014 17:54:03 UTC+1 schrieb Karl Karpfen:
>>
>> OK, I'm sure it is a stupid question but I don't find it in AM335x
>> TRM...there the offset of PRU_CTRL-register is defined with 0x. But
>> what is the base address? I found a definition 0x4a322000 in one of
>> Starterware headers but this seems to be wrong.
>>
>> So what is correct base address for PRU0 registers and RAM areas?
>>
>>
--
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[beagleboard] Re: PRU0 base address
Hey man, You should read this PDF file. It helps a lot. http://mythopoeic.org/BBB-PRU/am335xPruReferenceGuide.pdf >From there most of your doubts will surely be solved. If not, keep posting. Best of luck, Jose On Tuesday, November 4, 2014 10:54:03 AM UTC-6, Karl Karpfen wrote: > > OK, I'm sure it is a stupid question but I don't find it in AM335x > TRM...there the offset of PRU_CTRL-register is defined with 0x. But > what is the base address? I found a definition 0x4a322000 in one of > Starterware headers but this seems to be wrong. > > So what is correct base address for PRU0 registers and RAM areas? > > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[beagleboard] Re: PRU0 base address
OK, seems I have to clarify this a bit: in my environment no Linux is
involved, I'm digging within the hardware directly.
What I found meanwhile: some clocks have to be enabled. But setting
CM_PER_PRU_ICSS_CLKCTRL to 0x0002 and CM_PER_PRU_ICSS_CLKSTCTRL to
0x0010 (=CM_PER_PRU_ICSS_CLKSTCTRL_OCP_GCLK) did not do the trick.
Any other ideas?
Am Donnerstag, 6. November 2014 16:28:56 UTC+1 schrieb ericgg...@gmail.com:
>
> The PRU does need to be enabled, typically by a Device Tree entry similar
> to this:
>
> fragment@4 {
> target = <&pruss>;
> __overlay__ {
> status = "okay";
> };
> };
>
> If using a cape of some kind, this would normally be in the device tree
> setup for that cape.
> If it's your own custom cape, you would need to add this to your device
> tree file.
> There may also be a suitable device tree overlay already installed in
> /lib/firmware that you can simply enable, but I don't have my BBB in front
> of me right now to check.
>
> On Wednesday, November 5, 2014 11:19:34 PM UTC-8, Karl Karpfen wrote:
>>
>> OK, the base address seems to be correct. Nevertheless CTRL-register isn
>> ot readable, so it seems some important PRU-initialisations are missing. So
>> is there any clock or power that has to be turned on for PRU?
>>
>>
>> Am Dienstag, 4. November 2014 17:54:03 UTC+1 schrieb Karl Karpfen:
>>>
>>> OK, I'm sure it is a stupid question but I don't find it in AM335x
>>> TRM...there the offset of PRU_CTRL-register is defined with 0x. But
>>> what is the base address? I found a definition 0x4a322000 in one of
>>> Starterware headers but this seems to be wrong.
>>>
>>> So what is correct base address for PRU0 registers and RAM areas?
>>>
>>>
--
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Re: [beagleboard] Re: PRU0 base address
OK, solved, using this initialisation PRU is at least initialised:
HWREG(SOC_PRM_PER_REGS)|=0x0002;
HWREG(SOC_PRM_PER_REGS)|=0xFFFD;
HWREG(SOC_CM_PER_REGS+CM_PER_PRU_ICSS_CLKCTRL)=0x0002;
HWREG(SOC_CM_PER_REGS+CM_PER_PRU_ICSS_CLKSTCTRL)=(CM_PER_PRU_ICSS_CLKSTCTRL_OCP_GCLK|CM_PER_PRU_ICSS_CLKSTCTRL_IEP_GCLK);
memcpy((void*)PRU0IRAM_PHYS_BASE,textbuf,textlen);
memcpy((void*)DATARAM0_PHYS_BASE,databuf,datalen);
HWREG(PRU0CONTROL_PHYS_BASE+PRU_CTRL)=0x0002; // enable and execute
-> PRUSS_CFG_BASE instead of PRU0CONTROL_PHYS_BASE?
Afterwards CTRL-register contains 0x8003 which means PRU is executing
something.
2014-11-10 9:38 GMT+01:00 Karl Karpfen :
> OK, seems I have to clarify this a bit: in my environment no Linux is
> involved, I'm digging within the hardware directly.
>
> What I found meanwhile: some clocks have to be enabled. But setting
> CM_PER_PRU_ICSS_CLKCTRL to 0x0002 and CM_PER_PRU_ICSS_CLKSTCTRL to
> 0x0010 (=CM_PER_PRU_ICSS_CLKSTCTRL_OCP_GCLK) did not do the trick.
>
> Any other ideas?
>
> Am Donnerstag, 6. November 2014 16:28:56 UTC+1 schrieb ericgg...@gmail.com
> :
>
>> The PRU does need to be enabled, typically by a Device Tree entry similar
>> to this:
>>
>> fragment@4 {
>> target = <&pruss>;
>> __overlay__ {
>> status = "okay";
>> };
>> };
>>
>> If using a cape of some kind, this would normally be in the device tree
>> setup for that cape.
>> If it's your own custom cape, you would need to add this to your device
>> tree file.
>> There may also be a suitable device tree overlay already installed in
>> /lib/firmware that you can simply enable, but I don't have my BBB in front
>> of me right now to check.
>>
>> On Wednesday, November 5, 2014 11:19:34 PM UTC-8, Karl Karpfen wrote:
>>>
>>> OK, the base address seems to be correct. Nevertheless CTRL-register isn
>>> ot readable, so it seems some important PRU-initialisations are missing. So
>>> is there any clock or power that has to be turned on for PRU?
>>>
>>>
>>> Am Dienstag, 4. November 2014 17:54:03 UTC+1 schrieb Karl Karpfen:
OK, I'm sure it is a stupid question but I don't find it in AM335x
TRM...there the offset of PRU_CTRL-register is defined with 0x. But
what is the base address? I found a definition 0x4a322000 in one of
Starterware headers but this seems to be wrong.
So what is correct base address for PRU0 registers and RAM areas?
--
> For more options, visit http://beagleboard.org/discuss
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