From: Junyan He <junyan...@linux.intel.com> We also add special accumulator field print to disasm.
Signed-off-by: Junyan He <junyan...@linux.intel.com> --- backend/src/backend/gen/gen_mesa_disasm.c | 89 +++++++++++++++++++++++++++++-- 1 file changed, 84 insertions(+), 5 deletions(-) diff --git a/backend/src/backend/gen/gen_mesa_disasm.c b/backend/src/backend/gen/gen_mesa_disasm.c index 5220233..733b2e6 100644 --- a/backend/src/backend/gen/gen_mesa_disasm.c +++ b/backend/src/backend/gen/gen_mesa_disasm.c @@ -84,6 +84,7 @@ static const struct { [GEN_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 }, [GEN_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 }, [GEN_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 }, + [GEN_OPCODE_MADM] = { .name = "madm", .nsrc = 3, .ndst = 1 }, [GEN_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 }, [GEN_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 }, @@ -311,6 +312,18 @@ static const char *writemask[16] = { [0xf] = "", }; +static const char *special_acc[9] = { + [0x0] = ".acc2", + [0x1] = ".acc3", + [0x2] = ".acc4", + [0x3] = ".acc5", + [0x4] = ".acc6", + [0x5] = ".acc7", + [0x6] = ".acc8", + [0x7] = ".acc9", + [0x8] = ".noacc", +}; + static const char *end_of_thread[2] = { [0] = "", [1] = "EOT" @@ -532,6 +545,24 @@ static int gen_version; #define GENERIC_MSG_LENGTH(inst) GEN_BITS_FIELD(inst, bits3.generic_gen5.msg_length) #define GENERIC_RESPONSE_LENGTH(inst) GEN_BITS_FIELD(inst, bits3.generic_gen5.response_length) +static int is_special_acc(const void* inst) +{ + if (gen_version < 80) + return 0; + + if (OPCODE(inst) != GEN_OPCODE_MADM && OPCODE(inst) != GEN_OPCODE_MATH) + return 0; + + if (OPCODE(inst) == GEN_OPCODE_MATH && + (MATH_FUNCTION(inst) != GEN8_MATH_FUNCTION_INVM && MATH_FUNCTION(inst) != GEN8_MATH_FUNCTION_RSQRTM)) + return 0; + + if (ACCESS_MODE(inst) != GEN_ALIGN_16) + return 0; + + return 1; +} + static int string(FILE *file, const char *string) { fputs (string, file); @@ -688,7 +719,12 @@ static int dest(FILE *file, const void* inst) format(file, ".%d", GEN_BITS_FIELD(inst, bits1.da16.dest_subreg_nr) / reg_type_size[GEN_BITS_FIELD(inst, bits1.da16.dest_reg_type)]); string(file, "<1>"); - err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst, bits1.da16.dest_writemask), NULL); + + if (is_special_acc(inst)) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits1.da16acc.dst_specal_acc, NULL); + } else { + err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst, bits1.da16.dest_writemask), NULL); + } err |= control(file, "dest reg encoding", reg_encoding, GEN_BITS_FIELD(inst, bits1.da16.dest_reg_type), NULL); } else { err = 1; @@ -710,7 +746,11 @@ static int dest_3src(FILE *file, const void *inst) if (GEN_BITS_FIELD(inst, bits1.da3src.dest_subreg_nr)) format(file, ".%d", GEN_BITS_FIELD(inst, bits1.da3src.dest_subreg_nr)); string(file, "<1>"); - err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst, bits1.da3src.dest_writemask), NULL); + if (is_special_acc(inst)) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits1.da3srcacc.dst_specal_acc, NULL); + } else { + err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst, bits1.da16.dest_writemask), NULL); + } err |= control(file, "dest reg encoding", reg_encoding, GEN_TYPE_F, NULL); return 0; @@ -775,7 +815,7 @@ static int src_ia1(FILE *file, return err; } -static int src_da16(FILE *file, +static int src_da16(FILE *file, const void* inst, int src_num, uint32_t _reg_type, uint32_t _reg_file, uint32_t _vert_stride, @@ -803,6 +843,17 @@ static int src_da16(FILE *file, err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); string(file, ",4,1>"); + + if (is_special_acc(inst)) { + if (src_num == 0) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits2.da16acc.src0_specal_acc_lo, NULL); + } else { + assert(src_num == 1); + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits3.da16acc.src1_specal_acc_lo, NULL); + } + return err; + } + /* * Three kinds of swizzle display: * identity - nothing printed @@ -850,6 +901,12 @@ static int src0_3src(FILE *file, const void* inst) string(file, "<8,8,1>"); err |= control(file, "src da16 reg type", reg_encoding, GEN_TYPE_F, NULL); + + if (is_special_acc(inst)) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits2.da3srcacc.src0_specal_acc, NULL); + return err; + } + /* * Three kinds of swizzle display: * identity - nothing printed @@ -898,6 +955,12 @@ static int src1_3src(FILE *file, const void* inst) string(file, "<8,8,1>"); err |= control(file, "src da16 reg type", reg_encoding, GEN_TYPE_F, NULL); + + if (is_special_acc(inst)) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits2.da3srcacc.src1_specal_acc, NULL); + return err; + } + /* * Three kinds of swizzle display: * identity - nothing printed @@ -943,6 +1006,12 @@ static int src2_3src(FILE *file, const void* inst) string(file, "<8,8,1>"); err |= control(file, "src da16 reg type", reg_encoding, GEN_TYPE_F, NULL); + + if (is_special_acc(inst)) { + err |= control(file, "specialacc", special_acc, ((const union Gen8NativeInstruction *)inst)->bits3.da3srcacc.src2_specal_acc, NULL); + return err; + } + /* * Three kinds of swizzle display: * identity - nothing printed @@ -1066,6 +1135,16 @@ static int imm(FILE *file, uint32_t type, const void* inst) format(file, "%-gHF", f); break; } + case GEN_TYPE_DF_IMM: + { + assert(!(gen_version < 80)); + double val; + uint32_t hi = (((const union Gen8NativeInstruction *)inst)->bits3).ud; + uint32_t lo = (((const union Gen8NativeInstruction *)inst)->bits2).ud; + memcpy((void *)(&val), &lo, sizeof(uint32_t)); + memcpy(((void *)(&val) + sizeof(uint32_t)), &hi, sizeof(uint32_t)); + format(file, "%f", val); + } } return 0; } @@ -1106,7 +1185,7 @@ static int src0(FILE *file, const void* inst) } } else { if (GEN_BITS_FIELD(inst, bits2.da16.src0_address_mode) == GEN_ADDRESS_DIRECT) { - return src_da16(file, + return src_da16(file, inst, 0, GEN_BITS_FIELD(inst, bits1.da16.src0_reg_type), GEN_BITS_FIELD(inst, bits1.da16.src0_reg_file), GEN_BITS_FIELD(inst, bits2.da16.src0_vert_stride), @@ -1157,7 +1236,7 @@ static int src1(FILE *file, const void* inst) } } else { if (GEN_BITS_FIELD(inst, bits3.da16.src1_address_mode) == GEN_ADDRESS_DIRECT) { - return src_da16(file, + return src_da16(file, inst, 1, GEN_BITS_FIELD2(inst, bits1.da16.src1_reg_type, bits2.da16.src1_reg_type), GEN_BITS_FIELD2(inst, bits1.da16.src1_reg_file, bits2.da16.src1_reg_file), GEN_BITS_FIELD(inst, bits3.da16.src1_vert_stride), -- 1.9.1 _______________________________________________ Beignet mailing list Beignet@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/beignet