[Bug binutils/20666] New: [libopcodes][Aarch64] BFI instruction decoded as bad BFC instruction
https://sourceware.org/bugzilla/show_bug.cgi?id=20666 Bug ID: 20666 Summary: [libopcodes][Aarch64] BFI instruction decoded as bad BFC instruction Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: njholcomb at wi dot rr.com Target Milestone: --- Decoding an A64 base instruction with bytes: 0x331957fa should produce a bit field insert of the zero register: bfi w26, wzr, #7, #22 The current output is a BFC instruction (which already cannot be encoded in the A64 base instruction): bfc w26, #7, #22 This instruction is incorrect because the BFC instruction only supports 4 bits of register name, meaning w26 is out of bounds as a register for this instruction. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20667] New: [libopcodes][Aarch64] IC ivau omits register operand if it's the zero register
https://sourceware.org/bugzilla/show_bug.cgi?id=20667 Bug ID: 20667 Summary: [libopcodes][Aarch64] IC ivau omits register operand if it's the zero register Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: njholcomb at wi dot rr.com Target Milestone: --- Decoding the bytes: 0xd50b753f Should produce: ic ivau, xzr Instead produces: ic ivau I tested by attempting to assemble the instruction "ic ivau" and received the following error from gas: Error: missing register at operand 2 -- `ic ivau' This problem does not exist for other register operands. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/19660] [libopcodes] [x86] REP prefixes shown incorrectly
https://sourceware.org/bugzilla/show_bug.cgi?id=19660 --- Comment #4 from njholcomb at wi dot rr.com --- Coming back to this, my concern is that outputting instructions with prefixes where the prefixes cause the instruction to be undefined is misleading. If the output of the decoder is intended to match the instruction that will be executed, it should produce an error, because that's what will occur when the instruction is executed on a processor. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/19660] [libopcodes] [x86] REP prefixes shown incorrectly
https://sourceware.org/bugzilla/show_bug.cgi?id=19660 H.J. Lu changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|--- |WORKSFORME --- Comment #5 from H.J. Lu --- (In reply to njholcomb from comment #4) > Coming back to this, my concern is that outputting instructions with > prefixes where the prefixes cause the instruction to be undefined is > misleading. If the output of the decoder is intended to match the > instruction that will be executed, it should produce an error, because > that's what will occur when the instruction is executed on a processor. UD can happen for various reasons. Because an AVX instruction is undefined on Haswell machine, it doesn't mean objdump should decode it based on where the program runs. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
