[Bug ld/22831] ld causes massive thrashing if object files are not fully memory-resident: new algorithm needed
https://sourceware.org/bugzilla/show_bug.cgi?id=22831 --- Comment #16 from Luke Kenneth Casson Leighton --- the following came up in a debian discussion and is copied here: Florian Weimer 8:31 PM (14 minutes ago) to Luke, Steve, ARM, debian-release, debian-admin, team, debian-gcc, debian-glibc * Luke Kenneth Casson Leighton: > that is not a surprise to hear: the massive thrashing caused by the > linker phase not being possible to be RAM-resident will be absolutely > hammering the drives beyond reasonable wear-and-tear limits. which is > why i'm recommending people try "-Wl,--no-keep-memory". Note that ld will sometimes stuff everything into a single RWX segment as a result, which is not desirable. Unfortunately, without significant investment into historic linker technologies (with external sorting and that kind of stuff), I don't think it is viable to build 32-bit software natively in the near future. Maybe next year only a few packages will need exceptions, but the number will grow with each month. Building on 64-bit kernels will delay the inevitable because more address space is available to user space, but that's probably 12 to 18 month extended life-time for native building. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/21375] MIPS: Non-zero run-time value produced for PIC references to undefined hidden or internal weak symbols
https://sourceware.org/bugzilla/show_bug.cgi?id=21375 Bug 21375 depends on bug 23307, which changed state. Bug 23307 Summary: Absolute symbols whose value is zero ignored in lookup https://sourceware.org/bugzilla/show_bug.cgi?id=23307 What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/23192] aarch64: indexed fcmla doesn't support all registers
https://sourceware.org/bugzilla/show_bug.cgi?id=23192 --- Comment #2 from cvs-commit at gcc dot gnu.org --- The master branch has been updated by Tamar Christina : https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=369c9167d47e69aad2e260cc1db17f8c894c138b commit 369c9167d47e69aad2e260cc1db17f8c894c138b Author: Tamar Christina Date: Fri Jun 29 12:12:27 2018 +0100 Fix AArch64 encodings for by element instructions. Some instructions in Armv8-a place a limitation on FP16 registers that can be used as the register from which to select an element from. e.g. fmla restricts Rm to 4 bits when using an FP16 register. This restriction does not apply for all instructions, e.g. fcmla does not have this restriction as it gets an extra bit from the M field. Unfortunately, this restriction to S_H was added for all _Em operands before, meaning for a large number of instructions you couldn't use the full register file. This fixes the issue by introducing a new operand _Em16 which applies this restriction only when paired with S_H and leaves the _Em and the other qualifiers for _Em16 unbounded (i.e. using the full 5 bit range). Also the patch updates all instructions that should be affected by this. opcodes/ PR binutils/23192 * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. * aarch64-dis.c (aarch64_ext_reglane): Add AARCH64_OPND_Em16 constraint. * aarch64-opc.c (operand_general_constraint_met_p, aarch64_print_operand): Likewise. * aarch64-tbl.h (aarch64_opcode_table): Change Em to Em16 for smlal, smlal2, fmla, fmls, fmul, fmulx, sqrdmlah, sqrdlsh, fmlal, fmlsl, fmlal2, fmlsl2. (AARCH64_OPERANDS): Add Em2. gas/ PR binutils/23192 * config/tc-aarch64.c (process_omitted_operand, parse_operands): Add AARCH64_OPND_Em16 * testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper 16 registers. * testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise. * testsuite/gas/aarch64/advsimd-compnum.s: Likewise. * testsuite/gas/aarch64/advsimd-compnum.d: Likewise. * testsuite/gas/aarch64/sve.d: Likewise. include/ PR binutils/23192 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/23192] aarch64: indexed fcmla doesn't support all registers
https://sourceware.org/bugzilla/show_bug.cgi?id=23192 Tamar Christina changed: What|Removed |Added Target||aarch64*-*-* Status|ASSIGNED|RESOLVED Resolution|--- |FIXED Target Milestone|--- |2.31 --- Comment #4 from Tamar Christina --- Fixed in master and backported to binutils 2.31. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/23192] aarch64: indexed fcmla doesn't support all registers
https://sourceware.org/bugzilla/show_bug.cgi?id=23192 --- Comment #3 from cvs-commit at gcc dot gnu.org --- The binutils-2_31-branch branch has been updated by Tamar Christina : https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=48d86a7a60ed4055f4ca2de9b09627ea396d001a commit 48d86a7a60ed4055f4ca2de9b09627ea396d001a Author: Tamar Christina Date: Fri Jun 29 12:12:27 2018 +0100 Fix AArch64 encodings for by element instructions. Some instructions in Armv8-a place a limitation on FP16 registers that can be used as the register from which to select an element from. e.g. fmla restricts Rm to 4 bits when using an FP16 register. This restriction does not apply for all instructions, e.g. fcmla does not have this restriction as it gets an extra bit from the M field. Unfortunately, this restriction to S_H was added for all _Em operands before, meaning for a large number of instructions you couldn't use the full register file. This fixes the issue by introducing a new operand _Em16 which applies this restriction only when paired with S_H and leaves the _Em and the other qualifiers for _Em16 unbounded (i.e. using the full 5 bit range). Also the patch updates all instructions that should be affected by this. opcodes/ PR binutils/23192 * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. * aarch64-dis.c (aarch64_ext_reglane): Add AARCH64_OPND_Em16 constraint. * aarch64-opc.c (operand_general_constraint_met_p, aarch64_print_operand): Likewise. * aarch64-tbl.h (aarch64_opcode_table): Change Em to Em16 for smlal, smlal2, fmla, fmls, fmul, fmulx, sqrdmlah, sqrdlsh, fmlal, fmlsl, fmlal2, fmlsl2. (AARCH64_OPERANDS): Add Em2. gas/ PR binutils/23192 * config/tc-aarch64.c (process_omitted_operand, parse_operands): Add AARCH64_OPND_Em16 * testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper 16 registers. * testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise. * testsuite/gas/aarch64/advsimd-compnum.s: Likewise. * testsuite/gas/aarch64/advsimd-compnum.d: Likewise. * testsuite/gas/aarch64/sve.d: Likewise. include/ PR binutils/23192 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16. (cherry picked from commit 369c9167d47e69aad2e260cc1db17f8c894c138b) Signed-off-by: Tamar Christina -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/17709] [2.26 Regression] elf/vismain test in glibc failed
https://sourceware.org/bugzilla/show_bug.cgi?id=17709 Dennis Schridde changed: What|Removed |Added CC||devurandom at gmx dot net -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/18636] Relocation agains protected symbol can not be used when making a shared object
https://sourceware.org/bugzilla/show_bug.cgi?id=18636 Dennis Schridde changed: What|Removed |Added CC||devurandom at gmx dot net -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
