Re: Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Sergey Zubkovsky

Thanks to All for the answers!

I'll submit the issue.

Just two questions from a novice like me: is the 'make' at "active" 
development stage?

I'm looking to "http://savannah.gnu.org/bugs/?group=make";.
There are many hang up issues. They are dated by previous years and 
don't assigned to anyone.
I'll schedule to move my project to bjam 
(http://www.boost.org/boost-build2/doc/html/index.html) since make's 
scripts are too difficult for my purpose.

Has anyone use bjam in yourself projects?

Thanks.

Philip Guenther wrote:

On Sun, Sep 6, 2009 at 8:09 AM, Sergey Zubkovsky wrote:
  

It seems to me this is a bug.

All will be fine if we just rewrite 'ifneq (1,1)' as 'ifeq (1,1)'.

That is why I sent the question.
I hope someone will add an item in the bug tracker (who know `make' better
than me and will confirm this supposition).



Sure looks like a bug to me.  Note that this has nothing to do with
$(eval); it's presence in your example just confuses the issue.  You
can see the issue directly with this:

ifneq (1,1)
define var1
define var2
endef
endef
endif


I suggest you visit
http://savannah.gnu.org/projects/make

and submit the bug.


Philip Guenther

  




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Re: GNU make to consider files checksum

2009-09-06 Thread Philip Guenther
On Fri, Apr 11, 2008 at 2:45 PM, Giuseppe Scrivano wrote:
> I could find on this ML archives only a thread about this subject: to
> consider the file checksum instead of the timestamp.
> Other systems like scons already support this feature and it would be
> great to have it for GNU Make too.

This is a long dead thread (it's been sitting in my mailbox for a
year, ouch), but I'll throw in my two cents that a makefile can
implement this for itself with pattern rules.  Consider:


%.o: %.c
%.o.new: %.c
$(COMPILE.c) -o $@ $<
%.o: %.o.new
@{ [ -f $...@.md5 ] && md5sum -c --status $...@.md5; } || \
{ md5sum $< >$...@.md5; cp $< $@; }

.SECONDARY:
-

Poof, if you touch a .c file without making changes that affect the
compiler output, the executable will not be relinked.  Indeed, the
presence of the .SECONDARY target means the only thing that will be
rerun each time is the md5sum.

Yes, this is non-trivial to use, but it's also completely flexible,
letting you use whatever checksum comparison you want (need to strip
comments or RCS/CVS tags from the file before checksumming it?  Sure!)
and can be used Right Now.

Anyway, we now return you to your originally scheduled mailing list.


Philip Guenther


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Re: Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Philip Guenther
On Sun, Sep 6, 2009 at 8:09 AM, Sergey Zubkovsky wrote:
> It seems to me this is a bug.
>
> All will be fine if we just rewrite 'ifneq (1,1)' as 'ifeq (1,1)'.
>
> That is why I sent the question.
> I hope someone will add an item in the bug tracker (who know `make' better
> than me and will confirm this supposition).

Sure looks like a bug to me.  Note that this has nothing to do with
$(eval); it's presence in your example just confuses the issue.  You
can see the issue directly with this:

ifneq (1,1)
define var1
define var2
endef
endef
endif


I suggest you visit
http://savannah.gnu.org/projects/make

and submit the bug.


Philip Guenther


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Re: Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Sergey Zubkovsky

It seems to me this is a bug.

All will be fine if we just rewrite 'ifneq (1,1)' as 'ifeq (1,1)'.

That is why I sent the question.
I hope someone will add an item in the bug tracker (who know `make' 
better than me and will confirm this supposition).


Alfred M. Szmidt wrote:

   define starts a macro.  Everything from the start of the macro to
   endef is just text and is not evaluated.

   So your inner "define" is not recognised - it's just treated as
   text.  That means that the dirst endef matches the first define and
   all the other endefs seem to have no corresponding define
   statement.

   In other words, you cannot nest defines like that.

Sure you can, it is a documented feature.  From the GNU make manual,
(make) Defining:

|You may nest `define' directives: `make' will keep track of
| nested directives and report an error if they are not all properly
| closed with `endef'.  Note that lines beginning with tab characters
| are considered part of a command script, so any `define' or `endef'
| strings appearing on such a line will not be considered `make'
| operators.

This is more a bug than anything.

  




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Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Tim Murphy
-- Forwarded message --
From: Tim Murphy 
Date: 2009/9/6
Subject: Re: Why "*** extraneous `endef'. Stop."?
To: a...@gnu.org


Oh dear - sorry - I'm an idiot.

All I can say is that the ifneq statement is what makes it go wrong
for me.  Using $(if works for me but to get the same effect as "not
equal" you need to do some complicated stuff.

It is a bug.  I can only suggest a workaround:

define equal
$(if $(1:$2=),,$(if $(2:$1=),1))
endef

define Var1
$(if $(call equal,1,1),,
define Var2
define Var3
endef
endef
)
endef


Cheers,

Tim

2009/9/6 Alfred M. Szmidt :
>   define starts a macro.  Everything from the start of the macro to
>   endef is just text and is not evaluated.
>
>   So your inner "define" is not recognised - it's just treated as
>   text.  That means that the dirst endef matches the first define and
>   all the other endefs seem to have no corresponding define
>   statement.
>
>   In other words, you cannot nest defines like that.
>
> Sure you can, it is a documented feature.  From the GNU make manual,
> (make) Defining:
>
> |    You may nest `define' directives: `make' will keep track of
> | nested directives and report an error if they are not all properly
> | closed with `endef'.  Note that lines beginning with tab characters
> | are considered part of a command script, so any `define' or `endef'
> | strings appearing on such a line will not be considered `make'
> | operators.
>
> This is more a bug than anything.
>



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Re: Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Alfred M. Szmidt
   define starts a macro.  Everything from the start of the macro to
   endef is just text and is not evaluated.

   So your inner "define" is not recognised - it's just treated as
   text.  That means that the dirst endef matches the first define and
   all the other endefs seem to have no corresponding define
   statement.

   In other words, you cannot nest defines like that.

Sure you can, it is a documented feature.  From the GNU make manual,
(make) Defining:

|You may nest `define' directives: `make' will keep track of
| nested directives and report an error if they are not all properly
| closed with `endef'.  Note that lines beginning with tab characters
| are considered part of a command script, so any `define' or `endef'
| strings appearing on such a line will not be considered `make'
| operators.

This is more a bug than anything.


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Re: Why "*** extraneous `endef'. Stop."?

2009-09-06 Thread Tim Murphy
Hi,

define starts a macro.  Everything from the start of the macro to
endef is just text and is not evaluated.

So your inner "define" is not recognised - it's just treated as text.
That means that the dirst endef matches the first define and all the
other endefs seem to have no corresponding define statement.

In other words, you cannot nest defines like that.

Also note that ifneq doesn't have any effect inside a define - it only
has an effect when you $(eval) the macro.

Cheers,


Tim


2009/9/6 Sergey Zubkovsky :
> Hi,
> Why the below makefile fails with the error text "_Makefile:16: ***
> extraneous `endef'.  Stop._"?
> Thanks.
>
> #---
> *define Var1
> ifneq (1,1)
> define Var2
> define Var3
> endef
> endef
> endif
> endef
>
> .PHONY : EmptyTarget
> EmptyTarget : ;
>
> $(eval $(value Var1))*
> #---
>
>
>
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