[bug #55243] Request for a way to indicate that the same recipe execution produces several targets

[Renaud Pacalet]

URL:
  

 Summary: Request for a way to indicate that the same recipe
execution produces several targets
 Project: make
Submitted by: pacalet
Submitted on: Wed 19 Dec 2018 12:53:09 PM UTC
Severity: 3 - Normal
  Item Group: Enhancement
  Status: None
 Privacy: Public
 Assigned to: None
 Open/Closed: Open
 Discussion Lock: Any
   Component Version: 4.2.1
Operating System: Any
   Fixed Release: None
   Triage Status: None

___

Details:

This request for enhancement concerns cases where multiple targets are
produced by one single execution of a recipe.

I frequently encounter situations where a single recipe execution produces
several targets and I'd like make to know about all these targets.

I know there is a side-effect of pattern rules with several targets that leads
make to consider that all targets matched by one activation of the rule are
produced by a single execution of the recipe.

But exploiting this sometimes leads to clumsy Makefiles where pattern rules
are used without any other reason than this side effect. Moreover, building
the list of pattern targets is sometimes difficult.

It would be much more convenient to have a new type of rule dedicated to this
situation. For instance, a triple-colon rule:


a b c::: foo
touch a b c


Of course, there are several related questions, like, for instance:

0 the semantics of the $@ automatic variable (list of targets, first target in
the list, other?),
0 the existence or not of a corresponding (static) pattern rule,
0 ...




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[bug #55242] Included Makefile not found, no rule to build it but make does not fail

[anonymous]

URL:
  

 Summary: Included Makefile not found, no rule to build it but
make does not fail
 Project: make
Submitted by: None
Submitted on: Wed 19 Dec 2018 12:37:06 PM UTC
Severity: 3 - Normal
  Item Group: Bug
  Status: None
 Privacy: Public
 Assigned to: None
 Open/Closed: Open
 Discussion Lock: Any
   Component Version: 4.2.1
Operating System: Any
   Fixed Release: None
   Triage Status: None

___

Details:

With the following Makefile:


.PHONY: all clean

all:;

include a.mk

a.mk: b

b:
@touch $@
@printf '$$(info a.mk included)' > a.mk

clean:
@rm -f a.mk b


The first make invocation produces:


$ make
make: Nothing to be done for 'all'.


And the second make invocation:


make
a.mk included
make: Nothing to be done for 'all'.


So we are in a situation where:

0 a makefile is included with the include directive (no -include),
0 the included makefile is not found,
0 make finds no rule to produce it and decides not to include it,
0 make executes a recipe for a prerequisite of the included makefile that
incidentally also produces the included makefile,
0 as the included makefile is finally found make does not fail... but it does
not read the included makefile.

This could be considered as contradictory with the documentation:

_After all makefiles have been checked, if any have actually been changed,
make starts with a clean slate and reads all the makefiles over again._

make should either fail or include the included makefile.




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