Re: [casper] How to use the qdr_transpose and qdr_ct blocks?
Hi Chenwei, I'll fix the verilog anyway to get rid of that erro, but I think you'll find that if you use 14.7 the error will go away. In any case, 14.7 is the last version of ISE that Xilinx will release, so it's the one we're going to target in our libraries - it might be a good idea to upgrade your toolflow for this reason alone. Cheers, Jack On Fri, 5 Jun 2015 at 12:57 Chenwei Cai wrote: > Hi Jack, > > I am using Xilinx 14.5. > > On Fri, Jun 5, 2015 at 4:55 PM, Jack Hickish > wrote: > >> Hi Chenwei, >> >> What version of the Xilinx tools are you using? >> I think this is easy to fix, but I'm surprised I didn't see this error >> when I compiled my test models. >> >> Cheers, >> Jack >> >> On Fri, 5 Jun 2015 at 12:02 Chenwei Cai wrote: >> >>> Thanks Jack, >>> >>> The qdr_transpose seems to work appropriately now. And I am now using >>> the qdr_transpose block to construct my model which will be executed with >>> ROACH II, as you can check out in the following url: >>> https://www.dropbox.com/s/1wcz0lhmjgcuwua/Screenshot%20from%202015-06-05%2015%3A35%3A44.png?dl=0. >>> The library I am using is the one Jack merged last week ( >>> http://www.mail-archive.com/casper@lists.berkeley.edu/msg05947.html). >>> >>> The compile goes smoothly, only to find an error at the last of compile. >>> See the log below, which records the last part of compile. >>> >>> Running DRC. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<81>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<83>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<113>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<61>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<63>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<17>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/fifo_din_buf1<31>> is incomplete. The signal does not drive any >>> load pins >>>in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMA_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMB_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMD_D1_O> is incomplete. >>> The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMC_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMD_D1_O> is incomplete. >>> The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMB_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMC_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMD_D1_O> is incomplete. >>> The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMC_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMD_D1_O> is incomplete. >>> The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMA_D1_DPO> is >>> incomplete. The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:367 - The signal >>> >>> >>> >>g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMD_D1_O> is incomplete. >>> The >>>signal does not drive any load pins in the design. >>> WARNING:PhysDesignRules:36
Re: [casper] How to use the qdr_transpose and qdr_ct blocks?
Hi Jack, I am using Xilinx 14.5. On Fri, Jun 5, 2015 at 4:55 PM, Jack Hickish wrote: > Hi Chenwei, > > What version of the Xilinx tools are you using? > I think this is easy to fix, but I'm surprised I didn't see this error > when I compiled my test models. > > Cheers, > Jack > > On Fri, 5 Jun 2015 at 12:02 Chenwei Cai wrote: > >> Thanks Jack, >> >> The qdr_transpose seems to work appropriately now. And I am now using the >> qdr_transpose block to construct my model which will be executed with ROACH >> II, as you can check out in the following url: >> https://www.dropbox.com/s/1wcz0lhmjgcuwua/Screenshot%20from%202015-06-05%2015%3A35%3A44.png?dl=0. >> The library I am using is the one Jack merged last week ( >> http://www.mail-archive.com/casper@lists.berkeley.edu/msg05947.html). >> >> The compile goes smoothly, only to find an error at the last of compile. >> See the log below, which records the last part of compile. >> >> Running DRC. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<81>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<83>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<113>> is incomplete. The signal does not drive any >> load pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<61>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<63>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<17>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/fifo_din_buf1<31>> is incomplete. The signal does not drive any load >> pins >>in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMA_D1_DPO> is >> incomplete. The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMB_D1_DPO> is >> incomplete. The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMC_D1_DPO> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMB_D1_DPO> is >> incomplete. The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMC_D1_DPO> is >> incomplete. The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMC_D1_DPO> is >> incomplete. The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMA_D1_DPO> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM18_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM12_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDesignRules:367 - The signal >> >> >> >g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM17_RAMD_D1_O> is incomplete. >> The >>signal does not drive any load pins in the design. >> WARNING:PhysDes
Re: [casper] How to use the qdr_transpose and qdr_ct blocks?
Hi Chenwei, What version of the Xilinx tools are you using? I think this is easy to fix, but I'm surprised I didn't see this error when I compiled my test models. Cheers, Jack On Fri, 5 Jun 2015 at 12:02 Chenwei Cai wrote: > Thanks Jack, > > The qdr_transpose seems to work appropriately now. And I am now using the > qdr_transpose block to construct my model which will be executed with ROACH > II, as you can check out in the following url: > https://www.dropbox.com/s/1wcz0lhmjgcuwua/Screenshot%20from%202015-06-05%2015%3A35%3A44.png?dl=0. > The library I am using is the one Jack merged last week ( > http://www.mail-archive.com/casper@lists.berkeley.edu/msg05947.html). > > The compile goes smoothly, only to find an error at the last of compile. > See the log below, which records the last part of compile. > > Running DRC. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<81>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<83>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<113>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<61>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<63>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<17>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/fifo_din_buf1<31>> is incomplete. The signal does not drive any load > pins >in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMA_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMB_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMC_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_RAMD_D1_O> is incomplete. The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMB_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMC_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMC_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMA_D1_DPO> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_RAMD_D1_O> is incomplete. The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM18_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM12_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM17_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM13_RAMD_D1_O> is incomplete. > The >signal does not drive any load pins in the design. > WARNING:PhysDesignRules:367 - The signal > > g/FIFO/BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM7_RAMD_D1_O> is incomplete. The >signal does not drive any load pins in the design.
Re: [casper] How to use the qdr_transpose and qdr_ct blocks?
Thanks Jack, The qdr_transpose seems to work appropriately now. And I am now using the qdr_transpose block to construct my model which will be executed with ROACH II, as you can check out in the following url: https://www.dropbox.com/s/1wcz0lhmjgcuwua/Screenshot%20from%202015-06-05%2015%3A35%3A44.png?dl=0. The library I am using is the one Jack merged last week ( http://www.mail-archive.com/casper@lists.berkeley.edu/msg05947.html). The compile goes smoothly, only to find an error at the last of compile. See the log below, which records the last part of compile. Running DRC. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal > is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DDR and the Q2 output pin of IFF is not used. WARNING:PhysDesignRules:1441 - Issue with pin connections and/or configuration on block:>:. The IFFTYPE is DD
