Re: Logic Analysers

[dwight]

Remember what both Tony and I said earlier. You have to know

what is suppose to be happening. Just probing around, looking

for something funny looking is not usually very fruitful.

You really need to spend some time looking at data sheets.

Dwight



From: dwight 
Sent: Friday, February 3, 2017 9:40:48 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers


All the glitches are at the beginning of the ALE. There is nothing

there that has any meaning. Things are changing at this time. Not

every thing changes at the same rate. That is why they have an

ALE to mark when the address is good. When high, the circuit address

latch is open. When ALE goes low, it captures the address.

You really should be looking at the processor timing diagram and

understand what you are looking at.

Technically a glitch at the beginning of the ALE can last until

some nanoseconds before the falling edge and the circuit would

work fine. These glitches are much shorter than the ALE and

clearly not an issue.

Dwight



From: cctalk  on behalf of Jon Elson 

Sent: Friday, February 3, 2017 6:36:27 PM
To: gene...@classiccmp.org; Discussion@
Subject: Re: Logic Analysers

On 02/03/2017 04:34 PM, Adrian Graham wrote:
> On 03/02/2017 19:43, "Tony Duell"  wrote:
>
>> But that's why I said 'about'. I am doing order-of-magnitude calculations,
>> not trying to design a delay line. I would estimate that between adjacent
>> ICs on the same board you'd get a delay measured in 10's or 100's of
>> picoseconds. That sort of order. So a 25MHz logic analyser, with an
>> effective time resolution of 40ns (if that) is not going to show it.
>>
>> There is no way you're going to get delays of 40ns between adjacent
>> ICs on any reasonable PCB.
> This is the sort of thing I mean:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
>
> Watching the A1 address line (no triggers just sampling 6 points) and a
> pulse appears at ROM4 on the falling edge of the ALE signal but not the
> other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
> 8085. While I was thinking about the possibility of propagation delay I
> noticed this one:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
>
> Pulse missing from ROM3.
First pic, pulses are missing from ROMs 1-3, seen on ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches.  Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like.  The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period).  You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer.  So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch.  Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches.  I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this.  Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.

Jon

Re: Logic Analysers

[dwight]

All the glitches are at the beginning of the ALE. There is nothing

there that has any meaning. Things are changing at this time. Not

every thing changes at the same rate. That is why they have an

ALE to mark when the address is good. When high, the circuit address

latch is open. When ALE goes low, it captures the address.

You really should be looking at the processor timing diagram and

understand what you are looking at.

Technically a glitch at the beginning of the ALE can last until

some nanoseconds before the falling edge and the circuit would

work fine. These glitches are much shorter than the ALE and

clearly not an issue.

Dwight



From: cctalk  on behalf of Jon Elson 

Sent: Friday, February 3, 2017 6:36:27 PM
To: gene...@classiccmp.org; Discussion@
Subject: Re: Logic Analysers

On 02/03/2017 04:34 PM, Adrian Graham wrote:
> On 03/02/2017 19:43, "Tony Duell"  wrote:
>
>> But that's why I said 'about'. I am doing order-of-magnitude calculations,
>> not trying to design a delay line. I would estimate that between adjacent
>> ICs on the same board you'd get a delay measured in 10's or 100's of
>> picoseconds. That sort of order. So a 25MHz logic analyser, with an
>> effective time resolution of 40ns (if that) is not going to show it.
>>
>> There is no way you're going to get delays of 40ns between adjacent
>> ICs on any reasonable PCB.
> This is the sort of thing I mean:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
>
> Watching the A1 address line (no triggers just sampling 6 points) and a
> pulse appears at ROM4 on the falling edge of the ALE signal but not the
> other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
> 8085. While I was thinking about the possibility of propagation delay I
> noticed this one:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
>
> Pulse missing from ROM3.
First pic, pulses are missing from ROMs 1-3, seen on ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches.  Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like.  The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period).  You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer.  So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch.  Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches.  I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this.  Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.

Jon

11/44, parts, 11/24, DZ11

[Paul Anderson]

I have at least one 11/44 for sale, at least one 11/24 for sale. I can
configure them as needed within reason.  They can be packed and shipped as
freight carrier of your choice or pickup in IL. or IN. Please contact me
off list.

Also the following parts:

M7090
M7094
M7095
M7096
M7097
M7098

$300/SET (several available)

70-15672 backplane  $70

M7093  FP11-A  make offer

M7819 DZ11 board only $50

Any quantity boards ship for $10 within US.

Thanks, Paul

Re: Logic Analysers

[Jon Elson]

On 02/03/2017 04:34 PM, Adrian Graham wrote:

On 03/02/2017 19:43, "Tony Duell"  wrote:


But that's why I said 'about'. I am doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.

There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.

This is the sort of thing I mean:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg

Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg

Pulse missing from ROM3.
First pic, pulses are missing from ROMs 1-3, seen on ROM4.  
But, those pulses on ROM4 are really narrow, and may be 
noise, or very narrow glitches.  Any time you see really 
narrow glitches, especially when they are one LA sample 
wide, you have no idea what they actually look like.  The LA 
detects that the pulse was there at the instant it sampled 
it, but you don't know whether it was 5 ns wide, or 70 ns 
wide (with a 40 ns sampling period).  You also don't know 
whether they were full-amplitude pulses or runts that just 
barely crossed the logic threshold of the analyzer.  So, I'm 
not sure what you've shown there actually represents a 
problem or not. Especially on the 2nd picture, the pulses 
you have highlighted really look like a single sample wide, 
and if the logic levels of the analyzer are not exactly the 
same, or other slight deviation, it could have missed a 
narrow glitch.  Anyway, on old 8-bit micro gear, there may 
be plenty of narrow glitches in the 40 ns range, but the 
operation of the chips is most likely NOT going to depend on 
the circuits responding to such glitches.  I think you are 
chasing your tail about these things, and missing a real 
malfunction that is not related to this.  Could be EPROM 
bits that have faded, one shot capacitors that have changed 
value or something.


Jon

Re: Logic Analysers

[Jon Elson]

On 02/03/2017 01:35 PM, Mouse wrote:

the propagation delay as the signal gets to each pin (remember a
foot is about a nanosecond.  [...])

Not really.  A foot is about a light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.

Well, actually, it depends on the impedance.  So, 50 Ohm 
coax cable is .6 C, twisted pair differential cable is 120 
Ohms, and the propagation velocity is a little above .7 I 
think.  Wires in open space are faster, around .8 or so, but 
the signal quality may be poor.


Jon

Re: Logic Analysers

[Chuck Guzis]

On 02/03/2017 04:10 PM, dwight wrote:
> I'm not sure you want to hide glitches. There are times
> 
> when you might want to see them.
> 
> It is more about knowing when a glitch has meaning and when it
> doesn't.

Indeed.  That's one of the the things that impressed me about the early
HP 1615 logic analyzer--it had a glitch detector.  Glitches can be
maddeningly difficult to find using traditional (i.e. 'scope) methods.

--Chuck

Re: Logic Analysers

[dwight]

I'm not sure you want to hide glitches. There are times

when you might want to see them.

It is more about knowing when a glitch has meaning and when it doesn't.

Dwight



From: cctalk  on behalf of Adrian Graham 

Sent: Friday, February 3, 2017 3:46:32 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers

On 03/02/2017 23:29, "dwight"  wrote:

> Adrian
>
>  What you see on the other select line is what is called a glitch.
>
> These are not that uncommon during the early part of the address.
>
> What is important is that there are no glitchs when ALE transitions.

Ah, ok, there's a glitch filter that I can apply to each channel, I'll
explore that.

Cheers!



> 
> From: cctalk  on behalf of Adrian Graham
> 
> Sent: Friday, February 3, 2017 2:34:18 PM
> To: General Discussion: On-Topic and Off-Topic Posts
> Subject: Re: Logic Analysers
>
> On 03/02/2017 19:43, "Tony Duell"  wrote:
>
>> But that's why I said 'about'. I am doing order-of-magnitude calculations,
>> not trying to design a delay line. I would estimate that between adjacent
>> ICs on the same board you'd get a delay measured in 10's or 100's of
>> picoseconds. That sort of order. So a 25MHz logic analyser, with an
>> effective time resolution of 40ns (if that) is not going to show it.
>>
>> There is no way you're going to get delays of 40ns between adjacent
>> ICs on any reasonable PCB.
>
> This is the sort of thing I mean:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
>
> Watching the A1 address line (no triggers just sampling 6 points) and a
> pulse appears at ROM4 on the falling edge of the ALE signal but not the
> other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
> 8085. While I was thinking about the possibility of propagation delay I
> noticed this one:
>
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
>
> Pulse missing from ROM3.
>
> Given the paths on this board aren't massive and resistance is equal between
> all points when measured with a DMM (and all sockets have been replaced,
> traces checked etc) what else could I be looking at?
>
> --
> Adrian/Witchy
> Binary Dinosaurs creator/curator
> Www.binarydinosaurs.co.uk - the UK's biggest private home computer
> collection?
>
>

--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: RL02 version of UNIX6?

[Ethan Dicks]

On Fri, Feb 3, 2017 at 4:17 PM, Paul Koning  wrote:
> Not necessarily MUL, in a kernel, but definitely SOB.

I've run into needing SOB just between the PDP-11/04 and PDP11/34.

-ethan

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Ian S. King]

On Fri, Feb 3, 2017 at 5:55 AM, geneb  wrote:

> On Thu, 2 Feb 2017, Ian S. King wrote:
>
> On Thu, Feb 2, 2017 at 4:24 PM, geneb  wrote:
>>
>> On Thu, 2 Feb 2017, Ian Finder wrote:
>>>
>>> WTF did I just read.
>>>

 Fred in absolutely rare form.  I nearly choked on coffee at the
 "yodeling

>>> jellyfish" bit. I'd give him fake internet points if I could. :)
>>>
>>> Also, QUIT TOP POSTING.
>>>
>>> Be gentle, Gene.  Ian works for the Evil Ex-Empire and is required as a
>>>
>> term of his indenture to use Outhouse-look, part of the Microsoft Orifice
>> suite of floating turds.  Even if you set it to do the right thing, it
>> will
>> randomly choose to once again do the Microsoft Thing.
>>
>
> Sounds like an Intervention may be required. :)
>
> g


I keep telling him he should come work on spaceships with me.

-- 
Ian S. King, MSIS, MSCS, Ph.D. Candidate
The Information School 
Dissertation: "Why the Conversation Mattered: Constructing a Sociotechnical
Narrative Through a Design Lens

Archivist, Voices From the Rwanda Tribunal 
Value Sensitive Design Research Lab 

University of Washington

There is an old Vulcan saying: "Only Nixon could go to China."

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 23:29, "dwight"  wrote:

> Adrian
> 
>  What you see on the other select line is what is called a glitch.
> 
> These are not that uncommon during the early part of the address.
> 
> What is important is that there are no glitchs when ALE transitions.

Ah, ok, there's a glitch filter that I can apply to each channel, I'll
explore that.

Cheers!



> 
> From: cctalk  on behalf of Adrian Graham
> 
> Sent: Friday, February 3, 2017 2:34:18 PM
> To: General Discussion: On-Topic and Off-Topic Posts
> Subject: Re: Logic Analysers
> 
> On 03/02/2017 19:43, "Tony Duell"  wrote:
> 
>> But that's why I said 'about'. I am doing order-of-magnitude calculations,
>> not trying to design a delay line. I would estimate that between adjacent
>> ICs on the same board you'd get a delay measured in 10's or 100's of
>> picoseconds. That sort of order. So a 25MHz logic analyser, with an
>> effective time resolution of 40ns (if that) is not going to show it.
>> 
>> There is no way you're going to get delays of 40ns between adjacent
>> ICs on any reasonable PCB.
> 
> This is the sort of thing I mean:
> 
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
> 
> Watching the A1 address line (no triggers just sampling 6 points) and a
> pulse appears at ROM4 on the falling edge of the ALE signal but not the
> other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
> 8085. While I was thinking about the possibility of propagation delay I
> noticed this one:
> 
> http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
> 
> Pulse missing from ROM3.
> 
> Given the paths on this board aren't massive and resistance is equal between
> all points when measured with a DMM (and all sockets have been replaced,
> traces checked etc) what else could I be looking at?
> 
> --
> Adrian/Witchy
> Binary Dinosaurs creator/curator
> Www.binarydinosaurs.co.uk - the UK's biggest private home computer
> collection?
> 
> 

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Alexander Schreiber]

On Fri, Feb 03, 2017 at 07:28:21PM +0100, Liam Proven wrote:
> On 2 February 2017 at 23:21, Fred Cisin  wrote:
> > Frankly, it SCARES me that that wasn't absurd enough!
> 
> 
> A friend of mine, Charlie Stross, recently had to rewrite the outline
> of a novel because his bleak dystopian vision of the near-future "free
> world" wasn't _nearly_ bleak enough and the actual world has turned a
> lot worse.

That was after Brexit and his response was basically "WTF just happened?"
 
> After his hasty rewrite, it's gone nastier again. His novel will now
> seem like a cheerful upbeat alternate timeline instead.

And I guess this was after Trump, same response.

I guess these days it is hard to write dystopian fiction since reality
is hell bent to out do your darkest nightmares.

Kind regards,
Alex.
-- 
"Opportunity is missed by most people because it is dressed in overalls and
 looks like work."  -- Thomas A. Edison

Re: Logic Analysers

[dwight]

Adrian

 What you see on the other select line is what is called a glitch.

These are not that uncommon during the early part of the address.

What is important is that there are no glitchs when ALE transitions.

Dwight



From: cctalk  on behalf of Adrian Graham 

Sent: Friday, February 3, 2017 2:34:18 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers

On 03/02/2017 19:43, "Tony Duell"  wrote:

> But that's why I said 'about'. I am doing order-of-magnitude calculations,
> not trying to design a delay line. I would estimate that between adjacent
> ICs on the same board you'd get a delay measured in 10's or 100's of
> picoseconds. That sort of order. So a 25MHz logic analyser, with an
> effective time resolution of 40ns (if that) is not going to show it.
>
> There is no way you're going to get delays of 40ns between adjacent
> ICs on any reasonable PCB.

This is the sort of thing I mean:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg

Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg

Pulse missing from ROM3.

Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?

--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 19:43, "Tony Duell"  wrote:

> But that's why I said 'about'. I am doing order-of-magnitude calculations,
> not trying to design a delay line. I would estimate that between adjacent
> ICs on the same board you'd get a delay measured in 10's or 100's of
> picoseconds. That sort of order. So a 25MHz logic analyser, with an
> effective time resolution of 40ns (if that) is not going to show it.
> 
> There is no way you're going to get delays of 40ns between adjacent
> ICs on any reasonable PCB.

This is the sort of thing I mean:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg

Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:

http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg

Pulse missing from ROM3.

Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: RL02 version of UNIX6?

[Eric Smith]

On Fri, Feb 3, 2017 at 2:35 PM, Paul Koning  wrote:

> I saw that stated earlier, too, but DEC's PDP11 architecture handbook
> doesn't appear to confirm that.  Either that or the model differences table
> is sloppy.
>

The model differences table is definitely sloppy.  There are discrepancies
between versions of that table in the various processor handbooks, also.

RE: Logic Analysers

[Rob Jarratt]

> 3) An HP1630. I forget which one, probably a 1630G. It does all I want. I was
> also AFAIK the last HP LA to have a proper component-level service manual.
> It's also a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT
> is scanned vertically, I have no idea why.
> 


Hello Tony,

I bought a 1630G a while back. It came with pods, but didn't have the leads 
that plug into the pods. I am sure I could make something (in fact I intend to 
try it out this weekend if my cold doesn't get the better of me), but if you 
have any information on what to search for (model/part number) or know where I 
might buy some that would be really useful.

Regards

Rob

Re: RL02 version of UNIX6?

[Noel Chiappa]

> From: William Degnan

> I was able to get the extended three cables

Excellent!

> I can put the M7238 EIS card on a riser so I can probe for faults

I'm all agog to hear what you find out!

> and maybe if I am lucky boot XXDP+. With the EIN installed I can't boot

I thought the machine basically just totally froze if you tried inserting the
KE11-E, and removing the jumper to enable it? Oh well, that severe a fault
should be fairly easy (sic) to track down.


> From: Paul Koning

> DEC's PDP11 architecture handbook doesn't appear to confirm that.
> Either that or the model differences table is sloppy.

The next page (B-4) says "The KE11-E .. provides MUL " and has an
"x" under "35/40".

Noel

Re: Logic Analysers

[Paul Berger]

On 2017-02-03 5:05 PM, Adrian Graham wrote:

On 03/02/2017 20:38, "Paul Berger"  wrote:


As I have said before, the most important piece of test gear is a
brain.

-tony

...And if you don't have a schematic, you ring out the connections and
draw your own...

I'm not yet skilled enough to draw a schematic but I've drawn out a complete
layout of the board with all chips and traces in an open source design
package called Fritzing. Certainly a big help with wiring up the analyser.
These drawings are the only docs I have however... One thing I'd REALLY like
is a memory map but maybe the original designer of this machine will come up
trumps soon.

Well if that does not work out the approach I would take is work 
backwards from the chip select on the memory and I/O devices, things 
that may throw you off are if PLDs or ROMs are used as part of the 
logic.  Chip select logic is usually pretty straight forward.  As has 
been discussed before I/O on a 8085 may be in a seperate address space 
of might mapped into the I/O space.  IO/-M selects between the two 
address spaces.


Paul.

Re: RL02 version of UNIX6?

[Paul Koning]

> On Feb 3, 2017, at 4:28 PM, Josh Dersch  wrote:
> 
> On Fri, Feb 3, 2017 at 1:17 PM, Paul Koning  wrote:
> 
>> ...
>> What I meant is that the 11/40 has EIS standard, according to the PDP11
>> architecture handbook.  So an OS that depends on MMU would be designed for
>> 11/40, 11/45, etc. all of which have EIS.  And since EIS instructions are
>> quite helpful they will be used.  Not necessarily MUL, in a kernel, but
>> definitely SOB.
>> 
> 
> EIS was an option on the 11/40, it was not standard.
> https://pdos.csail.mit.edu/6.828/2005/readings/pdp11-40.pdf, section 2.4.

I saw that stated earlier, too, but DEC's PDP11 architecture handbook doesn't 
appear to confirm that.  Either that or the model differences table is sloppy.

paul

Re: Logic Analysers

[Paul Berger]

On 2017-02-03 4:41 PM, Tony Duell wrote:

...And if you don't have a schematic, you ring out the connections and draw
your own...

Given the number of times I've done that, I half-feel like mentioning
a grandmother
and sucking eggs ;-)

More seriously, to draw out a useful schematic -- not just one that
shows what is
connected to what, but also groups related sections together, also
requres a good
understanding of the device, of what is likely to be going on, etc. In
other words that
brain comes in handy...

-tony
Without a doubt the brain is the most important tool. in my day job 
of providing advise on fixing equipment, not component level mind you, 
you quickly learn who is equipped with this tool and who is not.


Paul.

Re: RL02 version of UNIX6?

[Josh Dersch]

On Fri, Feb 3, 2017 at 1:17 PM, Paul Koning  wrote:

>
> > On Feb 3, 2017, at 4:07 PM, Josh Dersch  wrote:
> >
> > On Fri, Feb 3, 2017 at 12:31 PM, Paul Koning 
> wrote:
> >
> >>
> >>
> >>
> >> I'm not sure there is one.  DEC OS designers typically would assume that
> >> they are dealing with non-broken systems.  Systems with MMU all have
> EIS...
> >>
> >
> > Is this actually true?  I've been working on getting my PDP-11/40 running
> > recently, and I don't recall anything in the documentation indicating
> that
> > an EIS was required if you had an MMU installed.
>
> What I meant is that the 11/40 has EIS standard, according to the PDP11
> architecture handbook.  So an OS that depends on MMU would be designed for
> 11/40, 11/45, etc. all of which have EIS.  And since EIS instructions are
> quite helpful they will be used.  Not necessarily MUL, in a kernel, but
> definitely SOB.
>

EIS was an option on the 11/40, it was not standard.
https://pdos.csail.mit.edu/6.828/2005/readings/pdp11-40.pdf, section 2.4.

- Josh



>
> paul
>
>
>

Re: RL02 version of UNIX6?

[Paul Koning]

> On Feb 3, 2017, at 4:07 PM, Josh Dersch  wrote:
> 
> On Fri, Feb 3, 2017 at 12:31 PM, Paul Koning  wrote:
> 
>> 
>> 
>> 
>> I'm not sure there is one.  DEC OS designers typically would assume that
>> they are dealing with non-broken systems.  Systems with MMU all have EIS...
>> 
> 
> Is this actually true?  I've been working on getting my PDP-11/40 running
> recently, and I don't recall anything in the documentation indicating that
> an EIS was required if you had an MMU installed.  

What I meant is that the 11/40 has EIS standard, according to the PDP11 
architecture handbook.  So an OS that depends on MMU would be designed for 
11/40, 11/45, etc. all of which have EIS.  And since EIS instructions are quite 
helpful they will be used.  Not necessarily MUL, in a kernel, but definitely 
SOB.

paul

Re: Logic Analysers

[Eric Smith]

On Fri, Feb 3, 2017 at 2:00 PM, dwight  wrote:

> I once worked with a device that came close to telling you
> that U15 was failing.
>
> It was called a signature analyzer.
> It was good as a first pass production tester.
>

It required that the device under test be put in a state where the signals
had predictable waveforms, since it basically was just computing a 16-bit
hash of samples of the waveforms, referenced to clock and start signals.
Typically the device under test would be put in a special signature test
mode to do that.


> It needed a pin bed to match the board under test.
>

For automated full-board testing, yes.  But signature testing was also used
with a probe on individual signals for field diagnostic purposes.

RE: RL02 version of UNIX6?

[Jay West]

Will wrote...
--
OK.  Hopefully I can repair my EIS board then.  Otherwise it's RT-11.
--

Don't forget the RT-11 + TSX+ option, very nice timesharing system.

http://tsxplus.classiccmp.org

Re: RL02 version of UNIX6?

[Josh Dersch]

On Fri, Feb 3, 2017 at 12:31 PM, Paul Koning  wrote:

>
>
>
> I'm not sure there is one.  DEC OS designers typically would assume that
> they are dealing with non-broken systems.  Systems with MMU all have EIS...
>

Is this actually true?  I've been working on getting my PDP-11/40 running
recently, and I don't recall anything in the documentation indicating that
an EIS was required if you had an MMU installed.  (On the other hand, the
MMU docs indicate that the Stack Limit Register must be installed if an MMU
is present, though I haven't looked into why this is the case).  For the
record, my system currently has the MMU, but lacks an EIS (still trying to
track one down).  It may be that DEC never shipped an MMU without an EIS in
an 11/40...

- Josh

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 20:38, "Paul Berger"  wrote:

>> As I have said before, the most important piece of test gear is a
>> brain.
>> 
>> -tony
> ...And if you don't have a schematic, you ring out the connections and
> draw your own...

I'm not yet skilled enough to draw a schematic but I've drawn out a complete
layout of the board with all chips and traces in an open source design
package called Fritzing. Certainly a big help with wiring up the analyser.
These drawings are the only docs I have however... One thing I'd REALLY like
is a memory map but maybe the original designer of this machine will come up
trumps soon.

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: RL02 version of UNIX6?

[william degnan]

>
>
> >>
> >>
> > So you're saying for a system with a MMU but no working EIS (removed for
> > now) and 64KW RAM (half populated M7891) you're suggesting which OS?  I
> > still have to research the best options, RSX-11M?
>
> I'm not sure there is one.  DEC OS designers typically would assume that
> they are dealing with non-broken systems.  Systems with MMU all have EIS,
> so an OS that requires an MMU would typically take advantage of EIS
> instructions.  That's the case in RSTS/E, for example.
>
> OSs designed for non-MMU systems would also typically assume no EIS,
> because they were intended for the entire PDP-11 family including 11/20 and
> the like.
>
> In other words, if you don't have an EIS that works, you're likely to be
> limited to no-MMU systems because those are likely to be the only ones
> whose authors avoided EIS instructions.
>
> There may be some mixed cases, an OS where the same basic system can be
> built for no-MMU as well as MMU configs.  If so, there might be a way to
> build an MMU=yes, EIS=no config.  Or it may come with EIS=no by default
> because some of its configs have to handle that and it's easier to do it
> consistenly.  Possibly RSX is such an OS; I don't know.
>
> paul
>
>
>
OK.  Hopefully I can repair my EIS board then.  Otherwise it's RT-11.
b

Re: Logic Analysers

[dwight]

I once worked with a device that came close to telling you

that U15 was failing.

It was called a signature analyzer.

It was good as a first pass production tester.

It was not something I'd expect a hobbyist to use.

It needed a pin bed to match the board under test.

It wasn't good enough to catch the bypass capacitor

tied to a buss feedthru.

Dwight



From: cctalk  on behalf of Charles Anthony 

Sent: Friday, February 3, 2017 12:51:32 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers

On Fri, Feb 3, 2017 at 12:43 PM, Eric Smith  wrote:

> On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin  wrote:
>
>
> > What would the "System Requirements" be?
> > Would it also advise me that both my hardware and my OS are out-of-date,
> > and need to be upgraded?
> >
>
> I'll add that in a future upgrade (for more $).
>
> I'm also considering a space-rated version, which will be able to detect
> faults in Alpha Echo Three Five units.
>

It can only be attributable to human error.

Re: Logic Analysers

[Charles Anthony]

On Fri, Feb 3, 2017 at 12:43 PM, Eric Smith  wrote:

> On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin  wrote:
>
>
> > What would the "System Requirements" be?
> > Would it also advise me that both my hardware and my OS are out-of-date,
> > and need to be upgraded?
> >
>
> I'll add that in a future upgrade (for more $).
>
> I'm also considering a space-rated version, which will be able to detect
> faults in Alpha Echo Three Five units.
>

It can only be attributable to human error.

Re: Logic Analysers

[Eric Smith]

On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin  wrote:

> On Fri, 3 Feb 2017, Eric Smith wrote:
>
>> Hmmm...
>> I think I'll make a box that you plug into a computer and it tells you 'U5
>> is faulty'.
>> It won't be magic, though...
>> :-)
>>
>
> Other than plugging in to the computer (USB?), the rest of it could
> probably be done in software.
>

I'd prefer having a physical piece of hardware. That way I feel like I've
gotten something for my money.


> What would the "System Requirements" be?
> Would it also advise me that both my hardware and my OS are out-of-date,
> and need to be upgraded?
>

I'll add that in a future upgrade (for more $).

I'm also considering a space-rated version, which will be able to detect
faults in Alpha Echo Three Five units.

Re: Logic Analysers

[Tony Duell]

>
> ...And if you don't have a schematic, you ring out the connections and draw
> your own...

Given the number of times I've done that, I half-feel like mentioning
a grandmother
and sucking eggs ;-)

More seriously, to draw out a useful schematic -- not just one that
shows what is
connected to what, but also groups related sections together, also
requres a good
understanding of the device, of what is likely to be going on, etc. In
other words that
brain comes in handy...

-tony

Re: Logic Analysers

[Paul Berger]

On 2017-02-03 3:47 PM, Tony Duell wrote:

On Fri, Feb 3, 2017 at 7:04 PM, dwight  wrote:

I think Tony's statement about the key thing to know about

trouble shouting is to know what it should be doing.

If you don't know that, no scope or logic analyzer with help much.

Yes. I once explained faultfinding in this way. The technical manual,
schematics, microcode listings, etc should tell you what the device
should be doing. The instruments tell you what it is doing, you need
test instruments becuase you can't directly 'see' electrical signals.
You then have to compare the two and work out what could cause
the problem.

There is no magic box that you plug into a computer and it tells
you 'U5 is faulty'. At least not in general.

As I have said before, the most important piece of test gear is a
brain.

-tony
...And if you don't have a schematic, you ring out the connections and 
draw your own...


Paul.

Re: RL02 version of UNIX6?

[Paul Koning]

> On Feb 3, 2017, at 3:25 PM, william degnan  wrote:
> 
> On Fri, Feb 3, 2017 at 2:31 PM, Paul Koning  wrote:
> 
>> 
>>> On Feb 3, 2017, at 12:00 PM, Noel Chiappa 
>> wrote:
>>> 
 From: Paul Koning
>>> 
 Another OS that would run on your machine (as well as an 11/20) would
 be RSTS-11 (V4, or I suppose V3 if you can find that)
>>> 
>>> I'd love to have an old RSTS-11, is there any variant around?
>> 
>> Yes, on bitsavers.  But John's comment reminds me that RSTS-11 V4A doesn't
>> support RL02.  (Only RF11, RK11, RP11.)  V4B may be different, I don't know.
>> 
 didn't use the MMU
>>> 
>>> Huh? He's got an MMU (I think): it's the EIS he's currently struggling
>> with.
>> 
>> True.  I meant to point out the main difference between RSTS-11 and
>> RSTS/E.  The other difference is that it doesn't require EIS.  Both follow
>> from the fact it was designed for the 11/20.
>> 
>>paul
>> 
>> 
> So you're saying for a system with a MMU but no working EIS (removed for
> now) and 64KW RAM (half populated M7891) you're suggesting which OS?  I
> still have to research the best options, RSX-11M?

I'm not sure there is one.  DEC OS designers typically would assume that they 
are dealing with non-broken systems.  Systems with MMU all have EIS, so an OS 
that requires an MMU would typically take advantage of EIS instructions.  
That's the case in RSTS/E, for example.

OSs designed for non-MMU systems would also typically assume no EIS, because 
they were intended for the entire PDP-11 family including 11/20 and the like.

In other words, if you don't have an EIS that works, you're likely to be 
limited to no-MMU systems because those are likely to be the only ones whose 
authors avoided EIS instructions.

There may be some mixed cases, an OS where the same basic system can be built 
for no-MMU as well as MMU configs.  If so, there might be a way to build an 
MMU=yes, EIS=no config.  Or it may come with EIS=no by default because some of 
its configs have to handle that and it's easier to do it consistenly.  Possibly 
RSX is such an OS; I don't know.  

paul

Re: RL02 version of UNIX6?

[william degnan]

>
>
>
> I was able to get the extended three cables so I can put the M7238 EIS
> card on a riser so I can probe for faults, and maybe if I am lucky boot
> XXDP+.  With the EIN installed I can't boot RT-11
>
> I mean EIS, not EIN.

Re: Logic Analysers

[Fred Cisin]

On Fri, 3 Feb 2017, Eric Smith wrote:

Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)


Other than plugging in to the computer (USB?), the rest of it could 
probably be done in software.



What would the "System Requirements" be?
Would it also advise me that both my hardware and my OS are out-of-date, 
and need to be upgraded?


--
Grumpy Ol' Fred ci...@xenosoft.com

Re: RL02 version of UNIX6?

[william degnan]

On Fri, Feb 3, 2017 at 2:31 PM, Paul Koning  wrote:

>
> > On Feb 3, 2017, at 12:00 PM, Noel Chiappa 
> wrote:
> >
> >> From: Paul Koning
> >
> >> Another OS that would run on your machine (as well as an 11/20) would
> >> be RSTS-11 (V4, or I suppose V3 if you can find that)
> >
> > I'd love to have an old RSTS-11, is there any variant around?
>
> Yes, on bitsavers.  But John's comment reminds me that RSTS-11 V4A doesn't
> support RL02.  (Only RF11, RK11, RP11.)  V4B may be different, I don't know.
>
> >> didn't use the MMU
> >
> > Huh? He's got an MMU (I think): it's the EIS he's currently struggling
> with.
>
> True.  I meant to point out the main difference between RSTS-11 and
> RSTS/E.  The other difference is that it doesn't require EIS.  Both follow
> from the fact it was designed for the 11/20.
>
> paul
>
>
So you're saying for a system with a MMU but no working EIS (removed for
now) and 64KW RAM (half populated M7891) you're suggesting which OS?  I
still have to research the best options, RSX-11M?

I was able to get the extended three cables so I can put the M7238 EIS card
on a riser so I can probe for faults, and maybe if I am lucky boot XXDP+.
With the EIN installed I can't boot RT-11

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 8:08 PM, jim stephens  wrote:
>
>
> On 2/3/2017 11:58 AM, Eric Smith wrote:
>>
>> On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell  wrote:
>>
>>> There is no magic box that you plug into a computer and it tells
>>> you 'U5 is faulty'. At least not in general.
>>>
>> Hmmm...
>>
>> I think I'll make a box that you plug into a computer and it tells you 'U5
>> is faulty'.
>>
>> It won't be magic, though...
>> :-)
>
> One of those round ones with an 8 on top with a clear window on the bottom
> to tell you the fault?  Those work very well.

I am not sure those are common this side of the Pond. I assume it's some
kind of fortune telling device that perhaps contains a polyhedron with
a different
fortune on each face or something?

-tony

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 7:58 PM, Eric Smith  wrote:
> On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell  wrote:
>
>> There is no magic box that you plug into a computer and it tells
>> you 'U5 is faulty'. At least not in general.
>>
>
> Hmmm...
>
> I think I'll make a box that you plug into a computer and it tells you 'U5
> is faulty'.
>
> It won't be magic, though...
> :-)

Yes, OK, I am sure the HP calculator sitting alongside me could be
programmed to display that message :-). It won't help in actually finding
which IC _is_ faulty though.

-tony

Re: Logic Analysers

[jim stephens]

On 2/3/2017 11:58 AM, Eric Smith wrote:

On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell  wrote:


There is no magic box that you plug into a computer and it tells
you 'U5 is faulty'. At least not in general.


Hmmm...

I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.

It won't be magic, though...
:-)
One of those round ones with an 8 on top with a clear window on the 
bottom to tell you the fault?  Those work very well.


Thanks
Jim

Re: Logic Analysers

[Eric Smith]

On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell  wrote:

> There is no magic box that you plug into a computer and it tells
> you 'U5 is faulty'. At least not in general.
>

Hmmm...

I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.

It won't be magic, though...
:-)

Re: Logic Analysers

[Paul Koning]

> On Feb 3, 2017, at 2:43 PM, Tony Duell  wrote:
> 
> On Fri, Feb 3, 2017 at 7:35 PM, Mouse  wrote:
 the propagation delay as the signal gets to each pin (remember a
 foot is about a nanosecond.  [...])
>> 
>> Not really.  A foot is about a light-nanosecond, yes, but
>> high-frequency signals in copper travel by skin effect, moving
>> significantly more slowly - somewhere around .6c, I think it is.
> 
> It's not really the skin effect that matters here. It's the dielectric
> medium that surrounds the conductors that effectively slows the
> fields down.

Yes.  Consider open wire transmission line, which has a velocity factor around 
98%.  Or air dielectric coax, similarly high value.  The smaller numbers. like 
66%, are found in traditional solid-dielectric (not foam) coax cable.

paul

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 7:04 PM, dwight  wrote:
> I think Tony's statement about the key thing to know about
>
> trouble shouting is to know what it should be doing.
>
> If you don't know that, no scope or logic analyzer with help much.

Yes. I once explained faultfinding in this way. The technical manual,
schematics, microcode listings, etc should tell you what the device
should be doing. The instruments tell you what it is doing, you need
test instruments becuase you can't directly 'see' electrical signals.
You then have to compare the two and work out what could cause
the problem.

There is no magic box that you plug into a computer and it tells
you 'U5 is faulty'. At least not in general.

As I have said before, the most important piece of test gear is a
brain.

-tony

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 7:35 PM, Mouse  wrote:
>>> the propagation delay as the signal gets to each pin (remember a
>>> foot is about a nanosecond.  [...])
>
> Not really.  A foot is about a light-nanosecond, yes, but
> high-frequency signals in copper travel by skin effect, moving
> significantly more slowly - somewhere around .6c, I think it is.

It's not really the skin effect that matters here. It's the dielectric
medium that surrounds the conductors that effectively slows the
fields down.

But that's why I said 'about'. I am doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.

There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.

>
> It's still on the general order of c, mind you; for the purposes of
> this discussion, c and .5c - even .1c - are much the same.

Exactly.


-tony

Re: RL02 version of UNIX6?

[Paul Koning]

> On Feb 3, 2017, at 12:00 PM, Noel Chiappa  wrote:
> 
>> From: Paul Koning
> 
>> Another OS that would run on your machine (as well as an 11/20) would
>> be RSTS-11 (V4, or I suppose V3 if you can find that)
> 
> I'd love to have an old RSTS-11, is there any variant around?

Yes, on bitsavers.  But John's comment reminds me that RSTS-11 V4A doesn't 
support RL02.  (Only RF11, RK11, RP11.)  V4B may be different, I don't know.

>> didn't use the MMU
> 
> Huh? He's got an MMU (I think): it's the EIS he's currently struggling with.

True.  I meant to point out the main difference between RSTS-11 and RSTS/E.  
The other difference is that it doesn't require EIS.  Both follow from the fact 
it was designed for the 11/20.

paul

Re: Logic Analysers

[Mouse]

>> the propagation delay as the signal gets to each pin (remember a
>> foot is about a nanosecond.  [...])

Not really.  A foot is about a light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.

It's still on the general order of c, mind you; for the purposes of
this discussion, c and .5c - even .1c - are much the same.

/~\ The ASCII Mouse
\ / Ribbon Campaign
 X  Against HTMLmo...@rodents-montreal.org
/ \ Email!   7D C8 61 52 5D E7 2D 39  4E F1 31 3E E8 B3 27 4B

Re: Logic Analysers

[dwight]

I think Tony's statement about the key thing to know about

trouble shouting is to know what it should be doing.

If you don't know that, no scope or logic analyzer with help much.

Dwight



From: cctalk  on behalf of Tony Duell 

Sent: Friday, February 3, 2017 9:06:34 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers

On Fri, Feb 3, 2017 at 4:46 PM, dwight  wrote:
> Different strokes for different folks.

Yes. It depends a lot on what you work on, what you are trying to do, and
how you think.

This is a problem with mailing lists. There are many knowledgeable people
here, but each has their own way of doing things. All are right. But a person
trying to learn is going to get conflicting advice. Not because anyone is
being unkind, but because what they say is what they do, it works for them.

There is no one 'right way' to do this. Any way that finds the problem (and
that you know has found the problem!) is OK. Any instrument is just a way
of finding out what the device under test is actually doing. Faultfinding should
then consist of comparing that to what the device should be doing and
working out what could cause the differences.

Needless to say I would not want an LA if I was repairing an SMPSU. I'd use
a 'scope. But a lot of what I work on involves investigate a processor or a
complex interface controller (possibly microcoded, so in a sense a special-
purpose processor) at gate level. Believe me, you do not want to try to
debug an HP9800 (bit serial, microcoded, downright odd in places) with
a 'scope...

-tony

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 16:41, "Jon Elson"  wrote:

> On 02/03/2017 02:55 AM, Adrian Graham wrote:
>> Ah yes, sorry, I'm aware of that. What I meant in this
>> specific case is that with 4 2764s right next to each
>> other with a direct signal path between adjacent address
>> and data pins that has a resistance of 0.5 ohms pin to pin
>> surely I should be able to put a clip on each (for
>> example) A4 address line and see the same pulse at all
>> four channels? 
> Well, if the two logic analyzers were synched together, or
> you were sampling at 100 MHz or above, then yes.

Neither of them can go that fast but I didn't think that was necessary since
the system clock on this machine is 6MHz so sampling at 25+ should be
sufficient. If I reduce the number of channels to 6 I can drive one of them
at 50MHz but that didn't seem to make a difference.

> totally regular square waves.  If not, then the LA may not
> be sampling at a regular rate, or might have gaps while
> sending data to the PC.  I'm just suspicious of these units,
> given the results you report.

So am I :) I mean, the most expensive one was ukp40 direct from China so if
it's not fully accurate I can't really be surprised. I have a Zeroplus
coming next week from another collector who used it on Apple][/PETs as well
as car ECUs with good results. In the meanwhile the external clock signal
from the 8085 on this machine is accessible in 3 locations so I'll try 3
channels and see if it's properly square.
 
> (On my $130,000 Tektronix analyzer, I don't have to worry
> about such stupid stuff, I know they got it right.  I paid
> less than $750 for it, it will do 100 MHz on 288
> synchronized channels, with a 128K record length.  But, it
> is bigger than a big kitchen microwave, and much noisier, too.)

I'm looking at a lower-end HP/Agilent for around ukp200-250 which should be
enough since I doubt I'll ever work on anything with a clock speed of more
than 8MHz.

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: Logic Analysers

[Paul Berger]

On 2017-02-03 1:23 PM, jim stephens wrote:



On 2/3/2017 9:09 AM, Paul Berger wrote:
I also have a 16700A, 16600A, and a 16500C but they are rarely if 
ever used these days.


Paul. 
the 16600A has one slot.  We had one with a scope card installed, very 
nice compact setup if the builtin channels were sufficient.

thanks
jim

Yep that is why I got it, its hard to image 192 channel +  12 clocks not 
being enough it would be better is they where deep memory like the cards 
in my 16700B but you can't have everything.  Since it is the same CPU 
card I moved the option 3 card from the 16700A into it when I took the 
16700A out of service.  I also had an extra 10?100 card from a 16700B I 
think I may have stuck it in there too.  The 10/100 card will work in an 
A but you need to remove the RJ45 connector that is on the CPU card.


Paul.

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Liam Proven]

On 3 February 2017 at 19:32, Josh Miller  wrote:
> I love this.  Mr. Stross's work is a favorite of mine.  The laundry
> files are particularly crunchy.  The Internet is awesome.


He's a superb writer. I have all of his books up to about 2012,
because he gave me copies of them last time I visited him in
Edinburgh. :-)

Before he was a professional novelist, he wrote the Linux column for
Computer Shopper UK  -- overlapping my time on the staff of PC Pro.
That's how we first met, about 20y ago...

-- 
Liam Proven • Profile: https://about.me/liamproven
Email: lpro...@cix.co.uk • Google Mail/Talk/Plus: lpro...@gmail.com
Twitter/Facebook/Flickr: lproven • Skype/LinkedIn/AIM/Yahoo: liamproven
UK: +44 7939-087884 • ČR/WhatsApp/Telegram/Signal: +420 702 829 053

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 15:27, "Tony Duell"  wrote:

> On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
>  wrote:
> 
>> Ah yes, sorry, I'm aware of that. What I meant in this specific case is that
>> with 4 2764s right next to each other with a direct signal path between
>> adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
>> surely I should be able to put a clip on each (for example) A4 address line
>> and see the same pulse at all four channels?
> 
> Yes, subject to the following unlikely cases :
> 
> 1) There is a standing wave developed between the pins. Technically that trace
> is a transmission line. I have never heard it happen between ICs next to each
> other at 8-bit micro speeds though.
> 
> 2) There is a bad connection (IC socket?) on one of the pins

That was my first thought so there's nice new turned pin sockets on there
now. I did find one connection on the data bus that was held together by
solder and luck so fixed that with a small piece of jumper wire.
 
> 3) If you have a very fast logic analyser you might be able to see the
> propagation delay as the signal gets to each pin (remember a foot is about
> a nanosecond. So you are talking 10s of picoseconds delay). You will not
> see that with the sort of analyser you or I have :-)

I wondered about that but the fastest I can go is 25Mhz, also the
missing/extra signals are across (in this case) 6 channels and don't go in
channel order, so there'll be a missing pulse on channels 1+2 or channel 4
or an extra one on 2+5 etc. I'm watching the output pins on an LS373
flip-flop (new socket+chip) and the corresponding ROMs (all new
sockets+chips) along with an LS21N in the decoding circuit.

> If you try your test with 4 of your logic analyser channels on the A4 pins of
> the EPROMs, I assume you get different traces for each channel -- that is
> what you are commenting on. What happens if you swap the logic analyser
> channels round?

I thought of that the other day, also swapped the grabber ends since they're
not the sturdiest of things. I haven't tried a PC though, my host is an
iMac.

Hopefully next week I'll have a Zeroplus to try which while still being USB
attach is 16CH+external clock and onboard RAM for storage. Could be useful.
 
> Incidentally, I'd better comment on the Logic Analysers I use. I use them
> a lot more than a 'scope, but that's because of what I generally need to do.
> 

 Ah, someone else with an HP16xx. This is making me think I should
join the club. 

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Josh Miller]

> A friend of mine, Charlie Stross

I love this.  Mr. Stross's work is a favorite of mine.  The laundry
files are particularly crunchy.  The Internet is awesome.

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Liam Proven]

On 2 February 2017 at 23:21, Fred Cisin  wrote:
> Frankly, it SCARES me that that wasn't absurd enough!


A friend of mine, Charlie Stross, recently had to rewrite the outline
of a novel because his bleak dystopian vision of the near-future "free
world" wasn't _nearly_ bleak enough and the actual world has turned a
lot worse.

After his hasty rewrite, it's gone nastier again. His novel will now
seem like a cheerful upbeat alternate timeline instead.

-- 
Liam Proven • Profile: https://about.me/liamproven
Email: lpro...@cix.co.uk • Google Mail/Talk/Plus: lpro...@gmail.com
Twitter/Facebook/Flickr: lproven • Skype/LinkedIn/AIM/Yahoo: liamproven
UK: +44 7939-087884 • ČR/WhatsApp/Telegram/Signal: +420 702 829 053

Re: RL02 version of UNIX6?

[william degnan]

On Fri, Feb 3, 2017 at 12:59 PM, william degnan 
wrote:

>
>
>
>> >
>> > Bill
>>
>> RSX-11M V3.2 supports RL02s and bitsavers has images of the 3.2 RL01
>> distribution disks. I’m not sure if those will boot if copied to an RL02.
>>
>>   John.
>>
>>
> I saw that, and was thinking the same thing
> b
>

I don't want to jumper the RL02 to think it's an RL01, but just for fun I
wonder what would happen if I used PDPGUI to build a RL02 disk from a RL01
image.  It might format a smaller amount of the disk, and if it's a
distribution disk I could create a real RL02 disk working bootable.
Nothing to lose I suppose to experiment.
b

Re: RL02 version of UNIX6?

[william degnan]

On Fri, Feb 3, 2017 at 12:37 PM, Charles Dickman  wrote:

> On Fri, Feb 3, 2017 at 11:20 AM, william degnan 
> wrote:
> > I am
> > familiar with the database of tests online that has many but no KE11-E
> > M7238 EIS Diagnostics...Sorry to have to ask, I checked what places I
> know
> > of, WWW search etc.   Can anyone suggest the name of the test so I can
> run
> > it?
> >
> Its actually a hand full of tests, one for each instruction.
>
> http://www.chdickman.com/pdp11/Notes/my_diagnostics.html
>
> > Again, thanks for your help and encouragement.
> >
> > Bill
>
> -chuck
>

thanks.  I will read up and then try these.

Re: RL02 version of UNIX6?

[william degnan]

> >
> > Bill
>
> RSX-11M V3.2 supports RL02s and bitsavers has images of the 3.2 RL01
> distribution disks. I’m not sure if those will boot if copied to an RL02.
>
>   John.
>
>
I saw that, and was thinking the same thing
b

Re: RL02 version of UNIX6?

[Charles Dickman]

On Fri, Feb 3, 2017 at 11:20 AM, william degnan  wrote:
> I am
> familiar with the database of tests online that has many but no KE11-E
> M7238 EIS Diagnostics...Sorry to have to ask, I checked what places I know
> of, WWW search etc.   Can anyone suggest the name of the test so I can run
> it?
>
Its actually a hand full of tests, one for each instruction.

http://www.chdickman.com/pdp11/Notes/my_diagnostics.html

> Again, thanks for your help and encouragement.
>
> Bill

-chuck

Re: Logic Analysers

[jim stephens]

On 2/3/2017 9:09 AM, Paul Berger wrote:
I also have a 16700A, 16600A, and a 16500C but they are rarely if ever 
used these days.


Paul. 
the 16600A has one slot.  We had one with a scope card installed, very 
nice compact setup if the builtin channels were sufficient.

thanks
jim

Re: RL02 version of UNIX6?

[John Forecast]

> On Feb 3, 2017, at 11:50 AM, william degnan  wrote:
> 
> On Fri, Feb 3, 2017 at 11:18 AM, John Forecast  wrote:
> 
>> 
>>> On Feb 3, 2017, at 8:22 AM, Paul Koning  wrote:
>>> 
>> 
>>> 
>>>  paul
>>> 
>> It looks as though Bill only has RL02 drives on the 11/40 so that would
>> rule out DOS/BATCH. One of the later 3.x releases of RSX-11M should be OK
>> (4.x seems to have dropped unmapped support).
>> 
>>  John.
>> 
>> 
>> 
> Yah, too bad about DOS batch I have some nice manuals to work from, but I
> will see if I can find RSX-11M, so far I have not found an RL02 image for
> this, I have one here that is too new to work on my system, it crashes.
> 
> Bill

RSX-11M V3.2 supports RL02s and bitsavers has images of the 3.2 RL01 
distribution disks. I’m not sure if those will boot if copied to an RL02.

  John.

Re: Logic Analysers

[Paul Berger]

On 2017-02-03 12:41 PM, Jon Elson wrote:

On 02/03/2017 02:55 AM, Adrian Graham wrote:
Ah yes, sorry, I'm aware of that. What I meant in this specific case 
is that with 4 2764s right next to each other with a direct signal 
path between adjacent address and data pins that has a resistance of 
0.5 ohms pin to pin surely I should be able to put a clip on each 
(for example) A4 address line and see the same pulse at all four 
channels? 
Well, if the two logic analyzers were synched together, or you were 
sampling at 100 MHz or above, then yes.
But, if the logic analyzers are running too slow, sampling irregularly 
(I have no trust in Chinese gizmos until PROVEN that they do it right) 
you could get very different results.  Is there a clock on the 
microprocessor that you can check?  Maybe something like a baud rate 
clock or something that is at a few MHz.  See if that shows up as 
totally regular square waves.  If not, then the LA may not be sampling 
at a regular rate, or might have gaps while sending data to the PC.  
I'm just suspicious of these units, given the results you report.


(On my $130,000 Tektronix analyzer, I don't have to worry about such 
stupid stuff, I know they got it right.  I paid less than $750 for it, 
it will do 100 MHz on 288 synchronized channels, with a 128K record 
length.  But, it is bigger than a big kitchen microwave, and much 
noisier, too.)


Jon
Same with my Agilent 16700B, however I current only have 192 channels 
available because I have two card slots occupied by digital scope 
cards.  The analyzer cards I have can do 110 MHz state or 500 MHz timing 
which more than meets my needs for the 30-40 year old computers I use it 
with.  One big advantage of a setup like this is one instrument can be 
used to trigger the other, for instance if I want to see what a signal 
really looks at at some point, I can use the logic analyzer to trigger 
the scope cards.  I also really like the external monitor on the 16700, 
its nice to work on a 19" display with a regular keyboard and mouse.  I 
have the 16700 set up with the back facing my work bench which gives me 
extra reach with the cable.  The only thing I need access to the front 
for is the power switch.   I do also have a analogue scope but I find 
myself using it less these days especially for digital circuits.
I also have a 16700A, 16600A, and a 16500C but they are rarely if ever 
used these days.


Paul.

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 4:46 PM, dwight  wrote:
> Different strokes for different folks.

Yes. It depends a lot on what you work on, what you are trying to do, and
how you think.

This is a problem with mailing lists. There are many knowledgeable people
here, but each has their own way of doing things. All are right. But a person
trying to learn is going to get conflicting advice. Not because anyone is
being unkind, but because what they say is what they do, it works for them.

There is no one 'right way' to do this. Any way that finds the problem (and
that you know has found the problem!) is OK. Any instrument is just a way
of finding out what the device under test is actually doing. Faultfinding should
then consist of comparing that to what the device should be doing and
working out what could cause the differences.

Needless to say I would not want an LA if I was repairing an SMPSU. I'd use
a 'scope. But a lot of what I work on involves investigate a processor or a
complex interface controller (possibly microcoded, so in a sense a special-
purpose processor) at gate level. Believe me, you do not want to try to
debug an HP9800 (bit serial, microcoded, downright odd in places) with
a 'scope...

-tony

Re: RL02 version of UNIX6?

[Noel Chiappa]

> From: Paul Koning

> Another OS that would run on your machine (as well as an 11/20) would
> be RSTS-11 (V4, or I suppose V3 if you can find that)

I'd love to have an old RSTS-11, is there any variant around?

> didn't use the MMU

Huh? He's got an MMU (I think): it's the EIS he's currently struggling with.

Noel

Re: RL02 version of UNIX6?

[william degnan]

On Fri, Feb 3, 2017 at 11:18 AM, John Forecast  wrote:

>
> > On Feb 3, 2017, at 8:22 AM, Paul Koning  wrote:
> >
>
> >
> >   paul
> >
> It looks as though Bill only has RL02 drives on the 11/40 so that would
> rule out DOS/BATCH. One of the later 3.x releases of RSX-11M should be OK
> (4.x seems to have dropped unmapped support).
>
>   John.
>
>
>
Yah, too bad about DOS batch I have some nice manuals to work from, but I
will see if I can find RSX-11M, so far I have not found an RL02 image for
this, I have one here that is too new to work on my system, it crashes.

Bill

Re: Logic Analysers

[dwight]

Different strokes for different folks.

I've only used a logic analyzer once and even for that I found

it cumbersome and inadequate. I needed it to solve a sequential

problem that had a lot of time sequential actions.

Things like is does this, then this, then that. Ignore it and restart

if it does this and then something else.

I find that I can work faster with a 'scope. If I have issues with

something not of the bus or processor, most things have EPROMs

and I write test code.

Most logic analyzers are not real good at showing voltages.

Contention on a bus may be missed.

Dwight



From: cctalk  on behalf of Tony Duell 

Sent: Friday, February 3, 2017 7:27:07 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers

On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
 wrote:

> Ah yes, sorry, I'm aware of that. What I meant in this specific case is that
> with 4 2764s right next to each other with a direct signal path between
> adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
> surely I should be able to put a clip on each (for example) A4 address line
> and see the same pulse at all four channels?

Yes, subject to the following unlikely cases :

1) There is a standing wave developed between the pins. Technically that trace
is a transmission line. I have never heard it happen between ICs next to each
other at 8-bit micro speeds though.

2) There is a bad connection (IC socket?) on one of the pins

3) If you have a very fast logic analyser you might be able to see the
propagation delay as the signal gets to each pin (remember a foot is about
a nanosecond. So you are talking 10s of picoseconds delay). You will not
see that with the sort of analyser you or I have :-)

If you try your test with 4 of your logic analyser channels on the A4 pins of
the EPROMs, I assume you get different traces for each channel -- that is
what you are commenting on. What happens if you swap the logic analyser
channels round?

Incidentally, I'd better comment on the Logic Analysers I use. I use them
a lot more than a 'scope, but that's because of what I generally need to do.

1) (Is is an LA?) The HP LogicDart. 3 Channels, 100MHz. No external clock
facility. But it is pocket sized. HP called it the 'advanced logic
proble' and that's
really what it is. A better version of the blinking-light probe I used
to use. Great for
checking clocks, power supply voltages (it has a voltmeter function),
serial data
streams, etc. Normally the first instrument I grab for an unknown logic problem
just to eliminate the 'sillies'

2) An old Gould-Biomation K100D. 16 channels 100MHz. with external clocking. I
do have the 32 channel adapter for it which can only work with an
external clock.
This was my first LA and I still have a soft spot for it.

3) An HP1630. I forget which one, probably a 1630G. It does all I
want. I was also
AFAIK the last HP LA to have a proper component-level service manual. It's also
a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT is scanned
vertically, I have no idea why.

-tony

Re: Logic Analysers

[Jon Elson]

On 02/03/2017 02:55 AM, Adrian Graham wrote:
Ah yes, sorry, I'm aware of that. What I meant in this 
specific case is that with 4 2764s right next to each 
other with a direct signal path between adjacent address 
and data pins that has a resistance of 0.5 ohms pin to pin 
surely I should be able to put a clip on each (for 
example) A4 address line and see the same pulse at all 
four channels? 
Well, if the two logic analyzers were synched together, or 
you were sampling at 100 MHz or above, then yes.
But, if the logic analyzers are running too slow, sampling 
irregularly (I have no trust in Chinese gizmos until PROVEN 
that they do it right) you could get very different 
results.  Is there a clock on the microprocessor that you 
can check?  Maybe something like a baud rate clock or 
something that is at a few MHz.  See if that shows up as 
totally regular square waves.  If not, then the LA may not 
be sampling at a regular rate, or might have gaps while 
sending data to the PC.  I'm just suspicious of these units, 
given the results you report.


(On my $130,000 Tektronix analyzer, I don't have to worry 
about such stupid stuff, I know they got it right.  I paid 
less than $750 for it, it will do 100 MHz on 288 
synchronized channels, with a 128K record length.  But, it 
is bigger than a big kitchen microwave, and much noisier, too.)


Jon

Re: RL02 version of UNIX6?

[william degnan]

On Fri, Feb 3, 2017 at 8:57 AM, Noel Chiappa 
wrote:

> > From: William Degnan
>
> > my focus has been on just getting an 11/40 hardware working
>
> Rightly and properly so...
>
> > I suppose I should be happy with RT-11 given my circumstances.
>
> Unix really is a significant improvement, we really need to make sure you
> can
> run it. Don't worry about the OS image issue, I can crank them out like
> sausages, and we already have all the bits we need (V6 RL driver,
> bootstrap,
> etc).
>
>
> > It's not possible with the 3 over the back cables to put the 7238 on
> a
> > riser card to probe signals as easily.
>
> Really? DEC specified BC08R-01 cables, which _should_ be long enough to
> allow
> it to be put on an extender. Does your machine have the -01's, or have they
> been replaced with little shorty ones?
>
> If the latter, if you can't find any -01's, it should be possible to locate
> some generic 40-pin cables, which should work (old IDE cables should work,
> but not the new ones, which have a key that will prevent the connectors
> from
> going in, in this application).
>
> Also, it should not to be too hard to whip up some: the connectors and the
> flat cable are pretty easy to find - although not the ground-plane backed
> kind - do anyone know of a source for that? Anyway, the regular kind of
> flat
> cable ought to work well enough for debugging.
>
> Noel
>

Very well!  I will find some cables.  I have XXDP+ on disk, I can make
other versions if need be.  Also, I can "replace the caps" if need be, but
I'd like to find a routine or XXDP for this so I can see if there is a
specific error to address instead, assuming I can boot up XXDP+ with the
M7238 installed..  I read the manual.  I looked for quite a while and could
not find the XXDP+ that tests the 11/40 EIS.  I searched by part number.
Perhaps these tests are bundled with others and I am missing it.  I am
familiar with the database of tests online that has many but no KE11-E
M7238 EIS Diagnostics...Sorry to have to ask, I checked what places I know
of, WWW search etc.   Can anyone suggest the name of the test so I can run
it?

Again, thanks for your help and encouragement.

Bill

Re: RL02 version of UNIX6?

[John Forecast]

> On Feb 3, 2017, at 8:22 AM, Paul Koning  wrote:
> 
> 
>> On Feb 2, 2017, at 11:19 PM, william degnan  wrote:
>> 
>> ...
>> I am curious to see  what OS's run on an 11/40 without the EIS card other
>> than RT-11.  I am researching this.  I have always wanted to learn more
>> about batch-11.
> 
> You mean DOS/BATCH?  Yes, that would run on that machine, it's an 11/20 OS.  
> So would the pre-Batch version of DOS-11 (V4).
> 
> Another OS that would run on your machine (as well as an 11/20) would be 
> RSTS-11 (V4, or I suppose V3 if you can find that), the predecessor of RSTS/E 
> that didn't use the MMU.
> 
> It may be that some flavors of RSX-11/M or /S can be built with no EIS, since 
> it's supposed to be possible to build a non-MMU version at least of /S.  But 
> I don't know the specifics (no RSX experience).
> 
>   paul
> 
It looks as though Bill only has RL02 drives on the 11/40 so that would rule 
out DOS/BATCH. One of the later 3.x releases of RSX-11M should be OK (4.x seems 
to have dropped unmapped support).

  John.

Re: Logic Analysers

[Tony Duell]

On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
 wrote:

> Ah yes, sorry, I'm aware of that. What I meant in this specific case is that
> with 4 2764s right next to each other with a direct signal path between
> adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
> surely I should be able to put a clip on each (for example) A4 address line
> and see the same pulse at all four channels?

Yes, subject to the following unlikely cases :

1) There is a standing wave developed between the pins. Technically that trace
is a transmission line. I have never heard it happen between ICs next to each
other at 8-bit micro speeds though.

2) There is a bad connection (IC socket?) on one of the pins

3) If you have a very fast logic analyser you might be able to see the
propagation delay as the signal gets to each pin (remember a foot is about
a nanosecond. So you are talking 10s of picoseconds delay). You will not
see that with the sort of analyser you or I have :-)

If you try your test with 4 of your logic analyser channels on the A4 pins of
the EPROMs, I assume you get different traces for each channel -- that is
what you are commenting on. What happens if you swap the logic analyser
channels round?

Incidentally, I'd better comment on the Logic Analysers I use. I use them
a lot more than a 'scope, but that's because of what I generally need to do.

1) (Is is an LA?) The HP LogicDart. 3 Channels, 100MHz. No external clock
facility. But it is pocket sized. HP called it the 'advanced logic
proble' and that's
really what it is. A better version of the blinking-light probe I used
to use. Great for
checking clocks, power supply voltages (it has a voltmeter function),
serial data
streams, etc. Normally the first instrument I grab for an unknown logic problem
just to eliminate the 'sillies'

2) An old Gould-Biomation K100D. 16 channels 100MHz. with external clocking. I
do have the 32 channel adapter for it which can only work with an
external clock.
This was my first LA and I still have a soft spot for it.

3) An HP1630. I forget which one, probably a 1630G. It does all I
want. I was also
AFAIK the last HP LA to have a proper component-level service manual. It's also
a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT is scanned
vertically, I have no idea why.

-tony

Re: RL02 version of UNIX6?

[Noel Chiappa]

> From: William Degnan

> my focus has been on just getting an 11/40 hardware working

Rightly and properly so...

> I suppose I should be happy with RT-11 given my circumstances.

Unix really is a significant improvement, we really need to make sure you can
run it. Don't worry about the OS image issue, I can crank them out like
sausages, and we already have all the bits we need (V6 RL driver, bootstrap,
etc).


> It's not possible with the 3 over the back cables to put the 7238 on a
> riser card to probe signals as easily. 

Really? DEC specified BC08R-01 cables, which _should_ be long enough to allow
it to be put on an extender. Does your machine have the -01's, or have they
been replaced with little shorty ones?

If the latter, if you can't find any -01's, it should be possible to locate
some generic 40-pin cables, which should work (old IDE cables should work,
but not the new ones, which have a key that will prevent the connectors from
going in, in this application).

Also, it should not to be too hard to whip up some: the connectors and the
flat cable are pretty easy to find - although not the ground-plane backed
kind - do anyone know of a source for that? Anyway, the regular kind of flat
cable ought to work well enough for debugging.

Noel

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[geneb]

On Thu, 2 Feb 2017, Ian S. King wrote:


On Thu, Feb 2, 2017 at 4:24 PM, geneb  wrote:


On Thu, 2 Feb 2017, Ian Finder wrote:

WTF did I just read.


Fred in absolutely rare form.  I nearly choked on coffee at the "yodeling

jellyfish" bit. I'd give him fake internet points if I could. :)

Also, QUIT TOP POSTING.

Be gentle, Gene.  Ian works for the Evil Ex-Empire and is required as a

term of his indenture to use Outhouse-look, part of the Microsoft Orifice
suite of floating turds.  Even if you set it to do the right thing, it will
randomly choose to once again do the Microsoft Thing.


Sounds like an Intervention may be required. :)

g.

--
Proud owner of F-15C 80-0007
http://www.f15sim.com - The only one of its kind.
http://www.diy-cockpits.org/coll - Go Collimated or Go Home.
Some people collect things for a hobby.  Geeks collect hobbies.

ScarletDME - The red hot Data Management Environment
A Multi-Value database for the masses, not the classes.
http://scarlet.deltasoft.com - Get it _today_!

HP Integral PC Accessories?

[Martin.Hepperle]

Hi,
I am looking to swap or buy the following HP-Integral IPC (portable HP-UX box) 
interface boards:
- HP-IL interface
- 1 MB memory board
Does anybody have a manual for the HP-IL interface board?

Could offer HP 9000 interface or memory boards.

Martin

Re: RL02 version of UNIX6?

[Paul Koning]

> On Feb 2, 2017, at 11:19 PM, william degnan  wrote:
> 
> ...
> I am curious to see  what OS's run on an 11/40 without the EIS card other
> than RT-11.  I am researching this.  I have always wanted to learn more
> about batch-11.

You mean DOS/BATCH?  Yes, that would run on that machine, it's an 11/20 OS.  So 
would the pre-Batch version of DOS-11 (V4).

Another OS that would run on your machine (as well as an 11/20) would be 
RSTS-11 (V4, or I suppose V3 if you can find that), the predecessor of RSTS/E 
that didn't use the MMU.

It may be that some flavors of RSX-11/M or /S can be built with no EIS, since 
it's supposed to be possible to build a non-MMU version at least of /S.  But I 
don't know the specifics (no RSX experience).

paul

Re: Logic Analysers

[Adrian Graham]

On 03/02/2017 08:01, "Christian Corti" 
wrote:

> On Thu, 2 Feb 2017, Adrian Graham wrote:
>> is fixed 5v. Also you'd expect that sampling at four times the clock speed
>> (they'll both do 25Mhz with 6 channels) then every pulse would be picked up.
> 
> No, because the pulse length may be far inferiour to the sample clock
> rate. You may also need to capture signal transitions instead of signal
> levels (i.e. you record a "pulse" if there was a transition between two
> sample clock pulses).

Ah yes, sorry, I'm aware of that. What I meant in this specific case is that
with 4 2764s right next to each other with a direct signal path between
adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for example) A4 address line
and see the same pulse at all four channels?

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?

Re: OT: RANT (Was: [cctalk-requ...@classiccmp.org: confirm 38290c8a992491eda604beff5a06ff20cd7e85f5]

[Raymond Wiker]

On Fri, Feb 3, 2017 at 2:51 AM, Ian S. King  wrote:

> On Thu, Feb 2, 2017 at 4:24 PM, geneb  wrote:
>
> > On Thu, 2 Feb 2017, Ian Finder wrote:
> >
> > WTF did I just read.
> >>
> >> Fred in absolutely rare form.  I nearly choked on coffee at the
> "yodeling
> > jellyfish" bit. I'd give him fake internet points if I could. :)
> >
> > Also, QUIT TOP POSTING.
> >
> > Be gentle, Gene.  Ian works for the Evil Ex-Empire and is required as a
> term of his indenture to use Outhouse-look, part of the Microsoft Orifice
> suite of floating turds.  Even if you set it to do the right thing, it will
> randomly choose to once again do the Microsoft Thing.
> -- Ian (obviously the other one again)
>
> I read that at first as "Ex-Evil Empire", which does not sound quite
right. I have no problem with "Evil Ex-Empire", though.

Re: Logic Analysers

[Christian Corti]

On Thu, 2 Feb 2017, Adrian Graham wrote:

is fixed 5v. Also you'd expect that sampling at four times the clock speed
(they'll both do 25Mhz with 6 channels) then every pulse would be picked up.


No, because the pulse length may be far inferiour to the sample clock 
rate. You may also need to capture signal transitions instead of signal 
levels (i.e. you record a "pulse" if there was a transition between two 
sample clock pulses).


Christian