Re: 8085 IO ports

2017-01-21 Thread Adrian Graham
On 21/01/2017 21:39, "Tony Duell"  wrote:

>> I don't think I'll touch them, they're obviously part of the phone subsystem
>> and I doubt I'll ever plug it into a phone line - I have several One Per
>> Desks for that sort of thing if needs be.
> 
> A telephone line similator is a useful toy to have for something like
> this. I have
> an old but good one (it use a TMS320 series DSP for signal degredation) that
> I bought non working on Ebay. Reseating the socketed chips helped, replacing
> a couple of comparators and a voltage regulator fixed it -- the
> problem of course
> being to find the faulty parts (there are well over 300 ICs in the unit).

Eep, slightly more involved than my little effort then :) There's maybe 70
in this one including the 16 RAM chips and maybe 7 opamps.

>> I can trigger it on the RD signal yes. There's 2 LS373s which both had dead
> 
> Not trigger, but clock. In other words to take a sample on every Rd pulse.

This is interesting if the data is to be believed. The Saleae Logic software
contains several decoders like SPI, I2C, Analog Serial and 'simple
parallel'. The official docs say external clocking isn't supported but the
'simple parallel' decoder can work in a similar way if you nominate one of
the 16 available channels as a clock channel. It's supposed to cover a 16
bit data bus but if I take a 10 second sample of A0-A14 and RD then map
those address channels to the analyser's data channels and tell it to clock
using RD I see a definite repetitive pattern. More reading of that tomorrow
since I've just noticed what time it is!

Cheers,

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-21 Thread Adrian Graham
On 21/01/2017 21:39, "Tony Duell"  wrote:

>>> sequence of locations that the CPU is reading. Most (but not all) will be
>>> instructions. Find one, compare with the listing, see if the sequence makes
>>> sense.
>> 
>> I can trigger it on the RD signal yes. There's 2 LS373s which both had dead
> 
> Not trigger, but clock. In other words to take a sample on every Rd pulse.

Hm, no, none of the Saleae ones do external clocking, but I can set up a
parallel oversample and use either the rising or falling edge of RD as a
base, I wonder if that'll work...

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-21 Thread Tony Duell
On Sat, Jan 21, 2017 at 4:27 PM, Adrian Graham
 wrote:
> Back to the Executel after a few days relaxing :)
>
> On 17/01/2017 20:59, "Tony Duell"  wrote:
>
>>> Yep, on the left two. I haven't dared to pull them from the board though
>>> even though they're socketed.
>>
>> Do be careful, the substrate is a brittle ceramic material...
>
> I don't think I'll touch them, they're obviously part of the phone subsystem
> and I doubt I'll ever plug it into a phone line - I have several One Per
> Desks for that sort of thing if needs be.

A telephone line similator is a useful toy to have for something like
this. I have
an old but good one (it use a TMS320 series DSP for signal degredation) that
I bought non working on Ebay. Reseating the socketed chips helped, replacing
a couple of comparators and a voltage regulator fixed it -- the
problem of course
being to find the faulty parts (there are well over 300 ICs in the unit).

[...]

>>> I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
>>> learning how to drive that too. I should be able to decode addresses and
>>> suchlike using it shouldn't I.
>>
>> Can you clock the analyser from an external input rather than sampling
>> every 10us or whatever? If so, clock it from the Rd/ signal and grab the
>> 16 address lines (8 on the processor pins, 8 on an address latch, most
>> likely a 74LS373, which you will have to find!). Now you can see the
>> sequence of locations that the CPU is reading. Most (but not all) will be
>> instructions. Find one, compare with the listing, see if the sequence makes
>> sense.
>
> I can trigger it on the RD signal yes. There's 2 LS373s which both had dead

Not trigger, but clock. In other words to take a sample on every Rd pulse.

-tony


Re: 8085 IO ports

2017-01-21 Thread Adrian Graham
On 21/01/2017 17:30, "dwight"  wrote:

> It is possible that it is the phone side of the system that is
> hanging it up ( no pun intended ).
> A while back, I purchased about 12 broken phone modems for
> about $2. I found out that all the boards had suffered lightning
> damage. Various parts on each board were blown. There was
> no consistency. I believe I recovered about 5 boards by combining
> the good parts.
> The reason I mention this is that it seems your board has had
> more than one part fail. It is possible that it was lightning
> damaged.
>

I agree, it's also been wet and I don't know if that was pre-failure or just
an effect of long term storage. There are also some (I assume) voice
components like a -24V regulator (MC79L24A) that aren't getting power, I've
just looked at the transformer that feeds it and that doesn't appear to be
working.

I'll post a separate pic of that.
 
> If so, it could be that one of the chips has sent an interrupt to
> the processor but not hand shaking when the processor is
> asking for data from the modem.
> Just a though.

The modem in this case is an SAA5070 "LUCY" chip which I guess I can't
easily test or even source a known working spare if it turns out to be
faulty :/

Cheers


> 
> From: cctalk  on behalf of Adrian Graham
> 
> Sent: Saturday, January 21, 2017 8:27:06 AM
> To: General Discussion: On-Topic and Off-Topic Posts
> Subject: Re: 8085 IO ports
> 
> Back to the Executel after a few days relaxing :)
> 
> On 17/01/2017 20:59, "Tony Duell"  wrote:
> 
>>> Yep, on the left two. I haven't dared to pull them from the board though
>>> even though they're socketed.
>> 
>> Do be careful, the substrate is a brittle ceramic material...
> 
> I don't think I'll touch them, they're obviously part of the phone subsystem
> and I doubt I'll ever plug it into a phone line - I have several One Per
> Desks for that sort of thing if needs be.
> 
>>> be seen on both the built-in TV and my external CUB despite lack of sync is
>>> for all intents and purposes random crap which again makes me think
>>> something isn't initialising properly.
>> 
>> Yes. It sounds like the processor is not initialising the video system,
>> clearing video RAM, etc.
>> 
>> Now either the processor is waiting for an interrupt (but from what)? or
>> ir's not running the right code. CPU trouble, ROM troublem, RAM
>> trouble, address decoder trouble?
> 
> I remember becoming aware recently that it USED to look like it was reading
> all four ROMs but now just pulses ROM1. I'm still chasing down one
> particular clock source because there's a flip-flop LS74 that isn't getting
> anything at all, it's fed from an LS21 and an LS139 decoder which in turn is
> fed by A4 and A5 on the address bus. Having the whole board drawn out with
> all its connections is one thing but I need to put it into a logical
> schematic order.
> 
>>> I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
>>> learning how to drive that too. I should be able to decode addresses and
>>> suchlike using it shouldn't I.
>> 
>> Can you clock the analyser from an external input rather than sampling
>> every 10us or whatever? If so, clock it from the Rd/ signal and grab the
>> 16 address lines (8 on the processor pins, 8 on an address latch, most
>> likely a 74LS373, which you will have to find!). Now you can see the
>> sequence of locations that the CPU is reading. Most (but not all) will be
>> instructions. Find one, compare with the listing, see if the sequence makes
>> sense.
> 
> I can trigger it on the RD signal yes. There's 2 LS373s which both had dead
> inputs so I replaced those and made sure the signals were correct at all
> outputs. I'll have to lose A15 to latch onto RD (only 16 channels) but I'll
> give it a go.
> 
> Cheers!
> 
> --
> Adrian/Witchy
> Binary Dinosaurs creator/curator
> Www.binarydinosaurs.co.uk - the UK's biggest private home computer
> collection?
> 
> 

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-21 Thread dwight
It is possible that it is the phone side of the system that is

hanging it up ( no pun intended ).

A while back, I purchased about 12 broken phone modems for

about $2. I found out that all the boards had suffered lightning

damage. Various parts on each board were blown. There was

no consistency. I believe I recovered about 5 boards by combining

the good parts.

The reason I mention this is that it seems your board has had

more than one part fail. It is possible that it was lightning

damaged.

If so, it could be that one of the chips has sent an interrupt to

the processor but not hand shaking when the processor is

asking for data from the modem.

Just a though.

Dwight



From: cctalk  on behalf of Adrian Graham 

Sent: Saturday, January 21, 2017 8:27:06 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: 8085 IO ports

Back to the Executel after a few days relaxing :)

On 17/01/2017 20:59, "Tony Duell"  wrote:

>> Yep, on the left two. I haven't dared to pull them from the board though
>> even though they're socketed.
>
> Do be careful, the substrate is a brittle ceramic material...

I don't think I'll touch them, they're obviously part of the phone subsystem
and I doubt I'll ever plug it into a phone line - I have several One Per
Desks for that sort of thing if needs be.

>> be seen on both the built-in TV and my external CUB despite lack of sync is
>> for all intents and purposes random crap which again makes me think
>> something isn't initialising properly.
>
> Yes. It sounds like the processor is not initialising the video system,
> clearing video RAM, etc.
>
> Now either the processor is waiting for an interrupt (but from what)? or
> ir's not running the right code. CPU trouble, ROM troublem, RAM
> trouble, address decoder trouble?

I remember becoming aware recently that it USED to look like it was reading
all four ROMs but now just pulses ROM1. I'm still chasing down one
particular clock source because there's a flip-flop LS74 that isn't getting
anything at all, it's fed from an LS21 and an LS139 decoder which in turn is
fed by A4 and A5 on the address bus. Having the whole board drawn out with
all its connections is one thing but I need to put it into a logical
schematic order.

>> I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
>> learning how to drive that too. I should be able to decode addresses and
>> suchlike using it shouldn't I.
>
> Can you clock the analyser from an external input rather than sampling
> every 10us or whatever? If so, clock it from the Rd/ signal and grab the
> 16 address lines (8 on the processor pins, 8 on an address latch, most
> likely a 74LS373, which you will have to find!). Now you can see the
> sequence of locations that the CPU is reading. Most (but not all) will be
> instructions. Find one, compare with the listing, see if the sequence makes
> sense.

I can trigger it on the RD signal yes. There's 2 LS373s which both had dead
inputs so I replaced those and made sure the signals were correct at all
outputs. I'll have to lose A15 to latch onto RD (only 16 channels) but I'll
give it a go.

Cheers!

--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-21 Thread Adrian Graham
Back to the Executel after a few days relaxing :)

On 17/01/2017 20:59, "Tony Duell"  wrote:

>> Yep, on the left two. I haven't dared to pull them from the board though
>> even though they're socketed.
> 
> Do be careful, the substrate is a brittle ceramic material...

I don't think I'll touch them, they're obviously part of the phone subsystem
and I doubt I'll ever plug it into a phone line - I have several One Per
Desks for that sort of thing if needs be.

>> be seen on both the built-in TV and my external CUB despite lack of sync is
>> for all intents and purposes random crap which again makes me think
>> something isn't initialising properly.
> 
> Yes. It sounds like the processor is not initialising the video system,
> clearing video RAM, etc.
> 
> Now either the processor is waiting for an interrupt (but from what)? or
> ir's not running the right code. CPU trouble, ROM troublem, RAM
> trouble, address decoder trouble?

I remember becoming aware recently that it USED to look like it was reading
all four ROMs but now just pulses ROM1. I'm still chasing down one
particular clock source because there's a flip-flop LS74 that isn't getting
anything at all, it's fed from an LS21 and an LS139 decoder which in turn is
fed by A4 and A5 on the address bus. Having the whole board drawn out with
all its connections is one thing but I need to put it into a logical
schematic order.

>> I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
>> learning how to drive that too. I should be able to decode addresses and
>> suchlike using it shouldn't I.
> 
> Can you clock the analyser from an external input rather than sampling
> every 10us or whatever? If so, clock it from the Rd/ signal and grab the
> 16 address lines (8 on the processor pins, 8 on an address latch, most
> likely a 74LS373, which you will have to find!). Now you can see the
> sequence of locations that the CPU is reading. Most (but not all) will be
> instructions. Find one, compare with the listing, see if the sequence makes
> sense.

I can trigger it on the RD signal yes. There's 2 LS373s which both had dead
inputs so I replaced those and made sure the signals were correct at all
outputs. I'll have to lose A15 to latch onto RD (only 16 channels) but I'll
give it a go.

Cheers!

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-21 Thread Adrian Graham
On 19/01/2017 15:47, "Tony Duell"  wrote:

> On Wed, Jan 18, 2017 at 11:42 PM, Adrian Graham
>  wrote:
>> On 18 January 2017 at 20:13, Tony Duell  wrote:
>> 
>>> 
>>> Just to keep you updated, I have located one of my units that contains said
>>> drive. I am rather busy at the moment with more mundane things, but I will
>>> try to pull it apart and identify said capacitors.
>> 
>> 
>> Thanks Tony :)
> 
> I did have a little time today so I've taken it apart and taken some photos. I
> will try to upload those next time I am in the library...
> 
> If the capacitors are the ones I think they are, the larger one nearer the
> edge of the board is 47uF at 25V, the other is 10uF at 25V. They seem
> to be power supply decoupling (the former is between the +12V rail and
> ground, the latter is fed from a low value resistor from the +12V rail and
> also goes to the +ve power pin of an LM324 op-amp). That means they
> are not critical. But if they have been electrically damaged, it suggest
> severe overvoltage on the 12V line which could have damaged other
> parts.

Brilliant, thanks! Nice to see what a clean unit looks like too, mine looks
like it's been in the wars.

I'm back from a little break to see my Missus so I'll clean up the board and
see how bad the damage/rot is.

Cheers,

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-20 Thread Tony Duell
On Wed, Jan 18, 2017 at 11:42 PM, Adrian Graham
 wrote:
> On 18 January 2017 at 20:13, Tony Duell  wrote:
>
>>
>> Just to keep you updated, I have located one of my units that contains said
>> drive. I am rather busy at the moment with more mundane things, but I will
>> try to pull it apart and identify said capacitors.
>
>
> Thanks Tony :)

You might find some pictures of interest here :

https://www.flickr.com/photos/tony_duell/albums/72157675727494113

-tony


Re: 8085 IO ports

2017-01-19 Thread Tony Duell
On Wed, Jan 18, 2017 at 11:42 PM, Adrian Graham
 wrote:
> On 18 January 2017 at 20:13, Tony Duell  wrote:
>
>>
>> Just to keep you updated, I have located one of my units that contains said
>> drive. I am rather busy at the moment with more mundane things, but I will
>> try to pull it apart and identify said capacitors.
>
>
> Thanks Tony :)

I did have a little time today so I've taken it apart and taken some photos. I
will try to upload those next time I am in the library...

If the capacitors are the ones I think they are, the larger one nearer the
edge of the board is 47uF at 25V, the other is 10uF at 25V. They seem
to be power supply decoupling (the former is between the +12V rail and
ground, the latter is fed from a low value resistor from the +12V rail and
also goes to the +ve power pin of an LM324 op-amp). That means they
are not critical. But if they have been electrically damaged, it suggest
severe overvoltage on the 12V line which could have damaged other
parts.

-tony


Re: 8085 IO ports

2017-01-18 Thread Adrian Graham
On 18 January 2017 at 20:13, Tony Duell  wrote:

>
> Just to keep you updated, I have located one of my units that contains said
> drive. I am rather busy at the moment with more mundane things, but I will
> try to pull it apart and identify said capacitors.


Thanks Tony :)


-- 
adrian/witchy
Owner of Binary Dinosaurs, the UK's biggest home computer collection?
www.binarydinosaurs.co.uk


Re: 8085 IO ports

2017-01-18 Thread Tony Duell
On Tue, Jan 17, 2017 at 8:59 PM, Tony Duell  wrote:
> On Tue, Jan 17, 2017 at 7:15 PM, Adrian Graham
>  wrote:

>>> What is the tape drive? That board has a distinct look of Philips about it.
>>> What tapes does it use? If I were a gambling man I would guess at Phlips
>>> minicassettes (not microcassettes). I think I know that drive...
>>
>> The drive has no maker stamp on it but I think you're right with the
>> minicassettes - the ejecting lid looks bigger than a microcassete. As it
>> happens there's an identical one on ebay right now!
>>
>> http://www.ebay.com/itm/NO-NAME-3922-536-07860-392253607860-CASSETTE-STATION
>> -/300633626181
>
> That's the one. It's a Philips mechanism. I have at least one somewhere. I 
> will
> try to find it. I don't think I have the schematic for it, but at
> least I can look at the
> PCB and find component values.

Just to keep you updated, I have located one of my units that contains said
drive. I am rather busy at the moment with more mundane things, but I will
try to pull it apart and identify said capacitors.

-tony


Re: 8085 IO ports

2017-01-17 Thread Tony Duell
On Tue, Jan 17, 2017 at 7:15 PM, Adrian Graham
 wrote:
> On 17/01/2017 16:53, "Tony Duell"  wrote:
>
>> Z80, PDP8, P850, etc) you have special I/O instructions accessing I/O 
>> devices.
>> The address spaces are totally separate, I/O location 0 has nothing to do 
>> with
>> memory location 0. On the 8085, an I/O instructon (IN or OUT) will cause
>> IO/M to be asserted (other state from when the CPU is accessing memory).
>
> OK. I'd have thought in this case the D8741A would count as a non-memory
> mapped I/O device?

It's very likely to be I/O mapped as it's only a couple of locations.

[...]

>>> They're the big green rectangles visible in this picture -
>>
>> Ah I can see what appear to be thick-film resistors on them
>> (the black rectangles). Are there more conventional components
>> on the underside?
>
> Yep, on the left two. I haven't dared to pull them from the board though
> even though they're socketed.

Do be careful, the substrate is a brittle ceramic material...

>
>>> through exposure to moisture for several years but could they have exploded
>>> instead? The damage looks old so I don't think that power up is responsible.
>>
>> What is the tape drive? That board has a distinct look of Philips about it.
>> What tapes does it use? If I were a gambling man I would guess at Phlips
>> minicassettes (not microcassettes). I think I know that drive...
>
> The drive has no maker stamp on it but I think you're right with the
> minicassettes - the ejecting lid looks bigger than a microcassete. As it
> happens there's an identical one on ebay right now!
>
> http://www.ebay.com/itm/NO-NAME-3922-536-07860-392253607860-CASSETTE-STATION
> -/300633626181

That's the one. It's a Philips mechanism. I have at least one somewhere. I will
try to find it. I don't think I have the schematic for it, but at
least I can look at the
PCB and find component values.


>
> Yes, I'd expect video or at least a sync as soon as it's been running for
> 300usec which is what the datasheet says is all it takes to work out it's
> running in 'off hours' mode and to generate its own sync. One thing that CAN
> be seen on both the built-in TV and my external CUB despite lack of sync is
> for all intents and purposes random crap which again makes me think
> something isn't initialising properly.

Yes. It sounds like the processor is not initialising the video system,
clearing video RAM, etc.

Now either the processor is waiting for an interrupt (but from what)? or
ir's not running the right code. CPU trouble, ROM troublem, RAM
trouble, address decoder trouble?

>
>> I don't suppose you have a logic analyser? This is the sort of problem
>> that would
>> have me using said instrument to see what the processor is executing.
>
> I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
> learning how to drive that too. I should be able to decode addresses and
> suchlike using it shouldn't I.

Can you clock the analyser from an external input rather than sampling
every 10us or whatever? If so, clock it from the Rd/ signal and grab the
16 address lines (8 on the processor pins, 8 on an address latch, most
likely a 74LS373, which you will have to find!). Now you can see the
sequence of locations that the CPU is reading. Most (but not all) will be
instructions. Find one, compare with the listing, see if the sequence makes
sense.

-tony


>


Re: 8085 IO ports

2017-01-17 Thread Adrian Graham
On 17/01/2017 18:22, "allison"  wrote:

>> The transport motors move fine but the head unit itself is badly rusted
>> around the edges. I also don't know what capacitance the ex-caps are since
>> they're that badly damaged but that's info I can hopefully get from the
>> other unit since that one isn't damaged internally but is equally dead.
> 
> The important spaces are the tape head face and the backside where the
> leads are.

As luck would have it there's one on ebay right now, but it's a bit steep at
$75 + nearly as much again in shipping. Also while it would be nice to have
a fully functioning unit at the end of this I'm not sure the cassette is
worth spending much time on apart from to replace what's obviously damaged
and at least go for something that's seen by the controller.

> THe basic main board was not that expensive ass it was mostly unpopulated...
> Adding Level A though E added stuff but their cost barely doubled it to
> maybe
> the 400$ level.  At that point its S100 bus but NO S100 boards and 4K ram
> on the main board and 8K of eprom (with M$ rom basic), the 8755 with a
> 2K monitor/debugger, and uses bit bash serial IO (very minimal hardware).

Only $400-ish? I'm surprised given the functionality it had.
 
> I later rewrote the monitor and pulled the MDS controller, VDM-1, and
> MITS SIO, to
> a Compupro interfacer II, so now it has an early IDE disk project for
> disk (a paltry 100mb drive).   I still have it and use it.

Heh, we all remember when 100mb was a luxury :)

> Yes, but do the pins connect to other ICs now?  I've see that stuff
> remove copper and leave pads.

Yep, I've buzzed out all the lines between ROM chips as well as the RAM
refresh, that was the second thing I did after cleaning up the battery
residue and making sure I'd not had full-on socket rot like I had in my
Amiga2000.

>> I bought a test clip so I can watch every line with a logic analyser. It's
>> proved to be a useful investment!
> I must have a dozen or more with leads.  handy for its here but not
> there... why?

Indeed. New ones are surprisingly expensive though, I paid ukp20 for a 14
pin one but it's paid for itself in not having to move 14 analyser cables
from pin to pin 16 times...

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-17 Thread Adrian Graham
On 17/01/2017 16:53, "Tony Duell"  wrote:

> Z80, PDP8, P850, etc) you have special I/O instructions accessing I/O devices.
> The address spaces are totally separate, I/O location 0 has nothing to do with
> memory location 0. On the 8085, an I/O instructon (IN or OUT) will cause
> IO/M to be asserted (other state from when the CPU is accessing memory).

OK. I'd have thought in this case the D8741A would count as a non-memory
mapped I/O device?
 
> Note that on a machine with I/O instructions (like the 8085) there is
> (a) nothing
> to stop you having memory mapped I/O (that processor can access memory),
> and (b) nothing to stop you having a mix of memory mapped and I/O mapped
> I/O. You might have simple devices mapped as I/O ports, but video memory
> (which is a sort-of I/O device in that storing something there causes it to
> appear on the screen) memory-mapped. As an aside, the TRS-80 model 1
> had almost everything (video, keyboard, printer port, etc) _memory mapped_,
> the only standard I/O mapped device was the cassette unit.

My video RAM is a pair of 2114s which the teletext processor should be
looking at as a page store, I'm still chasing down your idea that it should
be initialised somehow before it starts producing a video sync.

>> They're the big green rectangles visible in this picture -
> 
> Ah I can see what appear to be thick-film resistors on them
> (the black rectangles). Are there more conventional components
> on the underside?

Yep, on the left two. I haven't dared to pull them from the board though
even though they're socketed.
 
>> through exposure to moisture for several years but could they have exploded
>> instead? The damage looks old so I don't think that power up is responsible.
> 
> What is the tape drive? That board has a distinct look of Philips about it.
> What tapes does it use? If I were a gambling man I would guess at Phlips
> minicassettes (not microcassettes). I think I know that drive...

The drive has no maker stamp on it but I think you're right with the
minicassettes - the ejecting lid looks bigger than a microcassete. As it
happens there's an identical one on ebay right now!

http://www.ebay.com/itm/NO-NAME-3922-536-07860-392253607860-CASSETTE-STATION
-/300633626181

Pictures are JUST at the wrong angle to find anything useable on the caps!

> If it is the drive I am thinking of, I have one somewhere, meaning I can look
> up the capacitors.

Cool. They actually might be readable - the detritus that I thought was
exploded cap looks like it might be external muck so I'll clean it up and
see what I can get.
 
> But I would expect the thing to produce video without it.

Yes, I'd expect video or at least a sync as soon as it's been running for
300usec which is what the datasheet says is all it takes to work out it's
running in 'off hours' mode and to generate its own sync. One thing that CAN
be seen on both the built-in TV and my external CUB despite lack of sync is
for all intents and purposes random crap which again makes me think
something isn't initialising properly.
 
> I don't suppose you have a logic analyser? This is the sort of problem
> that would
> have me using said instrument to see what the processor is executing.

I have, a small 16 channel one that's Saleae Logic compatible so I'm slowly
learning how to drive that too. I should be able to decode addresses and
suchlike using it shouldn't I.

Cheers,

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-17 Thread Paul Koning

> On Jan 17, 2017, at 1:22 PM, allison  wrote:
> 
> On 1/17/17 11:38 AM, Adrian Graham wrote:
>> On 17 January 2017 at 02:14, allison  wrote:
>> 
>>> ...
>>> 
>> The transport motors move fine but the head unit itself is badly rusted
>> around the edges. I also don't know what capacitance the ex-caps are since
>> they're that badly damaged but that's info I can hopefully get from the
>> other unit since that one isn't damaged internally but is equally dead.
> 
> The important spaces are the tape head face and the backside where the leads 
> are.

Also any tape guides, both the tape surface and the tape edge guide surfaces.  

paul




Re: 8085 IO ports

2017-01-17 Thread allison

On 1/17/17 11:38 AM, Adrian Graham wrote:

On 17 January 2017 at 02:14, allison  wrote:



snippage>



That's the later 1983 version but its the book you want.


Thanks, that was some light reading over lunchtime. The descriptions of the
interfacing helped a lot so tonight I need to finish tracing out the
SAA5070 LUCY circuit and the non data bus lines going to the keyboard
because I've not found anything that (I'm guessing) should interrupt the
CPU to say there's been keyboard activity.


Figured that may help.

On the tape drive controller board are a pair of very messy 25V caps that

I


thought had rotted because of damp - the tape transport itself is

probably

beyond saving through rust - but could they have exploded I wonder.


Likely history but if the parts move and the head is ok then clean it
really well replace the caps and try.


The transport motors move fine but the head unit itself is badly rusted
around the edges. I also don't know what capacitance the ex-caps are since
they're that badly damaged but that's info I can hopefully get from the
other unit since that one isn't damaged internally but is equally dead.


The important spaces are the tape head face and the backside where the 
leads are.



in that system working to this day (along with a 8085A subprocessor).

Strewth, that's some troubleshooting effort!

I had bought the Netronics explorer 8085 just before that bolt.  That
gave me
a S100 chassis that would run even bad cards (think SDK85 with S100 bus
interface).


Just googled it, that must've been expnsive when it was new!

As systems of the day went it was cheap as the base unit plus the upgrades
like the s100 frame, backplane and all were fairly inexpensive.  I had 
power

supply, memory and many of the parts to populate it.

THe basic main board was not that expensive ass it was mostly unpopulated...
Adding Level A though E added stuff but their cost barely doubled it to 
maybe

the 400$ level.  At that point its S100 bus but NO S100 boards and 4K ram
on the main board and 8K of eprom (with M$ rom basic), the 8755 with a
2K monitor/debugger, and uses bit bash serial IO (very minimal hardware).

I caught a break as around theyn I was testing JAWS 64K S100 dram board
for Netronics in as many s100 crates as I had access to in 1978-79 
(quite a few)
so I worked a deal.  Paid less as I could get the boards and mechanical 
bits and populate
from my stocks.  The Jaws memory was the best Dram design for S100 of 
the day

as it worked in everything I'd tried 8080/8085 or z80 plus one 1802!

For the longest time the config was 64kdram board (Jaws), VDM-1, MITS SIOB,
and NS* MDS floppy controller and it ran NS*dos or CP/M as needed. 
Without S100
boards in it it had monitor and 4K ram plus basic so that was enough to 
exercise ram

cards, Io boards and the MDS controller.

I later rewrote the monitor and pulled the MDS controller, VDM-1, and 
MITS SIO, to
a Compupro interfacer II, so now it has an early IDE disk project for 
disk (a paltry

100mb drive).   I still have it and use it.

That's the rest of the story.



The turned pin are heavy and will stand that the copper under them
or leading to them may be gone


I tested the sockets by resting the board on a sponge wrapped in tin foil
connected to one lead of my DMM.


Yes, but do the pins connect to other ICs now?  I've see that stuff 
remove copper and leave pads.



FYI vinegar or lemon juice will neutralize it, the battery (likely nicd)
is alkaline.
Rinse with water and dry.


Oh yes, that was the first thing I did when I removed the battery :)



You can always inject a really slow processor clock, isn't rated for it
but it does
run down to less than 1khz. You can then watch signal with a bunch of leds.


I bought a test clip so I can watch every line with a logic analyser. It's
proved to be a useful investment!
I must have a dozen or more with leads.  handy for its here but not 
there... why?


Allison



Cheers,





Re: 8085 IO ports

2017-01-17 Thread Tony Duell
On Tue, Jan 17, 2017 at 1:15 AM, Adrian Graham
 wrote:
> On 15/01/2017 14:38, "Tony Duell"  wrote:
>
>> But do you know it''s not doing I/O. OK IO/M is never going into the
>> right state for
>> I/O, but what that _really_ means is that the 8085 is never executing
>> any IN or OUT
>> type instructions. But of course memory mapped I/O is possible
>> (storing or loading
>> at particular locations that happen to be I/O devices) on any processor that
>> can
>> access memory (including the 8085). I've seen small 8085 and Z80 control
>> systems
>> with only memory-mapped I/O.
>
> I pondered that too but the reference says IN and OUT are used for
> non-memory mapped I/O and there's a few of those instructions in the code.
> Whether they're being executed at this point in time is moot.

Basically, memory mapped I/O means having devices addressed as memory that
perform I/O functions. You access them with the same load/store
instructions that
you use on real memory. On some processors (6502, 6800, 68000. PDP11, etc)
that's all you have, there are no special I/O instructions. On others
(8080, 8085,
Z80, PDP8, P850, etc) you have special I/O instructions accessing I/O devices.
The address spaces are totally separate, I/O location 0 has nothing to do with
memory location 0. On the 8085, an I/O instructon (IN or OUT) will cause
IO/M to be asserted (other state from when the CPU is accessing memory).

Note that on a machine with I/O instructions (like the 8085) there is
(a) nothing
to stop you having memory mapped I/O (that processor can access memory),
and (b) nothing to stop you having a mix of memory mapped and I/O mapped
I/O. You might have simple devices mapped as I/O ports, but video memory
(which is a sort-of I/O device in that storing something there causes it to
appear on the screen) memory-mapped. As an aside, the TRS-80 model 1
had almost everything (video, keyboard, printer port, etc) _memory mapped_,
the only standard I/O mapped device was the cassette unit.


> I've now traced all of them and its associated pair of supporting chips
> (LS04 and an MM74C906) and it's a tape controller, it's only using port 2
> and all the lines go to the tape drive header.
>
>>> There are also 3 modules on the phone side which I can't find anything
>>> about, marked "NKT NMC1515", NMC1516 and NMC1517.
>>
>> Are these potted blocks, or can you see the components on them?
>
> They're the big green rectangles visible in this picture -

Ah I can see what appear to be thick-film resistors on them
(the black rectangles). Are there more conventional components
on the underside?

> http://www.binarydinosaurs.co.uk/STCexecutelboard.jpg
> The D8741A is above them and the SAA5070 LUCY chip is to the right.
>
>> Could this be part of the serial data transfer? There will be incoming data
>> at 1200 baud. There should be some kind of demodulator (maybe one of the
>> modules) and a serial-to-parallel converter You've not mentioned a serial 
>> chip
>> (is there one), if not then I would expect it to be simulated in software.
>> Maybe on the 8085, maybe on the 8741.
>
> LUCY does that, it's also where the keyboard connector's lines split off so
> the whole data bus goes up to the keyboard module too. I now need to check

Ah, I'd forgotten there was an SAA5070 on this board...


> Now, having just typed that it's making me think of what Allison said about
> lightning or ESD, I know the previous owner of this machine powered it up
> before putting it on eb*y and 'the smoke came out' which I thought initially
> was just the RIFA mains filter popping (it had), but look at this picture:
>
> http://www.binarydinosaurs.co.uk/STCExecutelBlownCaps.jpg
>
> These are on the tape drive controller board and I thought they'd rotted
> through exposure to moisture for several years but could they have exploded
> instead? The damage looks old so I don't think that power up is responsible.

What is the tape drive? That board has a distinct look of Philips about it. What
tapes does it use? If I were a gambling man I would guess at Phlips
minicassettes
(not microcassettes). I think I know that drive...

If it is the drive I am thinking of, I have one somewhere, meaning I can look up
the capacitors.

But I would expect the thing to produce video without it.

I don't suppose you have a logic analyser? This is the sort of problem
that would
have me using said instrument to see what the processor is executing.

-tony


Re: 8085 IO ports

2017-01-17 Thread Adrian Graham
On 17 January 2017 at 02:14, allison  wrote:

>
> 
>
> That's the later 1983 version but its the book you want.
>

Thanks, that was some light reading over lunchtime. The descriptions of the
interfacing helped a lot so tonight I need to finish tracing out the
SAA5070 LUCY circuit and the non data bus lines going to the keyboard
because I've not found anything that (I'm guessing) should interrupt the
CPU to say there's been keyboard activity.

> On the tape drive controller board are a pair of very messy 25V caps that
I

> > thought had rotted because of damp - the tape transport itself is
> probably
> > beyond saving through rust - but could they have exploded I wonder.
> >
> Likely history but if the parts move and the head is ok then clean it
> really well replace the caps and try.
>

The transport motors move fine but the head unit itself is badly rusted
around the edges. I also don't know what capacitance the ex-caps are since
they're that badly damaged but that's info I can hopefully get from the
other unit since that one isn't damaged internally but is equally dead.


> >> in that system working to this day (along with a 8085A subprocessor).
> > Strewth, that's some troubleshooting effort!
>
> I had bought the Netronics explorer 8085 just before that bolt.  That
> gave me
> a S100 chassis that would run even bad cards (think SDK85 with S100 bus
> interface).
>

Just googled it, that must've been expnsive when it was new!


> The turned pin are heavy and will stand that the copper under them
> or leading to them may be gone
>

I tested the sockets by resting the board on a sponge wrapped in tin foil
connected to one lead of my DMM.


> FYI vinegar or lemon juice will neutralize it, the battery (likely nicd)
> is alkaline.
> Rinse with water and dry.
>

Oh yes, that was the first thing I did when I removed the battery :)


> You can always inject a really slow processor clock, isn't rated for it
> but it does
> run down to less than 1khz. You can then watch signal with a bunch of leds.
>

I bought a test clip so I can watch every line with a logic analyser. It's
proved to be a useful investment!

Cheers,
-- 
adrian/witchy
Owner of Binary Dinosaurs, the UK's biggest home computer collection?
www.binarydinosaurs.co.uk


Re: 8085 IO ports

2017-01-17 Thread allison
On 01/16/2017 08:37 PM, Adrian Graham wrote:
> On 15/01/2017 16:59, "allison"  wrote:
>
>>> I've thought of that which is why I'm chasing down details on the Viewdata
>>> chip and the D8741A which I assume is being used as a keyboard controller.
>>> There are also 3 modules on the phone side which I can't find anything
>>> about, marked "NKT NMC1515", NMC1516 and NMC1517.
>> 8741A is likely keyboard controller.  FYI its the eprom version of 8041A
>> (the a is important). That part is easy to dump the EPROM and analyse as its
> only 1K.
>
> Yep, done that fortunately. My MQP programmer can read it and also the PAL
> that does the ROM selection so I know they're both OK.
>>  
>> You can use a 8048 disasembler on that, nearly the same part save for
>> the slave IO structure and a few instructions.
> Glen Slick has already done that for me, much better results than what I
> could get out of the d48 disassembler.
>
>> So its possible to use those pins (4 of them) as inputs without interrupts
>> on all or none as you can read their state.  RST7.4 is also special as
>> its edge
>> triggered (and transition activates it and it sets a latch) so unlike
>> the other
>> the state of the pin can be a pulse rather than a LEVEL.
> OK, that might explain why there's only two entry points for those interrupt
> pins in the code.
>  
>> So it seems there is a keyboard interrupt and video (scan line) interrupt
>> plus the RTC (time keeping and ?).  You also have phone line events in
>> there.
> Tonight I discovered the D8741A is a controller for the little microcassette
> unit that's seriously not well with rust and damaged/rotted/exploded caps :/
>  
>> FYI the software structure is familiar and likely straight out of the
>> book for the 8085.
>> You are preserving cpu status (AC-PSW), BC, DE, HL pairs, then working
>> on the interrupt event.
> OK.
>
>>> Ok, it never gets interrupted then.
>> You would also see /INTA (interrupt acknowledge) trigger.
> I don't remember seeing that when I was monitoring all the control lines and
> I've just noticed on my drawings I've left out INTA, must rectify that.
>  
>> Do find a copy (its definitely on line) of the 8085 users manual,
>> september 1978
> I'll have a look for that at work tomorrow, there's every chance we've got
> it in the library.


http://bitsavers.informatik.uni-stuttgart.de/pdf/intel/MCS80/MCS80_85_Users_Manual_Jan83.pdf

That's the later 1983 version but its the book you want.  

>> It really sounds like the unit suffered a high voltage transient
>> (lighting, ESD, power supply
>> over voltage).
> Yeah, the previous owner did power it up and got smoke but I thought that
> was just the RIFA mains filter popping. Currently I'm up to 6 replaced chips
> that all had dead inputs and the startup opamp (ICL7611). Fortunately the
> non-replaceable ones are OK.
>
> On the tape drive controller board are a pair of very messy 25V caps that I
> thought had rotted because of damp - the tape transport itself is probably
> beyond saving through rust - but could they have exploded I wonder.
>  
Likely history but if the parts move and the head is ok then clean it
really well
replace the caps and try.

>> of TTL across 12 boards to bring it back to life.  The only MOS device
>> (had a hole in it)
>> was a 8251A USART to the H19 terminal (also toasted).  Z80 was still
>> good and still
>> in that system working to this day (along with a 8085A subprocessor).
> Strewth, that's some troubleshooting effort!

I had bought the Netronics explorer 8085 just before that bolt.  That
gave me
a S100 chassis that would run even bad cards (think SDK85 with S100 bus
interface).
That made it possible to go a card at a time for function and level of
function.
Figure maybe 250 more more hours to get it running again and almost a year
chasing random failures that were overstress induced.  I still use that
machine
after dumping the 8kx8 cards for a larger 64K static it has performed well.
Around 1980 it went through a series of mods and adds to upgrade it to
multiporcessor.

>> Sockets on the other hand have caused me no small amount of bedevilment.
>> If its not machined pin and old its likely trouble.
> I do wonder about the sockets though they're all turned pin. The RAM refresh
> and first ROM socket were badly verdigris'd with the battery leaking all
> over that part of the board but they test OK with a DMM.
>  
The turned pin are heavy and will stand that the copper under them
or leading to them may be gone

FYI vinegar or lemon juice will neutralize it, the battery (likely nicd)
is alkaline.
Rinse with water and dry.
 Hummm...  4116 dram, that means you have external refresh logic or they are
 going cheap and doing refersh on a interrupt (or maybe) timed loop.
>>> There's an MC2342A doing the refresh and that's looking OK now that I've
>>> swapped it. The original chip had no working outputs.
>> Ok, blown  that make what I said earlier of a ESD incident likely.
>> Check the DRAM too

Re: 8085 IO ports

2017-01-16 Thread Adrian Graham
On 15/01/2017 16:59, "allison"  wrote:

>> I've thought of that which is why I'm chasing down details on the Viewdata
>> chip and the D8741A which I assume is being used as a keyboard controller.
>> There are also 3 modules on the phone side which I can't find anything
>> about, marked "NKT NMC1515", NMC1516 and NMC1517.
> 8741A is likely keyboard controller.  FYI its the eprom version of 8041A
> (the a is important). That part is easy to dump the EPROM and analyse as its
only 1K.

Yep, done that fortunately. My MQP programmer can read it and also the PAL
that does the ROM selection so I know they're both OK.
>  
> You can use a 8048 disasembler on that, nearly the same part save for
> the slave IO structure and a few instructions.

Glen Slick has already done that for me, much better results than what I
could get out of the d48 disassembler.

> So its possible to use those pins (4 of them) as inputs without interrupts
> on all or none as you can read their state.  RST7.4 is also special as
> its edge
> triggered (and transition activates it and it sets a latch) so unlike
> the other
> the state of the pin can be a pulse rather than a LEVEL.

OK, that might explain why there's only two entry points for those interrupt
pins in the code.
 
> So it seems there is a keyboard interrupt and video (scan line) interrupt
> plus the RTC (time keeping and ?).  You also have phone line events in
> there.

Tonight I discovered the D8741A is a controller for the little microcassette
unit that's seriously not well with rust and damaged/rotted/exploded caps :/
 
> FYI the software structure is familiar and likely straight out of the
> book for the 8085.
> You are preserving cpu status (AC-PSW), BC, DE, HL pairs, then working
> on the interrupt event.

OK.

>> Ok, it never gets interrupted then.
> You would also see /INTA (interrupt acknowledge) trigger.

I don't remember seeing that when I was monitoring all the control lines and
I've just noticed on my drawings I've left out INTA, must rectify that.
 
> Do find a copy (its definitely on line) of the 8085 users manual,
> september 1978

I'll have a look for that at work tomorrow, there's every chance we've got
it in the library.

> It really sounds like the unit suffered a high voltage transient
> (lighting, ESD, power supply
> over voltage).

Yeah, the previous owner did power it up and got smoke but I thought that
was just the RIFA mains filter popping. Currently I'm up to 6 replaced chips
that all had dead inputs and the startup opamp (ICL7611). Fortunately the
non-replaceable ones are OK.

On the tape drive controller board are a pair of very messy 25V caps that I
thought had rotted because of damp - the tape transport itself is probably
beyond saving through rust - but could they have exploded I wonder.
 
> of TTL across 12 boards to bring it back to life.  The only MOS device
> (had a hole in it)
> was a 8251A USART to the H19 terminal (also toasted).  Z80 was still
> good and still
> in that system working to this day (along with a 8085A subprocessor).

Strewth, that's some troubleshooting effort!

> Sockets on the other hand have caused me no small amount of bedevilment.
> If its not machined pin and old its likely trouble.

I do wonder about the sockets though they're all turned pin. The RAM refresh
and first ROM socket were badly verdigris'd with the battery leaking all
over that part of the board but they test OK with a DMM.
 
>>> Hummm...  4116 dram, that means you have external refresh logic or they are
>>> going cheap and doing refersh on a interrupt (or maybe) timed loop.
>> There's an MC2342A doing the refresh and that's looking OK now that I've
>> swapped it. The original chip had no working outputs.
> Ok, blown  that make what I said earlier of a ESD incident likely.
> Check the DRAM too.

They all LOOK ok in that I get active traces at DIN/DOUT and none of them
get hot so they're hopefully OK. I know from working on a few PET 80xx that
a single bad 4116 can stop the machine booting but I don't want to start
desoldering those unless it's obvious one or more have died.

>> If you guys weren't around to put up with my amateurish questions I'd have
>> never started work on it and it would've remained just another unloved bit
>> of kit on a table in a museum like the other 5 that are known to exist.
> We try.

It's all excellent help!
 
> I enjoy working with 8048(family), 8085 and z80 have built with them for
> decades
> and do both HW and SW.Its fun to apply modern software techniques to
> old hardware as often they do it well even if not lighting fast.

I still find it difficult to get my brain to acknowledge that despite their
speed I really am looking at things happening on individual clock ticks,
I'll get there :)

Cheers

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-16 Thread Adrian Graham
On 15/01/2017 14:38, "Tony Duell"  wrote:

> But do you know it''s not doing I/O. OK IO/M is never going into the
> right state for
> I/O, but what that _really_ means is that the 8085 is never executing
> any IN or OUT
> type instructions. But of course memory mapped I/O is possible
> (storing or loading
> at particular locations that happen to be I/O devices) on any processor that
> can
> access memory (including the 8085). I've seen small 8085 and Z80 control
> systems
> with only memory-mapped I/O.

I pondered that too but the reference says IN and OUT are used for
non-memory mapped I/O and there's a few of those instructions in the code.
Whether they're being executed at this point in time is moot.

>> Apologies for all the daft sounding questions (this goes to Dwight, Tony and
>> Chuck too) but historically I'm a high level programmer so getting right
> 
> I don't think I've seen any daft questions yet!

Phew :)
 
>> I've thought of that which is why I'm chasing down details on the Viewdata
>> chip and the D8741A which I assume is being used as a keyboard controller.
> 
> Why do you assume it's a keyboard controller? It might be, but it could
> be other things; THe 8741 is the EPROM version of the 8041. It's a
> 8048-like microcontroller with a couple of latches on-chip so it can be
> used as a peripheral from another processor (here the 8085). You need
> to trace the I/O lines from the 8741 to see if they go to the keyboard.

I've now traced all of them and its associated pair of supporting chips
(LS04 and an MM74C906) and it's a tape controller, it's only using port 2
and all the lines go to the tape drive header.

>> There are also 3 modules on the phone side which I can't find anything
>> about, marked "NKT NMC1515", NMC1516 and NMC1517.
> 
> Are these potted blocks, or can you see the components on them?

They're the big green rectangles visible in this picture -
http://www.binarydinosaurs.co.uk/STCexecutelboard.jpg
The D8741A is above them and the SAA5070 LUCY chip is to the right.

> Could this be part of the serial data transfer? There will be incoming data
> at 1200 baud. There should be some kind of demodulator (maybe one of the
> modules) and a serial-to-parallel converter You've not mentioned a serial chip
> (is there one), if not then I would expect it to be simulated in software.
> Maybe on the 8085, maybe on the 8741.

LUCY does that, it's also where the keyboard connector's lines split off so
the whole data bus goes up to the keyboard module too. I now need to check
that for power and dead chips since it's obviously not the passive device I
thought it was previously. I've tried running the machine with the keyboard
connected but there's no indicators on there to show any signs of life.

> 
>> RST6.5 is from the Teletext chip, wired to the video status outputs.
>> RST5.5 is from the D8741A, again from a pair of status outputs (IBF/OBF)
> 
> The last basically says that either the 8741 has data to send to the 8085
> (OBF = Output Buffer Full) or is ready for data from the 8085 (IBF = Input
> Buffer Full)

Yep, read/write to the tape device which I can't connect up until I've
replaced the rotted caps.

Now, having just typed that it's making me think of what Allison said about
lightning or ESD, I know the previous owner of this machine powered it up
before putting it on eb*y and 'the smoke came out' which I thought initially
was just the RIFA mains filter popping (it had), but look at this picture:

http://www.binarydinosaurs.co.uk/STCExecutelBlownCaps.jpg

These are on the tape drive controller board and I thought they'd rotted
through exposure to moisture for several years but could they have exploded
instead? The damage looks old so I don't think that power up is responsible.

Cheers!

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-15 Thread allison
On 01/15/2017 01:06 PM, Chuck Guzis wrote:
> On 01/15/2017 09:37 AM, Glen Slick wrote:
>
>
>> In the EPROM binary dump you posted I see code that is doing IN and
>> OUT accesses to the following port locations...
> I've seen that technique used to address a device, such as off-chip
> EEPROM--basically, rather than employ a separate latch for the address
> or map the device into memory space, a block of I/O addresses are used
> to directly access the device.   It seems wasteful--and, as the code
> points out, rather inflexible, as the 8085 only has the
> immediate-operand IN and OUT instructions, but hey, it saves a couple of
> chips.
A good example of that is the NS* MDS controller.  It embeds commands
and data
in the address of access and the content written/read.  While the NS*
was Z80
the controller worked well with 8080 and 8085 and only used a 2k chunk of
space. (E800...EFFFh).

Since the 8085 can address 64K its not a single chip embedded (ep)rom CPU
loosing some space in a controller environment of less than 32K is trivial.

Systems that use memory mapped IO include 6502, 6800, 6809, PDP-11,
and the list goes on.  Works for them.

The instruction set advantage is the data from or to that port can be
masked
or set using BIT(set/clear), AND, OR and other instructions as applicable.
that and a simple latch or D-ff can be very cheap if all you need are a few
bits.

> So, the first thing that I'd look for is what devices on the board can
> be accessed in this fashion.

The instructions for both in and out will likely point to those devices
but beware if the ports are few they may also be partially decoded.

Based on reports so far the board has issues with multiple shorted (blown)
inputs so the lack of transitions suggest down stream failures.  Its most
common when a bolt from the blue (ESD or conducted lightning) has been
the most probable cause.


Allison

> --Chuck
>
>




Re: 8085 IO ports

2017-01-15 Thread allison
On 01/15/2017 08:02 AM, Adrian Graham wrote:
> On 15/01/2017 03:04, "allison"  wrote:
>
>> On 01/14/2017 08:18 PM, dwight wrote:
>>> If it is not doing I/O and waiting for something, it is likely waiting for 
>>> an
>>> interrupt.
>>>
>>> Dwight
>
> Apologies for all the daft sounding questions (this goes to Dwight, Tony and
> Chuck too) but historically I'm a high level programmer so getting right
> down into silicon level is something I've only been doing for 18 months or
> so. I can sit with a reference book and read assembler listings, draw up a
> logic flow, watch activity/read voltages on a scope but then there's
> applying that to what the hardware is doing too, a fun learning curve.
All my life with hardware and software or so it would seem.  I was a
microprocessor
product engineer at one time so this chip is one I roll hardware and
software off
the top of may head still. 

>>> STC Executel fun continues and I'm at the point where I'm fairly sure code
>>> is running but it's stuck in a tight loop waiting for something to happen.
>> And maybe waiting for a interrupt?
> I've thought of that which is why I'm chasing down details on the Viewdata
> chip and the D8741A which I assume is being used as a keyboard controller.
> There are also 3 modules on the phone side which I can't find anything
> about, marked "NKT NMC1515", NMC1516 and NMC1517.
8741A is likely keyboard controller.  FYI its the eprom version of 8041A
(the a is important).
That part is easy to dump the EPROM and analyse as its only 1K.
 
You can use a 8048 disasembler on that, nearly the same part save for
the slave IO structure
and a few instructions.

> 3 interrupts are in use:
>
> TRAP is hardwired to GND.
> INTR is pulled low via a 1kohm resistor.
> RST7.5 is clock driven. If my disassembled code is to be believed the first
> thing it does after PUSHing PSW, B, D and H onto the stack is a RIM
> instruction which reads from SID, this is directly wired to one of the NKT
> modules I mentioned, possibly checking for an incoming phone call.
> RST6.5 is from the Teletext chip, wired to the video status outputs.
> RST5.5 is from the D8741A, again from a pair of status outputs (IBF/OBF)
>

FYI if you read the manual on the 8085 those MAY be in use as interrupts.
The RIM instruction can read several things one is the state of the SID
pin,
also the state of the RSTx.x pins and the interrupt mask plus the status of
the global interrupt enable.

So its possible to use those pins (4 of them) as inputs without interrupts
on all or none as you can read their state.  RST7.4 is also special as
its edge
triggered (and transition activates it and it sets a latch) so unlike
the other
the state of the pin can be a pulse rather than a LEVEL.

So it seems there is a keyboard interrupt and video (scan line) interrupt
plus the RTC (time keeping and ?).  You also have phone line events in
there.

FYI the software structure is familiar and likely straight out of the
book for the 8085.
You are preserving cpu status (AC-PSW), BC, DE, HL pairs, then working
on the
interrupt event.

>> That's what I di when I'm building simple 8085 that interrupt driven.
>> Let it loop
>> doing repetitive stuff if anything, an example is the old days
>> refreshing Dram.
>> Then use RSTx.5 to force it into a active do something mode and when done
>> back to the loop.
>>
>> A current project for myself has the 8085 runnign a simple multitasking OS
>> and the loop runs through the task table and every task retruns to the loop.
>> Interrupts are real time events or priority events that need out of
>> sequence attention.  The 8085 makes that fairly simple.
>>
>> I'd bet the Executel is doing that, refershing display and scanning for
>> events
>> with some interrupt driven for out of sequence response.
> That would make sense so I'm pondering why IO/m never goes high and why the
> teletext chip (and video driver) never generates a video sync which it's
> supposed to do.
Also there is no rule that says IO must be IO-mapped its not uncommon
for 8085 users
to memory map IO just like 6800 and 6502 users as it offers a wider set
of instructions
for reading/writing or bit manipulation.

>>> The 8085A reference tells me a non-memory I/O is signalled by IO/M going
>>> high while it puts the port number on the address bus (0xE3 to 0xE8 in this
>>> case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
>>> then this machine in its current state doesn't do any non-memory I/O - IO/M
>>> is the only signal that stays low. It's not a failed CPU since I have 3
>>> different ones and they all do this.
>> Correct.  IO/m will only stay high for an IO cycle for all memory cycles
>> it goes low (instruction fetch, execute plus memory read or writes ).
>>
>> IO/m (there is a bar over the m) also goes high during a RST 5.5, 6.5,
>> 7.5 and Trap if interrupts are enabled along with INTR.
> Ok, it never gets interrupted then.
You would also see /INTA (interrupt acknowledge) trigger.

Do fi

Re: 8085 IO ports

2017-01-15 Thread Chuck Guzis
On 01/15/2017 09:37 AM, Glen Slick wrote:


> In the EPROM binary dump you posted I see code that is doing IN and
> OUT accesses to the following port locations...

I've seen that technique used to address a device, such as off-chip
EEPROM--basically, rather than employ a separate latch for the address
or map the device into memory space, a block of I/O addresses are used
to directly access the device.   It seems wasteful--and, as the code
points out, rather inflexible, as the 8085 only has the
immediate-operand IN and OUT instructions, but hey, it saves a couple of
chips.

So, the first thing that I'd look for is what devices on the board can
be accessed in this fashion.

--Chuck



Re: 8085 IO ports

2017-01-15 Thread Glen Slick
On Sat, Jan 14, 2017 at 12:01 PM, Adrian Graham
 wrote:
> Hi folks,
>
> STC Executel fun continues and I'm at the point where I'm fairly sure code
> is running but it's stuck in a tight loop waiting for something to happen.
>
> The 8085A reference tells me a non-memory I/O is signalled by IO/M going
> high while it puts the port number on the address bus (0xE3 to 0xE8 in this
> case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
> then this machine in its current state doesn't do any non-memory I/O - IO/M
> is the only signal that stays low. It's not a failed CPU since I have 3
> different ones and they all do this.
>

In the EPROM binary dump you posted I see code that is doing IN and
OUT accesses to the following port locations:

IN  $70
IN  $71

IN  $D0

IN  $E3
IN  $E7

OUT $71

OUT $B0
OUT $BA
OUT $BD

OUT $D1

OUT $E2
OUT $E3
OUT $E6
OUT $E7
OUT $E8

In addition there is a routine with builds an IN instruction routine
from a variable location on the fly in RAM and appears to call that in
a loop from ports $B2 through $BA

L0F26:  LXI H,$F280
MVI M,$C9   ; RET instruction opcode
DCX H
MOV M,C
DCX H
MVI M,$DB   ; IN instruction opcode
PCHL


L10BD:  LXI H,$F2AB
MOV A,M
ANI $3F
MOV M,A
L10C4:  MVI C,$B2
CALLL0F26
LXI D,$F281
L10CC:  CALLL0F26
ANI $0F
CPI $0F
JNZ L10EC
LXI H,$F2AB
MOV A,M
ANI $80
JNZ L10E6
MOV A,M
ORI $80
MOV M,A
JMP L10C4

L10E6:  MOV A,M
ORI $60
MOV M,A
MVI A,$0F
L10EC:  STAXD
INX D
MOV A,C
INR C
CPI $BC
JNZ L10CC
RET


Re: 8085 IO ports

2017-01-15 Thread Tony Duell
On Sun, Jan 15, 2017 at 1:02 PM, Adrian Graham
 wrote:
> On 15/01/2017 03:04, "allison"  wrote:
>
>> On 01/14/2017 08:18 PM, dwight wrote:
>>> If it is not doing I/O and waiting for something, it is likely waiting for 
>>> an
>>> interrupt.
>>>
>>> Dwight

But do you know it''s not doing I/O. OK IO/M is never going into the
right state for
I/O, but what that _really_ means is that the 8085 is never executing
any IN or OUT
type instructions. But of course memory mapped I/O is possible
(storing or loading
at particular locations that happen to be I/O devices) on any processor that can
access memory (including the 8085). I've seen small 8085 and Z80 control systems
with only memory-mapped I/O.


>
>
> Apologies for all the daft sounding questions (this goes to Dwight, Tony and
> Chuck too) but historically I'm a high level programmer so getting right

I don't think I've seen any daft questions yet!

> down into silicon level is something I've only been doing for 18 months or
> so. I can sit with a reference book and read assembler listings, draw up a
> logic flow, watch activity/read voltages on a scope but then there's
> applying that to what the hardware is doing too, a fun learning curve.
>
>>> STC Executel fun continues and I'm at the point where I'm fairly sure code
>>> is running but it's stuck in a tight loop waiting for something to happen.
>> And maybe waiting for a interrupt?
>
> I've thought of that which is why I'm chasing down details on the Viewdata
> chip and the D8741A which I assume is being used as a keyboard controller.

Why do you assume it's a keyboard controller? It might be, but it could
be other things; THe 8741 is the EPROM version of the 8041. It's a
8048-like microcontroller with a couple of latches on-chip so it can be
used as a peripheral from another processor (here the 8085). You need
to trace the I/O lines from the 8741 to see if they go to the keyboard.



> There are also 3 modules on the phone side which I can't find anything
> about, marked "NKT NMC1515", NMC1516 and NMC1517.

Are these potted blocks, or can you see the components on them?


>
> 3 interrupts are in use:
>
> TRAP is hardwired to GND.
> INTR is pulled low via a 1kohm resistor.
> RST7.5 is clock driven. If my disassembled code is to be believed the first
> thing it does after PUSHing PSW, B, D and H onto the stack is a RIM
> instruction which reads from SID, this is directly wired to one of the NKT
> modules I mentioned, possibly checking for an incoming phone call.

Could this be part of the serial data transfer? There will be incoming data
at 1200 baud. There should be some kind of demodulator (maybe one of the
modules) and a serial-to-parallel converter You've not mentioned a serial chip
(is there one), if not then I would expect it to be simulated in software. Maybe
on the 8085, maybe on the 8741.

> RST6.5 is from the Teletext chip, wired to the video status outputs.
> RST5.5 is from the D8741A, again from a pair of status outputs (IBF/OBF)

The last basically says that either the 8741 has data to send to the 8085
(OBF = Output Buffer Full) or is ready for data from the 8085 (IBF = Input
Buffer Full)


>> A current project for myself has the 8085 runnign a simple multitasking OS
>> and the loop runs through the task table and every task retruns to the loop.
>> Interrupts are real time events or priority events that need out of
>> sequence attention.  The 8085 makes that fairly simple.
>>
>> I'd bet the Executel is doing that, refershing display and scanning for
>> events
>> with some interrupt driven for out of sequence response.

I would be surprised if a 'closed' system like this did anything so complicated.
More likely to be doing things like shifting characters around and
then responding
to an interrupt for keypress or incoming character.

-tony


Re: 8085 IO ports

2017-01-15 Thread Adrian Graham
On 15/01/2017 03:04, "allison"  wrote:

> On 01/14/2017 08:18 PM, dwight wrote:
>> If it is not doing I/O and waiting for something, it is likely waiting for an
>> interrupt.
>> 
>> Dwight


Apologies for all the daft sounding questions (this goes to Dwight, Tony and
Chuck too) but historically I'm a high level programmer so getting right
down into silicon level is something I've only been doing for 18 months or
so. I can sit with a reference book and read assembler listings, draw up a
logic flow, watch activity/read voltages on a scope but then there's
applying that to what the hardware is doing too, a fun learning curve.

>> STC Executel fun continues and I'm at the point where I'm fairly sure code
>> is running but it's stuck in a tight loop waiting for something to happen.
> And maybe waiting for a interrupt?

I've thought of that which is why I'm chasing down details on the Viewdata
chip and the D8741A which I assume is being used as a keyboard controller.
There are also 3 modules on the phone side which I can't find anything
about, marked "NKT NMC1515", NMC1516 and NMC1517.

3 interrupts are in use:

TRAP is hardwired to GND.
INTR is pulled low via a 1kohm resistor.
RST7.5 is clock driven. If my disassembled code is to be believed the first
thing it does after PUSHing PSW, B, D and H onto the stack is a RIM
instruction which reads from SID, this is directly wired to one of the NKT
modules I mentioned, possibly checking for an incoming phone call.
RST6.5 is from the Teletext chip, wired to the video status outputs.
RST5.5 is from the D8741A, again from a pair of status outputs (IBF/OBF)

> That's what I di when I'm building simple 8085 that interrupt driven.
> Let it loop
> doing repetitive stuff if anything, an example is the old days
> refreshing Dram.
> Then use RSTx.5 to force it into a active do something mode and when done
> back to the loop.
> 
> A current project for myself has the 8085 runnign a simple multitasking OS
> and the loop runs through the task table and every task retruns to the loop.
> Interrupts are real time events or priority events that need out of
> sequence attention.  The 8085 makes that fairly simple.
> 
> I'd bet the Executel is doing that, refershing display and scanning for
> events
> with some interrupt driven for out of sequence response.

That would make sense so I'm pondering why IO/m never goes high and why the
teletext chip (and video driver) never generates a video sync which it's
supposed to do.

>> The 8085A reference tells me a non-memory I/O is signalled by IO/M going
>> high while it puts the port number on the address bus (0xE3 to 0xE8 in this
>> case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
>> then this machine in its current state doesn't do any non-memory I/O - IO/M
>> is the only signal that stays low. It's not a failed CPU since I have 3
>> different ones and they all do this.
> Correct.  IO/m will only stay high for an IO cycle for all memory cycles
> it goes low (instruction fetch, execute plus memory read or writes ).
> 
> IO/m (there is a bar over the m) also goes high during a RST 5.5, 6.5,
> 7.5 and Trap if interrupts are enabled along with INTR.

Ok, it never gets interrupted then.

>> I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
>> down; presumably I can test this by lifting the IO/M pin out of its socket
>> then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
>> watch what the outputs do while the machine is running?
> It could be you have a chip with a blown input (stuck low)..   However
> doing that test is rather inconclusive as there is so much other state
> activity to track.

So I found last night.

> Hummm...  4116 dram, that means you have external refresh logic or they are
> going cheap and doing refersh on a interrupt (or maybe) timed loop.

There's an MC2342A doing the refresh and that's looking OK now that I've
swapped it. The original chip had no working outputs.

>> I'm also guessing things would be a lot easier if I had a memory map...
> A real schematic is likely a great aid too.

Indeed! I'm doing this with absolutely zero documentation other than what
I've drawn up myself and a stack of reference books/datasheets. I did manage
to find the designer of this machine, David Leevers, and at some point he's
going to see what docs he has left though at present he can only think of a
user guide.

If you guys weren't around to put up with my amateurish questions I'd have
never started work on it and it would've remained just another unloved bit
of kit on a table in a museum like the other 5 that are known to exist.

Cheers! 

-- 
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-15 Thread allison
On 01/14/2017 08:18 PM, dwight wrote:
> If it is not doing I/O and waiting for something, it is likely waiting for an 
> interrupt.
>
> Dwight
>
>
> 
> From: cctalk  on behalf of Adrian Graham 
> 
> Sent: Saturday, January 14, 2017 12:01:32 PM
> To: Discussion: On-Topic and Off-Topic Posts
> Subject: 8085 IO ports
>
> Hi folks,
>
> STC Executel fun continues and I'm at the point where I'm fairly sure code
> is running but it's stuck in a tight loop waiting for something to happen.
And maybe waiting for a interrupt?

That's what I di when I'm building simple 8085 that interrupt driven. 
Let it loop
doing repetitive stuff if anything, an example is the old days
refreshing Dram.
Then use RSTx.5 to force it into a active do something mode and when done
back to the loop.

A current project for myself has the 8085 runnign a simple multitasking OS
and the loop runs through the task table and every task retruns to the loop.
Interrupts are real time events or priority events that need out of
sequence
attention.  The 8085 makes that fairly simple.

I'd bet the Executel is doing that, refershing display and scanning for
events
with some interrupt driven for out of sequence response.

>
> The 8085A reference tells me a non-memory I/O is signalled by IO/M going
> high while it puts the port number on the address bus (0xE3 to 0xE8 in this
> case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
> then this machine in its current state doesn't do any non-memory I/O - IO/M
> is the only signal that stays low. It's not a failed CPU since I have 3
> different ones and they all do this.
Correct.  IO/m will only stay high for an IO cycle for all memory cycles
it goes
low (instruction fetch, execute plus memory read or writes ).

IO/m (there is a bar over the m) also goes high during a RST 5.5, 6.5,
7.5 and Trap
if interrupts are enabled along with INTR.
> I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
> down; presumably I can test this by lifting the IO/M pin out of its socket
> then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
> watch what the outputs do while the machine is running?
It could be you have a chip with a blown input (stuck low)..   However
doing that
test is rather inconclusive as there is so much other state activity to
track.

> With my little logic analyser on the address bus it's continually active so
> it's not a stuck bit either, at least not at the CPU. I can watch the
> repetitive patterns while the code runs through 3 delay loops then the
> patterns alter while it's off doingsomething. All the 4116 RAM chips
> seem to be OK too.
Note during IO the a0-7 is mirrored to A8-15.

Hummm...  4116 dram, that means you have external refresh logic or they are
going cheap and doing refersh on a interrupt (or maybe) timed loop.
> I'm also guessing things would be a lot easier if I had a memory map...
A real schematic is likely a great aid too.

Allison
> Cheers!
>
> --
> Adrian/Witchy
> Binary Dinosaurs creator/curator
> Www.binarydinosaurs.co.uk - the UK's biggest private home computer
> collection?
>
>
>




Re: 8085 IO ports

2017-01-14 Thread dwight
If it is not doing I/O and waiting for something, it is likely waiting for an 
interrupt.

Dwight



From: cctalk  on behalf of Adrian Graham 

Sent: Saturday, January 14, 2017 12:01:32 PM
To: Discussion: On-Topic and Off-Topic Posts
Subject: 8085 IO ports

Hi folks,

STC Executel fun continues and I'm at the point where I'm fairly sure code
is running but it's stuck in a tight loop waiting for something to happen.

The 8085A reference tells me a non-memory I/O is signalled by IO/M going
high while it puts the port number on the address bus (0xE3 to 0xE8 in this
case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
then this machine in its current state doesn't do any non-memory I/O - IO/M
is the only signal that stays low. It's not a failed CPU since I have 3
different ones and they all do this.

I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
down; presumably I can test this by lifting the IO/M pin out of its socket
then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
watch what the outputs do while the machine is running?

With my little logic analyser on the address bus it's continually active so
it's not a stuck bit either, at least not at the CPU. I can watch the
repetitive patterns while the code runs through 3 delay loops then the
patterns alter while it's off doingsomething. All the 4116 RAM chips
seem to be OK too.

I'm also guessing things would be a lot easier if I had a memory map...

Cheers!

--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?




Re: 8085 IO ports

2017-01-14 Thread dwight
That is likely to cause bus contention. I don't see why you want to do that?

The processor thinks i is in control and you cause an I/O, read or write at a 
random time??

What machine are you talking about. Can you put your own EPROM in there with 
the port reads and writes so things are properly timed?

Dwight



From: cctalk  on behalf of Adrian Graham 

Sent: Saturday, January 14, 2017 12:01:32 PM
To: Discussion: On-Topic and Off-Topic Posts
Subject: 8085 IO ports

Hi folks,

STC Executel fun continues and I'm at the point where I'm fairly sure code
is running but it's stuck in a tight loop waiting for something to happen.

The 8085A reference tells me a non-memory I/O is signalled by IO/M going
high while it puts the port number on the address bus (0xE3 to 0xE8 in this
case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
then this machine in its current state doesn't do any non-memory I/O - IO/M
is the only signal that stays low. It's not a failed CPU since I have 3
different ones and they all do this.

I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
down; presumably I can test this by lifting the IO/M pin out of its socket
then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
watch what the outputs do while the machine is running?

With my little logic analyser on the address bus it's continually active so
it's not a stuck bit either, at least not at the CPU. I can watch the
repetitive patterns while the code runs through 3 delay loops then the
patterns alter while it's off doingsomething. All the 4116 RAM chips
seem to be OK too.

I'm also guessing things would be a lot easier if I had a memory map...

Cheers!

--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?