[PATCH] D148596: [KMSAN] Enable on SystemZ
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa3e56a8792ff: [KMSAN] Enable on SystemZ (authored by iii).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
===
--- llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
@@ -3,9 +3,60 @@
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
target triple = "s390x-unknown-linux-gnu"
-declare i64 @foo(i64 %guard, ...) #0
+%struct.__va_list = type { i64, i64, ptr, ptr }
+declare void @llvm.lifetime.start.p0(i64, ptr)
+declare void @llvm.va_start(ptr)
+declare void @llvm.va_end(ptr)
+declare void @llvm.lifetime.end.p0(i64, ptr)
+
+define i64 @foo(i64 %guard, ...) #1 {
+ %vl = alloca %struct.__va_list
+ call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
+ call void @llvm.va_start(ptr %vl)
+ call void @llvm.va_end(ptr %vl)
+ call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
+ ret i64 0
+}
-attributes #0 = { "target-features"="+soft-float" "use-soft-float"="true" }
+; CHECK-LABEL: define {{[^@]+}}@foo(
+
+; Callers store variadic arguments' shadow and origins into va_arg_shadow and
+; va_arg_origin. Their layout is: the register save area (160 bytes) followed
+; by the overflow arg area. It does not depend on "packed-stack".
+; Check that callees correctly backup shadow into a local variable.
+
+; CHECK: [[TMP:%.*]] = alloca { ptr, ptr }
+; CHECK: [[OverflowSize:%.*]] = load i64, ptr %va_arg_overflow_size
+; CHECK: [[MetaSize:%.*]] = add i64 160, [[OverflowSize]]
+; CHECK: [[ShadowBackup:%.*]] = alloca {{.*}} [[MetaSize]]
+; CHECK: [[MetaCopySize:%.*]] = call i64 @llvm.umin.i64(i64 [[MetaSize]], i64 800)
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ShadowBackup]], ptr align 8 %va_arg_shadow, i64 [[MetaCopySize]], i1 false)
+; CHECK: [[OverflowBackup:%.*]] = alloca {{.*}} [[MetaSize]]
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[OverflowBackup]], ptr align 8 %va_arg_origin, i64 [[MetaCopySize]], i1 false)
+
+; Check that va_start() correctly copies the shadow backup into the shadow of
+; the va_list. Register save area and overflow arg area are copied separately.
+; Only 56 bytes of the register save area is copied, because of
+; "use-soft-float".
+
+; CHECK: call void @llvm.va_start(ptr %vl)
+; CHECK: [[VlAddr:%.*]] = ptrtoint ptr %vl to i64
+; CHECK: [[RegSaveAreaAddrAddr:%.*]] = add i64 [[VlAddr]], 24
+; CHECK: [[RegSaveAreaAddr:%.*]] = inttoptr i64 [[RegSaveAreaAddrAddr]] to ptr
+; CHECK: [[RegSaveArea:%.*]] = load ptr, ptr [[RegSaveAreaAddr]]
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[TMP]], ptr [[RegSaveArea]])
+; CHECK: [[RegSaveAreaMeta:%.*]] = load { ptr, ptr }, ptr [[TMP]]
+; CHECK: [[RegSaveAreaShadow:%.*]] = extractvalue { ptr, ptr } [[RegSaveAreaMeta]], 0
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RegSaveAreaShadow]], ptr align 8 [[ShadowBackup]], i64 56, i1 false)
+; CHECK: [[VlAddr:%.*]] = ptrtoint ptr %vl to i64
+; CHECK: [[OverflowAddrAddr:%.*]] = add i64 [[VlAddr]], 16
+; CHECK: [[OverflowAddr:%.*]] = inttoptr i64 [[OverflowAddrAddr]] to ptr
+; CHECK: [[Overflow:%.*]] = load ptr, ptr [[OverflowAddr]]
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[TMP]], ptr [[Overflow]])
+; CHECK: [[OverflowMeta:%.*]] = load { ptr, ptr }, ptr [[TMP]]
+; CHECK: [[OverflowShadow:%.*]] = extractvalue { ptr, ptr } [[OverflowMeta]], 0
+; CHECK: [[OverflowShadowBackup:%.*]] = getelementptr i8, ptr [[ShadowBackup]], i32 160
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[OverflowShadow]], ptr align 8 [[OverflowShadowBackup]], i64 [[OverflowSize]], i1 false)
declare i32 @random_i32()
declare i64 @random_i64()
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,169 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
+ store i8 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store1(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[META_PTR]
[PATCH] D148596: [KMSAN] Enable on SystemZ
iii updated this revision to Diff 516926.
iii added a comment.
Herald added a subscriber: hoy.
- Fixed an issue with copyRegSaveArea() overwriting shadow of caller's locals.
The problem was that the kernel is compiled with "packed-stack", so register
save areas may be smaller than 160 bytes. Since the kernel is compiled with
"use-soft-float", it's enough (and also correct) to copy only 56 bytes. Now all
kernel selftests pass.
- Added a test for this case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
===
--- llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
@@ -3,9 +3,60 @@
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
target triple = "s390x-unknown-linux-gnu"
-declare i64 @foo(i64 %guard, ...) #0
+%struct.__va_list = type { i64, i64, ptr, ptr }
+declare void @llvm.lifetime.start.p0(i64, ptr)
+declare void @llvm.va_start(ptr)
+declare void @llvm.va_end(ptr)
+declare void @llvm.lifetime.end.p0(i64, ptr)
+
+define i64 @foo(i64 %guard, ...) #1 {
+ %vl = alloca %struct.__va_list
+ call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
+ call void @llvm.va_start(ptr %vl)
+ call void @llvm.va_end(ptr %vl)
+ call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
+ ret i64 0
+}
-attributes #0 = { "target-features"="+soft-float" "use-soft-float"="true" }
+; CHECK-LABEL: define {{[^@]+}}@foo(
+
+; Callers store variadic arguments' shadow and origins into va_arg_shadow and
+; va_arg_origin. Their layout is: the register save area (160 bytes) followed
+; by the overflow arg area. It does not depend on "packed-stack".
+; Check that callees correctly backup shadow into a local variable.
+
+; CHECK: [[TMP:%.*]] = alloca { ptr, ptr }
+; CHECK: [[OverflowSize:%.*]] = load i64, ptr %va_arg_overflow_size
+; CHECK: [[MetaSize:%.*]] = add i64 160, [[OverflowSize]]
+; CHECK: [[ShadowBackup:%.*]] = alloca {{.*}} [[MetaSize]]
+; CHECK: [[MetaCopySize:%.*]] = call i64 @llvm.umin.i64(i64 [[MetaSize]], i64 800)
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ShadowBackup]], ptr align 8 %va_arg_shadow, i64 [[MetaCopySize]], i1 false)
+; CHECK: [[OverflowBackup:%.*]] = alloca {{.*}} [[MetaSize]]
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[OverflowBackup]], ptr align 8 %va_arg_origin, i64 [[MetaCopySize]], i1 false)
+
+; Check that va_start() correctly copies the shadow backup into the shadow of
+; the va_list. Register save area and overflow arg area are copied separately.
+; Only 56 bytes of the register save area is copied, because of
+; "use-soft-float".
+
+; CHECK: call void @llvm.va_start(ptr %vl)
+; CHECK: [[VlAddr:%.*]] = ptrtoint ptr %vl to i64
+; CHECK: [[RegSaveAreaAddrAddr:%.*]] = add i64 [[VlAddr]], 24
+; CHECK: [[RegSaveAreaAddr:%.*]] = inttoptr i64 [[RegSaveAreaAddrAddr]] to ptr
+; CHECK: [[RegSaveArea:%.*]] = load ptr, ptr [[RegSaveAreaAddr]]
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[TMP]], ptr [[RegSaveArea]])
+; CHECK: [[RegSaveAreaMeta:%.*]] = load { ptr, ptr }, ptr [[TMP]]
+; CHECK: [[RegSaveAreaShadow:%.*]] = extractvalue { ptr, ptr } [[RegSaveAreaMeta]], 0
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RegSaveAreaShadow]], ptr align 8 [[ShadowBackup]], i64 56, i1 false)
+; CHECK: [[VlAddr:%.*]] = ptrtoint ptr %vl to i64
+; CHECK: [[OverflowAddrAddr:%.*]] = add i64 [[VlAddr]], 16
+; CHECK: [[OverflowAddr:%.*]] = inttoptr i64 [[OverflowAddrAddr]] to ptr
+; CHECK: [[Overflow:%.*]] = load ptr, ptr [[OverflowAddr]]
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[TMP]], ptr [[Overflow]])
+; CHECK: [[OverflowMeta:%.*]] = load { ptr, ptr }, ptr [[TMP]]
+; CHECK: [[OverflowShadow:%.*]] = extractvalue { ptr, ptr } [[OverflowMeta]], 0
+; CHECK: [[OverflowShadowBackup:%.*]] = getelementptr i8, ptr [[ShadowBackup]], i32 160
+; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[OverflowShadow]], ptr align 8 [[OverflowShadowBackup]], i64 [[OverflowSize]], i1 false)
declare i32 @random_i32()
declare i64 @random_i64()
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,169 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define vo
[PATCH] D148596: [KMSAN] Enable on SystemZ
iii updated this revision to Diff 515661.
iii added a comment.
- (unsigned)0 -> 0u (0 doesn't work, because the overload becomes ambiguous).
- Improve matching in the testcase.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,169 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
+ store i8 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store1(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i8 {{.+}}, ptr [[SHADOW]], align 1
+; CHECK: ret void
+
+define void @Store2(ptr %p, i16 %x) sanitize_memory {
+entry:
+ store i16 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store2(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i16 {{.+}}, ptr [[SHADOW]], align 2
+; CHECK: ret void
+
+define void @Store4(ptr %p, i32 %x) sanitize_memory {
+entry:
+ store i32 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store4(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_4(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i32 {{.+}}, ptr [[SHADOW]], align 4
+; CHECK: ret void
+
+define void @Store8(ptr %p, i64 %x) sanitize_memory {
+entry:
+ store i64 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store8(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_8(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i64 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define void @Store16(ptr %p, i128 %x) sanitize_memory {
+entry:
+ store i128 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Store16(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_n(ptr [[META_PTR]], ptr %p, i64 16)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i128 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define i8 @Load1(ptr %p) sanitize_memory {
+entry:
+ %0 = load i8, ptr %p
+ ret i8 %0
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Load1(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: [[SHADOW_VAL:%[a-z0-9_]+]] = load i8, ptr [[SHADOW]], align 1
+; CHECK: [[ORIGIN_VAL:%[a-z0-9_]+]] = load i32, ptr [[ORIGIN]], align 4
+; CHECK: store i8 [[SHADOW_VAL]], ptr %retval_shadow, align 8
+; CHECK: store i32 [[ORIGIN_VAL]], ptr %retval_origin, align 4
+; CHECK: ret i8 {{.+}}
+
+define i16 @Load2(ptr %p) sanitize_memory {
+entry:
+ %0 = load i16, ptr %p
+ ret i16 %0
+}
+
+; CHECK-LABEL: define {{[^@]+}}@Load2(
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-
[PATCH] D148596: [KMSAN] Enable on SystemZ
iii updated this revision to Diff 515266.
iii added a comment.
- Add a comment to getOrInsertMsanMetadataFunction().
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,169 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
+ store i8 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store1
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i8 {{.+}}, ptr [[SHADOW]], align 1
+; CHECK: ret void
+
+define void @Store2(ptr %p, i16 %x) sanitize_memory {
+entry:
+ store i16 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store2
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i16 {{.+}}, ptr [[SHADOW]], align 2
+; CHECK: ret void
+
+define void @Store4(ptr %p, i32 %x) sanitize_memory {
+entry:
+ store i32 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store4
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_4(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i32 {{.+}}, ptr [[SHADOW]], align 4
+; CHECK: ret void
+
+define void @Store8(ptr %p, i64 %x) sanitize_memory {
+entry:
+ store i64 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store8
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_8(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i64 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define void @Store16(ptr %p, i128 %x) sanitize_memory {
+entry:
+ store i128 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store16
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_n(ptr [[META_PTR]], ptr %p, i64 16)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i128 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define i8 @Load1(ptr %p) sanitize_memory {
+entry:
+ %0 = load i8, ptr %p
+ ret i8 %0
+}
+
+; CHECK-LABEL: @Load1
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: [[SHADOW_VAL:%[a-z0-9_]+]] = load i8, ptr [[SHADOW]], align 1
+; CHECK: [[ORIGIN_VAL:%[a-z0-9_]+]] = load i32, ptr [[ORIGIN]], align 4
+; CHECK: store i8 [[SHADOW_VAL]], ptr %retval_shadow, align 8
+; CHECK: store i32 [[ORIGIN_VAL]], ptr %retval_origin, align 4
+; CHECK: ret i8 {{.+}}
+
+define i16 @Load2(ptr %p) sanitize_memory {
+entry:
+ %0 = load i16, ptr %p
+ ret i16 %0
+}
+
+; CHECK-LABEL: @Load2
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue {
[PATCH] D148596: [KMSAN] Enable on SystemZ
iii updated this revision to Diff 514692.
iii added a comment.
- Better explain the ABI situation.
- Extend the test.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,169 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
+ store i8 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store1
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i8 {{.+}}, ptr [[SHADOW]], align 1
+; CHECK: ret void
+
+define void @Store2(ptr %p, i16 %x) sanitize_memory {
+entry:
+ store i16 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store2
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i16 {{.+}}, ptr [[SHADOW]], align 2
+; CHECK: ret void
+
+define void @Store4(ptr %p, i32 %x) sanitize_memory {
+entry:
+ store i32 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store4
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_4(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i32 {{.+}}, ptr [[SHADOW]], align 4
+; CHECK: ret void
+
+define void @Store8(ptr %p, i64 %x) sanitize_memory {
+entry:
+ store i64 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store8
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_8(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i64 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define void @Store16(ptr %p, i128 %x) sanitize_memory {
+entry:
+ store i128 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store16
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_n(ptr [[META_PTR]], ptr %p, i64 16)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i128 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define i8 @Load1(ptr %p) sanitize_memory {
+entry:
+ %0 = load i8, ptr %p
+ ret i8 %0
+}
+
+; CHECK-LABEL: @Load1
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: [[SHADOW_VAL:%[a-z0-9_]+]] = load i8, ptr [[SHADOW]], align 1
+; CHECK: [[ORIGIN_VAL:%[a-z0-9_]+]] = load i32, ptr [[ORIGIN]], align 4
+; CHECK: store i8 [[SHADOW_VAL]], ptr %retval_shadow, align 8
+; CHECK: store i32 [[ORIGIN_VAL]], ptr %retval_origin, align 4
+; CHECK: ret i8 {{.+}}
+
+define i16 @Load2(ptr %p) sanitize_memory {
+entry:
+ %0 = load i16, ptr %p
+ ret i16 %0
+}
+
+; CHECK-LABEL: @Load2
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_2(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue
[PATCH] D148596: [KMSAN] Enable on SystemZ
iii added a comment.
The kernel patch is currently WIP; I'm trying to get rid of false positives.
Just some examples of the findings so far:
- s390x always uses separate address spaces for kernel and userspace, so we
need to skip the `addr < TASK_SIZE` check in `is_bad_asm_addr()`.
- There is a 4k asm store, so the limit in `__msan_instrument_asm_store()`
needs to be bumped.
There were a couple build issues with the common code too:
- `_PAGE_NX` is called `_PAGE_NOEXEC` on s390x
- `asm/pgtable_64_types.h` is called `asm/pgtable.h` on s390x
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:118
///(X=1,2,4,8) are accessed through pointers obtained via the
/// __msan_metadata_ptr_for_load_X(ptr)
/// __msan_metadata_ptr_for_store_X(ptr)
glider wrote:
> You are changing KMSAN API, so this comment needs to be updated.
The API stays exactly the same here; I haven't touched kernel function
signatures.
What changes here is that I've implemented the s390x ABI for the KMSAN API.
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:138
///
/// KernelMemorySanitizer only supports X86_64 at the moment.
///
glider wrote:
> Please update this comment as well.
Ok.
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:746
+ ArgsTy... Args) {
+ if (TargetTriple.getArch() == Triple::systemz) {
+return M.getOrInsertFunction(Name, Type::getVoidTy(*C),
glider wrote:
> Can we add a bool to MemorySanitizerPass to indicate whether or not we want
> to return the metadata as a pointer?
> We'll then set it based on Triple::systemz once and check everywhere, making
> the code more readable.
We could do that, but that's really the detail of the s390x ABI. Other
platforms might have different conventions for large return values. That's why
I didn't want to introduce generic concepts for this and highlight that it's
s390x specific, where possible.
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:1492
{Zero, IRB.getInt32(6)}, "retval_origin");
+if (MS.TargetTriple.getArch() == Triple::systemz)
+ MS.MsanMetadataAlloca = IRB.CreateAlloca(MS.MsanMetadata, (unsigned)0);
glider wrote:
> Have you considered using per-CPU data instead of this alloca (there might be
> pitfalls as well, so just curious).
> Same question for passing a single struct vs. two separate allocas for
> shadow/origin.
Yes, but I was wondering if there was any benefit? I thought that maybe that
would save a frame for leaf functions, but since we are calling KMSAN API, we
already need one (and technically they are not leaf functions anymore).
Passing two separate allocas would actually change the API, as opposed to
implementing the new ABI, so I wanted to avoid that for now, even if it were
more efficient.
Comment at: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll:6
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
glider wrote:
> This test should cover all the newly introduced API functions.
Ok.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148596/new/
https://reviews.llvm.org/D148596
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[PATCH] D148596: [KMSAN] Enable on SystemZ
iii created this revision.
iii added reviewers: eugenis, vitalybuka, glider, uweigand, jonpa.
Herald added subscribers: Enna1, pengfei, hiraditya.
Herald added a project: All.
iii requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, MaskRay.
Herald added projects: clang, LLVM.
Enable -fsanitize=kernel-memory support in Clang.
Fix an ABI issue: on x86_64 shadow_origin_ptr_t is returned via a
register pair, and on s390x it should be returned via memory. This
means that functions that return it should take a hidden parameter.
Normally Clang takes care of the ABI, so unfortunately sanitizers have
to duplicate this logic. Therefore add a special case for SystemZ and
emit s390x-ABI-compliant calling sequences. Since it's only 2
architectures, do not create a VarArgHelper-like abstraction layer.
Add a test.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D148596
Files:
clang/lib/Driver/ToolChains/Linux.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
Index: llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
===
--- /dev/null
+++ llvm/test/Instrumentation/MemorySanitizer/SystemZ/basic-kernel.ll
@@ -0,0 +1,70 @@
+; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @Store1(ptr %p, i8 %x) sanitize_memory {
+entry:
+ store i8 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store1
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_1(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i8 {{.+}}, ptr [[SHADOW]], align 1
+; CHECK: ret void
+
+define void @Store16(ptr %p, i128 %x) sanitize_memory {
+entry:
+ store i128 %x, ptr %p
+ ret void
+}
+
+; CHECK-LABEL: @Store16
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_store_n(ptr [[META_PTR]], ptr %p, i64 16)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: store i128 {{.+}}, ptr [[SHADOW]], align 8
+; CHECK: ret void
+
+define i64 @Load8(ptr %p) sanitize_memory {
+entry:
+ %0 = load i64, ptr %p
+ ret i64 %0
+}
+
+; CHECK-LABEL: @Load8
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_8(ptr [[META_PTR]], ptr %p)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: [[SHADOW_VAL:%[a-z0-9_]+]] = load i64, ptr [[SHADOW]], align 8
+; CHECK: [[ORIGIN_VAL:%[a-z0-9_]+]] = load i32, ptr [[ORIGIN]], align 8
+; CHECK: store i64 [[SHADOW_VAL]], ptr %retval_shadow, align 8
+; CHECK: store i32 [[ORIGIN_VAL]], ptr %retval_origin, align 4
+; CHECK: ret i64 {{.+}}
+
+define i128 @Load16(ptr %p) sanitize_memory {
+entry:
+ %0 = load i128, ptr %p
+ ret i128 %0
+}
+
+; CHECK-LABEL: @Load16
+; CHECK: [[META_PTR:%[a-z0-9_]+]] = alloca { ptr, ptr }, align 8
+; CHECK: call void @__msan_metadata_ptr_for_load_n(ptr [[META_PTR]], ptr %p, i64 16)
+; CHECK: [[META:%[a-z0-9_]+]] = load { ptr, ptr }, ptr [[META_PTR]], align 8
+; CHECK: [[SHADOW:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 0
+; CHECK: [[ORIGIN:%[a-z0-9_]+]] = extractvalue { ptr, ptr } [[META]], 1
+; CHECK: [[SHADOW_VAL:%[a-z0-9_]+]] = load i128, ptr [[SHADOW]], align 8
+; CHECK: [[ORIGIN_VAL:%[a-z0-9_]+]] = load i32, ptr [[ORIGIN]], align 8
+; CHECK: store i128 [[SHADOW_VAL]], ptr %retval_shadow, align 8
+; CHECK: store i32 [[ORIGIN_VAL]], ptr %retval_origin, align 4
+; CHECK: ret i128 {{.+}}
Index: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -543,6 +543,10 @@
void createKernelApi(Module &M, const TargetLibraryInfo &TLI);
void createUserspaceApi(Module &M, const TargetLibraryInfo &TLI);
+ template
+ FunctionCallee getOrInsertMsanMetadataFunction(Module &M, StringRef Name,
+ ArgsTy... Args);
+
/// True if we're compiling the Linux kernel.
bool CompileKernel;
/// Track origins (allocation points) of uninitialized val
[PATCH] D78644: [LSan] Enable for SystemZ
iii added a comment. I guess the intention is dropping the special case? The following patch passes regtests: --- a/compiler-rt/lib/lsan/lsan_allocator.h +++ b/compiler-rt/lib/lsan/lsan_allocator.h @@ -68,9 +68,6 @@ using PrimaryAllocator = PrimaryAllocatorASVT; # if SANITIZER_FUCHSIA || defined(__powerpc64__) const uptr kAllocatorSpace = ~(uptr)0; const uptr kAllocatorSize = 0x400ULL; // 4T. -#elif defined(__s390x__) -const uptr kAllocatorSpace = 0x400ULL; -const uptr kAllocatorSize = 0x400ULL; // 4T. # else const uptr kAllocatorSpace = 0x6000ULL; const uptr kAllocatorSize = 0x400ULL; // 4T. `0x500ULL` worked as well. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78644/new/ https://reviews.llvm.org/D78644 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D78644: [LSan] Enable for SystemZ
iii added a comment. That's where the mappings normally end. Example: $ cat /proc/self/maps 2aa-2aa2000 r--p 5e:01 668061 /usr/bin/cat 2aa2000-2aa6000 r-xp 2000 5e:01 668061 /usr/bin/cat 2aa6000-2aa8000 r--p 6000 5e:01 668061 /usr/bin/cat 2aa8000-2aa9000 r--p 7000 5e:01 668061 /usr/bin/cat 2aa9000-2aaa000 rw-p 8000 5e:01 668061 /usr/bin/cat 2aaa000-2aa0002b000 rw-p 00:00 0 [heap] 3fff750-3fff7557000 r--p 5e:01 926342 /usr/lib/locale/C.utf8/LC_CTYPE 3fff758-3fff7581000 r--p 5e:01 658596 /usr/lib/locale/en_US.utf8/LC_NUMERIC 3fff760-3fff7878000 r--p 5e:01 658592 /usr/lib/locale/en_US.utf8/LC_COLLATE 3fff788-3fff7881000 r--p 5e:01 786499 /usr/lib/locale/en_US.utf8/LC_TIME 3fff790-3fff7901000 r--p 5e:01 786497 /usr/lib/locale/en_US.utf8/LC_MONETARY 3fff798-3fff7981000 r--p 5e:01 658594 /usr/lib/locale/en_US.utf8/LC_MESSAGES/SYS_LC_MESSAGES 3fff7a0-3fff7a01000 r--p 5e:01 658611 /usr/lib/locale/en_US.utf8/LC_PAPER 3fff7a8-3fff7a81000 r--p 5e:01 658595 /usr/lib/locale/en_US.utf8/LC_NAME 3fff7b0-3fff7b01000 r--p 5e:01 786493 /usr/lib/locale/en_US.utf8/LC_ADDRESS 3fff7b8-3fff7b81000 r--p 5e:01 786498 /usr/lib/locale/en_US.utf8/LC_TELEPHONE 3fff7c0-3fff7c34000 r--p 5e:01 655337 /usr/lib64/libc.so.6 3fff7c34000-3fff7d6e000 r-xp 00034000 5e:01 655337 /usr/lib64/libc.so.6 3fff7d6e000-3fff7dc5000 r--p 0016e000 5e:01 655337 /usr/lib64/libc.so.6 3fff7dc5000-3fff7dc6000 ---p 001c5000 5e:01 655337 /usr/lib64/libc.so.6 3fff7dc6000-3fff7dca000 r--p 001c5000 5e:01 655337 /usr/lib64/libc.so.6 3fff7dca000-3fff7dcc000 rw-p 001c9000 5e:01 655337 /usr/lib64/libc.so.6 3fff7dcc000-3fff7dd4000 rw-p 00:00 0 3fff7e0-3fff7e01000 r--p 5e:01 786496 /usr/lib/locale/en_US.utf8/LC_MEASUREMENT 3fff7e8-3fff7e87000 r--s 5e:01 654146 /usr/lib64/gconv/gconv-modules.cache 3fff7f0-3fff7f01000 r--p 5e:01 786495 /usr/lib/locale/en_US.utf8/LC_IDENTIFICATION 3fff7f8-3fff7f82000 r--p 5e:01 655334 /usr/lib/ld64.so.1 3fff7f82000-3fff7fa2000 r-xp 2000 5e:01 655334 /usr/lib/ld64.so.1 3fff7fa2000-3fff7fad000 r--p 00022000 5e:01 655334 /usr/lib/ld64.so.1 3fff7fad000-3fff7faf000 r--p 0002c000 5e:01 655334 /usr/lib/ld64.so.1 3fff7faf000-3fff7fb1000 rw-p 0002e000 5e:01 655334 /usr/lib/ld64.so.1 3fff7fd3000-3fff7ffb000 rw-p 00:00 0 3fda000-3ffb000 rw-p 00:00 0 [stack] 3ffc000-3ffe000 r--p 00:00 0 [vvar] 3ffe000-400 r-xp 00:00 0 [vdso] A higher address should work as well. I will test 0x500ULL and 0x600ULL and let you know the result. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78644/new/ https://reviews.llvm.org/D78644 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D105629: [TSan] Add SystemZ support
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGacf0a6428681: [sanitizer] Fix __sanitizer_kernel_sigset_t
endianness issue (authored by iii).
Changed prior to commit:
https://reviews.llvm.org/D105629?vs=358431&id=358890#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105629/new/
https://reviews.llvm.org/D105629
Files:
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Index: compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
===
--- compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
+++ compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -650,14 +650,14 @@
#endif // !SANITIZER_ANDROID
#if defined(__mips__)
-struct __sanitizer_kernel_sigset_t {
- uptr sig[2];
-};
+#define __SANITIZER_KERNEL_NSIG 128
#else
+#define __SANITIZER_KERNEL_NSIG 64
+#endif
+
struct __sanitizer_kernel_sigset_t {
- u8 sig[8];
+ uptr sig[__SANITIZER_KERNEL_NSIG / (sizeof(uptr) * 8)];
};
-#endif
// Linux system headers define the 'sa_handler' and 'sa_sigaction' macros.
#if SANITIZER_MIPS
Index: compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
===
--- compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
+++ compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
@@ -878,7 +878,7 @@
__sanitizer_kernel_sigset_t *k_set = (__sanitizer_kernel_sigset_t *)set;
const uptr idx = signum / (sizeof(k_set->sig[0]) * 8);
const uptr bit = signum % (sizeof(k_set->sig[0]) * 8);
- k_set->sig[idx] &= ~(1 << bit);
+ k_set->sig[idx] &= ~((uptr)1 << bit);
}
bool internal_sigismember(__sanitizer_sigset_t *set, int signum) {
@@ -888,7 +888,7 @@
__sanitizer_kernel_sigset_t *k_set = (__sanitizer_kernel_sigset_t *)set;
const uptr idx = signum / (sizeof(k_set->sig[0]) * 8);
const uptr bit = signum % (sizeof(k_set->sig[0]) * 8);
- return k_set->sig[idx] & (1 << bit);
+ return k_set->sig[idx] & ((uptr)1 << bit);
}
#elif SANITIZER_FREEBSD
void internal_sigdelset(__sanitizer_sigset_t *set, int signum) {
Index: compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
===
--- compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
+++ compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -650,14 +650,14 @@
#endif // !SANITIZER_ANDROID
#if defined(__mips__)
-struct __sanitizer_kernel_sigset_t {
- uptr sig[2];
-};
+#define __SANITIZER_KERNEL_NSIG 128
#else
+#define __SANITIZER_KERNEL_NSIG 64
+#endif
+
struct __sanitizer_kernel_sigset_t {
- u8 sig[8];
+ uptr sig[__SANITIZER_KERNEL_NSIG / (sizeof(uptr) * 8)];
};
-#endif
// Linux system headers define the 'sa_handler' and 'sa_sigaction' macros.
#if SANITIZER_MIPS
Index: compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
===
--- compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
+++ compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
@@ -878,7 +878,7 @@
__sanitizer_kernel_sigset_t *k_set = (__sanitizer_kernel_sigset_t *)set;
const uptr idx = signum / (sizeof(k_set->sig[0]) * 8);
const uptr bit = signum % (sizeof(k_set->sig[0]) * 8);
- k_set->sig[idx] &= ~(1 << bit);
+ k_set->sig[idx] &= ~((uptr)1 << bit);
}
bool internal_sigismember(__sanitizer_sigset_t *set, int signum) {
@@ -888,7 +888,7 @@
__sanitizer_kernel_sigset_t *k_set = (__sanitizer_kernel_sigset_t *)set;
const uptr idx = signum / (sizeof(k_set->sig[0]) * 8);
const uptr bit = signum % (sizeof(k_set->sig[0]) * 8);
- return k_set->sig[idx] & (1 << bit);
+ return k_set->sig[idx] & ((uptr)1 << bit);
}
#elif SANITIZER_FREEBSD
void internal_sigdelset(__sanitizer_sigset_t *set, int signum) {
___
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[PATCH] D105629: [TSan] Add SystemZ support
iii updated this revision to Diff 358431.
iii added a comment.
- Fix style issues (seems like arc diff is linting only the top commit?).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105629/new/
https://reviews.llvm.org/D105629
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
compiler-rt/lib/tsan/CMakeLists.txt
compiler-rt/lib/tsan/go/buildgo.sh
compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_interface.h
compiler-rt/lib/tsan/rtl/tsan_platform.h
compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S
compiler-rt/test/tsan/CMakeLists.txt
compiler-rt/test/tsan/ignore_lib0.cpp
compiler-rt/test/tsan/ignore_lib1.cpp
compiler-rt/test/tsan/ignore_lib5.cpp
compiler-rt/test/tsan/map32bit.cpp
compiler-rt/test/tsan/mmap_large.cpp
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Index: llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
===
--- llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
+++ llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
@@ -125,6 +125,8 @@
sources += [ "rtl/tsan_rtl_ppc64.S" ]
} else if (target_cpu == "mips64") {
sources += [ "rtl/tsan_rtl_mips64.S" ]
+ } else if (target_cpu == "s390x") {
+sources += [ "rtl/tsan_rtl_s390x.S" ]
}
# To be able to include sanitizer_common.
Index: llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -312,12 +312,21 @@
Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
Type *PtrTy = Ty->getPointerTo();
SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
-TsanAtomicLoad[i] =
-M.getOrInsertFunction(AtomicLoadName, Attr, Ty, PtrTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ TsanAtomicLoad[i] =
+ M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
+}
SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
-TsanAtomicStore[i] = M.getOrInsertFunction(
-AtomicStoreName, Attr, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ TsanAtomicStore[i] = M.getOrInsertFunction(
+ AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+}
for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
@@ -340,24 +349,44 @@
else
continue;
SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
- TsanAtomicRMW[Op][i] =
- M.getOrInsertFunction(RMWName, Attr, Ty, PtrTy, Ty, OrdTy);
+ {
+AttributeList AL = Attr;
+AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+TsanAtomicRMW[Op][i] =
+M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
+ }
}
SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
"_compare_exchange_val");
-TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, Attr, Ty, PtrTy, Ty,
- Ty, OrdTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
+ TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
+ Ty, OrdTy, OrdTy);
+}
}
TsanVptrUpdate =
M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
IRB.getVoidTy(), IRB.getInt8PtrTy());
- TsanAtomicThreadFence = M.getOrInsertFunction("__tsan_atomic_thread_fence",
-Attr
[PATCH] D105629: [TSan] Add SystemZ support
iii updated this revision to Diff 358363.
iii added a comment.
Based on Ulrich's feedback I tested the series on RHEL7, which, in
addition to an old kernel, contains an old glibc and an old toolchain.
This uncovered a few extra issues, which are fixed here:
- Call __tls_get_offset() in order to force TLS allocation.
- Align thread_registry_placeholder.
- Protect the address space "tail" in two steps: until the 4-level page table
boundary (this must succeed) and then until the 5-level page table boundary
(this may fail).
Also, the Go support is finally working
(https://github.com/iii-i/go/tree/tsan-s390x), so, since we need to
make another round anyway, I've included the LLVM part here as well.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105629/new/
https://reviews.llvm.org/D105629
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
compiler-rt/lib/tsan/CMakeLists.txt
compiler-rt/lib/tsan/go/buildgo.sh
compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_interface.h
compiler-rt/lib/tsan/rtl/tsan_platform.h
compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S
compiler-rt/test/tsan/CMakeLists.txt
compiler-rt/test/tsan/ignore_lib0.cpp
compiler-rt/test/tsan/ignore_lib1.cpp
compiler-rt/test/tsan/ignore_lib5.cpp
compiler-rt/test/tsan/map32bit.cpp
compiler-rt/test/tsan/mmap_large.cpp
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Index: llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
===
--- llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
+++ llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
@@ -125,6 +125,8 @@
sources += [ "rtl/tsan_rtl_ppc64.S" ]
} else if (target_cpu == "mips64") {
sources += [ "rtl/tsan_rtl_mips64.S" ]
+ } else if (target_cpu == "s390x") {
+sources += [ "rtl/tsan_rtl_s390x.S" ]
}
# To be able to include sanitizer_common.
Index: llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -312,12 +312,21 @@
Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
Type *PtrTy = Ty->getPointerTo();
SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
-TsanAtomicLoad[i] =
-M.getOrInsertFunction(AtomicLoadName, Attr, Ty, PtrTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ TsanAtomicLoad[i] =
+ M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
+}
SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
-TsanAtomicStore[i] = M.getOrInsertFunction(
-AtomicStoreName, Attr, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ TsanAtomicStore[i] = M.getOrInsertFunction(
+ AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+}
for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
@@ -340,24 +349,44 @@
else
continue;
SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
- TsanAtomicRMW[Op][i] =
- M.getOrInsertFunction(RMWName, Attr, Ty, PtrTy, Ty, OrdTy);
+ {
+AttributeList AL = Attr;
+AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+TsanAtomicRMW[Op][i] =
+M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
+ }
}
SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
"_compare_exchange_val");
-TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, Attr, Ty, PtrTy, Ty,
- Ty, OrdTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
+ TsanAtomicCAS[i] = M.get
[PATCH] D105629: [TSan] Add SystemZ support
iii added inline comments. Comment at: compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp:123 +#if defined(__s390x__) + ProtectRange(HiAppMemEnd(), 0xf000ull); +#endif uweigand wrote: > iii wrote: > > uweigand wrote: > > > Did you test this on older kernels without 5-level page table support? > > > I believe the allocation / mprotect may fail on those ... > > No, not really. Would it make sense to probe here? E.g. first try > > 0xf000, then 0x20. Or is there a way to query > > user_addr_max() / TASK_SIZE_MAX / TASK_SIZE? > I don't know of any way to query this. You can simply do the allocation in > stages (first to the top of the three-pagetable range, then four, then five), > and ignore failures. As an unfortunate side effect this will force the > kernel to allocate five levels of page tables even when unnecessary, but I > don't think there's anything we can do about that. 3-level page table limit is quite below the application range defined in this series (0x400 < 0xc000). Are there any relevant kernels that do not support 4-level page tables? I tried to search the git history, and it looks as if even 2.6 ones have it. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105629/new/ https://reviews.llvm.org/D105629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D105629: [TSan] Add SystemZ support
iii added inline comments. Comment at: compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp:123 +#if defined(__s390x__) + ProtectRange(HiAppMemEnd(), 0xf000ull); +#endif uweigand wrote: > Did you test this on older kernels without 5-level page table support? I > believe the allocation / mprotect may fail on those ... No, not really. Would it make sense to probe here? E.g. first try 0xf000, then 0x20. Or is there a way to query user_addr_max() / TASK_SIZE_MAX / TASK_SIZE? Comment at: compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S:22 + CFI_REL_OFFSET(%r2, R2_REL_OFFSET) + CFI_REL_OFFSET(%r3, R3_REL_OFFSET) + stmg %r14, %r15, R14_REL_OFFSET(%r15) uweigand wrote: > Do we need CFI for r2/r3 ? Those are call-clobbered any cannot be unwound > normally anyway ... I'm not quite sure, but glibc does this (e.g. in sysdeps/s390/s390-64/dl-trampoline.h), so I figured I'll do this here as well just in case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105629/new/ https://reviews.llvm.org/D105629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D105629: [TSan] Add SystemZ support
iii marked an inline comment as done. iii added a comment. Regarding the openmp test failures: I tried check-openmp on a x86_64 machine, and they occur both with and without this patch series, so must be unrelated. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105629/new/ https://reviews.llvm.org/D105629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D105629: [TSan] Add SystemZ support
iii marked an inline comment as done. iii added inline comments. Comment at: compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp:781 + // TSAN. Act as if we ran out of memory. + internal_munmap(res, sz); + errno = errno_ENOMEM; dvyukov wrote: > TSan runtime is supposed to mprotect all ranges that are inaccessible to the > application. How does it happen that kernel still returns such an address? Do > we fail to mprotect all ranges on s390? If so should that be fixed instead? > I am concerned that if kernel can return unsupported addresses, it probably > can returns them very early before exhausting all supported addresses (e.g. > always return unsupported from the start). > Or is it that we mprotect everything, but kernel still somehow stomps on it? > If so can this address overlap with, say, tsan shadow? If yes, them the > munmap will unmap our shadow which is not good. The common code in CheckAndProtect() didn't mprotect the address space "tail" - I've added a special case for that. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105629/new/ https://reviews.llvm.org/D105629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D105629: [TSan] Add SystemZ support
iii updated this revision to Diff 357889.
iii added a comment.
- Fix a local variable naming issue CheckAndProtect().
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105629/new/
https://reviews.llvm.org/D105629
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
compiler-rt/lib/tsan/CMakeLists.txt
compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_interface.h
compiler-rt/lib/tsan/rtl/tsan_platform.h
compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S
compiler-rt/test/tsan/ignore_lib0.cpp
compiler-rt/test/tsan/ignore_lib1.cpp
compiler-rt/test/tsan/ignore_lib5.cpp
compiler-rt/test/tsan/map32bit.cpp
compiler-rt/test/tsan/mmap_large.cpp
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Index: llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
===
--- llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
+++ llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
@@ -125,6 +125,8 @@
sources += [ "rtl/tsan_rtl_ppc64.S" ]
} else if (target_cpu == "mips64") {
sources += [ "rtl/tsan_rtl_mips64.S" ]
+ } else if (target_cpu == "s390x") {
+sources += [ "rtl/tsan_rtl_s390x.S" ]
}
# To be able to include sanitizer_common.
Index: llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -311,12 +311,21 @@
Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
Type *PtrTy = Ty->getPointerTo();
SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
-TsanAtomicLoad[i] =
-M.getOrInsertFunction(AtomicLoadName, Attr, Ty, PtrTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ TsanAtomicLoad[i] =
+ M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
+}
SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
-TsanAtomicStore[i] = M.getOrInsertFunction(
-AtomicStoreName, Attr, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ TsanAtomicStore[i] = M.getOrInsertFunction(
+ AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+}
for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
@@ -339,24 +348,44 @@
else
continue;
SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
- TsanAtomicRMW[Op][i] =
- M.getOrInsertFunction(RMWName, Attr, Ty, PtrTy, Ty, OrdTy);
+ {
+AttributeList AL = Attr;
+AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+TsanAtomicRMW[Op][i] =
+M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
+ }
}
SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
"_compare_exchange_val");
-TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, Attr, Ty, PtrTy, Ty,
- Ty, OrdTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
+ TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
+ Ty, OrdTy, OrdTy);
+}
}
TsanVptrUpdate =
M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
IRB.getVoidTy(), IRB.getInt8PtrTy());
- TsanAtomicThreadFence = M.getOrInsertFunction("__tsan_atomic_thread_fence",
-Attr, IRB.getVoidTy(), OrdTy);
- TsanAtomicSignalFence = M.getOrInsertFunction("__tsan_atomic_signal_fence",
-Attr, IRB.getVoidTy(), OrdTy);
+ {
+At
[PATCH] D105629: [TSan] Add SystemZ support
iii updated this revision to Diff 357471.
iii added a comment.
- Reserve the address space "tail" in the "[TSan] Define C/C++ address ranges
for SystemZ" patch.
- Drop the "[TSan] Simulate OOM in mmap_interceptor()" patch.
- Group "[TSan] Use zeroext for function parameters" with the common code
patches.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105629/new/
https://reviews.llvm.org/D105629
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
compiler-rt/lib/tsan/CMakeLists.txt
compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_interface.h
compiler-rt/lib/tsan/rtl/tsan_platform.h
compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S
compiler-rt/test/tsan/ignore_lib0.cpp
compiler-rt/test/tsan/ignore_lib1.cpp
compiler-rt/test/tsan/ignore_lib5.cpp
compiler-rt/test/tsan/map32bit.cpp
compiler-rt/test/tsan/mmap_large.cpp
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Index: llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
===
--- llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
+++ llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
@@ -125,6 +125,8 @@
sources += [ "rtl/tsan_rtl_ppc64.S" ]
} else if (target_cpu == "mips64") {
sources += [ "rtl/tsan_rtl_mips64.S" ]
+ } else if (target_cpu == "s390x") {
+sources += [ "rtl/tsan_rtl_s390x.S" ]
}
# To be able to include sanitizer_common.
Index: llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -311,12 +311,21 @@
Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
Type *PtrTy = Ty->getPointerTo();
SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
-TsanAtomicLoad[i] =
-M.getOrInsertFunction(AtomicLoadName, Attr, Ty, PtrTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ TsanAtomicLoad[i] =
+ M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
+}
SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
-TsanAtomicStore[i] = M.getOrInsertFunction(
-AtomicStoreName, Attr, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ TsanAtomicStore[i] = M.getOrInsertFunction(
+ AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+}
for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
@@ -339,24 +348,44 @@
else
continue;
SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
- TsanAtomicRMW[Op][i] =
- M.getOrInsertFunction(RMWName, Attr, Ty, PtrTy, Ty, OrdTy);
+ {
+AttributeList AL = Attr;
+AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+TsanAtomicRMW[Op][i] =
+M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
+ }
}
SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
"_compare_exchange_val");
-TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, Attr, Ty, PtrTy, Ty,
- Ty, OrdTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
+ TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
+ Ty, OrdTy, OrdTy);
+}
}
TsanVptrUpdate =
M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
IRB.getVoidTy(), IRB.getInt8PtrTy());
- TsanAtomicThreadFence = M.getOrInsertFunction("__tsan_atomic_thread_fence",
-Attr, IRB.ge
[PATCH] D105629: [TSan] Add SystemZ support
iii created this revision.
iii added reviewers: kcc, dvyukov, uweigand.
Herald added subscribers: jfb, hiraditya, mgorny.
iii requested review of this revision.
Herald added projects: clang, Sanitizers, LLVM.
Herald added subscribers: llvm-commits, Sanitizers, cfe-commits.
This patch series implements ThreadSanitizer support for SystemZ.
Patches 1-3 make the necessary common code adjustments, patches 4-7
implement various bits, and patch 8 actually enables it. golang
support is currently missing and will be submitted separately.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D105629
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
compiler-rt/lib/tsan/CMakeLists.txt
compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
compiler-rt/lib/tsan/rtl/tsan_interface.h
compiler-rt/lib/tsan/rtl/tsan_platform.h
compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_s390x.S
compiler-rt/test/tsan/ignore_lib0.cpp
compiler-rt/test/tsan/ignore_lib1.cpp
compiler-rt/test/tsan/ignore_lib5.cpp
compiler-rt/test/tsan/map32bit.cpp
compiler-rt/test/tsan/mmap_large.cpp
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
Index: llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
===
--- llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
+++ llvm/utils/gn/secondary/compiler-rt/lib/tsan/BUILD.gn
@@ -125,6 +125,8 @@
sources += [ "rtl/tsan_rtl_ppc64.S" ]
} else if (target_cpu == "mips64") {
sources += [ "rtl/tsan_rtl_mips64.S" ]
+ } else if (target_cpu == "s390x") {
+sources += [ "rtl/tsan_rtl_s390x.S" ]
}
# To be able to include sanitizer_common.
Index: llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
===
--- llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -311,12 +311,21 @@
Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
Type *PtrTy = Ty->getPointerTo();
SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
-TsanAtomicLoad[i] =
-M.getOrInsertFunction(AtomicLoadName, Attr, Ty, PtrTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ TsanAtomicLoad[i] =
+ M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
+}
SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
-TsanAtomicStore[i] = M.getOrInsertFunction(
-AtomicStoreName, Attr, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ TsanAtomicStore[i] = M.getOrInsertFunction(
+ AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
+}
for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
@@ -339,24 +348,44 @@
else
continue;
SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
- TsanAtomicRMW[Op][i] =
- M.getOrInsertFunction(RMWName, Attr, Ty, PtrTy, Ty, OrdTy);
+ {
+AttributeList AL = Attr;
+AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+TsanAtomicRMW[Op][i] =
+M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
+ }
}
SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
"_compare_exchange_val");
-TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, Attr, Ty, PtrTy, Ty,
- Ty, OrdTy, OrdTy);
+{
+ AttributeList AL = Attr;
+ AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
+ AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
+ TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
+ Ty, OrdTy, OrdTy);
+}
}
TsanVptrUpdate =
M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
IRB.getVoidTy(), IRB.getInt8PtrTy());
- TsanAtomicThreadFence = M.ge
[PATCH] D78644: [LSan] Enable for SystemZ
This revision was automatically updated to reflect the committed changes.
Closed by commit rGccd8b7b10347: [LSan] Enable for SystemZ (authored by iii).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78644/new/
https://reviews.llvm.org/D78644
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/lsan/lsan_allocator.h
compiler-rt/lib/lsan/lsan_common.h
compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
compiler-rt/test/lsan/TestCases/use_registers.cpp
compiler-rt/test/lsan/lit.common.cfg.py
compiler-rt/test/sanitizer_common/print_address.h
Index: compiler-rt/test/sanitizer_common/print_address.h
===
--- compiler-rt/test/sanitizer_common/print_address.h
+++ compiler-rt/test/sanitizer_common/print_address.h
@@ -7,7 +7,8 @@
va_start(ap, n);
while (n--) {
void *p = va_arg(ap, void *);
-#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__)
+#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__) || \
+defined(__s390x__)
// On FreeBSD, the %p conversion specifier works as 0x%x and thus does not
// match to the format used in the diagnotic message.
fprintf(stderr, "0x%012lx ", (unsigned long) p);
Index: compiler-rt/test/lsan/lit.common.cfg.py
===
--- compiler-rt/test/lsan/lit.common.cfg.py
+++ compiler-rt/test/lsan/lit.common.cfg.py
@@ -69,8 +69,8 @@
config.substitutions.append( ("%clang_lsan ", build_invocation(clang_lsan_cflags)) )
config.substitutions.append( ("%clangxx_lsan ", build_invocation(clang_lsan_cxxflags)) )
-# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, and x86_64 Darwin.
-supported_linux = config.host_os == 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l']
+# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, s390x Linux and x86_64 Darwin.
+supported_linux = config.host_os is 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l', 's390x']
supported_darwin = config.host_os == 'Darwin' and config.target_arch in ['x86_64']
supported_netbsd = config.host_os == 'NetBSD' and config.target_arch in ['x86_64', 'i386']
if not (supported_linux or supported_darwin or supported_netbsd):
Index: compiler-rt/test/lsan/TestCases/use_registers.cpp
===
--- compiler-rt/test/lsan/TestCases/use_registers.cpp
+++ compiler-rt/test/lsan/TestCases/use_registers.cpp
@@ -43,6 +43,10 @@
:
: "r" (p)
);
+#elif defined(__s390x__)
+ asm("lgr %%r10, %0"
+ :
+ : "r"(p));
#else
#error "Test is not supported on this architecture."
#endif
Index: compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
===
--- compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
+++ compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
@@ -5,7 +5,8 @@
// RUN: %env_lsan_opts=$LSAN_BASE":exitcode=0" %run %t 2>&1 | FileCheck --check-prefix=CHECK-sanity %s
//
// x86 passes parameters through stack that may lead to false negatives
-// UNSUPPORTED: x86,powerpc64,arm
+// The same applies to s390x register save areas.
+// UNSUPPORTED: x86,powerpc64,arm,s390x
#include
#include
Index: compiler-rt/lib/lsan/lsan_common.h
===
--- compiler-rt/lib/lsan/lsan_common.h
+++ compiler-rt/lib/lsan/lsan_common.h
@@ -29,10 +29,10 @@
// To enable LeakSanitizer on a new architecture, one needs to implement the
// internal_clone function as well as (probably) adjust the TLS machinery for
// the new architecture inside the sanitizer library.
-#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
-(SANITIZER_WORDSIZE == 64) && \
+#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
+(SANITIZER_WORDSIZE == 64) &&\
(defined(__x86_64__) || defined(__mips64) || defined(__aarch64__) || \
- defined(__powerpc64__))
+ defined(__powerpc64__) || defined(__s390x__))
#define CAN_SANITIZE_LEAKS 1
#elif defined(__i386__) && \
(SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC)
Index: compiler-rt/lib/lsan/lsan_allocator.h
===
--- compiler-rt/lib/lsan/lsan_allocator.h
+++ compiler-rt/lib/lsan/lsan_allocator.h
@@ -65,13 +65,16 @@
template
using PrimaryAllocatorASVT = SizeClassAllocator32>;
using PrimaryAllocator = PrimaryAllocatorASVT;
-#elif defined(__x86_64__) || defined(__powerpc64__)
+#elif defined(__x86_64__) || defined(__powerpc64__) || defined(__s390x__)
#
[PATCH] D78644: [LSan] Enable for SystemZ
iii updated this revision to Diff 270771.
iii added a comment.
Rebased.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78644/new/
https://reviews.llvm.org/D78644
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/lsan/lsan_allocator.h
compiler-rt/lib/lsan/lsan_common.h
compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
compiler-rt/test/lsan/TestCases/use_registers.cpp
compiler-rt/test/lsan/lit.common.cfg.py
compiler-rt/test/sanitizer_common/print_address.h
Index: compiler-rt/test/sanitizer_common/print_address.h
===
--- compiler-rt/test/sanitizer_common/print_address.h
+++ compiler-rt/test/sanitizer_common/print_address.h
@@ -7,7 +7,8 @@
va_start(ap, n);
while (n--) {
void *p = va_arg(ap, void *);
-#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__)
+#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__) || \
+defined(__s390x__)
// On FreeBSD, the %p conversion specifier works as 0x%x and thus does not
// match to the format used in the diagnotic message.
fprintf(stderr, "0x%012lx ", (unsigned long) p);
Index: compiler-rt/test/lsan/lit.common.cfg.py
===
--- compiler-rt/test/lsan/lit.common.cfg.py
+++ compiler-rt/test/lsan/lit.common.cfg.py
@@ -69,8 +69,8 @@
config.substitutions.append( ("%clang_lsan ", build_invocation(clang_lsan_cflags)) )
config.substitutions.append( ("%clangxx_lsan ", build_invocation(clang_lsan_cxxflags)) )
-# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, and x86_64 Darwin.
-supported_linux = config.host_os == 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l']
+# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, s390x Linux and x86_64 Darwin.
+supported_linux = config.host_os is 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l', 's390x']
supported_darwin = config.host_os == 'Darwin' and config.target_arch in ['x86_64']
supported_netbsd = config.host_os == 'NetBSD' and config.target_arch in ['x86_64', 'i386']
if not (supported_linux or supported_darwin or supported_netbsd):
Index: compiler-rt/test/lsan/TestCases/use_registers.cpp
===
--- compiler-rt/test/lsan/TestCases/use_registers.cpp
+++ compiler-rt/test/lsan/TestCases/use_registers.cpp
@@ -43,6 +43,10 @@
:
: "r" (p)
);
+#elif defined(__s390x__)
+ asm("lgr %%r10, %0"
+ :
+ : "r"(p));
#else
#error "Test is not supported on this architecture."
#endif
Index: compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
===
--- compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
+++ compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
@@ -5,7 +5,8 @@
// RUN: %env_lsan_opts=$LSAN_BASE":exitcode=0" %run %t 2>&1 | FileCheck --check-prefix=CHECK-sanity %s
//
// x86 passes parameters through stack that may lead to false negatives
-// UNSUPPORTED: x86,powerpc64,arm
+// The same applies to s390x register save areas.
+// UNSUPPORTED: x86,powerpc64,arm,s390x
#include
#include
Index: compiler-rt/lib/lsan/lsan_common.h
===
--- compiler-rt/lib/lsan/lsan_common.h
+++ compiler-rt/lib/lsan/lsan_common.h
@@ -29,10 +29,10 @@
// To enable LeakSanitizer on a new architecture, one needs to implement the
// internal_clone function as well as (probably) adjust the TLS machinery for
// the new architecture inside the sanitizer library.
-#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
-(SANITIZER_WORDSIZE == 64) && \
+#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
+(SANITIZER_WORDSIZE == 64) &&\
(defined(__x86_64__) || defined(__mips64) || defined(__aarch64__) || \
- defined(__powerpc64__))
+ defined(__powerpc64__) || defined(__s390x__))
#define CAN_SANITIZE_LEAKS 1
#elif defined(__i386__) && \
(SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC)
Index: compiler-rt/lib/lsan/lsan_allocator.h
===
--- compiler-rt/lib/lsan/lsan_allocator.h
+++ compiler-rt/lib/lsan/lsan_allocator.h
@@ -65,13 +65,16 @@
template
using PrimaryAllocatorASVT = SizeClassAllocator32>;
using PrimaryAllocator = PrimaryAllocatorASVT;
-#elif defined(__x86_64__) || defined(__powerpc64__)
+#elif defined(__x86_64__) || defined(__powerpc64__) || defined(__s390x__)
# if SANITIZER_FUCHSIA
const uptr kAllocatorSpace = ~(uptr)0;
const uptr kAll
[PATCH] D78644: [LSan] Enable for SystemZ
iii created this revision.
iii added reviewers: vitalybuka, eugenis, uweigand, jonpa.
Herald added subscribers: Sanitizers, cfe-commits, mgorny.
Herald added projects: clang, Sanitizers.
Add runtime support, adjust the tests and enable LSan.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D78644
Files:
clang/lib/Driver/ToolChains/Linux.cpp
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/lsan/lsan_allocator.h
compiler-rt/lib/lsan/lsan_common.h
compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
compiler-rt/test/lsan/TestCases/use_registers.cpp
compiler-rt/test/lsan/lit.common.cfg.py
compiler-rt/test/sanitizer_common/print_address.h
Index: compiler-rt/test/sanitizer_common/print_address.h
===
--- compiler-rt/test/sanitizer_common/print_address.h
+++ compiler-rt/test/sanitizer_common/print_address.h
@@ -7,7 +7,8 @@
va_start(ap, n);
while (n--) {
void *p = va_arg(ap, void *);
-#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__)
+#if defined(__x86_64__) || defined(__aarch64__) || defined(__powerpc64__) || \
+defined(__s390x__)
// On FreeBSD, the %p conversion specifier works as 0x%x and thus does not
// match to the format used in the diagnotic message.
fprintf(stderr, "0x%012lx ", (unsigned long) p);
Index: compiler-rt/test/lsan/lit.common.cfg.py
===
--- compiler-rt/test/lsan/lit.common.cfg.py
+++ compiler-rt/test/lsan/lit.common.cfg.py
@@ -69,8 +69,8 @@
config.substitutions.append( ("%clang_lsan ", build_invocation(clang_lsan_cflags)) )
config.substitutions.append( ("%clangxx_lsan ", build_invocation(clang_lsan_cxxflags)) )
-# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, and x86_64 Darwin.
-supported_linux = config.host_os is 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l']
+# LeakSanitizer tests are currently supported on x86-64 Linux, PowerPC64 Linux, arm Linux, mips64 Linux, s390x Linux and x86_64 Darwin.
+supported_linux = config.host_os is 'Linux' and config.host_arch in ['x86_64', 'ppc64', 'ppc64le', 'mips64', 'arm', 'armhf', 'armv7l', 's390x']
supported_darwin = config.host_os is 'Darwin' and config.target_arch is 'x86_64'
supported_netbsd = config.host_os is 'NetBSD' and config.target_arch in ['x86_64', 'i386']
if not (supported_linux or supported_darwin or supported_netbsd):
Index: compiler-rt/test/lsan/TestCases/use_registers.cpp
===
--- compiler-rt/test/lsan/TestCases/use_registers.cpp
+++ compiler-rt/test/lsan/TestCases/use_registers.cpp
@@ -43,6 +43,10 @@
:
: "r" (p)
);
+#elif defined(__s390x__)
+ asm("lgr %%r10, %0"
+ :
+ : "r"(p));
#else
#error "Test is not supported on this architecture."
#endif
Index: compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
===
--- compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
+++ compiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
@@ -5,7 +5,8 @@
// RUN: %env_lsan_opts=$LSAN_BASE":exitcode=0" %run %t 2>&1 | FileCheck --check-prefix=CHECK-sanity %s
//
// x86 passes parameters through stack that may lead to false negatives
-// UNSUPPORTED: x86,powerpc64,arm
+// The same applies to s390x register save areas.
+// UNSUPPORTED: x86,powerpc64,arm,s390x
#include
#include
Index: compiler-rt/lib/lsan/lsan_common.h
===
--- compiler-rt/lib/lsan/lsan_common.h
+++ compiler-rt/lib/lsan/lsan_common.h
@@ -29,10 +29,10 @@
// To enable LeakSanitizer on a new architecture, one needs to implement the
// internal_clone function as well as (probably) adjust the TLS machinery for
// the new architecture inside the sanitizer library.
-#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
-(SANITIZER_WORDSIZE == 64) && \
+#if (SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC) && \
+(SANITIZER_WORDSIZE == 64) &&\
(defined(__x86_64__) || defined(__mips64) || defined(__aarch64__) || \
- defined(__powerpc64__))
+ defined(__powerpc64__) || defined(__s390x__))
#define CAN_SANITIZE_LEAKS 1
#elif defined(__i386__) && \
(SANITIZER_LINUX && !SANITIZER_ANDROID || SANITIZER_MAC)
Index: compiler-rt/lib/lsan/lsan_allocator.h
===
--- compiler-rt/lib/lsan/lsan_allocator.h
+++ compiler-rt/lib/lsan/lsan_allocator.h
@@ -65,13 +65,16 @@
template
using PrimaryAllocatorASVT = SizeClassAllocator32>;
using PrimaryAllocator = PrimaryAllocatorASVT;
-#elif defined(__x86_64__) || defined(__powerpc64__)
+#elif defined(__x86_64__) || defined(__powerpc64__)
