[PATCH] D105869: [Driver] fix PowerPC SPE musl dynamic linker name

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits accepted this revision.
jhibbits added a comment.
This revision is now accepted and ready to land.

Looks fine to me.  @nemanjai this one is more Musl, less SPE :)


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[PATCH] D73290: [PowerPC] Add clang -msvr4-struct-return for 32-bit ELF

[Justin Hibbits via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG4ca2cad947d0: [PowerPC] Add clang -msvr4-struct-return for 
32-bit ELF (authored by jhibbits).

Changed prior to commit:
  https://reviews.llvm.org/D73290?vs=239982=259143#toc

Repository:
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Files:
  clang/docs/ClangCommandLineReference.rst
  clang/include/clang/Driver/Options.td
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- /dev/null
+++ clang/test/Driver/ppc-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang -target powerpc64-unknown-freebsd -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-freebsd -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64le-unknown-linux -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- /dev/null
+++ clang/test/CodeGen/ppc32-struct-return.c
@@ -0,0 +1,88 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpc-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -maix-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -msvr4-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+
+typedef struct {
+} Zero;
+typedef struct {
+  char c;
+} One;
+typedef struct {
+  short s;
+} Two;
+typedef struct {
+  char c[3];
+} Three;
+typedef struct {
+  float f;
+} Four; // svr4 to return i32, not float
+typedef struct {
+  char c[5];
+} Five;
+typedef struct {
+  short s[3];
+} Six;
+typedef struct {
+  char c[7];
+} Seven;
+typedef struct {
+  int i;
+  char c;
+} Eight; // padded for alignment
+typedef struct {
+  char c[9];
+} Nine;
+
+// CHECK-AIX-LABEL: define void @ret0(%struct.Zero* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define void @ret0()
+Zero ret0(void) { return (Zero){}; }
+
+// CHECK-AIX-LABEL: define void @ret1(%struct.One* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i8 @ret1()
+One ret1(void) { return (One){'a'}; }
+
+// CHECK-AIX-LABEL: define void @ret2(%struct.Two* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i16 @ret2()
+Two ret2(void) { return (Two){123}; }
+
+// CHECK-AIX-LABEL: define void @ret3(%struct.Three* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i24 @ret3()
+Three ret3(void) { return (Three){"abc"}; }
+
+// CHECK-AIX-LABEL: define void @ret4(%struct.Four* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i32 @ret4()
+Four ret4(void) { return (Four){0.4}; }
+
+// CHECK-AIX-LABEL: define void @ret5(%struct.Five* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i40 @ret5()
+Five ret5(void) { return (Five){"abcde"}; }
+
+// CHECK-AIX-LABEL: define void @ret6(%struct.Six* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i48 @ret6()
+Six ret6(void) { return (Six){12, 34, 56}; }
+
+// CHECK-AIX-LABEL: define void @ret7(%struct.Seven* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i56 @ret7()
+Seven ret7(void) { return (Seven){"abcdefg"}; }
+
+// CHECK-AIX-LABEL: define void @ret8(%struct.Eight* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define i64 @ret8()
+Eight ret8(void) { return (Eight){123, 'a'}; }
+
+// CHECK-AIX-LABEL: define void @ret9(%struct.Nine* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define void @ret9(%struct.Nine* noalias sret {{[^,]*}})
+Nine ret9(void) { return (Nine){"abcdefghi"}; }
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- 

[PATCH] D73290: [PowerPC] Add clang -msvr4-struct-return for 32-bit ELF

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a reviewer: nemanjai.
jhibbits added a comment.

@ZarkoCA I think someone else should also review this, so added @nemanjai as a 
potential reviewer.  He might have more insight to the code in question.  I'd 
like to see this go in soon, though, so that it gets into 11, and we can use it 
in FreeBSD.


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[PATCH] D73290: [PowerPC] Add clang -msvr4-struct-return for 32-bit ELF

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits edited reviewers, added: jhibbits; removed: chmeee.
jhibbits accepted this revision.
jhibbits added a comment.
This revision is now accepted and ready to land.

Code looks fine, and others have tested it.  Good to see a reversion of the ABI 
to expected for GCC compatibility on the BSDs.


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[PATCH] D72433: [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits accepted this revision.
jhibbits added a comment.
This revision is now accepted and ready to land.

Fine with me.  I just wanted -target powerpcspe-... to work with D72014 
.


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[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGff0311c4b3b9: [PowerPC]: Add powerpcspe target triple 
subarch component (authored by chmeee).

Changed prior to commit:
  https://reviews.llvm.org/D72014?vs=235716=236937#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72014/new/

https://reviews.llvm.org/D72014

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Preprocessor/init.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -163,6 +163,13 @@
   EXPECT_EQ(Triple::UnknownOS, T.getOS());
   EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
 
+  T = Triple("powerpcspe-unknown-freebsd");
+  EXPECT_EQ(Triple::ppc, T.getArch());
+  EXPECT_EQ(Triple::PPCSubArch_spe, T.getSubArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::FreeBSD, T.getOS());
+  EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+
   T = Triple("arm-none-none-eabi");
   EXPECT_EQ(Triple::arm, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -151,6 +151,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -387,7 +387,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", "i886", "i986", Triple::x86)
 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
 .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
 .Case("xscale", Triple::arm)
@@ -559,6 +559,9 @@
   (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
 return Triple::MipsSubArch_r6;
 
+  if (SubArchName == "powerpcspe")
+return Triple::PPCSubArch_spe;
+
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 
   // For now, this is the small part. Early return.
Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -128,7 +128,9 @@
 KalimbaSubArch_v4,
 KalimbaSubArch_v5,
 
-MipsSubArch_r6
+MipsSubArch_r6,
+
+PPCSubArch_spe
   };
   enum VendorType {
 UnknownVendor,
Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -6551,10 +6551,11 @@
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpcspe-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
-// 
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
 //
 // PPC8548:#define __NO_FPRS__ 1
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -87,8 +87,7 @@
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl ) const override;
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -316,7 +316,8 @@
 .Case("pwr8", true)
 .Default(false);
 
-  Features["spe"] = llvm::StringSwitch(CPU)
+  

[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Any more feedback on this?


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[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 235716.
jhibbits added a comment.

Add triple unit test.  I chose freebsd as the OS since that's my environment.


Repository:
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Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Preprocessor/init.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -163,6 +163,13 @@
   EXPECT_EQ(Triple::UnknownOS, T.getOS());
   EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
 
+  T = Triple("powerpcspe-unknown-freebsd");
+  EXPECT_EQ(Triple::ppc, T.getArch());
+  EXPECT_EQ(Triple::PPCSubArch_spe, T.getSubArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::FreeBSD, T.getOS());
+  EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+
   T = Triple("arm-none-none-eabi");
   EXPECT_EQ(Triple::arm, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -150,6 +150,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -389,7 +389,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", "i886", "i986", Triple::x86)
 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
 .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
 .Case("xscale", Triple::arm)
@@ -563,6 +563,9 @@
   (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
 return Triple::MipsSubArch_r6;
 
+  if (SubArchName == "powerpcspe")
+return Triple::PPCSubArch_spe;
+
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 
   // For now, this is the small part. Early return.
Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -128,7 +128,9 @@
 KalimbaSubArch_v4,
 KalimbaSubArch_v5,
 
-MipsSubArch_r6
+MipsSubArch_r6,
+
+PPCSubArch_spe
   };
   enum VendorType {
 UnknownVendor,
Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7617,6 +7617,7 @@
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpcspe-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -87,8 +87,7 @@
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl ) const override;
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -316,7 +316,8 @@
 .Case("pwr8", true)
 .Default(false);
 
-  Features["spe"] = llvm::StringSwitch(CPU)
+  Features["spe"] = getTriple().getSubArch() == llvm::Triple::PPCSubArch_spe ||
+llvm::StringSwitch(CPU)
 .Case("8548", true)
 .Case("e500", true)
 .Default(false);
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[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 235668.
jhibbits added a comment.

Reuse the SPE feature test preprocessor test check instead of duplicating it.
powerpcspe-* is exactly equivalent to the -mspe command line argument.


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Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Preprocessor/init.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -150,6 +150,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -389,7 +389,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", "i886", "i986", Triple::x86)
 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
 .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
 .Case("xscale", Triple::arm)
@@ -563,6 +563,9 @@
   (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
 return Triple::MipsSubArch_r6;
 
+  if (SubArchName == "powerpcspe")
+return Triple::PPCSubArch_spe;
+
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 
   // For now, this is the small part. Early return.
Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -128,7 +128,9 @@
 KalimbaSubArch_v4,
 KalimbaSubArch_v5,
 
-MipsSubArch_r6
+MipsSubArch_r6,
+
+PPCSubArch_spe
   };
   enum VendorType {
 UnknownVendor,
Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7617,6 +7617,7 @@
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu 
-target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix 
PPC32-SPE %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpcspe-unknown-linux-gnu 
< /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -87,8 +87,7 @@
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl ) const override;
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -316,7 +316,8 @@
 .Case("pwr8", true)
 .Default(false);
 
-  Features["spe"] = llvm::StringSwitch(CPU)
+  Features["spe"] = getTriple().getSubArch() == llvm::Triple::PPCSubArch_spe ||
+llvm::StringSwitch(CPU)
 .Case("8548", true)
 .Case("e500", true)
 .Default(false);


Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -150,6 +150,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -389,7 +389,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", 

[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits marked an inline comment as done.
jhibbits added inline comments.



Comment at: clang/test/Preprocessor/init.c:7628
+// PPC32-SPE-TGT:#define __SPE__ 1
 // 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu 
-target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix 
PPC8548 %s

arichardson wrote:
> These seem to be checking the same defines. It's it possible to reuse the 
> existing `-check-prefix PPC32-SPE` for new newly added command?
Yeah, it's better to reuse.  I waffled on it a bit before doing it this way, 
and didn't really like it anyway.  Reverting to the reuse.


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[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 235637.
jhibbits added a comment.

Fix a test typo made at the last minute.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72014/new/

https://reviews.llvm.org/D72014

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Preprocessor/init.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp

Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -150,6 +150,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -389,7 +389,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", "i886", "i986", Triple::x86)
 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
 .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
 .Case("xscale", Triple::arm)
@@ -563,6 +563,9 @@
   (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
 return Triple::MipsSubArch_r6;
 
+  if (SubArchName == "powerpcspe")
+return Triple::PPCSubArch_spe;
+
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 
   // For now, this is the small part. Early return.
Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -128,7 +128,9 @@
 KalimbaSubArch_v4,
 KalimbaSubArch_v5,
 
-MipsSubArch_r6
+MipsSubArch_r6,
+
+PPCSubArch_spe
   };
   enum VendorType {
 UnknownVendor,
Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7616,10 +7616,15 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE-FEAT %s
 //
-// PPC32-SPE:#define __NO_FPRS__ 1
-// PPC32-SPE:#define __SPE__ 1
+// PPC32-SPE-FEAT:#define __NO_FPRS__ 1
+// PPC32-SPE-FEAT:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpcspe-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE-TGT %s
+//
+// PPC32-SPE-TGT:#define __NO_FPRS__ 1
+// PPC32-SPE-TGT:#define __SPE__ 1
 // 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
 //
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -87,8 +87,7 @@
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl ) const override;
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -316,7 +316,8 @@
 .Case("pwr8", true)
 .Default(false);
 
-  Features["spe"] = llvm::StringSwitch(CPU)
+  Features["spe"] = getTriple().getSubArch() == llvm::Triple::PPCSubArch_spe ||
+llvm::StringSwitch(CPU)
 .Case("8548", true)
 .Case("e500", true)
 .Default(false);
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[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits created this revision.
jhibbits added a reviewer: PowerPC.
Herald added subscribers: llvm-commits, cfe-commits, steven.zhang, shchenz, 
jsji, dexonsmith, kbarton, hiraditya, krytarowski, arichardson, nemanjai, 
emaste.
Herald added projects: clang, LLVM.

This allows the use of '-target powerpcspe-unknown-linux-gnu' or
'powerpcspe-unknown-freebsd' to be used, instead of
'-target powerpc-unknown-linux-gnu -mspe'.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72014

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Preprocessor/init.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp

Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -150,6 +150,9 @@
   TargetTriple.isMusl())
 SecurePlt = true;
 
+  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+HasSPE = true;
+
   if (HasSPE && IsPPC64)
 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
   if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -389,7 +389,7 @@
 // FIXME: Do we need to support these?
 .Cases("i786", "i886", "i986", Triple::x86)
 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
 .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
 .Case("xscale", Triple::arm)
@@ -563,6 +563,9 @@
   (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
 return Triple::MipsSubArch_r6;
 
+  if (SubArchName == "powerpcspe")
+return Triple::PPCSubArch_spe;
+
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 
   // For now, this is the small part. Early return.
Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -128,7 +128,9 @@
 KalimbaSubArch_v4,
 KalimbaSubArch_v5,
 
-MipsSubArch_r6
+MipsSubArch_r6,
+
+PPCSubArch_spe
   };
   enum VendorType {
 UnknownVendor,
Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7616,10 +7616,15 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE-FEAT %s
 //
-// PPC32-SPE:#define __NO_FPRS__ 1
-// PPC32-SPE:#define __SPE__ 1
+// PPC32-SPE-FEAT:#define __NO_FPRS__ 1
+// PPC32-SPE-FEAT:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpcspe-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPCSPE-TGT %s
+//
+// PPC32-SPE-TGT:#define __NO_FPRS__ 1
+// PPC32-SPE-TGT:#define __SPE__ 1
 // 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
 //
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -87,8 +87,7 @@
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl ) const override;
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -316,7 +316,8 @@
 .Case("pwr8", true)
 .Default(false);
 
-  Features["spe"] = llvm::StringSwitch(CPU)
+  Features["spe"] = getTriple().getSubArch() == llvm::Triple::PPCSubArch_spe ||
+llvm::StringSwitch(CPU)
 .Case("8548", true)
 .Case("e500", true)
 .Default(false);
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[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGbc4bc5aa0d84: Add 8548 CPU definition and attributes 
(authored by chmeee).

Changed prior to commit:
  https://reviews.llvm.org/D67787?vs=228589=228995#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67787/new/

https://reviews.llvm.org/D67787

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/lib/Driver/ToolChains/Arch/PPC.cpp
  clang/test/Driver/clang-translation.c
  clang/test/Misc/target-invalid-cpu-note.c
  clang/test/Preprocessor/init.c

Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7604,6 +7604,12 @@
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
+//
+// PPC8548:#define __NO_FPRS__ 1
+// PPC8548:#define __NO_LWSYNC__ 1
+// PPC8548:#define __SPE__ 1
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -79,10 +79,10 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
-// PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
-// PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
-// PPC-SAME: powerpc64le, ppc64le
+// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
+// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
+// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64,
+// PPC-SAME: ppc64, powerpc64le, ppc64le
 
 // RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
 // MIPS: error: unknown target CPU 'not-a-cpu'
Index: clang/test/Driver/clang-translation.c
===
--- clang/test/Driver/clang-translation.c
+++ clang/test/Driver/clang-translation.c
@@ -277,6 +277,18 @@
 // PPC64NS: "-target-cpu" "ppc64"
 
 // RUN: %clang -target powerpc-fsl-linux -### -S %s \
+// RUN: -mcpu=e500 2>&1 | FileCheck -check-prefix=PPCE500 %s
+// PPCE500: clang
+// PPCE500: "-cc1"
+// PPCE500: "-target-cpu" "e500"
+
+// RUN: %clang -target powerpc-fsl-linux -### -S %s \
+// RUN: -mcpu=8548 2>&1 | FileCheck -check-prefix=PPC8548 %s
+// PPC8548: clang
+// PPC8548: "-cc1"
+// PPC8548: "-target-cpu" "e500"
+
+// RUN: %clang -target powerpc-fsl-linux -### -S %s \
 // RUN: -mcpu=e500mc 2>&1 | FileCheck -check-prefix=PPCE500MC %s
 // PPCE500MC: clang
 // PPCE500MC: "-cc1"
Index: clang/lib/Driver/ToolChains/Arch/PPC.cpp
===
--- clang/lib/Driver/ToolChains/Arch/PPC.cpp
+++ clang/lib/Driver/ToolChains/Arch/PPC.cpp
@@ -53,10 +53,12 @@
 .Case("7450", "7450")
 .Case("G4+", "g4+")
 .Case("750", "750")
+.Case("8548", "e500")
 .Case("970", "970")
 .Case("G5", "g5")
 .Case("a2", "a2")
 .Case("a2q", "a2q")
+.Case("e500", "e500")
 .Case("e500mc", "e500mc")
 .Case("e5500", "e5500")
 .Case("power3", "pwr3")
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -44,7 +44,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefineE500 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -145,6 +146,7 @@
  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
  ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+  .Cases("8548", "e500", ArchDefineE500)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -157,6 +157,8 @@
 Builder.defineMacro("_ARCH_A2Q");
 Builder.defineMacro("_ARCH_QP");
   }
+  if (ArchDefs & ArchDefineE500)
+Builder.defineMacro("__NO_LWSYNC__");
 
   if 

[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

@vit9696 mind reviewing again with the added tests?


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[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 228589.
jhibbits added a comment.

Add clang-translation tests for e500 and 8548 CPU definitions.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/lib/Driver/ToolChains/Arch/PPC.cpp
  clang/test/Driver/clang-translation.c
  clang/test/Misc/target-invalid-cpu-note.c
  clang/test/Preprocessor/init.c

Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7604,6 +7604,12 @@
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
+//
+// PPC8548:#define __NO_FPRS__ 1
+// PPC8548:#define __NO_LWSYNC__ 1
+// PPC8548:#define __SPE__ 1
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -79,10 +79,10 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
-// PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
-// PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
-// PPC-SAME: powerpc64le, ppc64le
+// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
+// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
+// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64,
+// PPC-SAME: ppc64, powerpc64le, ppc64le
 
 // RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
 // MIPS: error: unknown target CPU 'not-a-cpu'
Index: clang/test/Driver/clang-translation.c
===
--- clang/test/Driver/clang-translation.c
+++ clang/test/Driver/clang-translation.c
@@ -276,6 +276,18 @@
 // PPC64NS: "-cc1"
 // PPC64NS: "-target-cpu" "ppc64"
 
+// RUN: %clang -target powerpc-fsl-linux -### -S %s \
+// RUN: -mcpu=e500 2>&1 | FileCheck -check-prefix=PPCE500 %s
+// PPCE500: clang
+// PPCE500: "-cc1"
+// PPCE500: "-target-cpu" "e500"
+
+// RUN: %clang -target powerpc-fsl-linux -### -S %s \
+// RUN: -mcpu=8548 2>&1 | FileCheck -check-prefix=PPC8548 %s
+// PPC8548: clang
+// PPC8548: "-cc1"
+// PPC8548: "-target-cpu" "e500"
+
 // RUN: %clang -target powerpc-fsl-linux -### -S %s \
 // RUN: -mcpu=e500mc 2>&1 | FileCheck -check-prefix=PPCE500MC %s
 // PPCE500MC: clang
Index: clang/lib/Driver/ToolChains/Arch/PPC.cpp
===
--- clang/lib/Driver/ToolChains/Arch/PPC.cpp
+++ clang/lib/Driver/ToolChains/Arch/PPC.cpp
@@ -53,10 +53,12 @@
 .Case("7450", "7450")
 .Case("G4+", "g4+")
 .Case("750", "750")
+.Case("8548", "e500")
 .Case("970", "970")
 .Case("G5", "g5")
 .Case("a2", "a2")
 .Case("a2q", "a2q")
+.Case("e500", "e500")
 .Case("e500mc", "e500mc")
 .Case("e5500", "e5500")
 .Case("power3", "pwr3")
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -44,7 +44,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefineE500 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -145,6 +146,7 @@
  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
  ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+  .Cases("8548", "e500", ArchDefineE500)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -157,6 +157,8 @@
 Builder.defineMacro("_ARCH_A2Q");
 Builder.defineMacro("_ARCH_QP");
   }
+  if (ArchDefs & ArchDefineE500)
+Builder.defineMacro("__NO_LWSYNC__");
 
   if (getTriple().getVendor() == llvm::Triple::BGQ) {
 Builder.defineMacro("__bg__");
@@ -312,6 +314,11 @@

[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits marked an inline comment as done.
jhibbits added inline comments.



Comment at: clang/lib/Driver/ToolChains/Arch/PPC.cpp:61
 .Case("a2q", "a2q")
+.Case("8548", "e500")
+.Case("e500", "e500")

vit9696 wrote:
> That looks like a typo to me. There is one more 8548 case above.
You're right, I missed that I added it above already.


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[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 226529.
jhibbits added a comment.

Make 8548 actually denote e500 LLVM target, add SPE checks to 8548 preprocessor 
test.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/lib/Driver/ToolChains/Arch/PPC.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  clang/test/Preprocessor/init.c

Index: clang/test/Preprocessor/init.c
===
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -7584,6 +7584,12 @@
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
+//
+// PPC8548:#define __NO_FPRS__ 1
+// PPC8548:#define __NO_LWSYNC__ 1
+// PPC8548:#define __SPE__ 1
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -79,10 +79,10 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
-// PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
-// PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
-// PPC-SAME: powerpc64le, ppc64le
+// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
+// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
+// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64,
+// PPC-SAME: ppc64, powerpc64le, ppc64le
 
 // RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
 // MIPS: error: unknown target CPU 'not-a-cpu'
Index: clang/lib/Driver/ToolChains/Arch/PPC.cpp
===
--- clang/lib/Driver/ToolChains/Arch/PPC.cpp
+++ clang/lib/Driver/ToolChains/Arch/PPC.cpp
@@ -53,10 +53,13 @@
 .Case("7450", "7450")
 .Case("G4+", "g4+")
 .Case("750", "750")
+.Case("8548", "e500")
 .Case("970", "970")
 .Case("G5", "g5")
 .Case("a2", "a2")
 .Case("a2q", "a2q")
+.Case("8548", "e500")
+.Case("e500", "e500")
 .Case("e500mc", "e500mc")
 .Case("e5500", "e5500")
 .Case("power3", "pwr3")
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -44,7 +44,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefineE500 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -145,6 +146,7 @@
  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
  ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+  .Cases("8548", "e500", ArchDefineE500)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -157,6 +157,8 @@
 Builder.defineMacro("_ARCH_A2Q");
 Builder.defineMacro("_ARCH_QP");
   }
+  if (ArchDefs & ArchDefineE500)
+Builder.defineMacro("__NO_LWSYNC__");
 
   if (getTriple().getVendor() == llvm::Triple::BGQ) {
 Builder.defineMacro("__bg__");
@@ -312,6 +314,11 @@
 .Case("pwr8", true)
 .Default(false);
 
+  Features["spe"] = llvm::StringSwitch(CPU)
+.Case("8548", true)
+.Case("e500", true)
+.Default(false);
+
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
 return false;
 
@@ -449,16 +456,16 @@
 }
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
-{"generic"}, {"440"}, {"450"}, {"601"},{"602"},
-{"603"}, {"603e"},{"603ev"},   {"604"},{"604e"},
-{"620"}, {"630"}, {"g3"},  {"7400"},   {"g4"},
-{"7450"},{"g4+"}, {"750"}, {"970"},{"g5"},
-{"a2"},  {"a2q"}, {"e500mc"},  {"e5500"},  {"power3"},
-{"pwr3"},

[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

In D67787#1719251 , @vit9696 wrote:

> A side note regarding SPE support. I am currently upgrading to LLVM 9.0 and I 
> discovered that this patch was not committed anyhow at all:
>  https://reviews.llvm.org/D54583#1444288


Yeah, I noticed that after I committed it.  Problem is, to submit that for 
review, I need a valid reduced test case., and my laziness/busy-ness has 
prevented me from creating a reduced test case in LLVM language.


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[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

@vit9696 The only thing GCC defines for mcpu=8548 is __NO_LWSYNC__, the 
SPE-specific #defines are from -mspe.  That said, since I explicitly do enable 
SPE for e500 CPU, I guess it makes sense to add it to the test.


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[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits created this revision.
jhibbits added reviewers: nemanjai, hfinkel, joerg, kthomsen.
Herald added subscribers: cfe-commits, jsji, MaskRay, kbarton.
Herald added a project: clang.

8548 CPU is GCC's name for the e500v2, so accept this in clang.  The
e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well,
as GCC does.


Repository:
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https://reviews.llvm.org/D67787

Files:
  lib/Basic/Targets/PPC.cpp
  lib/Basic/Targets/PPC.h
  lib/Driver/ToolChains/Arch/PPC.cpp
  test/Misc/target-invalid-cpu-note.c
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -7584,6 +7584,10 @@
 //
 // PPC32-SPE:#define __NO_FPRS__ 1
 // PPC32-SPE:#define __SPE__ 1
+// 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
+//
+// PPC8548:#define __NO_LWSYNC__ 1
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
Index: test/Misc/target-invalid-cpu-note.c
===
--- test/Misc/target-invalid-cpu-note.c
+++ test/Misc/target-invalid-cpu-note.c
@@ -79,10 +79,10 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
-// PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
-// PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
-// PPC-SAME: powerpc64le, ppc64le
+// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
+// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
+// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64,
+// PPC-SAME: ppc64, powerpc64le, ppc64le
 
 // RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
 // MIPS: error: unknown target CPU 'not-a-cpu'
Index: lib/Driver/ToolChains/Arch/PPC.cpp
===
--- lib/Driver/ToolChains/Arch/PPC.cpp
+++ lib/Driver/ToolChains/Arch/PPC.cpp
@@ -52,6 +52,7 @@
 .Case("7450", "7450")
 .Case("G4+", "g4+")
 .Case("750", "750")
+.Case("8548", "e500")
 .Case("970", "970")
 .Case("G5", "g5")
 .Case("a2", "a2")
Index: lib/Basic/Targets/PPC.h
===
--- lib/Basic/Targets/PPC.h
+++ lib/Basic/Targets/PPC.h
@@ -44,7 +44,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefineE500 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -145,6 +146,7 @@
  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
  ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+  .Case("8548", ArchDefineE500)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: lib/Basic/Targets/PPC.cpp
===
--- lib/Basic/Targets/PPC.cpp
+++ lib/Basic/Targets/PPC.cpp
@@ -157,6 +157,8 @@
 Builder.defineMacro("_ARCH_A2Q");
 Builder.defineMacro("_ARCH_QP");
   }
+  if (ArchDefs & ArchDefineE500)
+Builder.defineMacro("__NO_LWSYNC__");
 
   if (getTriple().getVendor() == llvm::Triple::BGQ) {
 Builder.defineMacro("__bg__");
@@ -312,6 +314,8 @@
 .Case("pwr8", true)
 .Default(false);
 
+  Features["spe"] = (CPU == "e500");
+
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
 return false;
 
@@ -449,16 +453,16 @@
 }
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
-{"generic"}, {"440"}, {"450"}, {"601"},{"602"},
-{"603"}, {"603e"},{"603ev"},   {"604"},{"604e"},
-{"620"}, {"630"}, {"g3"},  {"7400"},   {"g4"},
-{"7450"},{"g4+"}, {"750"}, {"970"},{"g5"},
-{"a2"},  {"a2q"}, {"e500mc"},  {"e5500"},  {"power3"},
-{"pwr3"},{"power4"},  {"pwr4"},{"power5"}, {"pwr5"},
-{"power5x"}, {"pwr5x"},   {"power6"},  {"pwr6"},   {"power6x"},
-{"pwr6x"},   {"power7"},  {"pwr7"},{"power8"}, {"pwr8"},
-{"power9"},  {"pwr9"},{"powerpc"}, {"ppc"},{"powerpc64"},
-{"ppc64"},   {"powerpc64le"}, {"ppc64le"},
+{"generic"},   {"440"},   {"450"}, {"601"}, {"602"},
+{"603"},   {"603e"}, 

[PATCH] D67787: Add 8548 CPU definition and attributes

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.
Herald added a subscriber: wuzish.

I made 8548 an alias in clang to e500, because e500 is recognized in llvm as a 
CPU, so gets us the feature list and, more importantly, the instruction 
scheduler.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Not in 9.0, but I will try to push for it in 9.0.1.

To others, for posterity, I pushed *only* the SPE subset, not the 8548 CPU 
component.  That will be a separate commit.  I wanted it to be more than just a 
dummy stub, so that part will be a separate commit.  The part committed was 
already reviewed by @nemanjai and approved.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

This revision was not accepted when it landed; it landed in state "Needs 
Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rL371066: Add -m(no)-spe to clang (authored by jhibbits, 
committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D49754?vs=207214=218907#toc

Repository:
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Files:
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/lib/Basic/Targets/PPC.cpp
  cfe/trunk/lib/Basic/Targets/PPC.h
  cfe/trunk/lib/CodeGen/TargetInfo.cpp
  cfe/trunk/test/Driver/ppc-features.cpp
  cfe/trunk/test/Preprocessor/init.c

Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -2269,6 +2269,8 @@
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>;
 def maltivec : Flag<["-"], "maltivec">, Group;
 def mno_altivec : Flag<["-"], "mno-altivec">, Group;
+def mspe : Flag<["-"], "mspe">, Group;
+def mno_spe : Flag<["-"], "mno-spe">, Group;
 def mvsx : Flag<["-"], "mvsx">, Group;
 def mno_vsx : Flag<["-"], "mno-vsx">, Group;
 def msecure_plt : Flag<["-"], "msecure-plt">, Group;
Index: cfe/trunk/test/Driver/ppc-features.cpp
===
--- cfe/trunk/test/Driver/ppc-features.cpp
+++ cfe/trunk/test/Driver/ppc-features.cpp
@@ -168,6 +168,9 @@
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s
 // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors"
 
+// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s
+// CHECK-SPE: "-target-feature" "+spe"
+
 // Assembler features
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s
 // CHECK_BE_AS_ARGS: "-mppc64"
Index: cfe/trunk/test/Preprocessor/init.c
===
--- cfe/trunk/test/Preprocessor/init.c
+++ cfe/trunk/test/Preprocessor/init.c
@@ -7580,6 +7580,11 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+//
+// PPC32-SPE:#define __NO_FPRS__ 1
+// PPC32-SPE:#define __SPE__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
 // PPC-DARWIN:#define _ARCH_PPC 1
Index: cfe/trunk/lib/Basic/Targets/PPC.cpp
===
--- cfe/trunk/lib/Basic/Targets/PPC.cpp
+++ cfe/trunk/lib/Basic/Targets/PPC.cpp
@@ -54,6 +54,10 @@
   HasFloat128 = true;
 } else if (Feature == "+power9-vector") {
   HasP9Vector = true;
+} else if (Feature == "+spe") {
+  HasSPE = true;
+  LongDoubleWidth = LongDoubleAlign = 64;
+  LongDoubleFormat = ::APFloat::IEEEdouble();
 } else if (Feature == "-hard-float") {
   FloatABI = SoftFloat;
 }
@@ -165,6 +169,10 @@
 Builder.defineMacro("__VEC__", "10206");
 Builder.defineMacro("__ALTIVEC__");
   }
+  if (HasSPE) {
+Builder.defineMacro("__SPE__");
+Builder.defineMacro("__NO_FPRS__");
+  }
   if (HasVSX)
 Builder.defineMacro("__VSX__");
   if (HasP8Vector)
@@ -203,7 +211,6 @@
   //   __CMODEL_LARGE__
   //   _CALL_SYSV
   //   _CALL_DARWIN
-  //   __NO_FPRS__
 }
 
 // Handle explicit options being passed to the compiler here: if we've
@@ -332,6 +339,7 @@
   .Case("extdiv", HasExtDiv)
   .Case("float128", HasFloat128)
   .Case("power9-vector", HasP9Vector)
+  .Case("spe", HasSPE)
   .Default(false);
 }
 
Index: cfe/trunk/lib/Basic/Targets/PPC.h
===
--- cfe/trunk/lib/Basic/Targets/PPC.h
+++ cfe/trunk/lib/Basic/Targets/PPC.h
@@ -66,6 +66,7 @@
   bool HasBPERMD = false;
   bool HasExtDiv = false;
   bool HasP9Vector = false;
+  bool HasSPE = false;
 
 protected:
   std::string ABI;
Index: cfe/trunk/lib/CodeGen/TargetInfo.cpp
===
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp
@@ -9726,7 +9726,8 @@
 
   case llvm::Triple::ppc:
 return SetCGInfo(
-new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft"));
+new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft" ||
+   getTarget().hasFeature("spe")));
   case llvm::Triple::ppc64:
 

[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits requested review of this revision.
jhibbits added a comment.

Should've marked it as need review earlier.


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[PATCH] D60335: Use -fomit-frame-pointer when optimizing PowerPC code

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits accepted this revision.
jhibbits added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: shchenz.

Looks fine to me.  Since it can be turned off, I don't see a problem if it 
causes issues.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 207214.
jhibbits added a comment.

Made '8548' CPU designation just a stub, to be filled out later.  I added it
just for parity with GCC.  The 8548 CPU, for GCC, also sets the
__NO_LWSYNC__ macro, which doesn't belong with the SPE change, so will have
to be revisited later.


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Files:
  include/clang/Driver/Options.td
  lib/Basic/Targets/PPC.cpp
  lib/Basic/Targets/PPC.h
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/ToolChains/Arch/PPC.cpp
  test/Driver/ppc-features.cpp
  test/Misc/target-invalid-cpu-note.c
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -7580,6 +7580,11 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+//
+// PPC32-SPE:#define __NO_FPRS__ 1
+// PPC32-SPE:#define __SPE__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
 // PPC-DARWIN:#define _ARCH_PPC 1
Index: test/Misc/target-invalid-cpu-note.c
===
--- test/Misc/target-invalid-cpu-note.c
+++ test/Misc/target-invalid-cpu-note.c
@@ -79,7 +79,7 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
+// PPC-SAME: 8548, 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
 // PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
 // PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
 // PPC-SAME: powerpc64le, ppc64le
Index: test/Driver/ppc-features.cpp
===
--- test/Driver/ppc-features.cpp
+++ test/Driver/ppc-features.cpp
@@ -168,6 +168,9 @@
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s
 // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors"
 
+// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s
+// CHECK-SPE: "-target-feature" "+spe"
+
 // Assembler features
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s
 // CHECK_BE_AS_ARGS: "-mppc64"
Index: lib/Driver/ToolChains/Arch/PPC.cpp
===
--- lib/Driver/ToolChains/Arch/PPC.cpp
+++ lib/Driver/ToolChains/Arch/PPC.cpp
@@ -115,7 +115,8 @@
   const ArgList ) {
   if (Args.getLastArg(options::OPT_msecure_plt))
 return ppc::ReadGOTPtrMode::SecurePlt;
-  if (Triple.isOSNetBSD() || Triple.isOSOpenBSD() || Triple.isMusl())
+  if ((Triple.isOSFreeBSD() && Triple.getOSMajorVersion() >= 13) ||
+  Triple.isOSNetBSD() || Triple.isOSOpenBSD() || Triple.isMusl())
 return ppc::ReadGOTPtrMode::SecurePlt;
   else
 return ppc::ReadGOTPtrMode::Bss;
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -9458,7 +9458,8 @@
 
   case llvm::Triple::ppc:
 return SetCGInfo(
-new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft"));
+new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft" ||
+   getTarget().hasFeature("spe")));
   case llvm::Triple::ppc64:
 if (Triple.isOSBinFormatELF()) {
   PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1;
Index: lib/Basic/Targets/PPC.h
===
--- lib/Basic/Targets/PPC.h
+++ lib/Basic/Targets/PPC.h
@@ -66,6 +66,7 @@
   bool HasBPERMD = false;
   bool HasExtDiv = false;
   bool HasP9Vector = false;
+  bool HasSPE = false;
 
 protected:
   std::string ABI;
Index: lib/Basic/Targets/PPC.cpp
===
--- lib/Basic/Targets/PPC.cpp
+++ lib/Basic/Targets/PPC.cpp
@@ -54,6 +54,10 @@
   HasFloat128 = true;
 } else if (Feature == "+power9-vector") {
   HasP9Vector = true;
+} else if (Feature == "+spe") {
+  HasSPE = true;
+  LongDoubleWidth = LongDoubleAlign = 64;
+  LongDoubleFormat = ::APFloat::IEEEdouble();
 } else if (Feature == "-hard-float") {
   FloatABI 

[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Actually, I'm not yet ready to commit this.  I want to enforce the 8548 -> e500 
processor model before I call this ready.  How do I do that with the mcpu?


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

I'll commit it tonight.  Was going to last night, but ran into a clang test 
failure, that turned out to be a long-standing failure with FreeBSD/powerpc64, 
not a problem with my change.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits marked an inline comment as done.
jhibbits added inline comments.



Comment at: lib/Basic/Targets/PPC.cpp:318
+  Features["spe"] = llvm::StringSwitch(CPU)
+.Case("e500", true)
+.Case("8548", true)

vit9696 wrote:
> nemanjai wrote:
> > The `e500v2` that you added doesn't support SPE?
> I rechecked the docs, and there is no e500v2 option for -mcpu in GCC:
> https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options.
> 
> GCC defines 8540 (currently missing) and 8548, which I suppose we should 
> support with default switches for SPE. As for other options, there also is 
> -me500, which enables SPE, and -me500mc, which does not. I believe the need 
> of these options is discussible.
> 
> The author of the patch may have his own thoughts behind, but I am not sure 
> if e500, e500v1, or e500v2 should be used as mcpu switches at all. I am not 
> against it if it makes things more convenient though.
I decided it's better to match gcc in this regard, and support only 8548 (8540 
is e500v1, which this SPE codegen does not support).


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[PATCH] D59185: [PowerPC] Set the default PLT mode on musl to Secure PLT

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits accepted this revision.
jhibbits added a comment.
This revision is now accepted and ready to land.

Looks fine to me.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits updated this revision to Diff 185487.
jhibbits added a comment.
Herald added a project: clang.

Add feedback from @vit9696, and VAARG fix from @kthomsen.


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Files:
  include/clang/Driver/Options.td
  lib/Basic/Targets/PPC.cpp
  lib/Basic/Targets/PPC.h
  lib/CodeGen/TargetInfo.cpp
  test/Driver/ppc-features.cpp
  test/Misc/target-invalid-cpu-note.c
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -7016,6 +7016,10 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+//
+// PPC32-SPE:#define __SPE__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
 // PPC-DARWIN:#define _ARCH_PPC 1
Index: test/Misc/target-invalid-cpu-note.c
===
--- test/Misc/target-invalid-cpu-note.c
+++ test/Misc/target-invalid-cpu-note.c
@@ -79,7 +79,7 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
+// PPC-SAME: 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4, pwr4,
 // PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
 // PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
 // PPC-SAME: powerpc64le, ppc64le
Index: test/Driver/ppc-features.cpp
===
--- test/Driver/ppc-features.cpp
+++ test/Driver/ppc-features.cpp
@@ -168,6 +168,9 @@
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s
 // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors"
 
+// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s
+// CHECK-SPE: "-target-feature" "+spe"
+
 // Assembler features
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s
 // CHECK_BE_AS_ARGS: "-mppc64"
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -9307,7 +9307,8 @@
 
   case llvm::Triple::ppc:
 return SetCGInfo(
-new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft"));
+new PPC32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == "soft" ||
+   getTarget().hasFeature("spe")));
   case llvm::Triple::ppc64:
 if (Triple.isOSBinFormatELF()) {
   PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1;
Index: lib/Basic/Targets/PPC.h
===
--- lib/Basic/Targets/PPC.h
+++ lib/Basic/Targets/PPC.h
@@ -45,7 +45,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefine500v2 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -66,6 +67,7 @@
   bool HasBPERMD = false;
   bool HasExtDiv = false;
   bool HasP9Vector = false;
+  bool HasSPE = false;
 
 protected:
   std::string ABI;
@@ -145,6 +147,8 @@
 ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x |
 ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr |
 ArchDefinePpcsq)
+  .Cases("e500", "e500v2",
+ArchDefineName | ArchDefine500v2)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: lib/Basic/Targets/PPC.cpp
===
--- lib/Basic/Targets/PPC.cpp
+++ lib/Basic/Targets/PPC.cpp
@@ -54,6 +54,10 @@
   HasFloat128 = true;
 } else if (Feature == "+power9-vector") {
   HasP9Vector = true;
+} else if (Feature == "+spe") {
+  HasSPE = true;
+  LongDoubleWidth = LongDoubleAlign = 64;
+  LongDoubleFormat = ::APFloat::IEEEdouble();
 }
 // TODO: Finish this list and add an assert that we've handled them
 // all.
@@ -161,6 +165,10 @@
 Builder.defineMacro("__VEC__", "10206");
 Builder.defineMacro("__ALTIVEC__");
   }
+  if (HasSPE) {
+Builder.defineMacro("__SPE__");
+Builder.defineMacro("__NO_FPRS__");
+  }
   if (HasVSX)
 

[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

@vit9696 sure thing.

We'll need to get all these patches in together before any are actually useful.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi Kei, that's fantastic!  There's one more thing to add to this, which is to 
predefine __NO_FPRS__, and it should be a good replacement for gcc for 90+% of 
cases.  I'll add your changes and this, and resubmit this review.

Thanks for all your help!


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi @vit9696, thanks for that, it was a straightforward fix.  I'll post an 
update shortly for D54583 , if arcanist 
cooperates.  The short of it is I need two indices for arguments, since one is 
for logical arguments the other is for physical register allocation.  I was 
only using 1, based on physical register allocation.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi @vit9696 it does crash with the linux target (powerpc-gnu-linux), but is 
fine with powerpc-gnu-freebsd.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi @vit9696 ,

This looks to be caused by using 128-bit long double on the platform.  Does 
linux really use 128-bit long doubles on ppc32?  FreeBSD uses 64-bit long 
double, so compiling that with '-target powerpc-gnu-freebsd' works fine.  I'm 
not sure how to handle the 128-bit values.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi vit,

I found what's going on with the "Cannot Select" error.

divdc3.c contains code that gets lowered to a libcall.  However this lowering 
doesn't go further to lower down to the legal operations permitted in this 
target.

The debug snippet is:

Legalizing: t38: f64 = fmaxnum t36, t37, 
/home/chmeee/freebsd/contrib/compiler-rt/
lib/builtins/divdc3.c:24:22

  Op: t36: f64 = fabs t79, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins

/divdc3.c:24:22

  Op: t37: f64 = fabs t80, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins

/divdc3.c:24:22
Trying to expand node
Cannot expand node
Trying to convert node to libcall
Creating new node: t99: i64 = bitcast t36, 
/home/chmeee/freebsd/contrib/compiler-r
t/lib/builtins/divdc3.c:24:22
Creating new node: t100: i32 = extract_element t99, Constant:i32<1>, 
/home/chmeee/
freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t101: i32 = extract_element t99, Constant:i32<0>, 
/home/chmeee/
freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t102: i64 = bitcast t37, 
/home/chmeee/freebsd/contrib/compiler-
rt/lib/builtins/divdc3.c:24:22
Creating new node: t103: i32 = extract_element t102, Constant:i32<1>, 
/home/chmeee
/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t104: i32 = extract_element t102, Constant:i32<0>, 
/home/chmeee
/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t105: ch,glue = callseq_start t0, TargetConstant:i32<8>, 
Target
Constant:i32<0>, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24
:22
Creating new node: t107: ch,glue = CopyToReg t105, Register:i32 $r3, t100, 
/home/c
hmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t108: ch,glue = CopyToReg t107, Register:i32 $r4, t101, 
t107:1,
 /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t110: ch,glue = CopyToReg t108, Register:i32 $r5, t103, 
t108:1,
 /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t112: ch,glue = CopyToReg t110, Register:i32 $r6, t104, 
t110:1,
 /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t114: ch,glue = PPCISD::CALL t112, 
TargetExternalSymbol:i32'fma
x' [TF=1], Register:i32 $r3, Register:i32 $r4, Register:i32 $r5, Register:i32 
$r6,
 RegisterMask:Untyped, t112:1, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builti
ns/divdc3.c:24:22
Creating new node: t115: ch,glue = callseq_end t114, TargetConstant:i32<8>, 
Target
Constant:i32<0>, t114:1, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/div
dc3.c:24:22
Creating new node: t116: i32,ch,glue = CopyFromReg t115, Register:i32 $r3, 
t115:1,
 /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t117: i32,ch,glue = CopyFromReg t116:1, Register:i32 $r4, 
t116:
2, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t118: i64 = build_pair t117, t116, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Creating new node: t119: f64 = bitcast t118, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Created libcall: t119: f64 = bitcast t118, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Successfully converted node to libcall
 ... replacing: t38: f64 = fmaxnum t36, t37, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22

  with:  t119: f64 = bitcast t118, 
/home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22

The last 3 lines are the key.  It's converting the node to a bitcast libcall, 
which ends up yielding a 'f64 bitcast (i64 build_pair i32, i32)', instead of 
lowering further to 'f64 build_spe64 i32, i32'.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi Vit,

I'm unable to reproduce the previous crash with clang8, so for now assuming 
it's fixed by other events.  If that turns out not to be the case, I can 
revisit it.  I am able to reproduce this crash though, so am taking a look.  
I'm' not quite sure how to interpret it, since i64 is supposed to be a 
synthetic type on this platform, so the normal expansion should be taking care 
of it.  I'll see what I can find.

Thanks for your testing!


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi Vit,

The register spilling bug is being addressed in https://reviews.llvm.org/D54409 
now.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits added a comment.

Hi Vit,

Thanks for the feedback.  I can add the -mspe=yes/no, that shouldn't be hard.  
I didn't include it because it's been deprecated by GCC already as well.  I can 
add the -mcpu=8548 option as well.  I use -mcpu=8540 on FreeBSD for the 
powerpcspe target anyway (GCC based).

Regarding the stack overwriting, that's very peculiar, because I explicitly 
mark the immediate as needing to be an 8-bit multiple-of-8 value, so the 
codegen logic should take that into account.  I'm surprised it's not.  I've 
reproduced it as well myself, so I can take a closer look.


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[PATCH] D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang

[Justin Hibbits via Phabricator via cfe-commits]

jhibbits created this revision.
Herald added subscribers: cfe-commits, kbarton, nemanjai.

r337347 added support for the Signal Processing Engine (SPE) to LLVM.
This follows that up with the clang side.


Repository:
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https://reviews.llvm.org/D49754

Files:
  include/clang/Driver/Options.td
  lib/Basic/Targets/PPC.cpp
  lib/Basic/Targets/PPC.h
  test/Driver/ppc-features.cpp
  test/Misc/target-invalid-cpu-note.c
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -6980,6 +6980,10 @@
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+//
+// PPC32-SPE:#define __SPE__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
 // PPC-DARWIN:#define _ARCH_PPC 1
Index: test/Misc/target-invalid-cpu-note.c
===
--- test/Misc/target-invalid-cpu-note.c
+++ test/Misc/target-invalid-cpu-note.c
@@ -79,7 +79,7 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
+// PPC-SAME: 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4, pwr4,
 // PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
 // PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
 // PPC-SAME: powerpc64le, ppc64le
Index: test/Driver/ppc-features.cpp
===
--- test/Driver/ppc-features.cpp
+++ test/Driver/ppc-features.cpp
@@ -168,6 +168,9 @@
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s
 // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors"
 
+// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s
+// CHECK-SPE: "-target-feature" "+spe"
+
 // Assembler features
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s
 // CHECK_BE_AS_ARGS: "-mppc64"
Index: lib/Basic/Targets/PPC.h
===
--- lib/Basic/Targets/PPC.h
+++ lib/Basic/Targets/PPC.h
@@ -45,7 +45,8 @@
 ArchDefinePwr8 = 1 << 12,
 ArchDefinePwr9 = 1 << 13,
 ArchDefineA2 = 1 << 14,
-ArchDefineA2q = 1 << 15
+ArchDefineA2q = 1 << 15,
+ArchDefine500v2 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -66,6 +67,7 @@
   bool HasBPERMD = false;
   bool HasExtDiv = false;
   bool HasP9Vector = false;
+  bool HasSPE = false;
 
 protected:
   std::string ABI;
@@ -145,6 +147,8 @@
 ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x |
 ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr |
 ArchDefinePpcsq)
+  .Cases("e500", "e500v2",
+ArchDefineName | ArchDefine500v2)
   .Default(ArchDefineNone);
 }
 return CPUKnown;
Index: lib/Basic/Targets/PPC.cpp
===
--- lib/Basic/Targets/PPC.cpp
+++ lib/Basic/Targets/PPC.cpp
@@ -54,6 +54,8 @@
   HasFloat128 = true;
 } else if (Feature == "+power9-vector") {
   HasP9Vector = true;
+} else if (Feature == "+spe") {
+  HasSPE = true;
 }
 // TODO: Finish this list and add an assert that we've handled them
 // all.
@@ -161,6 +163,8 @@
 Builder.defineMacro("__VEC__", "10206");
 Builder.defineMacro("__ALTIVEC__");
   }
+  if (HasSPE)
+Builder.defineMacro("__SPE__");
   if (HasVSX)
 Builder.defineMacro("__VSX__");
   if (HasP8Vector)
@@ -334,6 +338,7 @@
   .Case("extdiv", HasExtDiv)
   .Case("float128", HasFloat128)
   .Case("power9-vector", HasP9Vector)
+  .Case("spe", HasSPE)
   .Default(false);
 }
 
@@ -413,16 +418,16 @@
 }
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
-{"generic"}, {"440"}, {"450"}, {"601"},{"602"},
-{"603"}, {"603e"},{"603ev"},   {"604"},{"604e"},
-{"620"}, {"630"}, {"g3"},  {"7400"},   {"g4"},
-{"7450"},{"g4+"}, {"750"}, {"970"},{"g5"},
-{"a2"},  {"a2q"}, {"e500mc"},  {"e5500"},  {"power3"},
-{"pwr3"},{"power4"},  {"pwr4"},{"power5"}, {"pwr5"},
-{"power5x"}, {"pwr5x"},   {"power6"},  {"pwr6"},   {"power6x"},