[clang] aede24e - [PowerPC] Treat 'Z' inline asm constraint as a true memory constraint

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-05-22T07:59:21-05:00
New Revision: aede24ecaa08db806fb173faf2de9cff95df8cee

URL: 
https://github.com/llvm/llvm-project/commit/aede24ecaa08db806fb173faf2de9cff95df8cee
DIFF: 
https://github.com/llvm/llvm-project/commit/aede24ecaa08db806fb173faf2de9cff95df8cee.diff

LOG: [PowerPC] Treat 'Z' inline asm constraint as a true memory constraint

We currently emit incorrect codegen for this constraint because we set it as a
constraint that allows registers. This will cause the value to be copied to the
stack and that address to be passed as the address. This is not what we want.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=42762

Differential revision: https://reviews.llvm.org/D77542

Added: 


Modified: 
clang/lib/Basic/Targets/PPC.h
clang/test/CodeGen/ppc64-inline-asm.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 6261a49c4fde..7c19a96a99c7 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -276,11 +276,12 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public 
TargetInfo {
   break;
 case 'Q': // Memory operand that is an offset from a register (it is
   // usually better to use `m' or `es' in asm statements)
+  Info.setAllowsRegister();
+  LLVM_FALLTHROUGH;
 case 'Z': // Memory operand that is an indexed or indirect from a
   // register (it is usually better to use `m' or `es' in
   // asm statements)
   Info.setAllowsMemory();
-  Info.setAllowsRegister();
   break;
 case 'R': // AIX TOC entry
 case 'a': // Address operand that is an indexed or indirect from a

diff  --git a/clang/test/CodeGen/ppc64-inline-asm.c 
b/clang/test/CodeGen/ppc64-inline-asm.c
index 3e958c328f92..0b32d0bf4820 100644
--- a/clang/test/CodeGen/ppc64-inline-asm.c
+++ b/clang/test/CodeGen/ppc64-inline-asm.c
@@ -37,3 +37,16 @@ double test_fmax(double x, double y) {
 // CHECK-LABEL: double @test_fmax(double %x, double %y)
 // CHECK: call double asm "xsmaxdp ${0:x}, ${1:x}, ${2:x}", 
"=^ws,^ws,^ws"(double %x, double %y)
 }
+
+void testZ(void *addr) {
+  asm volatile ("dcbz %y0\n" :: "Z"(*(unsigned char *)addr) : "memory");
+// CHECK-LABEL: void @testZ(i8* %addr)
+// CHECK: call void asm sideeffect "dcbz ${0:y}\0A", "*Z,~{memory}"(i8* %addr)
+}
+
+void testZwOff(void *addr, long long off) {
+  asm volatile ("dcbz %y0\n" :: "Z"(*(unsigned char *)(addr + off)) : 
"memory");
+// CHECK-LABEL: void @testZwOff(i8* %addr, i64 %off)
+// CHECK: %[[VAL:[^ ]+]] = getelementptr i8, i8* %addr, i64 %off
+// CHECK: call void asm sideeffect "dcbz ${0:y}\0A", "*Z,~{memory}"(i8* 
%[[VAL]])
+}



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] f9e94eb - [Clang] Enable _Complex __float128

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-05-28T06:55:49-05:00
New Revision: f9e94eb8688d1fe1727360462e957fbbfb754e59

URL: 
https://github.com/llvm/llvm-project/commit/f9e94eb8688d1fe1727360462e957fbbfb754e59
DIFF: 
https://github.com/llvm/llvm-project/commit/f9e94eb8688d1fe1727360462e957fbbfb754e59.diff

LOG: [Clang] Enable _Complex __float128

When I added __float128 a while ago, I neglected to add support for the complex
variant of the type. This patch just adds that.

Differential revision: https://reviews.llvm.org/D80533

Added: 


Modified: 
clang/lib/Sema/DeclSpec.cpp
clang/test/CodeGen/ppc64-complex-parms.c
clang/test/CodeGen/ppc64-complex-return.c

Removed: 




diff  --git a/clang/lib/Sema/DeclSpec.cpp b/clang/lib/Sema/DeclSpec.cpp
index 276e35a3497e..834e2533342d 100644
--- a/clang/lib/Sema/DeclSpec.cpp
+++ b/clang/lib/Sema/DeclSpec.cpp
@@ -1269,7 +1269,8 @@ void DeclSpec::Finish(Sema &S, const PrintingPolicy 
&Policy) {
   // Note that this intentionally doesn't include _Complex _Bool.
   if (!S.getLangOpts().CPlusPlus)
 S.Diag(TSTLoc, diag::ext_integer_complex);
-} else if (TypeSpecType != TST_float && TypeSpecType != TST_double) {
+} else if (TypeSpecType != TST_float && TypeSpecType != TST_double &&
+   TypeSpecType != TST_float128) {
   S.Diag(TSCLoc, diag::err_invalid_complex_spec)
 << getSpecifierName((TST)TypeSpecType, Policy);
   TypeSpecComplex = TSC_unspecified;

diff  --git a/clang/test/CodeGen/ppc64-complex-parms.c 
b/clang/test/CodeGen/ppc64-complex-parms.c
index c0e1794bf47c..1c8aa1d568cf 100644
--- a/clang/test/CodeGen/ppc64-complex-parms.c
+++ b/clang/test/CodeGen/ppc64-complex-parms.c
@@ -1,8 +1,19 @@
+// REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | 
FileCheck %s
+// RUN: %clang_cc1 -target-feature +float128 -DTEST_F128 -triple \
+// RUN:   powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s \
+// RUN:   --check-prefix CHECK-F128
 
 float crealf(_Complex float);
 double creal(_Complex double);
 long double creall(_Complex long double);
+#ifdef TEST_F128
+__float128 crealf128(_Complex __float128);
+__float128 foo_f128(_Complex __float128 x) {
+  return crealf128(x);
+}
+// CHECK-F128: define fp128 @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 
{{[%A-Za-z0-9.]+}})
+#endif
 
 float foo_float(_Complex float x) {
   return crealf(x);

diff  --git a/clang/test/CodeGen/ppc64-complex-return.c 
b/clang/test/CodeGen/ppc64-complex-return.c
index 02bfe82d4efe..a27286d85b8f 100644
--- a/clang/test/CodeGen/ppc64-complex-return.c
+++ b/clang/test/CodeGen/ppc64-complex-return.c
@@ -1,9 +1,20 @@
 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | 
FileCheck %s
+// RUN: %clang_cc1 -target-feature +float128 -DTEST_F128 -triple \
+// RUN:   powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s \
+// RUN:   --check-prefix CHECK-F128
 
 float crealf(_Complex float);
 double creal(_Complex double);
 long double creall(_Complex long double);
+#ifdef TEST_F128
+__float128 crealf128(_Complex __float128);
+_Complex __float128 foo_f128(_Complex __float128 x) {
+  return x;
+}
+
+// CHECK-F128: define { fp128, fp128 } @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, 
fp128 {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
+#endif
 
 _Complex float foo_float(_Complex float x) {
   return x;
@@ -80,6 +91,17 @@ long double bar_long_double(void) {
 // CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 0
 // CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 1
 
+#ifdef TEST_F128
+__float128 bar_f128(void) {
+  return crealf128(foo_f128(2.0Q - 2.5Qi));
+}
+
+// CHECK-F128: define fp128 @bar_f128() [[NUW]] {
+// CHECK-F128: [[VAR3:[%A-Za-z0-9.]+]] = call { fp128, fp128 } @foo_f128
+// CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 0
+// CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 1
+#endif
+
 int bar_int(void) {
   return __real__(foo_int(2 - 3i));
 }



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 9021ce9 - [Clang] Enable KF and KC mode for [_Complex] __float128

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-05-28T15:48:15-05:00
New Revision: 9021ce9576e438ae5a6fdb574327d30ea6b67fa8

URL: 
https://github.com/llvm/llvm-project/commit/9021ce9576e438ae5a6fdb574327d30ea6b67fa8
DIFF: 
https://github.com/llvm/llvm-project/commit/9021ce9576e438ae5a6fdb574327d30ea6b67fa8.diff

LOG: [Clang] Enable KF and KC mode for [_Complex] __float128

The headers provided with recent GNU toolchains for PPC have code that includes
typedefs such as:

typedef _Complex float __cfloat128 __attribute__ ((__mode__ (__KC__)))

This patch allows clang to compile programs that contain
#include 

with -mfloat128 which it currently fails to compile.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=46068

Differential revision: https://reviews.llvm.org/D80374

Added: 


Modified: 
clang/include/clang/AST/ASTContext.h
clang/include/clang/Basic/TargetInfo.h
clang/lib/AST/ASTContext.cpp
clang/lib/Basic/TargetInfo.cpp
clang/lib/Sema/SemaDeclAttr.cpp
clang/test/Sema/attr-mode.c

Removed: 




diff  --git a/clang/include/clang/AST/ASTContext.h 
b/clang/include/clang/AST/ASTContext.h
index 509ada3c9696..a5bb9a34c2fb 100644
--- a/clang/include/clang/AST/ASTContext.h
+++ b/clang/include/clang/AST/ASTContext.h
@@ -657,7 +657,7 @@ class ASTContext : public RefCountedBase {
   /// getRealTypeForBitwidth -
   /// sets floating point QualTy according to specified bitwidth.
   /// Returns empty type if there is no appropriate target types.
-  QualType getRealTypeForBitwidth(unsigned DestWidth) const;
+  QualType getRealTypeForBitwidth(unsigned DestWidth, bool ExplicitIEEE) const;
 
   bool AtomicUsesUnsupportedLibcall(const AtomicExpr *E) const;
 

diff  --git a/clang/include/clang/Basic/TargetInfo.h 
b/clang/include/clang/Basic/TargetInfo.h
index 910a4d6846aa..0a5379225caf 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -368,8 +368,13 @@ class TargetInfo : public virtual TransferrableTargetInfo,
   virtual IntType getLeastIntTypeByWidth(unsigned BitWidth,
  bool IsSigned) const;
 
-  /// Return floating point type with specified width.
-  RealType getRealTypeByWidth(unsigned BitWidth) const;
+  /// Return floating point type with specified width. On PPC, there are
+  /// three possible types for 128-bit floating point: "PPC double-double",
+  /// IEEE 754R quad precision, and "long double" (which under the covers
+  /// is represented as one of those two). At this time, there is no support
+  /// for an explicit "PPC double-double" type (i.e. __ibm128) so we only
+  /// need to 
diff erentiate between "long double" and IEEE quad precision.
+  RealType getRealTypeByWidth(unsigned BitWidth, bool ExplicitIEEE) const;
 
   /// Return the alignment (in bits) of the specified integer type enum.
   ///

diff  --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c457a5537168..bfb6014027f4 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -10644,8 +10644,10 @@ QualType ASTContext::getIntTypeForBitwidth(unsigned 
DestWidth,
 /// getRealTypeForBitwidth -
 /// sets floating point QualTy according to specified bitwidth.
 /// Returns empty type if there is no appropriate target types.
-QualType ASTContext::getRealTypeForBitwidth(unsigned DestWidth) const {
-  TargetInfo::RealType Ty = getTargetInfo().getRealTypeByWidth(DestWidth);
+QualType ASTContext::getRealTypeForBitwidth(unsigned DestWidth,
+bool ExplicitIEEE) const {
+  TargetInfo::RealType Ty =
+  getTargetInfo().getRealTypeByWidth(DestWidth, ExplicitIEEE);
   switch (Ty) {
   case TargetInfo::Float:
 return FloatTy;

diff  --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 2f1e044bb106..a3c8da5885b8 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -265,7 +265,8 @@ TargetInfo::IntType 
TargetInfo::getLeastIntTypeByWidth(unsigned BitWidth,
   return NoInt;
 }
 
-TargetInfo::RealType TargetInfo::getRealTypeByWidth(unsigned BitWidth) const {
+TargetInfo::RealType TargetInfo::getRealTypeByWidth(unsigned BitWidth,
+bool ExplicitIEEE) const {
   if (getFloatWidth() == BitWidth)
 return Float;
   if (getDoubleWidth() == BitWidth)
@@ -277,6 +278,10 @@ TargetInfo::RealType 
TargetInfo::getRealTypeByWidth(unsigned BitWidth) const {
   return LongDouble;
 break;
   case 128:
+// The caller explicitly asked for an IEEE compliant type but we still
+// have to check if the target supports it.
+if (ExplicitIEEE)
+  return hasFloat128Type() ? Float128 : NoFloat;
 if (&getLongDoubleFormat() == &llvm::APFloat::PPCDoubleDouble() ||
 &getLongDoubleFormat() == &llvm::APFloat::IEEEquad())
   return LongDouble;

diff  --git a/clang/lib/Sema/SemaDecl

RE: [clang] f978ea4 - [clang][clang-scan-deps] Aggregate the full dependency information.

[Nemanja Ivanovic via cfe-commits]

Hi Michael,
We are happy to help troubleshoot the issue this caused on our bot. Unfortunately, this bot is not one where we can give you access so we'll have to try and work together to debug this.
Can you provide the link to the failing build so we can see which test case it was that caused the problem and we can start debugging from there?
 
Nemanja IvanovicLLVM PPC Backend DevelopmentIBM Toronto LabEmail: neman...@ca.ibm.comPhone: 905-413-3388
 
 
- Original message -From: Michael Spencer To: powerl...@ca.ibm.comCc: cfe-commits@lists.llvm.orgSubject: [EXTERNAL] Re: [clang] f978ea4 - [clang][clang-scan-deps] Aggregate the full dependency information.Date: Wed, Dec 11, 2019 7:34 PM 
On Wed, Dec 11, 2019 at 2:41 PM Michael Spencer via cfe-commits  wrote:
Author: Michael SpencerDate: 2019-12-11T14:40:51-08:00New Revision: f978ea498309adaebab8fbf1cd6e520e7e0e11f1URL: https://github.com/llvm/llvm-project/commit/f978ea498309adaebab8fbf1cd6e520e7e0e11f1DIFF: https://github.com/llvm/llvm-project/commit/f978ea498309adaebab8fbf1cd6e520e7e0e11f1.diffLOG: [clang][clang-scan-deps] Aggregate the full dependency information.Differential Revision: https://reviews.llvm.org/D70268Added:Modified:    clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h    clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h    clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp    clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp    clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp    clang/test/ClangScanDeps/Inputs/modules_cdb.json    clang/test/ClangScanDeps/modules-full.cpp    clang/tools/clang-scan-deps/ClangScanDeps.cpp
 
 
Looks like this broke clang-ppc64be-linux. Is there a good way to debug this? It's not failing anywhere else, and none of the code should care about endianness.
 
I'll revert for now.
 
- Michael Spencer
 
 

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

RE: [clang] f978ea4 - [clang][clang-scan-deps] Aggregate the full dependency information.

[Nemanja Ivanovic via cfe-commits]

Hi Michael,
this turns out to be an assert failure:
 
clang/tools/clang-scan-deps/ClangScanDeps.cpp:340: const clang::tooling::dependencies::ModuleDeps& FullDeps::lookupModuleDeps(clang::tooling::dependencies::ClangModuleDep): Assertion `I != Modules.end()' failed.
 
Does this help with debugging at all?
 
Nemanja IvanovicLLVM PPC Backend DevelopmentIBM Toronto LabEmail: neman...@ca.ibm.comPhone: 905-413-3388
 
 
- Original message -From: Michael Spencer To: Nemanja Ivanovic Cc: cfe-commits@lists.llvm.org, LLVM on Power Subject: [EXTERNAL] Re: [clang] f978ea4 - [clang][clang-scan-deps] Aggregate the full dependency information.Date: Fri, Dec 13, 2019 4:44 PM 
On Thu, Dec 12, 2019 at 4:23 AM Nemanja Ivanovic  wrote:
Hi Michael,
We are happy to help troubleshoot the issue this caused on our bot. Unfortunately, this bot is not one where we can give you access so we'll have to try and work together to debug this.
Can you provide the link to the failing build so we can see which test case it was that caused the problem and we can start debugging from there?
 
Here's one of the failures: http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/21884
 
It looks like it failed on every ppc64 linux bot (both be and le), but no other bots.
 
- Michael Spencer
 
 
Nemanja IvanovicLLVM PPC Backend DevelopmentIBM Toronto LabEmail: neman...@ca.ibm.comPhone: 905-413-3388
 
 
- Original message -From: Michael Spencer To: powerl...@ca.ibm.comCc: cfe-commits@lists.llvm.orgSubject: [EXTERNAL] Re: [clang] f978ea4 - [clang][clang-scan-deps] Aggregate the full dependency information.Date: Wed, Dec 11, 2019 7:34 PM 
On Wed, Dec 11, 2019 at 2:41 PM Michael Spencer via cfe-commits  wrote:
Author: Michael SpencerDate: 2019-12-11T14:40:51-08:00New Revision: f978ea498309adaebab8fbf1cd6e520e7e0e11f1URL: https://github.com/llvm/llvm-project/commit/f978ea498309adaebab8fbf1cd6e520e7e0e11f1DIFF: https://github.com/llvm/llvm-project/commit/f978ea498309adaebab8fbf1cd6e520e7e0e11f1.diffLOG: [clang][clang-scan-deps] Aggregate the full dependency information.Differential Revision: https://reviews.llvm.org/D70268Added:Modified:    clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h    clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h    clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp    clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp    clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp    clang/test/ClangScanDeps/Inputs/modules_cdb.json    clang/test/ClangScanDeps/modules-full.cpp    clang/tools/clang-scan-deps/ClangScanDeps.cpp
 
 
Looks like this broke clang-ppc64be-linux. Is there a good way to debug this? It's not failing anywhere else, and none of the code should care about endianness.
 
I'll revert for now.
 
- Michael Spencer
 
 
 

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [llvm-dev] Zorg migration to GitHub/monorepo

[Nemanja Ivanovic via cfe-commits]

I think what she is referring to was that the build seemed to be triggered
by a commit to a project that shouldn't trigger builds on a libcxx bot
(i.e. the change was in llvm).

I have a somewhat orthogonal but related question. In the past, commits to
compiler-rt did not trigger builds on llvm/clang/sanitizer bots. Has this
behaviour been rectified with the move to github? I am really sorry if you
already answered this question and I just missed it.

On Mon, Oct 28, 2019 at 2:37 PM Galina Kistanova via llvm-dev <
llvm-...@lists.llvm.org> wrote:

> Hi Diana,
>
> It is not clear from your description of what is the problem. Could
> you elaborate, please?
>
> I have looked at the build history closer and see that this build
> configuration depends on libcxx, libcxxabi, libunwind, llvm projects,
> and changes to any of these would trigger a build. Depending on a bot
> performance, patches could be grouped to a longer blame list. To me,
> this is exactly how it supposedly should be. Are you missing any
> particular changes in libcxx, libcxxabi,or libunwind project which
> should trigger a build but they didn't? If so, could you point me to
> such change, please?
>
> Thanks
>
> Galina
>
>
>
> On Mon, Oct 28, 2019 at 5:16 AM Diana Picus 
> wrote:
> >
> > Hi Galina,
> >
> > It seems that our libcxx bots are now triggering builds for any changes
> to llvm:
> >
> http://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-aarch64-linux/builds/2434
> >
> > Should I file a bug report for this?
> >
> > Thanks,
> > Diana
> >
> > On Sat, 19 Oct 2019 at 11:36, Galina Kistanova via cfe-commits
> >  wrote:
> > >
> > > Hello everyone,
> > >
> > > The staging master is ready to accept bots from the list I have sent
> yesterday. Don't wait too long.
> > >
> > > The master has been updated and works with both SVN and Github
> monorepo now.
> > >
> > > The following builders are already listening for changes in monorepo
> and building monorepo. More are coming.
> > >
> > > * clang-sphinx-docs
> > > * clang-tools-sphinx-docs
> > > * clang-x86_64-linux-abi-test
> > > * clang-lld-x86_64-2stage
> > > * libcxx-libcxxabi-singlethreaded-x86_64-linux-debian
> > > * libcxx-sphinx-docs
> > > * libunwind-sphinx-docs
> > > * lld-sphinx-docs
> > > * lld-x86_64-darwin13
> > > * lld-x86_64-ubuntu-fast
> > > * lldb-sphinx-docs
> > > * llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast
> > > * llvm-clang-x86_64-win-fast <<-- ?
> > > * llvm-sphinx-docs
> > > * clang-x86_64-debian-fast
> > > * libcxx-libcxxabi-libunwind-x86_64-linux-debian
> > > * libcxx-libcxxabi-singlethreaded-x86_64-linux-debian
> > > * libcxx-libcxxabi-x86_64-linux-debian
> > > * libcxx-libcxxabi-x86_64-linux-debian-noexceptions
> > >
> > > A friendly reminder. If your bots are using one of these build
> factories, you would need either update your build configurations to use
> one of the currently supported build factories, or port that factory to
> work with github and monorepo.
> > >
> > > * LLVMBuilder (3 bots)
> > > * PollyBuilder (3 bots)
> > > * LLDBBuilder (6 bots)
> > > * SanitizerBuilder (10 bots)
> > > * CUDATestsuiteBuilder (1 bot) - depends on
> ClangBuilder.getClangBuildFactory
> > > * AOSPBuilder (1 bot) - depends on PollyBuilder
> > > * AnnotatedBuilder (2 bots)
> > > * OpenMPBuilder (2 bots)
> > > * FuchsiaBuilder (1 bot)
> > >
> > > Thanks
> > >
> > > Galina
> > >
> > >
> > > On Fri, Oct 18, 2019 at 12:05 AM Galina Kistanova <
> gkistan...@gmail.com> wrote:
> > >>
> > >> Hello build bot owners!
> > >>
> > >> The staging master is ready. Please feel free to use it to make sure
> your bots would work well with the monorepo and github.
> > >>
> > >> The following builders could be configured to build monorepo:
> > >>
> > >> * clang-atom-d525-fedora-rel
> > >> * clang-native-arm-lnt-perf
> > >> * clang-cmake-armv7-lnt
> > >> * clang-cmake-armv7-selfhost-neon
> > >> * clang-cmake-armv7-quick
> > >> * clang-cmake-armv7-global-isel
> > >> * clang-cmake-armv7-selfhost
> > >> * clang-cmake-aarch64-quick
> > >> * clang-cmake-aarch64-lld
> > >> * clang-cmake-aarch64-global-isel
> > >> * clang-ppc64be-linux-lnt
> > >> * clang-ppc64be-linux-multistage
> > >> * clang-ppc64le-linux-lnt
> > >> * clang-ppc64le-linux-multistage
> > >> * clang-ppc64be-linux
> > >> * clang-ppc64le-linux
> > >> * clang-s390x-linux
> > >> * clang-s390x-linux-multistage
> > >> * clang-s390x-linux-lnt
> > >> * clang-hexagon-elf
> > >> * clang-cmake-x86_64-avx2-linux
> > >> * clang-cmake-x86_64-avx2-linux-perf
> > >> * clang-cmake-x86_64-sde-avx512-linux
> > >> * clang-solaris11-amd64
> > >> * clang-x64-ninja-win7
> > >> * clang-solaris11-sparcv9
> > >> * clang-cmake-armv7-full
> > >> * clang-cmake-thumbv7-full-sh
> > >> * clang-cmake-armv8-lld
> > >> * clang-cmake-aarch64-full
> > >> * clang-armv7-linux-build-cache
> > >> * clang-aarch64-linux-build-cache
> > >> * libcxx-libcxxabi-x86_64-linux-debian
> > >> * libcxx-libcxxabi-x86_64-linux-debian-noexceptions
> > >> * libcxx-libcxxabi-libunwind-x86_64-linu

[clang] 070e402 - [PowerPC][Altivec] Emit correct builtin for single precision vec_all_ne

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2019-11-07T20:40:32-06:00
New Revision: 070e4027b02453f0962e5b61335a517581c5528f

URL: 
https://github.com/llvm/llvm-project/commit/070e4027b02453f0962e5b61335a517581c5528f
DIFF: 
https://github.com/llvm/llvm-project/commit/070e4027b02453f0962e5b61335a517581c5528f.diff

LOG: [PowerPC][Altivec] Emit correct builtin for single precision vec_all_ne

We currently emit a double precision comparison instruction for this, whereas we
need to emit the single precision version.

Differential revision: https://reviews.llvm.org/D64024

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-p8vector.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 8352f8f740c2..77a0e494df36 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -14784,7 +14784,7 @@ static __inline__ int __ATTRS_o_ai vec_all_ne(vector 
bool long long __a,
 static __inline__ int __ATTRS_o_ai vec_all_ne(vector float __a,
   vector float __b) {
 #ifdef __VSX__
-  return __builtin_vsx_xvcmpeqdp_p(__CR6_EQ, (vector double)__a, (vector 
double)__b);
+  return __builtin_vsx_xvcmpeqsp_p(__CR6_EQ, __a, __b);
 #else
   return __builtin_altivec_vcmpeqfp_p(__CR6_EQ, __a, __b);
 #endif

diff  --git a/clang/test/CodeGen/builtins-ppc-p8vector.c 
b/clang/test/CodeGen/builtins-ppc-p8vector.c
index a686b0a0796b..d494e463105e 100644
--- a/clang/test/CodeGen/builtins-ppc-p8vector.c
+++ b/clang/test/CodeGen/builtins-ppc-p8vector.c
@@ -469,6 +469,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpeqdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpeqdp.p
 
+  res_i = vec_all_eq(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
   /* vec_all_ne */
   res_i = vec_all_ne(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpequd.p
@@ -515,6 +519,13 @@ void test1() {
   dummy();
 // CHECK: @dummy
 
+  res_i = vec_all_ne(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
+  dummy();
+// CHECK: @dummy
+
   res_i = vec_all_nge(vda, vda);
 // CHECK: @llvm.ppc.vsx.xvcmpgedp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
@@ -563,6 +574,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpeqdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpeqdp.p
 
+  res_i = vec_any_eq(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
   /* vec_any_ne */
   res_i = vec_any_ne(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpequd.p
@@ -603,6 +618,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpeqdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpeqdp.p
 
+  res_i = vec_any_ne(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
   /* vec_all_ge */
   res_i = vec_all_ge(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -643,6 +662,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgedp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
 
+  res_i = vec_all_ge(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgesp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgesp.p
+
   /* vec_all_gt */
   res_i = vec_all_gt(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -683,6 +706,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgtdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgtdp.p
 
+  res_i = vec_all_gt(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgtsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgtsp.p
+
   /* vec_all_le */
   res_i = vec_all_le(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -723,6 +750,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgedp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
 
+  res_i = vec_all_le(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgesp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgesp.p
+
   /* vec_all_lt */
   res_i = vec_all_lt(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -763,10 +794,18 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgtdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgtdp.p
 
+  res_i = vec_all_lt(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgtsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgtsp.p
+
   res_i = vec_all_nan(vda);
 // CHECK: @llvm.ppc.vsx.xvcmpeqdp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpeqdp.p
 
+  res_i = vec_all_nan(vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
   /* vec_any_ge */
   res_i = vec_any_ge(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -807,6 +846,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgedp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
 
+  res_i = vec_any_ge(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgesp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgesp.p
+
   /* vec_any_gt */
   res_i = vec_any_gt(vsll, vsll);
 // CHECK: @llvm.ppc.altivec.vcmpgtsd.p
@@ -887,6 +930,10 @@ void test1() {
 // CHECK: @llvm.ppc.vsx.xvcmpgedp.p
 // CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
 
+  res_i = vec_any_le(vfa, vfa);
+// CHECK: @llvm.ppc.vsx.xvcmpgesp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgesp.p
+
   

[clang] e0407f5 - [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2019-11-07T20:58:11-06:00
New Revision: e0407f54965318247c8fece2dfa5c9023acf0973

URL: 
https://github.com/llvm/llvm-project/commit/e0407f54965318247c8fece2dfa5c9023acf0973
DIFF: 
https://github.com/llvm/llvm-project/commit/e0407f54965318247c8fece2dfa5c9023acf0973.diff

LOG: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

As we currently have it implemented in altivec.h, the offsets for these two
intrinsics are element offsets. The documentation in the ABI (as well as the
implementation in both XL and GCC) states that these should be byte offsets.

Differential revision: https://reviews.llvm.org/D63636

Added: 
clang/test/CodeGen/builtins-ppc-xl-xst.c

Modified: 
clang/lib/Headers/altivec.h

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 77a0e494df36..7e231a2a428e 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -16364,27 +16364,32 @@ vec_xl(signed long long __offset, unsigned char 
*__ptr) {
 
 static inline __ATTRS_o_ai vector signed short vec_xl(signed long long 
__offset,
   signed short *__ptr) {
-  return *(unaligned_vec_sshort *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_sshort *)__addr;
 }
 
 static inline __ATTRS_o_ai vector unsigned short
 vec_xl(signed long long __offset, unsigned short *__ptr) {
-  return *(unaligned_vec_ushort *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_ushort *)__addr;
 }
 
 static inline __ATTRS_o_ai vector signed int vec_xl(signed long long __offset,
 signed int *__ptr) {
-  return *(unaligned_vec_sint *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_sint *)__addr;
 }
 
 static inline __ATTRS_o_ai vector unsigned int vec_xl(signed long long 
__offset,
   unsigned int *__ptr) {
-  return *(unaligned_vec_uint *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_uint *)__addr;
 }
 
 static inline __ATTRS_o_ai vector float vec_xl(signed long long __offset,
float *__ptr) {
-  return *(unaligned_vec_float *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_float *)__addr;
 }
 
 #ifdef __VSX__
@@ -16394,17 +16399,20 @@ typedef vector double unaligned_vec_double 
__attribute__((aligned(1)));
 
 static inline __ATTRS_o_ai vector signed long long
 vec_xl(signed long long __offset, signed long long *__ptr) {
-  return *(unaligned_vec_sll *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_sll *)__addr;
 }
 
 static inline __ATTRS_o_ai vector unsigned long long
 vec_xl(signed long long __offset, unsigned long long *__ptr) {
-  return *(unaligned_vec_ull *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_ull *)__addr;
 }
 
 static inline __ATTRS_o_ai vector double vec_xl(signed long long __offset,
 double *__ptr) {
-  return *(unaligned_vec_double *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_double *)__addr;
 }
 #endif
 
@@ -16414,12 +16422,14 @@ typedef vector unsigned __int128 unaligned_vec_ui128
 __attribute__((aligned(1)));
 static inline __ATTRS_o_ai vector signed __int128
 vec_xl(signed long long __offset, signed __int128 *__ptr) {
-  return *(unaligned_vec_si128 *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_si128 *)__addr;
 }
 
 static inline __ATTRS_o_ai vector unsigned __int128
 vec_xl(signed long long __offset, unsigned __int128 *__ptr) {
-  return *(unaligned_vec_ui128 *)(__ptr + __offset);
+  signed char *__addr = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_ui128 *)__addr;
 }
 #endif
 
@@ -16516,50 +16526,58 @@ static inline __ATTRS_o_ai void vec_xst(vector 
unsigned char __vec,
 static inline __ATTRS_o_ai void vec_xst(vector signed short __vec,
 signed long long __offset,
 signed short *__ptr) {
-  *(unaligned_vec_sshort *)(__ptr + __offset) = __vec;
+  signed char *__addr = (signed char *)__ptr + __offset;
+  *(unaligned_vec_sshort *)__addr = __vec;
 }
 
 static inline __ATTRS_o_ai void vec_xst(vector unsigned short __vec,
 signed long long __offset,
 unsigned short *__ptr) {
-  *(unaligned_vec_ushort *)(__ptr + __offset) = __vec;
+  signed c

r337449 - [PowerPC] Handle __builtin_xxpermdi the same way as GCC does

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Thu Jul 19 05:44:15 2018
New Revision: 337449

URL: http://llvm.org/viewvc/llvm-project?rev=337449&view=rev
Log:
[PowerPC] Handle __builtin_xxpermdi the same way as GCC does

The codegen for this builtin was initially implemented to match GCC.
However, due to interest from users GCC changed behaviour to account for the
big endian bias of the instruction and correct it. This patch brings the
handling inline with GCC.

Fixes https://bugs.llvm.org/show_bug.cgi?id=38192

Differential Revision: https://reviews.llvm.org/D49424

Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=337449&r1=337448&r2=337449&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Jul 19 05:44:15 2018
@@ -10831,19 +10831,11 @@ Value *CodeGenFunction::EmitPPCBuiltinEx
 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2));
 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2));
 
-// Element zero comes from the first input vector and element one comes 
from
-// the second. The element indices within each vector are numbered in big
-// endian order so the shuffle mask must be adjusted for this on little
-// endian platforms (i.e. index is complemented and source vector 
reversed).
-unsigned ElemIdx0;
-unsigned ElemIdx1;
-if (getTarget().isLittleEndian()) {
-  ElemIdx0 = (~Index & 1) + 2;
-  ElemIdx1 = (~Index & 2) >> 1;
-} else { // BigEndian
-  ElemIdx0 = (Index & 2) >> 1;
-  ElemIdx1 = 2 + (Index & 1);
-}
+// Account for endianness by treating this as just a shuffle. So we use the
+// same indices for both LE and BE in order to produce expected results in
+// both cases.
+unsigned ElemIdx0 = (Index & 2) >> 1;;
+unsigned ElemIdx1 = 2 + (Index & 1);;
 
 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0),
 ConstantInt::get(Int32Ty, ElemIdx1)};

Modified: cfe/trunk/test/CodeGen/builtins-ppc-vsx.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-vsx.c?rev=337449&r1=337448&r2=337449&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-vsx.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-vsx.c Thu Jul 19 05:44:15 2018
@@ -1694,43 +1694,43 @@ vec_xst_be(vd, sll, ad);
 
 res_vd = vec_xxpermdi(vd, vd, 0);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vf = vec_xxpermdi(vf, vf, 1);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vsll = vec_xxpermdi(vsll, vsll, 2);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vull = vec_xxpermdi(vull, vull, 3);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vsi = vec_xxpermdi(vsi, vsi, 0);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vui = vec_xxpermdi(vui, vui, 1);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vss = vec_xxpermdi(vss, vss, 2);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
 
 res_vus = vec_xxpermdi(vus, vus, 3);
 // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
-// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x 
i32> 
+// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 

r337451 - NFC: Remove extraneous semicolons as pointed out in the differential review

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Thu Jul 19 05:49:27 2018
New Revision: 337451

URL: http://llvm.org/viewvc/llvm-project?rev=337451&view=rev
Log:
NFC: Remove extraneous semicolons as pointed out in the differential review

The commit for
https://reviews.llvm.org/D49424
missed the comment about the extraneous semicolons. Remove them.

Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=337451&r1=337450&r2=337451&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Jul 19 05:49:27 2018
@@ -10834,8 +10834,8 @@ Value *CodeGenFunction::EmitPPCBuiltinEx
 // Account for endianness by treating this as just a shuffle. So we use the
 // same indices for both LE and BE in order to produce expected results in
 // both cases.
-unsigned ElemIdx0 = (Index & 2) >> 1;;
-unsigned ElemIdx1 = 2 + (Index & 1);;
+unsigned ElemIdx0 = (Index & 2) >> 1;
+unsigned ElemIdx1 = 2 + (Index & 1);
 
 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0),
 ConstantInt::get(Int32Ty, ElemIdx1)};


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r296861 - [PowerPC] Enable -fomit-frame-pointer by default for PPC

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Mar  3 03:49:17 2017
New Revision: 296861

URL: http://llvm.org/viewvc/llvm-project?rev=296861&view=rev
Log:
[PowerPC] Enable -fomit-frame-pointer by default for PPC

As is the case on platforms like Mips, X86 and SystemZ, the -fomit-frame-pointer
should be enabled by default on PPC when optimizing at -O1 and above. This
brings the behaviour of LLVM on PPC in line with GCC.

Committing on behalf of Hiroshi Inoue.

Differential Revision: https://reviews.llvm.org/D29750

Modified:
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/test/Driver/frame-pointer.c

Modified: cfe/trunk/lib/Driver/Tools.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Tools.cpp?rev=296861&r1=296860&r2=296861&view=diff
==
--- cfe/trunk/lib/Driver/Tools.cpp (original)
+++ cfe/trunk/lib/Driver/Tools.cpp Fri Mar  3 03:49:17 2017
@@ -2235,6 +2235,9 @@ static bool useFramePointerForTargetByDe
 case llvm::Triple::mips64el:
 case llvm::Triple::mips:
 case llvm::Triple::mipsel:
+case llvm::Triple::ppc:
+case llvm::Triple::ppc64:
+case llvm::Triple::ppc64le:
 case llvm::Triple::systemz:
 case llvm::Triple::x86:
 case llvm::Triple::x86_64:

Modified: cfe/trunk/test/Driver/frame-pointer.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/frame-pointer.c?rev=296861&r1=296860&r2=296861&view=diff
==
--- cfe/trunk/test/Driver/frame-pointer.c (original)
+++ cfe/trunk/test/Driver/frame-pointer.c Fri Mar  3 03:49:17 2017
@@ -17,6 +17,13 @@
 // RUN: %clang -target s390x-pc-linux -### -S -O0 %s -o %t.s 2>&1 | FileCheck 
-check-prefix=CHECK0-64 %s
 // RUN: %clang -target s390x-pc-linux -### -S -O1 %s -o %t.s 2>&1 | FileCheck 
-check-prefix=CHECK1-64 %s
 
+// RUN: %clang -target powerpc-unknown-linux-gnu -### -S -O0 %s -o %t.s 2>&1 | 
FileCheck -check-prefix=CHECK0-64 %s
+// RUN: %clang -target powerpc-unknown-linux-gnu -### -S -O1 %s -o %t.s 2>&1 | 
FileCheck -check-prefix=CHECK1-64 %s
+// RUN: %clang -target powerpc64-unknown-linux-gnu -### -S -O0 %s -o %t.s 2>&1 
| FileCheck -check-prefix=CHECK0-64 %s
+// RUN: %clang -target powerpc64-unknown-linux-gnu -### -S -O1 %s -o %t.s 2>&1 
| FileCheck -check-prefix=CHECK1-64 %s
+// RUN: %clang -target powerpc64le-unknown-linux-gnu -### -S -O0 %s -o %t.s 
2>&1 | FileCheck -check-prefix=CHECK0-64 %s
+// RUN: %clang -target powerpc64le-unknown-linux-gnu -### -S -O1 %s -o %t.s 
2>&1 | FileCheck -check-prefix=CHECK1-64 %s
+
 // RUN: %clang -target mips-linux-gnu -### -S -O0 %s -o %t.s 2>&1 | FileCheck 
-check-prefix=CHECK0-32 %s
 // RUN: %clang -target mips-linux-gnu -### -S -O1 %s -o %t.s 2>&1 | FileCheck 
-check-prefix=CHECK1-32 %s
 // RUN: %clang -target mipsel-linux-gnu -### -S -O0 %s -o %t.s 2>&1 | 
FileCheck -check-prefix=CHECK0-32 %s


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r362571 - Initial support for vectorization using MASSV (IBM MASS vector library)

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Jun  4 18:57:57 2019
New Revision: 362571

URL: http://llvm.org/viewvc/llvm-project?rev=362571&view=rev
Log:
Initial support for vectorization using MASSV (IBM MASS vector library)

Part 2 (the Clang portion) of D59881.

This patch (first of two patches) enables the vectorizer to recognize the
IBM MASS vector library routines. This patch specifically adds support for
recognizing the -vector-library=MASSV option, and defines mappings from IEEE
standard scalar math functions to generic PowerPC MASS vector counterparts.
For instance, the generic PowerPC MASS vector entry for double-precision
cbrt function is __cbrtd2_massv.

The second patch will further lower the generic PowerPC vector entries to
PowerPC subtarget-specific entries.
For instance, the PowerPC generic entry cbrtd2_massv is lowered to
cbrtd2_P9 for Power9 subtarget.

The overall support for MASS vector library is presented as such in two patches
for ease of review.

Patch by Jeeva Paudel.

Differential revision: https://reviews.llvm.org/D59881

Modified:
cfe/trunk/include/clang/Basic/CodeGenOptions.h
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/CodeGen/BackendUtil.cpp
cfe/trunk/lib/Frontend/CompilerInvocation.cpp
cfe/trunk/test/Driver/autocomplete.c
cfe/trunk/test/Driver/fveclib.c

Modified: cfe/trunk/include/clang/Basic/CodeGenOptions.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/CodeGenOptions.h?rev=362571&r1=362570&r2=362571&view=diff
==
--- cfe/trunk/include/clang/Basic/CodeGenOptions.h (original)
+++ cfe/trunk/include/clang/Basic/CodeGenOptions.h Tue Jun  4 18:57:57 2019
@@ -53,6 +53,7 @@ public:
   enum VectorLibrary {
 NoLibrary,  // Don't use any vector library.
 Accelerate, // Use the Accelerate framework.
+MASSV,  // IBM MASS vector library.
 SVML// Intel short vector math library.
   };
 

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=362571&r1=362570&r2=362571&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Jun  4 18:57:57 2019
@@ -1418,7 +1418,7 @@ def fno_experimental_new_pass_manager :
   Group, Flags<[CC1Option]>,
   HelpText<"Disables an experimental new pass manager in LLVM.">;
 def fveclib : Joined<["-"], "fveclib=">, Group, Flags<[CC1Option]>,
-HelpText<"Use the given vector functions library">, 
Values<"Accelerate,SVML,none">;
+HelpText<"Use the given vector functions library">, 
Values<"Accelerate,MASSV,SVML,none">;
 def fno_lax_vector_conversions : Flag<["-"], "fno-lax-vector-conversions">, 
Group,
   HelpText<"Disallow implicit conversions between vectors with a different 
number of elements or different element types">, Flags<[CC1Option]>;
 def fno_merge_all_constants : Flag<["-"], "fno-merge-all-constants">, 
Group,

Modified: cfe/trunk/lib/CodeGen/BackendUtil.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/BackendUtil.cpp?rev=362571&r1=362570&r2=362571&view=diff
==
--- cfe/trunk/lib/CodeGen/BackendUtil.cpp (original)
+++ cfe/trunk/lib/CodeGen/BackendUtil.cpp Tue Jun  4 18:57:57 2019
@@ -340,6 +340,9 @@ static TargetLibraryInfoImpl *createTLII
   case CodeGenOptions::Accelerate:
 
TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::Accelerate);
 break;
+  case CodeGenOptions::MASSV:
+TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::MASSV);
+break;
   case CodeGenOptions::SVML:
 TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::SVML);
 break;

Modified: cfe/trunk/lib/Frontend/CompilerInvocation.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Frontend/CompilerInvocation.cpp?rev=362571&r1=362570&r2=362571&view=diff
==
--- cfe/trunk/lib/Frontend/CompilerInvocation.cpp (original)
+++ cfe/trunk/lib/Frontend/CompilerInvocation.cpp Tue Jun  4 18:57:57 2019
@@ -682,6 +682,8 @@ static bool ParseCodeGenArgs(CodeGenOpti
 StringRef Name = A->getValue();
 if (Name == "Accelerate")
   Opts.setVecLib(CodeGenOptions::Accelerate);
+else if (Name == "MASSV")
+  Opts.setVecLib(CodeGenOptions::MASSV);
 else if (Name == "SVML")
   Opts.setVecLib(CodeGenOptions::SVML);
 else if (Name == "none")

Modified: cfe/trunk/test/Driver/autocomplete.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/autocomplete.c?rev=362571&r1=362570&r2=362571&view=diff
==
--- cfe/trunk/test/Driver/autocomplete.c (original)
+++ cfe/trunk/test/Driver/autocomplete.c

r360220 - Fix buildbot break after r360195

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue May  7 19:03:32 2019
New Revision: 360220

URL: http://llvm.org/viewvc/llvm-project?rev=360220&view=rev
Log:
Fix buildbot break after r360195

Modified:
cfe/trunk/test/Modules/preprocess-umbrella.cpp

Modified: cfe/trunk/test/Modules/preprocess-umbrella.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Modules/preprocess-umbrella.cpp?rev=360220&r1=360219&r2=360220&view=diff
==
--- cfe/trunk/test/Modules/preprocess-umbrella.cpp (original)
+++ cfe/trunk/test/Modules/preprocess-umbrella.cpp Tue May  7 19:03:32 2019
@@ -1,7 +1,9 @@
 // FIXME: The standalone module still seems to cause clang to want to test for
 // the existence of a 'foo' directory:
+// RUN: rm -rf %t
 // RUN: mkdir %t
 // RUN: cp %s %t
+// RUN: rm -rf %t/foo
 // RUN: mkdir %t/foo
 // RUN: cd %t
 // RUN: not %clang_cc1 -fmodules -fsyntax-only %s 2>&1 | FileCheck %s


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r356111 - Fix invocation of Gold plugin with LTO after r355331

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Wed Mar 13 16:54:52 2019
New Revision: 356111

URL: http://llvm.org/viewvc/llvm-project?rev=356111&view=rev
Log:
Fix invocation of Gold plugin with LTO after r355331

The above commit breaks the usage of PGO and LTO when -fprofile-use is
supplied without a path. This patch changes the usage of this argument
to be inline with its use in addPGOAndCoverageFlags().

Differential revision: https://reviews.llvm.org/D59304

Added:
cfe/trunk/test/Driver/cspgo-lto.c
Modified:
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp

Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=356111&r1=356110&r2=356111&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Wed Mar 13 16:54:52 2019
@@ -464,8 +464,12 @@ void tools::AddGoldPlugin(const ToolChai
   CmdArgs.push_back(
   
Args.MakeArgString("-plugin-opt=cs-profile-path=default_%m.profraw"));
   } else if (ProfileUseArg) {
+SmallString<128> Path(
+ProfileUseArg->getNumValues() == 0 ? "" : ProfileUseArg->getValue());
+if (Path.empty() || llvm::sys::fs::is_directory(Path))
+  llvm::sys::path::append(Path, "default.profdata");
 CmdArgs.push_back(Args.MakeArgString(Twine("-plugin-opt=cs-profile-path=") 
+
- ProfileUseArg->getValue()));
+ Path));
   }
 
   // Need this flag to turn on new pass manager via Gold plugin.

Added: cfe/trunk/test/Driver/cspgo-lto.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/cspgo-lto.c?rev=356111&view=auto
==
--- cfe/trunk/test/Driver/cspgo-lto.c (added)
+++ cfe/trunk/test/Driver/cspgo-lto.c Wed Mar 13 16:54:52 2019
@@ -0,0 +1,6 @@
+// RUN: touch %t.o
+//
+// RUN: %clang -target x86_64-unknown-linux -### %t.o -flto=thin \
+// RUN:   -fprofile-use 2>&1 | FileCheck %s
+
+// CHECK: -plugin-opt=cs-profile-path=default.profdata


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, wschmidt, kbarton, rsmith.
nemanjai added a subscriber: cfe-commits.
nemanjai set the repository for this revision to rL LLVM.
Herald added a subscriber: klimek.

This patch adds support for the __float128 keyword and literals for IEEE Quad 
Precision.

There are still unanswered questions so this is not meant as an approval draft. 
I am hoping to solicit feedback regarding various aspects of this patch - 
particularly the FIXME's that I've put into the code.

Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Analysis/Analyses/ThreadSafetyTIL.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Format/FormatToken.cpp
  lib/Frontend/InitPreprocessor.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Sema/128bitfloat.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -460,6 +461,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/128bitfloat.cpp
===
--- test/Sema/128bitfloat.cpp
+++ test/Sema/128bitfloat.cpp
@@ -2,23 +2,23 @@
 // RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 %s
 
 #if !defined(__STRICT_ANSI__)
-__float128 f;  // expected-error {{support for type '__float128' is not yet implemented}}
+__float128 f;  // expected-error {{__float128 is not supported on this target}}
 // But this should work:
 template struct __is_floating_point_helper {};
-template<> struct __is_floating_point_helper<__float128> {};
+template<> struct __is_floating_point_helper<__float128> {};  // expected-error {{__float128 is not supported on this target}}
 
 // FIXME: This could have a better diag.
-void g(int x, __float128 *y) {
-  x + *y;  // expected-error {{invalid operands to binary expression ('int' and '__float128')}}
+int g(int x, __float128 *y) {  // expected-error {{__float128 is not 

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Just a friendly reminder to the reviewers that this patch has been up for 
almost a week with no review comments. Please take some time to review.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 42414.
nemanjai added a comment.

Updated to address review comments. Rather than listing responses and 
justification for some of the changes, I'll provide comments inline for better 
readability.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/Format/FormatToken.cpp
  lib/Frontend/InitPreprocessor.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Preprocessor/init.c
  test/Sema/128bitfloat.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -460,6 +461,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/128bitfloat.cpp
===
--- test/Sema/128bitfloat.cpp
+++ test/Sema/128bitfloat.cpp
@@ -2,23 +2,23 @@
 // RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 %s
 
 #if !defined(__STRICT_ANSI__)
-__float128 f;  // expected-error {{support for type '__float128' is not yet implemented}}
+__float128 f;  // expected-error {{__float128 is not supported on this target}}
 // But this should work:
 template struct __is_floating_point_helper {};
-template<> struct __is_floating_point_helper<__float128> {};
+template<> struct __is_floating_point_helper<__float128> {};  // expected-error {{__float128 is not supported on this target}}
 
 // FIXME: This could have a better diag.
-void g(int x, __float128 *y) {
-  x + *y;  // expected-error {{invalid operands to binary expression ('int' and '__float128')}}
+int g(int x, __float128 *y) {  // expected-error {{__float128 is not supported on this target}}
+  return x + *y;
 }
 
 #else
-__float128 f;  // expected-error {{unknown type name '__float128'}}
+__float128 f;  // expected-error {{__float128 is not supported on this target}}
 template struct __is_floating_point_helper {};
-template<> struct __is_floating_point_helper<__float128> {};  // expected-error {{use of un

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: lib/AST/ItaniumMangle.cpp:2064
@@ +2063,3 @@
+if (getASTContext().getTargetInfo().useFloat128ManglingForLongDouble())
+  Out << "U10__float128"; // Match the GCC mangling
+else

Please refer to https://gcc.gnu.org/ml/gcc-patches/2015-10/txt5mF4d1XnFb.txt.
GCC recently added this for PowerPC and the new mangling was provided for the 
__float128 type when it coexists with long double.


Comment at: lib/AST/StmtPrinter.cpp:1234
@@ -1233,2 +1233,3 @@
   case BuiltinType::LongDouble: OS << 'L'; break;
+  case BuiltinType::Float128:   OS << 'Q'; break;
   }

As in GCC, __float128 literals in source code have a suffix 'q'/'Q'. I'll be 
perfectly honest - I don't know when this function is called, but it seems that 
for consistency, we should use the same suffix here.


Comment at: lib/Basic/TargetInfo.cpp:228
@@ -226,1 +227,3 @@
   return LongDouble;
+if (hasFloat128Type())
+  return Float128;

Left this condition in but moved it down. This way if a target exists that has 
'long double' that is narrower than 128 bits, but it supports __float128, we 
can still return a 128-bit floating point type here.


Comment at: lib/Basic/Targets.cpp:1043
@@ +1042,3 @@
+  bool hasFloat128Type() const override {
+return HasFloat128;
+  }

Now that we have different mangling for __float128 and long double, it should 
be safe to support __float128 and leave the mangling of long double unchanged.


Comment at: lib/Basic/Targets.cpp:1236
@@ -1229,1 +1235,3 @@
+  if (HasFloat128)
+Builder.defineMacro("__FLOAT128__");
 

GCC defines this macro when -mfloat128 is specified.


Comment at: lib/CodeGen/CGExprScalar.cpp:1799
@@ -1798,3 +1798,3 @@
 else {
-  // Remaining types are either Half or LongDouble.  Convert from float.
+  // Remaining types are Half, LongDouble or __float128. Convert from 
float.
   llvm::APFloat F(static_cast(amount));

An expression incrementing a variable of __float128 type was added to the test 
case.


Comment at: lib/Frontend/InitPreprocessor.cpp:718
@@ -717,1 +717,3 @@
+  if (TI.hasFloat128Type())
+DefineFloatMacros(Builder, "FLT128", &TI.getFloat128Format(), "Q");
 

GCC does not do this at this particular time, but it seems logical to actually 
provide this macro on targets that support it. For PPC, the macros are defined 
(and tested) to match IEEE quad precision values (when -mfloat128 is specified).


Comment at: lib/Index/USRGeneration.cpp:603
@@ -602,1 +602,3 @@
+case BuiltinType::Float128:
+  c = 'Q'; break;
 case BuiltinType::NullPtr:

As far as I can tell, this does not collide and it is consistent with the 
literal suffix for this type. However, I'd be happy to change it if there is a 
better suffix to use. Do you have a different suggestion @akyrtzi?


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: include/clang/Basic/TargetInfo.h:384
@@ +383,3 @@
+  unsigned getFloat128Width() const { return 128; }
+  unsigned getFloat128Align() const { return 128; }
+  const llvm::fltSemantics &getFloat128Format() const {

hubert.reinterpretcast wrote:
> This should probably not be hard-coded. On s390x-ibm-linux-gnu, the IEEE 
> 128-bit binary format type has 8 byte alignment (not 16).
OK, I probably shouldn't have assumed anything about the alignment. I'll add 
fields to the target info that can be set as needed.


Comment at: lib/CodeGen/CGDebugInfo.cpp:539
@@ -538,2 +538,3 @@
   case BuiltinType::LongDouble:
+  case BuiltinType::Float128:
   case BuiltinType::Double:

hubert.reinterpretcast wrote:
> Is a PPCDoubleDouble "long double" and "__float128" distinguishable on PPC 
> given this DWARF treatment?
Unless there's something put into the debugger to figure out which type 
something actually is, I don't think so. However, there isn't a consensus on 
what encoding will be used, so I'll just leave it as-is and put a FIXME in the 
code to note this.


Comment at: lib/Lex/LiteralSupport.cpp:604
@@ -596,3 +603,3 @@
   if (isLong || isLongLong) break;  // Cannot be repeated.
-  if (isFloat) break;   // LF invalid.
+  if (isFloat || isFloat128) break; // LF, QL invalid.
 

hubert.reinterpretcast wrote:
> minor: should the comment have FL instead of LF?
I agree that it probably should, but it was already there so I didn't change 
it. I'll change it on the next review.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

I think the correct course of action would be to allow/disallow promotion based 
on a condition that the two types are the same/different (respectively). I 
think a comparison of the float semantics is a valid way to check this. Also, 
should operations between long double and __float128 be diagnosed as warnings 
or errors if the two types are distinct?


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D13190: Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: wschmidt, seurer, kbarton, hfinkel.
nemanjai added a subscriber: cfe-commits.
nemanjai set the repository for this revision to rL LLVM.

Implemented the following interfaces to conform to ELF V2 ABI version 1.1.
  vector signed __int128 vec_adde (vector signed __int128, vector signed 
__int128, vector signed __int128);
  vector unsigned __int128 vec_adde (vector unsigned __int128, vector unsigned 
__int128, vector unsigned __int128);
  vector signed __int128 vec_addec (vector signed __int128, vector signed 
__int128, vector signed __int128);
  vector unsigned __int128 vec_addec (vector unsigned __int128, vector unsigned 
__int128, vector unsigned __int128);
  vector signed int vec_addc(vector signed int __a, vector signed int __b);
  vector bool char vec_cmpge (vector signed char __a, vector signed char __b);
  vector bool char vec_cmpge (vector unsigned char __a, vector unsigned char 
__b);
  vector bool short vec_cmpge (vector signed short __a, vector signed short 
__b);
  vector bool short vec_cmpge (vector unsigned short __a, vector unsigned short 
__b);
  vector bool int vec_cmpge (vector signed int __a, vector signed int __b);
  vector bool int vec_cmpge (vector unsigned int __a, vector unsigned int __b);
  vector bool char vec_cmple (vector signed char __a, vector signed char __b);
  vector bool char vec_cmple (vector unsigned char __a, vector unsigned char 
__b);
  vector bool short vec_cmple (vector signed short __a, vector signed short 
__b);
  vector bool short vec_cmple (vector unsigned short __a, vector unsigned short 
__b);
  vector bool int vec_cmple (vector signed int __a, vector signed int __b);
  vector bool int vec_cmple (vector unsigned int __a, vector unsigned int __b);
  vector double vec_double (vector signed long long __a);
  vector double vec_double (vector unsigned long long __a);
  vector bool char vec_eqv(vector bool char __a, vector bool char __b);
  vector bool short vec_eqv(vector bool short __a, vector bool short __b);
  vector bool int vec_eqv(vector bool int __a, vector bool int __b);
  vector bool long long vec_eqv(vector bool long long __a, vector bool long 
long __b);
  vector signed short vec_madd(vector signed short __a, vector signed short 
__b, vector signed short __c);
  vector signed short vec_madd(vector signed short __a, vector unsigned short 
__b, vector unsigned short __c);
  vector signed short vec_madd(vector unsigned short __a, vector signed short 
__b, vector signed short __c);
  vector unsigned short vec_madd(vector unsigned short __a, vector unsigned 
short __b, vector unsigned short __c);
  vector bool long long vec_mergeh(vector bool long long __a, vector bool long 
long __b);
  vector bool long long vec_mergel(vector bool long long __a, vector bool long 
long __b);
  vector bool char vec_nand(vector bool char __a, vector bool char __b);
  vector bool short vec_nand(vector bool short __a, vector bool short __b);
  vector bool int vec_nand(vector bool int __a, vector bool int __b);
  vector bool long long vec_nand(vector bool long long __a, vector bool long 
long __b);
  vector bool char vec_orc(vector bool char __a, vector bool char __b);
  vector bool short vec_orc(vector bool short __a, vector bool short __b);
  vector bool int vec_orc(vector bool int __a, vector bool int __b);
  vector bool long long vec_orc(vector bool long long __a, vector bool long 
long __b);
  vector signed long long vec_sub(vector signed long long __a, vector signed 
long long __b);
  vector signed long long vec_sub(vector bool long long __a, vector signed long 
long __b);
  vector signed long long vec_sub(vector signed long long __a, vector bool long 
long __b);
  vector unsigned long long vec_sub(vector unsigned long long __a, vector 
unsigned long long __b);
  vector unsigned long long vec_sub(vector bool long long __a, vector unsigned 
long long __b);
  vector unsigned long long vec_sub(vector unsigned long long __a, vector bool 
long long __b);
  vector float vec_sub(vector float __a, vector float __b);
  unsigned char vec_extract(vector bool char __a, int __b);
  signed short vec_extract(vector signed short __a, int __b);
  unsigned short vec_extract(vector bool short __a, int __b);
  signed int vec_extract(vector signed int __a, int __b);
  unsigned int vec_extract(vector bool int __a, int __b);
  signed long long vec_extract(vector signed long long __a, int __b);
  unsigned long long vec_extract(vector unsigned long long __a, int __b);
  unsigned long long vec_extract(vector bool long long __a, int __b);
  double vec_extract(vector double __a, int __b);
  vector bool char vec_insert(unsigned char __a, vector bool char __b, int __c);
  vector signed short vec_insert(signed short __a, vector signed short __b, int 
__c);
  vector bool short vec_insert(unsigned short __a, vector bool short __b, int 
__c);
  vector signed int vec_insert(signed int __a, vector signed int __b, int __c);
  vector bool int vec_insert(uns

Re: [PATCH] D13190: Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 35838.
nemanjai added a comment.

I forgot the test cases in the original upload. This patch contains the test 
cases and is ready for review.


Repository:
  rL LLVM

http://reviews.llvm.org/D13190

Files:
  include/clang/Basic/BuiltinsPPC.def
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-altivec.c
  test/CodeGen/builtins-ppc-crypto.c
  test/CodeGen/builtins-ppc-p8vector.c

Index: test/CodeGen/builtins-ppc-p8vector.c
===
--- test/CodeGen/builtins-ppc-p8vector.c
+++ test/CodeGen/builtins-ppc-p8vector.c
@@ -7,6 +7,13 @@
 // (vec_cmpge, vec_cmple). Without this option, there is only one overload so
 // it is selected.
 
+void dummy() { }
+signed int si;
+signed long long sll;
+unsigned long long ull;
+signed __int128 sx;
+unsigned __int128 ux;
+double d;
 vector signed char vsc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 };
 vector unsigned char vuc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 };
 vector bool char vbc = { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1 };
@@ -23,10 +30,17 @@
 vector unsigned long long vull = { 1, 2 };
 vector bool long long vbll = { 1, 0 };
 
+vector signed __int128 vsx = { 1 };
+vector unsigned __int128 vux = { 1 };
+
 vector float vfa = { 1.e-4f, -132.23f, -22.1, 32.00f };
 vector double vda = { 1.e-11, -132.23e10 };
 
 int res_i;
+double res_d;
+signed long long res_sll;
+unsigned long long res_ull;
+
 vector signed char res_vsc;
 vector unsigned char res_vuc;
 vector bool char res_vbc;
@@ -43,7 +57,10 @@
 vector unsigned long long res_vull;
 vector bool long long res_vbll;
 
-vector double res_vf;
+vector signed __int128 res_vsx;
+vector unsigned __int128 res_vux;
+
+vector float res_vf;
 vector double res_vd;
 
 // CHECK-LABEL: define void @test1
@@ -73,6 +90,37 @@
 // CHECK-LE: add <2 x i64>
 // CHECK-PPC: error: call to 'vec_add' is ambiguous
 
+  /* vec_addc */
+  res_vsi = vec_addc(vsi, vsi);
+// CHECK: @llvm.ppc.altivec.vaddcuw
+// CHECK-LE: @llvm.ppc.altivec.vaddcuw
+
+  res_vui = vec_addc(vui, vui);
+// CHECK: @llvm.ppc.altivec.vaddcuw
+// CHECK-LE: @llvm.ppc.altivec.vaddcuw
+
+  res_vsx = vec_addc(vsx, vsx);
+// CHECK: @llvm.ppc.altivec.vaddcuq
+// CHECK-LE: @llvm.ppc.altivec.vaddcuq
+
+  res_vux = vec_addc(vux, vux);
+// CHECK: @llvm.ppc.altivec.vaddcuq
+// CHECK-LE: @llvm.ppc.altivec.vaddcuq
+
+  /* vec_adde */
+  res_vsx = vec_adde(vsx, vsx, vsx);
+// CHECK: @llvm.ppc.altivec.vaddeuqm
+// CHECK-LE: @llvm.ppc.altivec.vaddeuqm
+
+  res_vux = vec_adde(vux, vux, vux);
+// CHECK: @llvm.ppc.altivec.vaddeuqm
+// CHECK-LE: @llvm.ppc.altivec.vaddeuqm
+
+  /* vec_addec */
+  res_vsx = vec_addec(vsx, vsx, vsx);
+// CHECK: @llvm.ppc.altivec.vaddecuq
+// CHECK-LE: @llvm.ppc.altivec.vaddecuq
+
   /* vec_mergee */  
   res_vbi = vec_mergee(vbi, vbi);
 // CHECK: @llvm.ppc.altivec.vperm
@@ -156,6 +204,15 @@
 // CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vcmpgtud(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}})
 // CHECK-PPC: error: call to 'vec_cmplt' is ambiguous
 
+  /* vec_double */
+  res_vd = vec_double(vsll);
+// CHECK: sitofp i64 {{.+}} to double
+// CHECK-BE: sitofp i64 {{.+}} to double
+
+  res_vd = vec_double(vull);
+// CHECK: uitofp i64 {{.+}} to double
+// CHECK-BE: uitofp i64 {{.+}} to double
+
   /* vec_eqv */
   res_vsc =  vec_eqv(vsc, vsc);
 // CHECK: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
@@ -168,18 +225,7 @@
 // CHECK-LE: bitcast <4 x i32> [[T3]] to <16 x i8>
 // CHECK-PPC: error: assigning to
 
-  res_vsc =  vec_eqv(vbc, vsc);
-// CHECK: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK: [[T2:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK: [[T3:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxleqv(<4 x i32> [[T1]], <4 x i32> [[T2]])
-// CHECK: bitcast <4 x i32> [[T3]] to <16 x i8>
-// CHECK-LE: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK-LE: [[T2:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK-LE: [[T3:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxleqv(<4 x i32> [[T1]], <4 x i32> [[T2]])
-// CHECK-LE: bitcast <4 x i32> [[T3]] to <16 x i8>
-// CHECK-PPC: error: assigning to
-
-  res_vsc =  vec_eqv(vsc, vbc);
+  res_vsc =  vec_eqv(vbc, vbc);
 // CHECK: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
 // CHECK: [[T2:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
 // CHECK: [[T3:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxleqv(<4 x i32> [[T1]], <4 x i32> [[T2]])
@@ -201,28 +247,6 @@
 // CHECK-LE: bitcast <4 x i32> [[T3]] to <16 x i8>
 // CHECK-PPC: error: assigning to
 
-  res_vuc =  vec_eqv(vbc, vuc);
-// CHECK: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK: [[T2:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK: [[T3:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxleqv(<4 x i32> [[T1]], <4 x i32> [[T2]])
-// CHECK: bitcast <4 x i32> [[T3]] to <16 x i8>
-// CHECK-LE: [[T1:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK-LE: [[T2:%.+]] = bitcast <16 x i8> {{.+}} to <4 x i32>
-// CHECK-LE: [

r248813 - Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Sep 29 13:13:34 2015
New Revision: 248813

URL: http://llvm.org/viewvc/llvm-project?rev=248813&view=rev
Log:
Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1

This patch corresponds to review:
http://reviews.llvm.org/D13190

Implemented the following interfaces to conform to ELF V2 ABI version 1.1.

vector signed __int128 vec_adde (vector signed __int128, vector signed 
__int128, vector signed __int128);
vector unsigned __int128 vec_adde (vector unsigned __int128, vector unsigned 
__int128, vector unsigned __int128);
vector signed __int128 vec_addec (vector signed __int128, vector signed 
__int128, vector signed __int128);
vector unsigned __int128 vec_addec (vector unsigned __int128, vector unsigned 
__int128, vector unsigned __int128);
vector signed int vec_addc(vector signed int __a, vector signed int __b);
vector bool char vec_cmpge (vector signed char __a, vector signed char __b);
vector bool char vec_cmpge (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmpge (vector signed short __a, vector signed short __b);
vector bool short vec_cmpge (vector unsigned short __a, vector unsigned short 
__b);
vector bool int vec_cmpge (vector signed int __a, vector signed int __b);
vector bool int vec_cmpge (vector unsigned int __a, vector unsigned int __b);
vector bool char vec_cmple (vector signed char __a, vector signed char __b);
vector bool char vec_cmple (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmple (vector signed short __a, vector signed short __b);
vector bool short vec_cmple (vector unsigned short __a, vector unsigned short 
__b);
vector bool int vec_cmple (vector signed int __a, vector signed int __b);
vector bool int vec_cmple (vector unsigned int __a, vector unsigned int __b);
vector double vec_double (vector signed long long __a);
vector double vec_double (vector unsigned long long __a);
vector bool char vec_eqv(vector bool char __a, vector bool char __b);
vector bool short vec_eqv(vector bool short __a, vector bool short __b);
vector bool int vec_eqv(vector bool int __a, vector bool int __b);
vector bool long long vec_eqv(vector bool long long __a, vector bool long long 
__b);
vector signed short vec_madd(vector signed short __a, vector signed short __b, 
vector signed short __c);
vector signed short vec_madd(vector signed short __a, vector unsigned short 
__b, vector unsigned short __c);
vector signed short vec_madd(vector unsigned short __a, vector signed short 
__b, vector signed short __c);
vector unsigned short vec_madd(vector unsigned short __a, vector unsigned short 
__b, vector unsigned short __c);
vector bool long long vec_mergeh(vector bool long long __a, vector bool long 
long __b);
vector bool long long vec_mergel(vector bool long long __a, vector bool long 
long __b);
vector bool char vec_nand(vector bool char __a, vector bool char __b);
vector bool short vec_nand(vector bool short __a, vector bool short __b);
vector bool int vec_nand(vector bool int __a, vector bool int __b);
vector bool long long vec_nand(vector bool long long __a, vector bool long long 
__b);
vector bool char vec_orc(vector bool char __a, vector bool char __b);
vector bool short vec_orc(vector bool short __a, vector bool short __b);
vector bool int vec_orc(vector bool int __a, vector bool int __b);
vector bool long long vec_orc(vector bool long long __a, vector bool long long 
__b);
vector signed long long vec_sub(vector signed long long __a, vector signed long 
long __b);
vector signed long long vec_sub(vector bool long long __a, vector signed long 
long __b);
vector signed long long vec_sub(vector signed long long __a, vector bool long 
long __b);
vector unsigned long long vec_sub(vector unsigned long long __a, vector 
unsigned long long __b);
vector unsigned long long vec_sub(vector bool long long __a, vector unsigned 
long long __b);
vector unsigned long long vec_sub(vector unsigned long long __V2 ABI V1.1


http://ror float vec_sub(vector float __a, vector float __b);
unsigned char vec_extract(vector bool char __a, int __b);
signed short vec_extract(vector signed short __a, int __b);
unsigned short vec_extract(vector bool short __a, int __b);
signed int vec_extract(vector signed int __a, int __b);
unsigned int vec_extract(vector bool int __a, int __b);
signed long long vec_extract(vector signed long long __a, int __b);
unsigned long long vec_extract(vector unsigned long long __a, int __b);
unsigned long long vec_extract(vector bool long long __a, int __b);
double vec_extract(vector double __a, int __b);
vector bool char vec_insert(unsigned char __a, vector bool char __b, int __c);
vector signed short vec_insert(signed short __a, vector signed short __b, int 
__c);
vector bool short vec_insert(unsigned short __a, vector bool short __b, int 
__c);
vector signed int vec_insert(signed int __a, vector signed int __b, int __c);
vector bool int vec_insert(unsigned int __a, vector bool int __b, int __c);
vector

Re: [PATCH] D13190: Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 248813.


Repository:
  rL LLVM

http://reviews.llvm.org/D13190



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r248815 - Forgot to remove a FIXME that has been fixed. NFC.

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Sep 29 13:20:59 2015
New Revision: 248815

URL: http://llvm.org/viewvc/llvm-project?rev=248815&view=rev
Log:
Forgot to remove a FIXME that has been fixed. NFC.

Modified:
cfe/trunk/lib/Headers/altivec.h

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=248815&r1=248814&r2=248815&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Tue Sep 29 13:20:59 2015
@@ -13782,9 +13782,6 @@ support). As a result, we need to be abl
 The remaining ones (currently controlled by -mcrypto for GCC) still
 need to be provided on compliant hardware even if Vector.Crypto is not
 provided.
-FIXME: the naming convention for the builtins will be adjusted due
-to the inconsistency (__builtin_crypto_ prefix on builtins that cannot be
-removed with -mno-crypto). This is under development.
 */
 #ifdef __CRYPTO__
 #define vec_sbox_be __builtin_altivec_crypto_vsbox


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285218 - [PPC] Implement vector reverse elements builtins (vec_reve)

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Wed Oct 26 13:25:45 2016
New Revision: 285218

URL: http://llvm.org/viewvc/llvm-project?rev=285218&view=rev
Log:
[PPC] Implement vector reverse elements builtins (vec_reve)

This patch corresponds to review https://reviews.llvm.org/D25906.
Committing on behalf of Tony Jiang.


Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285218&r1=285217&r2=285218&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Oct 26 13:25:45 2016
@@ -15034,6 +15034,77 @@ vec_bperm(vector unsigned __int128 __a,
 #endif
 #endif
 
+
+/* vec_reve */
+
+static inline __ATTRS_o_ai vector bool char vec_reve(vector bool char __a) {
+  return __builtin_shufflevector(__a, __a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6,
+ 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector signed char vec_reve(vector signed char __a) 
{
+  return __builtin_shufflevector(__a, __a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6,
+ 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector unsigned char
+vec_reve(vector unsigned char __a) {
+  return __builtin_shufflevector(__a, __a, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6,
+ 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector bool int vec_reve(vector bool int __a) {
+  return __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector signed int vec_reve(vector signed int __a) {
+  return __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector unsigned int
+vec_reve(vector unsigned int __a) {
+  return __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector bool short vec_reve(vector bool short __a) {
+  return __builtin_shufflevector(__a, __a, 7, 6, 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector signed short
+vec_reve(vector signed short __a) {
+  return __builtin_shufflevector(__a, __a, 7, 6, 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector unsigned short
+vec_reve(vector unsigned short __a) {
+  return __builtin_shufflevector(__a, __a, 7, 6, 5, 4, 3, 2, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector float vec_reve(vector float __a) {
+  return __builtin_shufflevector(__a, __a, 3, 2, 1, 0);
+}
+
+#ifdef __VSX__
+static inline __ATTRS_o_ai vector bool long long
+vec_reve(vector bool long long __a) {
+  return __builtin_shufflevector(__a, __a, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector signed long long
+vec_reve(vector signed long long __a) {
+  return __builtin_shufflevector(__a, __a, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector unsigned long long
+vec_reve(vector unsigned long long __a) {
+  return __builtin_shufflevector(__a, __a, 1, 0);
+}
+
+static inline __ATTRS_o_ai vector double vec_reve(vector double __a) {
+  return __builtin_shufflevector(__a, __a, 1, 0);
+}
+#endif
+
 #undef __ATTRS_o_ai
 
 #endif /* __ALTIVEC_H */

Modified: cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-altivec.c?rev=285218&r1=285217&r2=285218&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-altivec.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-altivec.c Wed Oct 26 13:25:45 2016
@@ -8996,3 +8996,48 @@ void test7() {
 // CHECK: @llvm.ppc.altivec.vcmpgefp.p(i32 2
 // CHECK-LE: @llvm.ppc.altivec.vcmpgefp.p(i32 2
 }
+
+void test8() {
+  // CHECK-LABEL: define void @test8
+  // CHECK-LE-LABEL: define void @test8
+  res_vbc = vec_reve(vbc);
+  // CHECK: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x 
i32> 
+  // CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 
x i32> 
+
+  res_vsc = vec_reve(vsc);
+  // CHECK: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x 
i32> 
+  // CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 
x i32> 
+
+  res_vuc = vec_reve(vuc);
+  // CHECK: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x 
i32> 
+  // CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 
x i32> 
+
+  res_vbi = vec_reve(vbi);
+  // CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x 
i32> 
+  // CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 
x i32> 
+
+  res_vi = vec_reve(vi);
+  // CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x 
i32> 
+  // CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 
x i32> 
+
+  res_vui = vec_reve(vui);
+  // CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x 
i32

r285229 - [PowerPC] Implement vector_insert_exp builtins - clang portion

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Wed Oct 26 14:27:11 2016
New Revision: 285229

URL: http://llvm.org/viewvc/llvm-project?rev=285229&view=rev
Log:
[PowerPC] Implement vector_insert_exp builtins - clang portion

This patch corresponds to review https://reviews.llvm.org/D25956.
Committing on behalf of Zaara Syeda.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=285229&r1=285228&r2=285229&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Wed Oct 26 14:27:11 2016
@@ -362,6 +362,9 @@ BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4f
 BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "")
 BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "")
 
+BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "")
+BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "")
+
 // HTM builtins
 BUILTIN(__builtin_tbegin, "UiUIi", "")
 BUILTIN(__builtin_tend, "UiUIi", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285229&r1=285228&r2=285229&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Oct 26 14:27:11 2016
@@ -2497,6 +2497,26 @@ vec_first_mismatch_or_eos_index(vector u
   return __res[0] >> 5;
 }
 
+static __inline__ vector double  __ATTRS_o_ai
+vec_insert_exp(vector double __a, vector unsigned long long __b) {
+  return __builtin_vsx_xviexpdp((vector unsigned long long)__a,__b);
+}
+
+static __inline__ vector double  __ATTRS_o_ai
+vec_insert_exp(vector unsigned long long __a, vector unsigned long long __b) {
+  return __builtin_vsx_xviexpdp(__a,__b);
+}
+
+static __inline__ vector float  __ATTRS_o_ai
+vec_insert_exp(vector float __a, vector unsigned int __b) {
+  return __builtin_vsx_xviexpsp((vector unsigned int)__a,__b);
+}
+
+static __inline__ vector float  __ATTRS_o_ai
+vec_insert_exp(vector unsigned int __a, vector unsigned int __b) {
+  return __builtin_vsx_xviexpsp(__a,__b);
+}
+
 #endif
 
 /* vec_cpsgn */

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=285229&r1=285228&r2=285229&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Wed Oct 26 14:27:11 2016
@@ -698,3 +698,31 @@ vector unsigned short test54(void) {
 // CHECK-NEXT: ret <8 x i16>
   return vec_popcnt (vusa);
 }
+vector double test55(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+  return vec_insert_exp (vda,vulb);
+}
+vector double test56(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+  return vec_insert_exp (vula, vulb);
+}
+vector float test57(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+  return vec_insert_exp (vfa,vuib);
+}
+vector float test58(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+  return vec_insert_exp (vuia,vuib);
+}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285268 - [PPC] add vector byte reverse functions to altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Thu Oct 27 01:23:57 2016
New Revision: 285268

URL: http://llvm.org/viewvc/llvm-project?rev=285268&view=rev
Log:
[PPC] add vector byte reverse functions to altivec.h

This patch corresponds to review https://reviews.llvm.org/D25915.
Committing on behalf of Sean Fertile.

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285268&r1=285267&r2=285268&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Thu Oct 27 01:23:57 2016
@@ -15125,6 +15125,121 @@ static inline __ATTRS_o_ai vector double
 }
 #endif
 
+/* vec_revb */
+static __inline__ vector bool char __ATTRS_o_ai
+vec_revb(vector bool char __a) {
+  return __a;
+}
+
+static __inline__ vector signed char __ATTRS_o_ai
+vec_revb(vector signed char __a) {
+  return __a;
+}
+
+static __inline__ vector unsigned char __ATTRS_o_ai
+vec_revb(vector unsigned char __a) {
+  return __a;
+}
+
+static __inline__ vector bool short __ATTRS_o_ai
+vec_revb(vector bool short __a) {
+  vector unsigned char __indices =
+  { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector signed short __ATTRS_o_ai
+vec_revb(vector signed short __a) {
+  vector unsigned char __indices =
+  { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector unsigned short __ATTRS_o_ai
+vec_revb(vector unsigned short __a) {
+  vector unsigned char __indices =
+ { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector bool int __ATTRS_o_ai
+vec_revb(vector bool int __a) {
+  vector unsigned char __indices =
+  { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_revb(vector signed int __a) {
+  vector unsigned char __indices =
+  { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_revb(vector unsigned int __a) {
+  vector unsigned char __indices =
+  { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector float __ATTRS_o_ai
+vec_revb(vector float __a) {
+ vector unsigned char __indices =
+  { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 };
+ return vec_perm(__a, __a, __indices);
+}
+
+#ifdef __VSX__
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_revb(vector bool long long __a) {
+  vector unsigned char __indices =
+  { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_revb(vector signed long long __a) {
+  vector unsigned char __indices =
+  { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_revb(vector unsigned long long __a) {
+  vector unsigned char __indices =
+  { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 };
+  return vec_perm(__a, __a, __indices);
+}
+
+static __inline__ vector double __ATTRS_o_ai
+vec_revb(vector double __a) {
+  vector unsigned char __indices =
+  { 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8 };
+  return vec_perm(__a, __a, __indices);
+}
+#endif /* End __VSX__ */
+
+#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_revb(vector signed __int128 __a) {
+  vector unsigned char __indices =
+  { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 };
+  return (vector signed __int128)vec_perm((vector signed int)__a,
+  (vector signed int)__a,
+   __indices);
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_revb(vector unsigned __int128 __a) {
+  vector unsigned char __indices =
+  { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 };
+  return (vector unsigned __int128)vec_perm((vector signed int)__a,
+(vector signed int)__a,
+ __indices);
+}
+#endif /* END __POWER8_VECTOR__ && __powerpc64__ */
+
 #undef __ATTRS_o_ai
 
 #endif /* __ALTIVEC_H */

Modified: cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-altivec.c?rev=285268&r1=285267&r2=285268&

[PATCH] D26002: Implement vector count leading/trailing bytes with zero lsb and vector parity builtins - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Other than the minor nit, this LGTM.




Comment at: include/clang/Basic/BuiltinsPPC.def:275
 
+
+BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "")

No need for this extra blank line.


https://reviews.llvm.org/D26002



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26073: [PPC] Add vec_absd functions to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

This patch LGTM. I'll let @kbarton/@echristo have a look as well and have the 
final say.


https://reviews.llvm.org/D26073



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285436 - Implement vector count leading/trailing bytes with zero lsb and vector parity

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Oct 28 14:49:03 2016
New Revision: 285436

URL: http://llvm.org/viewvc/llvm-project?rev=285436&view=rev
Log:
Implement vector count leading/trailing bytes with zero lsb and vector parity
builtins - clang portion

This patch corresponds to review: https://reviews.llvm.org/D26002
Committing on behalf of Zaara Syeda.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=285436&r1=285435&r2=285436&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Fri Oct 28 14:49:03 2016
@@ -272,6 +272,12 @@ BUILTIN(__builtin_altivec_vctzh, "V8UsV8
 BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "")
 BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "")
 
+BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "")
+BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "")
+BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "")
+
 // Vector population count built-ins
 BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "")
 BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285436&r1=285435&r2=285436&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Fri Oct 28 14:49:03 2016
@@ -1720,6 +1720,72 @@ vec_cmpnez(vector unsigned int __a, vect
  (vector int)__b);
 }
 
+static __inline__ signed int __ATTRS_o_ai
+vec_cntlz_lsbb(vector signed char __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vctzlsbb(__a);
+#else
+  return __builtin_altivec_vclzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cntlz_lsbb(vector unsigned char __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vctzlsbb(__a);
+#else
+  return __builtin_altivec_vclzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cnttz_lsbb(vector signed char __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vclzlsbb(__a);
+#else
+  return __builtin_altivec_vctzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cnttz_lsbb(vector unsigned char __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vclzlsbb(__a);
+#else
+  return __builtin_altivec_vctzlsbb(__a);
+#endif
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned int __a) {
+  return __builtin_altivec_vprtybw(__a);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_parity_lsbb(vector signed int __a) {
+  return __builtin_altivec_vprtybw(__a);
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned __int128 __a) {
+  return __builtin_altivec_vprtybq(__a);
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_parity_lsbb(vector signed __int128 __a) {
+  return __builtin_altivec_vprtybq(__a);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned long long __a) {
+  return __builtin_altivec_vprtybd(__a);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_parity_lsbb(vector signed long long __a) {
+  return __builtin_altivec_vprtybd(__a);
+}
+
 #endif
 
 /* vec_cmpgt */

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=285436&r1=285435&r2=285436&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Fri Oct 28 14:49:03 2016
@@ -23,6 +23,8 @@ vector unsigned long long vula, vulb;
 vector bool long long vbla, vblb;
 vector float vfa, vfb;
 vector double vda, vdb;
+vector unsigned __int128 vui128a, vui128b;
+vector signed __int128 vsi128a, vsi128b;
 
 unsigned test1(void) {
 // CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
@@ -698,6 +700,81 @@ vector unsigned short test54(void) {
 // CHECK-NEXT: ret <8 x i16>
   return vec_popcnt (vusa);
 }
+signed int test59(void) {
+// CHECK-BE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+  return vec_cntlz_lsbb (vuca);
+}
+signed int test60(void) {
+// CHECK-BE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+  return 

[PATCH] D26002: Implement vector count leading/trailing bytes with zero lsb and vector parity builtins - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Committed revision 285436.
Zaara, please close this review if there are no buildbot failures.


https://reviews.llvm.org/D26002



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285439 - [PPC] add float and double overloads for vec_orc and vec_nand in altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Oct 28 15:04:53 2016
New Revision: 285439

URL: http://llvm.org/viewvc/llvm-project?rev=285439&view=rev
Log:
[PPC] add float and double overloads for vec_orc and vec_nand in altivec.h

This patch corresponds to review https://reviews.llvm.org/D25950.
Committing on behalf of Sean Fertile.

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285439&r1=285438&r2=285439&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Fri Oct 28 15:04:53 2016
@@ -5356,6 +5356,12 @@ static __inline__ vector bool int __ATTR
   return ~(__a & __b);
 }
 
+static __inline__ vector float __ATTRS_o_ai
+vec_nand(vector float __a, vector float __b) {
+  return (vector float)(~((vector unsigned int)__a &
+  (vector unsigned int)__b));
+}
+
 static __inline__ vector signed long long __ATTRS_o_ai
 vec_nand(vector signed long long __a, vector signed long long __b) {
   return ~(__a & __b);
@@ -5391,6 +5397,12 @@ vec_nand(vector bool long long __a, vect
   return ~(__a & __b);
 }
 
+static __inline__ vector double __ATTRS_o_ai
+vec_nand(vector double __a, vector double __b) {
+  return (vector double)(~((vector unsigned long long)__a &
+   (vector unsigned long long)__b));
+}
+
 #endif
 
 /* vec_nmadd */
@@ -5862,6 +5874,16 @@ static __inline__ vector bool int __ATTR
   return __a | ~__b;
 }
 
+static __inline__ vector float __ATTRS_o_ai
+vec_orc(vector bool int __a, vector float __b) {
+ return (vector float)(__a | ~(vector unsigned int)__b);
+}
+
+static __inline__ vector float __ATTRS_o_ai
+vec_orc(vector float __a, vector bool int __b) {
+  return (vector float)((vector unsigned int)__a | ~__b);
+}
+
 static __inline__ vector signed long long __ATTRS_o_ai
 vec_orc(vector signed long long __a, vector signed long long __b) {
   return __a | ~__b;
@@ -5896,6 +5918,16 @@ static __inline__ vector bool long long
 vec_orc(vector bool long long __a, vector bool long long __b) {
   return __a | ~__b;
 }
+
+static __inline__ vector double __ATTRS_o_ai
+vec_orc(vector double __a, vector bool long long __b) {
+  return (vector double)((vector unsigned long long)__a | ~__b);
+}
+
+static __inline__ vector double __ATTRS_o_ai
+vec_orc(vector bool long long __a, vector double __b) {
+  return (vector double)(__a | ~(vector unsigned long long)__b);
+}
 #endif
 
 /* vec_vor */

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c?rev=285439&r1=285438&r2=285439&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c Fri Oct 28 15:04:53 2016
@@ -1266,6 +1266,12 @@ void test1() {
 // CHECK-LE: [[T1:%.+]] = and <4 x i32>
 // CHECK-LE: xor <4 x i32> [[T1]], 
 
+  res_vf = vec_nand(vfa, vfa);
+// CHECK: [[T1:%.+]] = and <4 x i32>
+// CHECK: xor <4 x i32> [[T1]], 
+// CHECK-LE: [[T1:%.+]] = and <4 x i32>
+// CHECK-LE: xor <4 x i32> [[T1]], 
+
   res_vsll = vec_nand(vsll, vsll);
 // CHECK: [[T1:%.+]] = and <2 x i64>
 // CHECK: xor <2 x i64> [[T1]], 
@@ -1284,6 +1290,12 @@ void test1() {
 // CHECK-LE: [[T1:%.+]] = and <2 x i64>
 // CHECK-LE: xor <2 x i64> [[T1]], 
 
+  res_vd = vec_nand(vda, vda);
+// CHECK: [[T1:%.+]] = and <2 x i64>
+// CHECK: xor <2 x i64> [[T1]], 
+// CHECK-LE: [[T1:%.+]] = and <2 x i64>
+// CHECK-LE: xor <2 x i64> [[T1]], 
+
   /* vec_orc */
   res_vsc = vec_orc(vsc, vsc);
 // CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, 
@@ -1412,6 +1424,18 @@ void test1() {
 // CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, 
 // CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
 
+  res_vf = vec_orc(vbi, vfa);
+// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, 
+// CHECK: or <4 x i32> {{%.+}}, [[T1]]
+// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, 
+// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
+
+  res_vf = vec_orc(vfa, vbi);
+// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, 
+// CHECK: or <4 x i32> {{%.+}}, [[T1]]
+// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, 
+// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
+
   res_vsll = vec_orc(vsll, vsll);
 // CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, 
 // CHECK: or <2 x i64> {{%.+}}, [[T1]]
@@ -1452,6 +1476,18 @@ void test1() {
 // CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, 
 // CHECK: or <2 x i64> {{%.+}}, [[T1]]
 // CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, 
+// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
+
+  res_vd = vec_orc(vbll, vda);
+// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, 
+// CHECK: or <2 x i64> {{%.+}}, [[T1]]
+// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, 
+// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
+
+  res_vd = vec_orc(vda, v

r285623 - NFC - Reorder test case names in a PPC test case

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Mon Oct 31 14:02:54 2016
New Revision: 285623

URL: http://llvm.org/viewvc/llvm-project?rev=285623&view=rev
Log:
NFC - Reorder test case names in a PPC test case

A few recent commits have messed up the order of some tests
in a PPC test case. This just reorders them in a sensible way.

Modified:
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=285623&r1=285622&r2=285623&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Mon Oct 31 14:02:54 2016
@@ -700,6 +700,34 @@ vector unsigned short test54(void) {
 // CHECK-NEXT: ret <8 x i16>
   return vec_popcnt (vusa);
 }
+vector double test55(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+  return vec_insert_exp (vda,vulb);
+}
+vector double test56(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+  return vec_insert_exp (vula, vulb);
+}
+vector float test57(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+  return vec_insert_exp (vfa,vuib);
+}
+vector float test58(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+  return vec_insert_exp (vuia,vuib);
+}
 signed int test59(void) {
 // CHECK-BE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
 // CHECK-BE-NEXT: ret i32
@@ -775,31 +803,3 @@ vector unsigned __int128 test68(void) {
 // CHECK-NEXT: ret <1 x i128>
   return vec_parity_lsbb (vsi128a);
 }
-vector double test55(void) {
-// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
-// CHECK-BE-NEXT: ret <2 x double>
-// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
-// CHECK-NEXT: ret <2 x double>
-  return vec_insert_exp (vda,vulb);
-}
-vector double test56(void) {
-// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
-// CHECK-BE-NEXT: ret <2 x double>
-// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
-// CHECK-NEXT: ret <2 x double>
-  return vec_insert_exp (vula, vulb);
-}
-vector float test57(void) {
-// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
-// CHECK-BE-NEXT: ret <4 x float>
-// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
-// CHECK-NEXT: ret <4 x float>
-  return vec_insert_exp (vfa,vuib);
-}
-vector float test58(void) {
-// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
-// CHECK-BE-NEXT: ret <4 x float>
-// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
-// CHECK-NEXT: ret <4 x float>
-  return vec_insert_exp (vuia,vuib);
-}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285679 - [PPC] Add vec_absd functions to altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Nov  1 03:39:56 2016
New Revision: 285679

URL: http://llvm.org/viewvc/llvm-project?rev=285679&view=rev
Log:
[PPC] Add vec_absd functions to altivec.h

This patch corresponds to review https://reviews.llvm.org/D26073.
Committing on behalf of Sean Fertile.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=285679&r1=285678&r2=285679&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Tue Nov  1 03:39:56 2016
@@ -284,6 +284,11 @@ BUILTIN(__builtin_altivec_vpopcnth, "V8U
 BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "")
 BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "")
 
+// Absolute difference built-ins
+BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "")
+BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "")
+BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "")
+
 // VSX built-ins.
 
 BUILTIN(__builtin_vsx_lxvd2x, "V2divC*", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285679&r1=285678&r2=285679&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Tue Nov  1 03:39:56 2016
@@ -163,6 +163,26 @@ vec_abss(vector signed int __a) {
   __a, __builtin_altivec_vsubsws((vector signed int)(0), __a));
 }
 
+/* vec_absd */
+#if defined(__POWER9_VECTOR__)
+
+static __inline__ vector unsigned char __ATTRS_o_ai
+vec_absd(vector unsigned char __a, vector unsigned char __b) {
+  return __builtin_altivec_vabsdub(__a, __b);
+}
+
+static __inline__ vector unsigned short __ATTRS_o_ai
+vec_absd(vector unsigned short __a, vector unsigned short __b) {
+  return __builtin_altivec_vabsduh(__a, __b);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_absd(vector unsigned int __a,  vector unsigned int __b) {
+  return __builtin_altivec_vabsduw(__a, __b);
+}
+
+#endif /* End __POWER9_VECTOR__ */
+
 /* vec_add */
 
 static __inline__ vector signed char __ATTRS_o_ai

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=285679&r1=285678&r2=285679&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Tue Nov  1 03:39:56 2016
@@ -803,3 +803,19 @@ vector unsigned __int128 test68(void) {
 // CHECK-NEXT: ret <1 x i128>
   return vec_parity_lsbb (vsi128a);
 }
+
+vector unsigned char test69(void) {
+// CHECK-BE: call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> {{.+}}, <16 x 
i8> {{.+}})
+// CHECK: call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> {{.+}}, <16 x i8> 
{{.+}})
+  return vec_absd(vuca, vucb);
+}
+vector unsigned short test70(void) {
+// CHECK-BE: call <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16> {{.+}}, <8 x 
i16> {{.+}})
+// CHECK: call <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16> {{.+}}, <8 x i16> 
{{.+}})
+  return vec_absd(vusa, vusb);
+}
+vector unsigned int test71(void) {
+// CHECK-BE: call <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32> {{.+}}, <4 x 
i32> {{.+}})
+// CHECK: call <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32> {{.+}}, <4 x i32> 
{{.+}})
+  return vec_absd(vuia, vuib);
+}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26073: [PPC] Add vec_absd functions to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Committed revision 285679.
Sean, please close this review pending no buildbot failures.


https://reviews.llvm.org/D26073



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r285694 - [PowerPC] Implement vector shift builtins - clang portion

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Nov  1 09:46:20 2016
New Revision: 285694

URL: http://llvm.org/viewvc/llvm-project?rev=285694&view=rev
Log:
[PowerPC] Implement vector shift builtins - clang portion

This patch corresponds to review https://reviews.llvm.org/D26092.
Committing on behalf of Tony Jiang.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=285694&r1=285693&r2=285694&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Tue Nov  1 09:46:20 2016
@@ -289,6 +289,10 @@ BUILTIN(__builtin_altivec_vabsdub, "V16U
 BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "")
 BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "")
 
+// P9 Shift built-ins.
+BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "")
+BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "")
+
 // VSX built-ins.
 
 BUILTIN(__builtin_vsx_lxvd2x, "V2divC*", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285694&r1=285693&r2=285694&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Tue Nov  1 09:46:20 2016
@@ -7703,6 +7703,145 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
+#ifdef __VSX__
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_sld(vector bool long long __a, vector bool long long __b,
+unsigned const int __c) {
+  unsigned char __d = __c & 0x0F;
+#ifdef __LITTLE_ENDIAN__
+  return vec_perm(
+  __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d,
+   20 - __d, 21 - __d, 22 - __d, 23 - __d,
+   24 - __d, 25 - __d, 26 - __d, 27 - __d,
+   28 - __d, 29 - __d, 30 - __d, 31 - 
__d));
+#else
+  return vec_perm(
+  __a, __b,
+  (vector unsigned char)(__d, __d + 1, __d + 2, __d + 3, __d + 4, __d + 5,
+ __d + 6, __d + 7, __d + 8, __d + 9, __d + 10,
+ __d + 11, __d + 12, __d + 13, __d + 14, __d + 
15));
+#endif
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_sld(vector signed long long __a, vector signed long long __b,
+unsigned const int __c) {
+  unsigned char __d = __c & 0x0F;
+#ifdef __LITTLE_ENDIAN__
+  return vec_perm(
+  __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d,
+   20 - __d, 21 - __d, 22 - __d, 23 - __d,
+   24 - __d, 25 - __d, 26 - __d, 27 - __d,
+   28 - __d, 29 - __d, 30 - __d, 31 - 
__d));
+#else
+  return vec_perm(
+  __a, __b,
+  (vector unsigned char)(__d, __d + 1, __d + 2, __d + 3, __d + 4, __d + 5,
+ __d + 6, __d + 7, __d + 8, __d + 9, __d + 10,
+ __d + 11, __d + 12, __d + 13, __d + 14, __d + 
15));
+#endif
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_sld(vector unsigned long long __a, vector unsigned long long __b,
+unsigned const int __c) {
+  unsigned char __d = __c & 0x0F;
+#ifdef __LITTLE_ENDIAN__
+  return vec_perm(
+  __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d,
+   20 - __d, 21 - __d, 22 - __d, 23 - __d,
+   24 - __d, 25 - __d, 26 - __d, 27 - __d,
+   28 - __d, 29 - __d, 30 - __d, 31 - 
__d));
+#else
+  return vec_perm(
+  __a, __b,
+  (vector unsigned char)(__d, __d + 1, __d + 2, __d + 3, __d + 4, __d + 5,
+ __d + 6, __d + 7, __d + 8, __d + 9, __d + 10,
+ __d + 11, __d + 12, __d + 13, __d + 14, __d + 
15));
+#endif
+}
+
+static __inline__ vector double __ATTRS_o_ai vec_sld(vector double __a,
+ vector double __b,
+ unsigned const int __c) {
+  unsigned char __d = __c & 0x0F;
+#ifdef __LITTLE_ENDIAN__
+  return vec_perm(
+  __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d,
+   20 - __d, 21 - __d, 22 - __d, 23 - __d,
+   24 - __d, 25 - __d, 26 - __d, 27 - __d,
+   28 - __d, 29 - __d, 30 - __d, 31 - 
__d));
+#else
+  return vec_perm(
+ 

[PATCH] D26271: [PPC} add extract significand/ extract exponent/test data class for vector float and vector double -- clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

LGTM but I'll let @kbarton have a look and provide the final approval.




Comment at: lib/Headers/altivec.h:15629
+#define vec_test_data_class(__a, __b)  \
+_Generic((__a),\
+   vector float:   \

I don't know what happens if the type of the first argument is neither of the 
two types, but I think we should verify that something sane happens. Namely, 
some sort of overload resolution error message. 


Repository:
  rL LLVM

https://reviews.llvm.org/D26271



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26282: [PowerPC] Implement plain VSX load/store builtins.

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: lib/Headers/altivec.h:15618
+
+#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+static inline __ATTRS_o_ai vector signed __int128

Please move the __int128 overloads below the 64-bit ones to keep the overloads 
ordered by size.


https://reviews.llvm.org/D26282



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26308: [PowerPC] Add vector conversion builtins to altivec.h - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, echristo, kbarton, amehsan, syzaara, 
sfertile, jtony, lei.
nemanjai added a subscriber: cfe-commits.
nemanjai set the repository for this revision to rL LLVM.
Herald added a subscriber: mehdi_amini.

This patch adds the following interfaces:

vector double vec_double (vector signed long long);
vector double vec_double (vector unsigned long long);
vector double vec_doublee (vector signed int);
vector double vec_doublee (vector unsigned int);
vector double vec_doublee (vector float);
vector double vec_doubleh (vector signed int);
vector double vec_doubleh (vector unsigned int);
vector double vec_doubleh (vector float);
vector double vec_doublel (vector signed int);
vector double vec_doublel (vector unsigned int);
vector double vec_doublel (vector float);
vector double vec_doubleo (vector signed int);
vector double vec_doubleo (vector unsigned int);
vector double vec_doubleo (vector float);
vector float vec_float (vector signed int);
vector float vec_float (vector unsigned int);
vector float vec_float2 (vector signed long long, vector signed long long);
vector float vec_float2 (vector unsigned long long, vector unsigned long long);
vector float vec_float2 (vector double, vector double);
vector float vec_floate (vector signed long long);
vector float vec_floate (vector unsigned long long);
vector float vec_floate (vector double);
vector float vec_floato (vector signed long long);
vector float vec_floato (vector unsigned long long);
vector float vec_floato (vector double);
vector signed int vec_signed (vector float);
vector signed long long vec_signed (vector double);
vector signed int vec_signed2 (vector double, vector double);
vector signed int vec_signede (vector double);
vector signed int vec_signedo (vector double);
vector unsigned int vec_unsigned (vector float);
vector unsigned long long vec_unsigned (vector double);
vector unsigned int vec_unsigned2 (vector double, vector double);
vector unsigned int vec_unsignede (vector double);
vector unsigned int vec_unsignedo (vector double);


Repository:
  rL LLVM

https://reviews.llvm.org/D26308

Files:
  include/clang/Basic/BuiltinsPPC.def
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-altivec.c
  test/CodeGen/builtins-ppc-p8vector.c
  test/CodeGen/builtins-ppc-vsx.c

Index: test/CodeGen/builtins-ppc-vsx.c
===
--- test/CodeGen/builtins-ppc-vsx.c
+++ test/CodeGen/builtins-ppc-vsx.c
@@ -1081,6 +1081,380 @@
 // CHECK-LE: uitofp <2 x i64> %{{.*}} to <2 x double>
 // CHECK-LE: fmul <2 x double>
 
+  res_vsll = vec_signed(vd);
+// CHECK: fptosi <2 x double>
+// CHECK-LE: fptosi <2 x double>
+
+  res_vsi = vec_signed2(vd, vd);
+// CHECK: extractelement <2 x double>
+// CHECK: fptosi double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptosi double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptosi double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptosi double
+// CHECK: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptosi double
+// CHECK-LE: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptosi double
+// CHECK-LE: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptosi double
+// CHECK-LE: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptosi double
+// CHECK-LE: insertelement <4 x i32>
+
+  res_vsi = vec_signede(vd);
+// CHECK: @llvm.ppc.vsx.xvcvdpsxws(<2 x double>
+// CHECK-LE: @llvm.ppc.vsx.xvcvdpsxws(<2 x double>
+// CHECK-LE: sub nsw i32 16
+// CHECK-LE: sub nsw i32 17
+// CHECK-LE: sub nsw i32 18
+// CHECK-LE: sub nsw i32 31
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
+  res_vsi = vec_signedo(vd);
+// CHECK: @llvm.ppc.vsx.xvcvdpsxws(<2 x double>
+// CHECK: add nsw i32 {{[0-9a-zA-Z%.]+}}, 1
+// CHECK: add nsw i32 {{[0-9a-zA-Z%.]+}}, 2
+// CHECK: add nsw i32 {{[0-9a-zA-Z%.]+}}, 3
+// CHECK: add nsw i32 {{[0-9a-zA-Z%.]+}}, 15
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.vsx.xvcvdpsxws(<2 x double>
+
+  res_vull = vec_unsigned(vd);
+// CHECK: fptoui <2 x double>
+// CHECK-LE: fptoui <2 x double>
+
+  res_vui = vec_unsigned2(vd, vd);
+// CHECK: extractelement <2 x double>
+// CHECK: fptoui double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptoui double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptoui double
+// CHECK: insertelement <4 x i32>
+// CHECK: extractelement <2 x double>
+// CHECK: fptoui double
+// CHECK: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptoui double
+// CHECK-LE: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x double>
+// CHECK-LE: fptoui double
+// CHECK-LE: insertelement <4 x i32>
+// CHECK-LE: extractelement <2 x dou

[PATCH] D26304: [Power9] vector load/store with length - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Zaara, prior to committing this patch, can you write a test case that will 
actually use these builtins in an executable test case and confirm the results. 
We'll then run it on the simulator to ensure functional correctness.




Comment at: lib/Headers/altivec.h:38
 #define __ATTRS_o_ai __attribute__((__overloadable__, __always_inline__))
+#include 
 

I think size_t is only used for the load/store with length which are Power9 
specific. I think we should guard this include with that macro as well to avoid 
changing behaviour of existing code inadvertently.



Comment at: lib/Headers/altivec.h:2609
+vec_xl_len(signed char * __a, size_t __b) {
+  return (vector signed char)__builtin_vsx_lxvl(__a, (__b << 56));
+}

This is undefined behaviour in 32-bit mode. Please guard for 64-bit mode unless 
this is already in such a block.



Comment at: test/CodeGen/builtins-ppc-p9vector.c:29
 
+float af[4] = {23.4f, 56.7f, 89.0f, 12.3f};
+double ad[2] = {23.4, 56.7};

I don't think we need to initialize these. And if we keep the initialization, 
let's use the same formatting (i.e. left curly brace, space, list of 
initializers, space, right curly brace).



Comment at: test/CodeGen/builtins-ppc-p9vector.c:35
+  0,  1,  2,  3,  4,  5,  6,  7};
+signed short ass[8] = { -1, 2, -3, 4, -5, 6, -7, 8 };
+unsigned short aus[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };

Please select a naming scheme that does not lead to such unfortunate variable 
names.


https://reviews.llvm.org/D26304



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26304: [Power9] vector load/store with length - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: include/clang/Basic/BuiltinsPPC.def:304
 
+BUILTIN(__builtin_vsx_lxvl, "V4ivC*Ui", "")
+BUILTIN(__builtin_vsx_lxvll, "V4ivC*Ui", "")

Also, in addition to guarding for 64-bit, these should be defined to take the 
length parameter as a 64-bit integer.


https://reviews.llvm.org/D26304



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, kbarton, syzaara, lei, jtony, sfertile, 
amehsan.
nemanjai added subscribers: cfe-commits, echristo.
nemanjai set the repository for this revision to rL LLVM.

This adds the following signatures into altivec.h:

vector bool long long vec_mergee (vector bool long long, vector bool long long);
vector signed long long vec_mergee (vector signed long long, vector signed long 
long);
vector unsigned long long vec_mergee (vector unsigned long long, vector 
unsigned long long);
vector float vec_mergee (vector float, vector float);
vector double vec_mergee (vector double, vector double);
vector bool long long vec_mergeo (vector bool long long, vector bool long long);
vector signed long long vec_mergeo (vector signed long long, vector signed long 
long);
vector unsigned long long vec_mergeo (vector unsigned long long, vector 
unsigned long long);
vector double vec_mergeo (vector double, vector double);
vector float vec_mergeo (vector float, vector float);
vector unsigned short vec_pack_to_short_fp32 (vector float, vector float);
vector bool char vec_permxor (vector bool char, vector bool char, vector bool 
char);
vector unsigned char vec_permxor (vector signed char, vector signed char, 
vector signed char);
vector unsigned char vec_permxor (vector unsigned char, vector unsigned char, 
vector unsigned char);
vector unsigned int vec_rlmi (vector unsigned int, vector unsigned int, vector 
unsigned int);
vector unsigned long long vec_rlmi (vector unsigned long long, vector unsigned 
long long, vector unsigned long long);
vector unsigned int vec_rlnm (vector unsigned int, vector unsigned int, vector 
unsigned int);
vector double vec_unpackh (vector float);
vector double vec_unpackl (vector float);
vector float vec_pack (vector double, vector double);


Repository:
  rL LLVM

https://reviews.llvm.org/D26479

Files:
  include/clang/Basic/BuiltinsPPC.def
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-crypto.c
  test/CodeGen/builtins-ppc-p8vector.c
  test/CodeGen/builtins-ppc-p9vector.c

Index: test/CodeGen/builtins-ppc-p9vector.c
===
--- test/CodeGen/builtins-ppc-p9vector.c
+++ test/CodeGen/builtins-ppc-p9vector.c
@@ -827,4 +827,101 @@
 // CHECK-NEXT: ret <16 x i8>
   return vec_srv (vuca, vucb);
 }
-
+vector unsigned short test74(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK-BE: @llvm.ppc.altivec.vperm
+// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK: @llvm.ppc.altivec.vperm
+  return vec_pack_to_short_fp32(vfa, vfb);
+}
+vector unsigned int test75(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrlwmi(<4 x i32
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vrlwmi(<4 x i32
+// CHECK-NEXT: ret <4 x i32>
+  return vec_rlmi(vuia, vuia, vuia);
+}
+vector unsigned long long test76(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrldmi(<2 x i64
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vrldmi(<2 x i64
+// CHECK-NEXT: ret <2 x i64>
+  return vec_rlmi(vula, vula, vula);
+}
+vector unsigned int test77(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32
+// CHECK-BE: and <4 x i32
+// CHECK-BE: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32
+// CHECK: and <4 x i32
+// CHECK: ret <4 x i32>
+  return vec_rlnm(vuia, vuia, vuia);
+}
+vector unsigned long long test78(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64
+// CHECK-BE: and <2 x i64
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64
+// CHECK: and <2 x i64
+// CHECK-NEXT: ret <2 x i64>
+  return vec_rlnm(vula, vula, vula);
+}
+vector double test79(void) {
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+  return vec_unpackh(vfa);
+}
+vector double test80(void) {
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+  return vec_unpackl(vfa);
+}
+vector double test81(void) {
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrun

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D26479#591723, @amehsan wrote:

> more context?


Really sorry. It appears that I uploaded the wrong patch file. Updating now.


Repository:
  rL LLVM

https://reviews.llvm.org/D26479



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 77494.
nemanjai added a comment.

Accidentally uploaded the wrong patch so it was missing full context.


Repository:
  rL LLVM

https://reviews.llvm.org/D26479

Files:
  include/clang/Basic/BuiltinsPPC.def
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-crypto.c
  test/CodeGen/builtins-ppc-p8vector.c
  test/CodeGen/builtins-ppc-p9vector.c

Index: test/CodeGen/builtins-ppc-p9vector.c
===
--- test/CodeGen/builtins-ppc-p9vector.c
+++ test/CodeGen/builtins-ppc-p9vector.c
@@ -827,4 +827,101 @@
 // CHECK-NEXT: ret <16 x i8>
   return vec_srv (vuca, vucb);
 }
-
+vector unsigned short test74(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK-BE: @llvm.ppc.altivec.vperm
+// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
+// CHECK: @llvm.ppc.altivec.vperm
+  return vec_pack_to_short_fp32(vfa, vfb);
+}
+vector unsigned int test75(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrlwmi(<4 x i32
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vrlwmi(<4 x i32
+// CHECK-NEXT: ret <4 x i32>
+  return vec_rlmi(vuia, vuia, vuia);
+}
+vector unsigned long long test76(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrldmi(<2 x i64
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vrldmi(<2 x i64
+// CHECK-NEXT: ret <2 x i64>
+  return vec_rlmi(vula, vula, vula);
+}
+vector unsigned int test77(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32
+// CHECK-BE: and <4 x i32
+// CHECK-BE: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32
+// CHECK: and <4 x i32
+// CHECK: ret <4 x i32>
+  return vec_rlnm(vuia, vuia, vuia);
+}
+vector unsigned long long test78(void) {
+// CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64
+// CHECK-BE: and <2 x i64
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64
+// CHECK: and <2 x i64
+// CHECK-NEXT: ret <2 x i64>
+  return vec_rlnm(vula, vula, vula);
+}
+vector double test79(void) {
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+  return vec_unpackh(vfa);
+}
+vector double test80(void) {
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK-BE: extractelement <4 x float>
+// CHECK-BE: fpext float
+// CHECK-BE: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+// CHECK: extractelement <4 x float>
+// CHECK: fpext float
+// CHECK: insertelement <2 x double>
+  return vec_unpackl(vfa);
+}
+vector double test81(void) {
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK: extractelement <2 x double>
+  // CHECK: fptrunc double
+  // CHECK: insertelement <4 x float>
+  // CHECK-LE: extractelement <2 x double>
+  // CHECK-LE: fptrunc double
+  // CHECK-LE: insertelement <4 x float>
+  // CHECK-LE: extractelement <2 x double>
+  // CHECK-LE: fptrunc double
+  // CHECK-LE: insertelement <4 x float>
+  // CHECK-LE: extractelement <2 x double>
+  // CHECK-LE: fptrunc double
+  // CHECK-LE: insertelement <4 x float>
+  // CHECK-LE: extractelement <2 x double>
+  // CHECK-LE: fptrunc double
+  // CHECK-LE: insertelement <4 x float>
+  return vec_pack(vda, vdb);
+}
Index: test/CodeGen/builtins-ppc-p8vector.c
===
--- test/CodeGen/builtins-ppc-p8vector.c
+++ test/CodeGen/builtins-ppc-p8vector.c
@@ -136,6 +136,26 @@
 // CHECK-LE: @llvm.ppc.altivec.vperm
 // CHECK-PPC: warning: implicit declaration of function 'vec_mergee'
 
+  res_vbll = vec_mergee(vbll, vbll);
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
+  res_vsll = vec_mergee(vsll, vsll);
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
+  res_vull = vec_mergee(vull, vull);
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
+  res_vf = vec_mergee(vfa, vfa);
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
+  res_vd = vec_mergee(vda, vda);
+// CHECK: @llvm.ppc.altivec.vperm
+// CHECK-LE: @llvm.ppc.altivec.vperm
+
   /* vec_mergeo */
   res_vbi = vec_mergeo(vbi, vbi);
 // CHECK: @llvm.ppc.altivec.vperm
Index: test/CodeGen/builtins-ppc-crypto.c
===

r286627 - [PowerPC] Add vector conversion builtins to altivec.h - clang portion

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Nov 11 13:56:17 2016
New Revision: 286627

URL: http://llvm.org/viewvc/llvm-project?rev=286627&view=rev
Log:
[PowerPC] Add vector conversion builtins to altivec.h - clang portion

This patch corresponds to review:
https://reviews.llvm.org/D26308

It adds a number of vector type conversion builtins to altivec.h.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=286627&r1=286626&r2=286627&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Fri Nov 11 13:56:17 2016
@@ -380,6 +380,16 @@ BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d",
 BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "")
 BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "")
 
+// Conversion builtins
+BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "")
+BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "")
+BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "")
+BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "")
+BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "")
+BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "")
+BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "")
+BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "")
+
 // HTM builtins
 BUILTIN(__builtin_tbegin, "UiUIi", "")
 BUILTIN(__builtin_tend, "UiUIi", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=286627&r1=286626&r2=286627&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Fri Nov 11 13:56:17 2016
@@ -2732,20 +2732,284 @@ vec_vctuxs(vector float __a, int __b) {
   return __builtin_altivec_vctuxs(__a, __b);
 }
 
+/* vec_signed */
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_sld(vector signed int, vector signed int, unsigned const int __c);
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_signed(vector float __a) {
+  return __builtin_convertvector(__a, vector signed int);
+}
+
+#ifdef __VSX__
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_signed(vector double __a) {
+  return __builtin_convertvector(__a, vector signed long long);
+}
+
+static __inline__ vector signed int __attribute__((__always_inline__))
+vec_signed2(vector double __a, vector double __b) {
+  return (vector signed int) { __a[0], __a[1], __b[0], __b[1] };
+}
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_signede(vector double __a) {
+#ifdef __LITTLE_ENDIAN__
+  vector signed int __ret = __builtin_vsx_xvcvdpsxws(__a);
+  return vec_sld(__ret, __ret, 12);
+#else
+  return __builtin_vsx_xvcvdpsxws(__a);
+#endif
+}
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_signedo(vector double __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_vsx_xvcvdpsxws(__a);
+#else
+  vector signed int __ret = __builtin_vsx_xvcvdpsxws(__a);
+  return vec_sld(__ret, __ret, 12);
+#endif
+}
+#endif
+
+/* vec_unsigned */
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_sld(vector unsigned int, vector unsigned int, unsigned const int __c);
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_unsigned(vector float __a) {
+  return __builtin_convertvector(__a, vector unsigned int);
+}
+
+#ifdef __VSX__
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_unsigned(vector double __a) {
+  return __builtin_convertvector(__a, vector unsigned long long);
+}
+
+static __inline__ vector unsigned int __attribute__((__always_inline__))
+vec_unsigned2(vector double __a, vector double __b) {
+  return (vector unsigned int) { __a[0], __a[1], __b[0], __b[1] };
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_unsignede(vector double __a) {
+#ifdef __LITTLE_ENDIAN__
+  vector unsigned int __ret = __builtin_vsx_xvcvdpuxws(__a);
+  return vec_sld(__ret, __ret, 12);
+#else
+  return __builtin_vsx_xvcvdpuxws(__a);
+#endif
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_unsignedo(vector double __a) {
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_vsx_xvcvdpuxws(__a);
+#else
+  vector unsigned int __ret = __builtin_vsx_xvcvdpuxws(__a);
+  return vec_sld(__ret, __ret, 12);
+#endif
+}
+#endif
+
+/* vec_float */
+
+static __inline__ vector float __ATTRS_o_ai
+vec_sld(vector float, vector float, unsigned const int __c);
+
+static __inline__ vector float __ATTRS_o_ai
+vec_float(vector signed int __a) {
+  return __builtin_convertvector(__a, vector float);
+}
+
+static __inline__ vector float __ATTRS_o_ai
+vec_float(vector unsigned int __a) {
+  return __builtin_convertvector(__a, vector float);
+}
+
+#ifdef 

[PATCH] D26308: [PowerPC] Add vector conversion builtins to altivec.h - clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 286627.


Repository:
  rL LLVM

https://reviews.llvm.org/D26308



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: include/clang/Basic/BuiltinsPPC.def:385-388
+BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "")

sfertile wrote:
> A minor quibble: we have the __builtin_altivec_* functions added after the 
> vsx builtins, rather than with the rest of the altivec builtins.
Good point. Thanks Sean. I'll move them on the commit.


Repository:
  rL LLVM

https://reviews.llvm.org/D26479



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r286650 - [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Nov 11 16:34:44 2016
New Revision: 286650

URL: http://llvm.org/viewvc/llvm-project?rev=286650&view=rev
Log:
[PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

This patch corresponds to review:
https://reviews.llvm.org/D26479

It adds the remaining vector permute/rotate builtins to altivec.h.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-crypto.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=286650&r1=286649&r2=286650&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Fri Nov 11 16:34:44 2016
@@ -293,6 +293,12 @@ BUILTIN(__builtin_altivec_vabsduw, "V4Ui
 BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "")
 BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "")
 
+// P9 Vector rotate built-ins
+BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "")
+
 // VSX built-ins.
 
 BUILTIN(__builtin_vsx_lxvd2x, "V2divC*", "")
@@ -390,6 +396,8 @@ BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2S
 BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "")
 BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "")
 
+BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "")
+
 // HTM builtins
 BUILTIN(__builtin_tbegin, "UiUIi", "")
 BUILTIN(__builtin_tend, "UiUIi", "")

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=286650&r1=286649&r2=286650&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Fri Nov 11 16:34:44 2016
@@ -4815,6 +4815,34 @@ vec_mergee(vector unsigned int __a, vect
  0x18, 0x19, 0x1A, 0x1B));
 }
 
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_mergee(vector bool long long __a, vector bool long long __b) {
+  return vec_mergeh(__a, __b);
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_mergee(vector signed long long __a, vector signed long long __b) {
+  return vec_mergeh(__a, __b);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_mergee(vector unsigned long long __a, vector unsigned long long __b) {
+  return vec_mergeh(__a, __b);
+}
+
+static __inline__ vector float __ATTRS_o_ai
+vec_mergee(vector float __a, vector float __b) {
+  return vec_perm(__a, __b,
+  (vector unsigned char)(0x00, 0x01, 0x02, 0x03, 0x10, 0x11,
+ 0x12, 0x13, 0x08, 0x09, 0x0A, 0x0B,
+ 0x18, 0x19, 0x1A, 0x1B));
+}
+
+static __inline__ vector double __ATTRS_o_ai
+vec_mergee(vector double __a, vector double __b) {
+  return vec_mergeh(__a, __b);
+}
+
 /* vec_mergeo */
 
 static __inline__ vector bool int __ATTRS_o_ai vec_mergeo(vector bool int __a,
@@ -4841,6 +4869,34 @@ vec_mergeo(vector unsigned int __a, vect
  0x1C, 0x1D, 0x1E, 0x1F));
 }
 
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_mergeo(vector bool long long __a, vector bool long long __b) {
+  return vec_mergel(__a, __b);
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_mergeo(vector signed long long __a, vector signed long long __b) {
+  return vec_mergel(__a, __b);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_mergeo(vector unsigned long long __a, vector unsigned long long __b) {
+  return vec_mergel(__a, __b);
+}
+
+static __inline__ vector float __ATTRS_o_ai
+vec_mergeo(vector float __a, vector float __b) {
+  return vec_perm(__a, __b,
+  (vector unsigned char)(0x04, 0x05, 0x06, 0x07, 0x14, 0x15,
+ 0x16, 0x17, 0x0C, 0x0D, 0x0E, 0x0F,
+ 0x1C, 0x1D, 0x1E, 0x1F));
+}
+
+static __inline__ vector double __ATTRS_o_ai
+vec_mergeo(vector double __a, vector double __b) {
+  return vec_mergel(__a, __b);
+}
+
 #endif
 
 /* vec_mfvscr */
@@ -6548,8 +6604,25 @@ vec_pack(vector bool long long __a, vect
 #endif
 }
 
+static __inline__ vector float __ATTRS_o_ai
+vec_pack(vector double __a, vector double __b) {
+  return (vector float) (__a[0], __a[1], __b[0], __b[1]);
+}
 #endif
 
+#ifdef __POWER9_VECTOR__
+static __inline__ vector unsigned short __ATTRS_o_ai
+vec_pack_to_short_fp32(vector float __a, vector float __b) {
+  vector float __resa = __builtin_vsx_xvcvsphp(__a);
+  vector float __resb = __

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 286650.


Repository:
  rL LLVM

https://reviews.llvm.org/D26479



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: lib/Headers/altivec.h:12014
+#define vec_insert4b(__a, __b, __c) \
+  ((vector unsigned char)__builtin_vsx_xxinsertw((__a), (__b), (__c) & 0xF))
+#endif

As far as I can tell by looking at this patch and the corresponding back end 
patch, the `__a` argument will have a word inserted into it and it will be 
returned.

Is that the semantics that the ABI specifies (I can't seem to make sense of the 
description).

```
vector unsigned int a = { 0x, 0xBB, 0xCC, 0xDD };
vector unsigned char b = (vector unsigned char) 0xFF;
vector unsigned char c = vec_insert4b(a, b, 4);
// Do we expect vector c to be:
// { 0xAA, 0xAA, 0xAA, 0xAA, 0xFF, 0xFF, 0xFF, 0xFF, 0xCC, 0xCC, 0xCC, 0xCC, 
0xDD, 0xDD, 0xDD, 0xDD }
```


Repository:
  rL LLVM

https://reviews.llvm.org/D26546



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: lib/Headers/altivec.h:11908
+#define vec_extract4b(__a, __b)
\
+   vec_reve((vector unsigned long long)
\
+__builtin_vsx_xxextractuw((__a), (12 - (__b & 0xF

I find it difficult to follow and understand this logic when it's in the header.
What I'd prefer to see here is that the macro simply expands into 
`__builtin_vsx_xxextractuw` and then handle all this logic in the code that 
emits an intrinsic call.
Namely if the target is little endian, we adjust the parameter, emit the 
intrinsic call and finally emit a shufflevector.


Repository:
  rL LLVM

https://reviews.llvm.org/D26546



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26544: [PPC] support for arithmetic builtins in the FE

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: lib/Headers/altivec.h:314
+  vector signed int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __mask);
+}

I don't understand why we're adding `__mask` to the sum of `__a` and `__b`. 
Shouldn't that be `__carry`?



Comment at: lib/Headers/altivec.h:322
+  vector unsigned int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __mask);
+}

Same comment as above.



Comment at: lib/Headers/altivec.h:349
+unsigned int __tempc = (unsigned int) __c[i];
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;

Is it not a little cleaner and more readable to just mask out the `__c` 
parameter before the loop (similarly to the masking you've done with `__mask` 
above)?



Comment at: lib/Headers/altivec.h:350
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;
+unsigned long long __longb = (unsigned long long) __tempb;

I think it's a little more clear and obvious what is happening if you actually 
have just a single cast and mask - i.e.
``` unsigned long long __longa = ((unsigned long long) __a[i]) & 0x;```


https://reviews.llvm.org/D26544



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, kbarton, wschmidt, amehsan, seurer.
nemanjai added subscribers: cfe-commits, echristo.
nemanjai set the repository for this revision to rL LLVM.
Herald added a subscriber: nemanjai.

This patch introduces the following builtins:
unsigned int vec_first_match_index (vector signed char, vector signed char);
unsigned int vec_first_match_index (vector unsigned char, vector unsigned char);
unsigned int vec_first_match_index (vector signed int, vector signed int);
unsigned int vec_first_match_index (vector unsigned int, vector unsigned int);
unsigned int vec_first_match_index (vector signed short, vector signed short);
unsigned int vec_first_match_index (vector unsigned short, vector unsigned 
short);
unsigned int vec_first_match_or_eos_index (vector signed char, vector signed 
char);
unsigned int vec_first_match_or_eos_index (vector unsigned char, vector 
unsigned char);
unsigned int vec_first_match_or_eos_index (vector signed int, vector signed 
int);
unsigned int vec_first_match_or_eos_index (vector unsigned int, vector unsigned 
int);
unsigned int vec_first_match_or_eos_index (vector signed short, vector signed 
short);
unsigned int vec_first_match_or_eos_index (vector unsigned short, vector 
unsigned short);
unsigned int vec_first_mismatch_index (vector signed char, vector signed char);
unsigned int vec_first_mismatch_index (vector unsigned char, vector unsigned 
char);
unsigned int vec_first_mismatch_index (vector signed int, vector signed int);
unsigned int vec_first_mismatch_index (vector unsigned int, vector unsigned 
int);
unsigned int vec_first_mismatch_index (vector signed short, vector signed 
short);
unsigned int vec_first_mismatch_index (vector unsigned short, vector unsigned 
short);
unsigned int vec_first_mismatch_or_eos_index (vector signed char, vector signed 
char);
unsigned int vec_first_mismatch_or_eos_index (vector unsigned char, vector 
unsigned char);
unsigned int vec_first_mismatch_or_eos_index (vector signed int, vector signed 
int);
unsigned int vec_first_mismatch_or_eos_index (vector unsigned int, vector 
unsigned int);
unsigned int vec_first_mismatch_or_eos_index (vector signed short, vector 
signed short);
unsigned int vec_first_mismatch_or_eos_index (vector unsigned short, vector 
unsigned short);
vector bool char vec_cmpne (vector bool char, vector bool char);
vector bool char vec_cmpne (vector signed char, vector signed char);
vector bool char vec_cmpne (vector unsigned char, vector unsigned char);
vector bool int vec_cmpne (vector bool int, vector bool int);
vector bool int vec_cmpne (vector signed int, vector signed int);
vector bool int vec_cmpne (vector unsigned int, vector unsigned int);
vector bool long long vec_cmpne (vector bool long long, vector bool long long);
vector bool long long vec_cmpne (vector signed long long, vector signed long 
long);
vector bool long long vec_cmpne (vector unsigned long long, vector unsigned 
long long);
vector bool short vec_cmpne (vector bool short, vector bool short);
vector bool short vec_cmpne (vector signed short, vector signed short);
vector bool short vec_cmpne (vector unsigned short, vector unsigned short);
vector bool long long vec_cmpne (vector double, vector double);
vector bool int vec_cmpne (vector float, vector float);
vector signed char vec_cnttz (vector signed char);
vector unsigned char vec_cnttz (vector unsigned char);
vector signed int vec_cnttz (vector signed int);
vector unsigned int vec_cnttz (vector unsigned int);
vector signed long long vec_cnttz (vector signed long long);
vector unsigned long long vec_cnttz (vector unsigned long long);
vector signed short vec_cnttz (vector signed short);
vector unsigned short vec_cnttz (vector unsigned short);
vector unsigned char vec_popcnt (vector signed char);
vector unsigned char vec_popcnt (vector unsigned char);
vector unsigned int vec_popcnt (vector signed int);
vector unsigned int vec_popcnt (vector unsigned int);
vector unsigned long long vec_popcnt (vector signed long long);
vector unsigned long long vec_popcnt (vector unsigned long long);
vector unsigned short vec_popcnt (vector signed short);
vector unsigned short vec_popcnt (vector unsigned short);

Repository:
  rL LLVM

https://reviews.llvm.org/D24397

Files:
  include/clang/Basic/BuiltinsPPC.def
  include/clang/Driver/Options.td
  lib/Basic/Targets.cpp
  lib/CodeGen/CGBuiltin.cpp
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-p9vector.c

Index: test/CodeGen/builtins-ppc-p9vector.c
===
--- test/CodeGen/builtins-ppc-p9vector.c
+++ test/CodeGen/builtins-ppc-p9vector.c
@@ -0,0 +1,748 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
+// RUN:   -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN:   -O2 -o - | FileCheck %s -check-prefix=CHECK-BE
+
+// RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
+// RUN:   -triple p

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Looking over the patch, I realized that I forgot to add a test case for the 
__POWER9_VECTOR__ macro and the builtins that target the record forms of the 
instructions. I'll add those on the next revision along with addressing any 
review comments.


Repository:
  rL LLVM

https://reviews.llvm.org/D24397



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: lib/Basic/TargetInfo.cpp:231
@@ +230,3 @@
+if (hasFloat128Type() &&
+&getFloat128Format() == &llvm::APFloat::IEEEquad)
+  return Float128;

hubert.reinterpretcast wrote:
> Is it necessary to check that `__float128` is IEEE quad here? Unlike the long 
> double cases, `__float128` really better be 128 bits.
It would indeed be weird if it wasn't so. I can remove the second condition in 
that if.


Comment at: lib/Sema/SemaExpr.cpp:1169
@@ +1168,3 @@
+  if (LHSElemType == S.Context.Float128Ty &&
+  RHSElemType == S.Context.LongDoubleTy)
+return true;

hubert.reinterpretcast wrote:
> I do not believe that the width of `long double` is sufficiently established 
> to be the same as that of `__float128` in this context.
This would certainly cause any attempts to convert between some different 
implementation of **`long double` **(i.e. the Intel 80-bit type). I believe 
that this behaviour is desired in all cases where **`long double`** and 
**`double`** have a different representation. Namely, we do not currently have 
any support for converting between **`fp128`** and anything that has precision 
>= **`double`** that is not actually **`double`**.

What I propose to do here and in other locations where we diagnose conversions 
between the two types is that the check is:
- One type is `__float128`
- The other is `long double`
- The representation of `long double` is not `llvm::APFloat::IEEEdouble`

Basically in this function, the early exit path would be:
- representations are the same or
- representation of `long double` is `llvm::APFloat::IEEEdouble`


Comment at: lib/Sema/SemaExpr.cpp:1341
@@ +1340,3 @@
+  // Diagnose builtin types that have the same size and different 
representation
+  // as conversions between such type currently can't be handled.
+  if (sameWidthDifferentRepresentation(*this, LHSType, RHSType))

hubert.reinterpretcast wrote:
> s/such type/such types;
Oops, I dropped the s. I'll fix it.


Comment at: lib/Sema/SemaOverload.cpp:1655
@@ -1654,1 +1654,3 @@
   } else if (FromType->isRealFloatingType() && ToType->isRealFloatingType()) {
+// FIXME: disable conversions between long double and __float128 if
+// their representation is different until there is back end support

hubert.reinterpretcast wrote:
> Is conversion between `long double` and `__float128` the correct 
> characterization of the missing back-end support? (as opposed to conversion 
> between `PPCDoubleDouble` and `IEEEquad`)
Well, the same issue exists with `x86_fp80`. We don't have libcalls set up for 
handling that either. Of course the intended semantics and the comment are 
still not quite correct here. Really, what I think we should be after is 
catching attempts to convert between `__float128` and `long double` on targets 
where `long double` is not actually just `double`.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 49508.
nemanjai added a comment.

Removed questionable macro definitions.
Renamed the test function for invalid conversions and changed the semantics so 
that it allows __float128 <-> long double conversions only if the two types 
have the same representation or the latter has the same representation as 
double.
Removed unnecessary check for the representation of __float128 when returning a 
float type of width 128.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/Format/FormatToken.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaExprCXX.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Preprocessor/init.c
  test/Sema/128bitfloat.cpp
  test/Sema/float128-ld-incompatibility.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -466,6 +467,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/float128-ld-incompatibility.cpp
===
--- test/Sema/float128-ld-incompatibility.cpp
+++ test/Sema/float128-ld-incompatibility.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 \
+// RUN: -triple powerpc64le-unknown-linux-gnu -target-cpu pwr8 \
+// RUN: -target-feature +float128 %s
+
+__float128 qf();
+long double ldf();
+
+// FIXME: once operations between long double and __float128 are implemented for
+//targets where the types are different, these next two will change
+long double ld{qf()}; // expected-error {{cannot initialize a variable of type 'long double' with an rvalue of type '__float128'}}
+__float128 q{ldf()};  // expected-error {{cannot initialize a variable of type '__float128' with an rvalue of type 'long double'}}
+
+auto test1(__float128 q, long double ld) -> decltype(q + ld) { // expected-error {{invalid operands to binary expression ('__float128' and 'long double')}}
+  return q + ld;  // ex

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: lib/Sema/SemaOverload.cpp:1658
@@ -1657,1 +1657,3 @@
   } else if (FromType->isRealFloatingType() && ToType->isRealFloatingType()) {
+// FIXME: disable conversions between long double and __float128 if
+// their representation is different until there is back end support

hubert.reinterpretcast wrote:
> The update to check the case where the representation of `long double` is the 
> same as that of `double` is missing.
Yes, I missed this. Thanks for noticing. I'll update the comment and change the 
body of the if to:

if (&S.Context.getFloatTypeSemantics(FromType) !=
&S.Context.getFloatTypeSemantics(ToType)) {
  bool Float128AndLongDouble = ((FromType == S.Context.Float128Ty &&
ToType == S.Context.LongDoubleTy) ||
   (FromType == S.Context.LongDoubleTy &&
ToType == S.Context.Float128Ty));
  if (Float128AndLongDouble &&
  (&S.Context.getFloatTypeSemantics(S.Context.LongDoubleTy) !=
   &llvm::APFloat::IEEEdouble))
return false;
}


Comment at: lib/Sema/SemaOverload.cpp:1966-1967
@@ -1955,4 +1965,4 @@
   // C99 6.3.1.5p1:
   //   When a float is promoted to double or long double, or a
   //   double is promoted to long double [...].
   if (!getLangOpts().CPlusPlus &&

hubert.reinterpretcast wrote:
> @rsmith; this is the discussion on floating-point "promotions" in "C" that I 
> was asking you about.
I can certainly remove this if the agreement is that I should do so.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D17816: [PPC] FE support for generating VSX [negated] absolute value instructions

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: lib/Headers/altivec.h:136
@@ -131,3 +135,3 @@
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
 static vector double __ATTRS_o_ai vec_abs(vector double __a) {

I thought we were going to change the guard here to __VSX__ rather than 
__POWER8_VECTOR.


Comment at: test/CodeGen/builtins-ppc-altivec.c:3
@@ +2,3 @@
+// RUN: %clang_cc1 -faltivec -triple powerpc-unknown-unknown -emit-llvm %s \
+// RUN: -o - | FileCheck %s
+// RUN: %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s \

Just a minor nit. Please indent the continuation lines for readability.


Comment at: test/CodeGen/builtins-ppc-altivec.c:8
@@ +7,3 @@
+// RUN:  -o - | FileCheck %s -check-prefix=CHECK-LE
+// RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN: -o - 2>&1 | FileCheck %s -check-prefix=CHECK-NOALTIVEC

I would have thought that we already have a diagnostic test case for the 
missing -faltivec, but if we don't, thanks for adding it.


Comment at: test/CodeGen/builtins-ppc-altivec.c:84
@@ +83,3 @@
+// CHECK-LE: store <4 x float> %{{.*}}, <4 x float>* @vf
+// CHECK-NOALTIVEC: error: use of undeclared identifier 'vf'
+// CHECK-NOALTIVEC: vf = vec_abs(vf) 

I am not recommending you change anything here, just want to point out that 
there's a potential concern with adding diagnostic test cases in with 
functional ones (and yes, I know we have lots of this already). Namely, the 
concern is that the diagnostic may go away as we add more code to the test case 
and the particular error you're looking for goes past the error threshold (I 
think the default is 20 errors).


Comment at: test/CodeGen/builtins-ppc-p8vector.c:76
@@ -75,5 +75,3 @@
   res_vd = vec_abs(vda);
-// CHECK: store <2 x i64> , 
<2 x i64>*
-// CHECK: and <2 x i64>
-// CHECK-LE: store <2 x i64> , <2 x i64>*
-// CHECK-LE: and <2 x i64>
+// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK: store <2 x double> %{{.*}}, <2 x double>* @res_vd

I think that without asserts, clang sometimes gives temporary variables names 
rather than numbers. I'd recommend getting rid of the regex for the argument to 
@llvm.fabs.* so that you don't get into a weird situation where some build bot 
somewhere fails due to this change.


http://reviews.llvm.org/D17816



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D17816: [PPC] FE support for generating VSX [negated] absolute value instructions

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

All of my comments are just nits and shouldn't hold up approval. As far as I 
can tell this looks fine, but I'll let the LGTM come from Kit or Hal.



Comment at: lib/Headers/altivec.h:136
@@ -131,3 +135,3 @@
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
 static vector double __ATTRS_o_ai vec_abs(vector double __a) {

amehsan wrote:
> nemanjai wrote:
> > I thought we were going to change the guard here to __VSX__ rather than 
> > __POWER8_VECTOR.
> I want to go through the file separately, check for similar inaccuracies, and 
> fix everything of that kind in one separate commit. This may also require 
> moving test cases between different files. So I do not want to mix it with 
> another submission.
That would be great! Thank you.


Comment at: test/CodeGen/builtins-ppc-altivec.c:84
@@ +83,3 @@
+// CHECK-LE: store <4 x float> %{{.*}}, <4 x float>* @vf
+// CHECK-NOALTIVEC: error: use of undeclared identifier 'vf'
+// CHECK-NOALTIVEC: vf = vec_abs(vf) 

amehsan wrote:
> nemanjai wrote:
> > I am not recommending you change anything here, just want to point out that 
> > there's a potential concern with adding diagnostic test cases in with 
> > functional ones (and yes, I know we have lots of this already). Namely, the 
> > concern is that the diagnostic may go away as we add more code to the test 
> > case and the particular error you're looking for goes past the error 
> > threshold (I think the default is 20 errors).
> Would it address your concern if I add "-ferror-limit 0" to the command line?
I think that's a great idea and good general guidance for test cases of this 
type. BTW, no need to post another review for this - just change it in the 
commit once this patch is approved.


Comment at: test/CodeGen/builtins-ppc-p8vector.c:76
@@ -75,5 +75,3 @@
   res_vd = vec_abs(vda);
-// CHECK: store <2 x i64> , 
<2 x i64>*
-// CHECK: and <2 x i64>
-// CHECK-LE: store <2 x i64> , <2 x i64>*
-// CHECK-LE: and <2 x i64>
+// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK: store <2 x double> %{{.*}}, <2 x double>* @res_vd

amehsan wrote:
> nemanjai wrote:
> > I think that without asserts, clang sometimes gives temporary variables 
> > names rather than numbers. I'd recommend getting rid of the regex for the 
> > argument to @llvm.fabs.* so that you don't get into a weird situation where 
> > some build bot somewhere fails due to this change.
> That pattern is used in other tests. (You can see that in the one right above 
> this one.) But I am fine with changing it to a more general regex like 
> {{.*}}. (I can also remove it but I really wanted to close the parenthesis :)
I see what you mean, it's in the previous CHECK pattern. You should be safe 
keeping this in. However, I'd recommend that you try a build without asserts 
(especially for FE changes) just to make sure things don't behave differently. 
The only reason I bring it up is because I've been burned by that before :).


http://reviews.llvm.org/D17816



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai updated the summary for this revision.
nemanjai updated this revision to Diff 44459.
nemanjai added a comment.

Addressed the review comments:

- Added the requested test cases
- Disabled promotion of long double to __float128
- Disabled operations between long double and __float128 if they have different 
representations


Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/Format/FormatToken.cpp
  lib/Frontend/InitPreprocessor.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Preprocessor/init.c
  test/Sema/128bitfloat.cpp
  test/Sema/float128-ld-incompatibility.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -466,6 +467,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/float128-ld-incompatibility.cpp
===
--- test/Sema/float128-ld-incompatibility.cpp
+++ test/Sema/float128-ld-incompatibility.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 \
+// RUN: -triple powerpc64le-unknown-linux-gnu -target-cpu pwr7 \
+// RUN: -target-feature +float128 %s
+
+__float128 qf();
+long double ldf();
+
+long double ld{qf()}; // expected-error {{non-constant-expression cannot be narrowed from type '__float128' to 'long double' in initializer list}} \
+ expected-note {{insert an explicit cast to silence this issue}}
+__float128 q{ldf()};  // passes
+
+auto test1(__float128 q, long double ld) -> decltype(q + ld) { // expected-error {{invalid operands to binary expression ('__float128' and 'long double')}}
+  return q + ld;  // expected-error {{invalid operands to binary expression ('__float128' and 'long double')}}
+}
+
+auto test2(long double a, __float128 b) -> decltype(a + b) { // expected-error {{invalid operands to binary expression ('long double' and '__float128')}}
+  return a + b;   

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 45998.
nemanjai added a comment.

Addressed review comments.
The key differences are:

- No assignments or operations between entities of long double and __float128 
allowed if the two types have a different representation
- Each type has a distinct rank

This isn't the same behaviour as GCC currently has. For example, GCC allows 
assignments between the two types on PowerPC. The conversion is achieved 
through a library routine. However, there is no compelling reason at this point 
to allow such behaviour and this work is deferred until such a need arises.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/Format/FormatToken.cpp
  lib/Frontend/InitPreprocessor.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaExprCXX.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Preprocessor/init.c
  test/Sema/128bitfloat.cpp
  test/Sema/float128-ld-incompatibility.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -466,6 +467,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/float128-ld-incompatibility.cpp
===
--- test/Sema/float128-ld-incompatibility.cpp
+++ test/Sema/float128-ld-incompatibility.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 \
+// RUN: -triple powerpc64le-unknown-linux-gnu -target-cpu pwr8 \
+// RUN: -target-feature +float128 %s
+
+__float128 qf();
+long double ldf();
+
+// FIXME: once operations between long double and __float128 are implemented for
+//targets where the types are different, these next two will change
+long double ld{qf()}; // expected-error {{cannot initialize a variable of type 'long double' with an rvalue of type '__float128'}}
+__float128 q{ldf()};  // expected-error {{cannot initialize a variable of type '__float128' with an rvalue of type 'long double'}}
+
+auto

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

Thank you for the discussion on rank. I'm glad we have an agreement on the rank 
of the two types.
However, considering __float128 already has a higher rank in this patch, is 
there anything else that you would like me to change here before the patch is 
approved?

Do you suggest that we need to allow operations (or at least assignments) 
between the two types and take away the diagnostics that are part of this patch?


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

If the reviewers don't mind, I would like to keep this patch with diagnostics 
for interoperability between the two types for now. This is simply because 
enabling such interoperability requires changes to some of the conversion 
infrastructure (i.e. allowing FPTrunc/FPExt for types of the same width, etc.). 
This is to prevent crashes on code such as:

  __float128 foo(long double d) {
return d;
  }

A test case like that will trip asserts when attempting to generate code. Of 
course, this is easy to fix (3 minor changes in 2 files) but even if we emit 
that IR, the back end will fail when trying to compile it.
What I meant to do with this patch is to just get the Clang support in and emit 
diagnostics for things that the target isn't able to do yet. I will follow this 
up with a patch that will:

1. Remove the diagnostics
2. Allow the conversions
3. Provide libcalls for the necessary operations (similarly to what GCC does)


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai updated this revision to Diff 47223.
nemanjai added a comment.

Fixed the naming, indentation and removed the use of dyn_cast for types.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120

Files:
  bindings/python/clang/cindex.py
  include/clang-c/Index.h
  include/clang/AST/ASTContext.h
  include/clang/AST/BuiltinTypes.def
  include/clang/AST/Type.h
  include/clang/AST/TypeLoc.h
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Basic/Specifiers.h
  include/clang/Basic/TargetInfo.h
  include/clang/Basic/TokenKinds.def
  include/clang/Driver/Options.td
  include/clang/Lex/LiteralSupport.h
  include/clang/Sema/DeclSpec.h
  include/clang/Serialization/ASTBitCodes.h
  lib/AST/ASTContext.cpp
  lib/AST/ItaniumMangle.cpp
  lib/AST/MicrosoftMangle.cpp
  lib/AST/NSAPI.cpp
  lib/AST/StmtPrinter.cpp
  lib/AST/Type.cpp
  lib/AST/TypeLoc.cpp
  lib/Analysis/PrintfFormatString.cpp
  lib/Basic/TargetInfo.cpp
  lib/Basic/Targets.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/CodeGen/CGExprScalar.cpp
  lib/CodeGen/CodeGenTypes.cpp
  lib/CodeGen/ItaniumCXXABI.cpp
  lib/Format/FormatToken.cpp
  lib/Frontend/InitPreprocessor.cpp
  lib/Index/USRGeneration.cpp
  lib/Lex/LiteralSupport.cpp
  lib/Parse/ParseDecl.cpp
  lib/Parse/ParseExpr.cpp
  lib/Parse/ParseExprCXX.cpp
  lib/Parse/ParseTentative.cpp
  lib/Sema/DeclSpec.cpp
  lib/Sema/SemaDecl.cpp
  lib/Sema/SemaExpr.cpp
  lib/Sema/SemaExprCXX.cpp
  lib/Sema/SemaLookup.cpp
  lib/Sema/SemaOverload.cpp
  lib/Sema/SemaTemplateVariadic.cpp
  lib/Sema/SemaType.cpp
  lib/Serialization/ASTCommon.cpp
  lib/Serialization/ASTReader.cpp
  test/CodeGenCXX/float128-declarations.cpp
  test/Preprocessor/init.c
  test/Sema/128bitfloat.cpp
  test/Sema/float128-ld-incompatibility.cpp
  test/SemaCXX/deleted-operator.cpp
  test/SemaCXX/overloaded-builtin-operators.cpp
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -51,6 +51,7 @@
 BTCASE(Float);
 BTCASE(Double);
 BTCASE(LongDouble);
+BTCASE(Float128);
 BTCASE(NullPtr);
 BTCASE(Overload);
 BTCASE(Dependent);
@@ -466,6 +467,7 @@
 TKIND(Float);
 TKIND(Double);
 TKIND(LongDouble);
+TKIND(Float128);
 TKIND(NullPtr);
 TKIND(Overload);
 TKIND(Dependent);
Index: test/SemaCXX/overloaded-builtin-operators.cpp
===
--- test/SemaCXX/overloaded-builtin-operators.cpp
+++ test/SemaCXX/overloaded-builtin-operators.cpp
@@ -183,7 +183,7 @@
   // FIXME: lots of candidates here!
   (void)(1.0f * a); // expected-error{{ambiguous}} \
 // expected-note 4{{candidate}} \
-// expected-note {{remaining 117 candidates omitted; pass -fshow-overloads=all to show them}}
+// expected-note {{remaining 140 candidates omitted; pass -fshow-overloads=all to show them}}
 }
 
 // pr5432
Index: test/SemaCXX/deleted-operator.cpp
===
--- test/SemaCXX/deleted-operator.cpp
+++ test/SemaCXX/deleted-operator.cpp
@@ -9,7 +9,7 @@
   PR10757 a1;
   // FIXME: We get a ridiculous number of "built-in candidate" notes here...
   if(~a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 8 {{built-in candidate}}
-  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 121 {{built-in candidate}}
+  if(a1==a1) {} // expected-error {{overload resolution selected deleted operator}} expected-note 144 {{built-in candidate}}
 }
 
 struct DelOpDel {
Index: test/Sema/float128-ld-incompatibility.cpp
===
--- test/Sema/float128-ld-incompatibility.cpp
+++ test/Sema/float128-ld-incompatibility.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 \
+// RUN: -triple powerpc64le-unknown-linux-gnu -target-cpu pwr8 \
+// RUN: -target-feature +float128 %s
+
+__float128 qf();
+long double ldf();
+
+// FIXME: once operations between long double and __float128 are implemented for
+//targets where the types are different, these next two will change
+long double ld{qf()}; // expected-error {{cannot initialize a variable of type 'long double' with an rvalue of type '__float128'}}
+__float128 q{ldf()};  // expected-error {{cannot initialize a variable of type '__float128' with an rvalue of type 'long double'}}
+
+auto test1(__float128 q, long double ld) -> decltype(q + ld) { // expected-error {{invalid operands to binary expression ('__float128' and 'long double')}}
+  return q + ld;  // expected-error {{invalid operands to binary expression ('__float128' and 'long double')}}
+}
+
+auto test2(long double a, __float128 b) -> decltype(a + b) { // expected-error {{invalid operands to binary expression ('long double' and '__float128')}}
+  return a + b;  // expe

r266186 - Enable support for __float128 in Clang

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Wed Apr 13 04:49:45 2016
New Revision: 266186

URL: http://llvm.org/viewvc/llvm-project?rev=266186&view=rev
Log:
Enable support for __float128 in Clang

This patch corresponds to review:
http://reviews.llvm.org/D15120

It adds support for the __float128 keyword, literals and a target feature to
enable it. This support is disabled by default on all targets and any target
that has support for this type is free to add it.

Based on feedback that I've received from target maintainers, this appears to
be the right thing for most targets. I have not heard from the maintainers of
X86 which I believe supports this type. I will subsequently investigate the
impact of enabling this on X86.

Added:
cfe/trunk/test/CodeGenCXX/float128-declarations.cpp
cfe/trunk/test/Sema/float128-ld-incompatibility.cpp
Modified:
cfe/trunk/bindings/python/clang/cindex.py
cfe/trunk/include/clang-c/Index.h
cfe/trunk/include/clang/AST/ASTContext.h
cfe/trunk/include/clang/AST/BuiltinTypes.def
cfe/trunk/include/clang/AST/Type.h
cfe/trunk/include/clang/AST/TypeLoc.h
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Basic/Specifiers.h
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/include/clang/Basic/TokenKinds.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Lex/LiteralSupport.h
cfe/trunk/include/clang/Sema/DeclSpec.h
cfe/trunk/include/clang/Serialization/ASTBitCodes.h
cfe/trunk/lib/AST/ASTContext.cpp
cfe/trunk/lib/AST/ItaniumMangle.cpp
cfe/trunk/lib/AST/MicrosoftMangle.cpp
cfe/trunk/lib/AST/NSAPI.cpp
cfe/trunk/lib/AST/StmtPrinter.cpp
cfe/trunk/lib/AST/Type.cpp
cfe/trunk/lib/AST/TypeLoc.cpp
cfe/trunk/lib/Analysis/PrintfFormatString.cpp
cfe/trunk/lib/Basic/TargetInfo.cpp
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/CGDebugInfo.cpp
cfe/trunk/lib/CodeGen/CGExprScalar.cpp
cfe/trunk/lib/CodeGen/CodeGenTypes.cpp
cfe/trunk/lib/CodeGen/ItaniumCXXABI.cpp
cfe/trunk/lib/Format/FormatToken.cpp
cfe/trunk/lib/Index/USRGeneration.cpp
cfe/trunk/lib/Lex/LiteralSupport.cpp
cfe/trunk/lib/Parse/ParseDecl.cpp
cfe/trunk/lib/Parse/ParseExpr.cpp
cfe/trunk/lib/Parse/ParseExprCXX.cpp
cfe/trunk/lib/Parse/ParseTentative.cpp
cfe/trunk/lib/Sema/DeclSpec.cpp
cfe/trunk/lib/Sema/SemaDecl.cpp
cfe/trunk/lib/Sema/SemaExpr.cpp
cfe/trunk/lib/Sema/SemaExprCXX.cpp
cfe/trunk/lib/Sema/SemaLookup.cpp
cfe/trunk/lib/Sema/SemaOverload.cpp
cfe/trunk/lib/Sema/SemaTemplateVariadic.cpp
cfe/trunk/lib/Sema/SemaType.cpp
cfe/trunk/lib/Serialization/ASTCommon.cpp
cfe/trunk/lib/Serialization/ASTReader.cpp
cfe/trunk/test/Preprocessor/init.c
cfe/trunk/test/Sema/128bitfloat.cpp
cfe/trunk/test/SemaCXX/deleted-operator.cpp
cfe/trunk/test/SemaCXX/overloaded-builtin-operators.cpp
cfe/trunk/tools/libclang/CXType.cpp

Modified: cfe/trunk/bindings/python/clang/cindex.py
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/bindings/python/clang/cindex.py?rev=266186&r1=266185&r2=266186&view=diff
==
--- cfe/trunk/bindings/python/clang/cindex.py (original)
+++ cfe/trunk/bindings/python/clang/cindex.py Wed Apr 13 04:49:45 2016
@@ -1685,6 +1685,7 @@ TypeKind.DEPENDENT = TypeKind(26)
 TypeKind.OBJCID = TypeKind(27)
 TypeKind.OBJCCLASS = TypeKind(28)
 TypeKind.OBJCSEL = TypeKind(29)
+TypeKind.FLOAT128 = TypeKind(30)
 TypeKind.COMPLEX = TypeKind(100)
 TypeKind.POINTER = TypeKind(101)
 TypeKind.BLOCKPOINTER = TypeKind(102)

Modified: cfe/trunk/include/clang-c/Index.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang-c/Index.h?rev=266186&r1=266185&r2=266186&view=diff
==
--- cfe/trunk/include/clang-c/Index.h (original)
+++ cfe/trunk/include/clang-c/Index.h Wed Apr 13 04:49:45 2016
@@ -2929,6 +2929,7 @@ enum CXTypeKind {
   CXType_ObjCId = 27,
   CXType_ObjCClass = 28,
   CXType_ObjCSel = 29,
+  CXType_Float128 = 30,
   CXType_FirstBuiltin = CXType_Void,
   CXType_LastBuiltin  = CXType_ObjCSel,
 

Modified: cfe/trunk/include/clang/AST/ASTContext.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/ASTContext.h?rev=266186&r1=266185&r2=266186&view=diff
==
--- cfe/trunk/include/clang/AST/ASTContext.h (original)
+++ cfe/trunk/include/clang/AST/ASTContext.h Wed Apr 13 04:49:45 2016
@@ -893,9 +893,10 @@ public:
   CanQualType SignedCharTy, ShortTy, IntTy, LongTy, LongLongTy, Int128Ty;
   CanQualType UnsignedCharTy, UnsignedShortTy, UnsignedIntTy, UnsignedLongTy;
   CanQualType UnsignedLongLongTy, UnsignedInt128Ty;
-  CanQualType FloatTy, DoubleTy, LongDoubleTy;
+  CanQualType FloatTy, DoubleTy, LongDoubleTy, Float128Ty;
   CanQualType HalfTy; // [OpenCL 6.1.1.1], ARM NEON
   CanQua

Re: [PATCH] D15120: Add support for __float128 type to be used by targets that support it

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 266186.


Repository:
  rL LLVM

http://reviews.llvm.org/D15120



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: r266186 - Enable support for __float128 in Clang

[Nemanja Ivanovic via cfe-commits]

I have just pinged the patch to see if I can get it approved today. Can I
give it a few hours and if it isn't approved by tonight, I'll revert the
other patch?

BTW. a temporary workaround for this issue if absolutely required in the
next few hours is to comment out the following define in bits/config.h:

/* Define if __float128 is supported on this host. */
#define _GLIBCXX_USE_FLOAT128 1


On Fri, Apr 15, 2016 at 4:14 PM, Nico Weber  wrote:

> On Fri, Apr 15, 2016 at 12:27 AM, Hal Finkel  wrote:
>
>> - Original Message -
>> > From: "Hans Wennborg via cfe-commits" 
>> > To: "Nemanja Ivanovic" , "Nico Weber" <
>> tha...@chromium.org>
>> > Cc: "cfe-commits" 
>> > Sent: Thursday, April 14, 2016 8:07:58 PM
>> > Subject: Re: r266186 - Enable support for __float128 in Clang
>> >
>> > On Wed, Apr 13, 2016 at 2:49 AM, Nemanja Ivanovic via cfe-commits
>> >  wrote:
>> > > Author: nemanjai
>> > > Date: Wed Apr 13 04:49:45 2016
>> > > New Revision: 266186
>> > >
>> > > URL: http://llvm.org/viewvc/llvm-project?rev=266186&view=rev
>> > > Log:
>> > > Enable support for __float128 in Clang
>> > >
>> > > This patch corresponds to review:
>> > > http://reviews.llvm.org/D15120
>> > >
>> > > It adds support for the __float128 keyword, literals and a target
>> > > feature to
>> > > enable it. This support is disabled by default on all targets and
>> > > any target
>> > > that has support for this type is free to add it.
>> > >
>> > > Based on feedback that I've received from target maintainers, this
>> > > appears to
>> > > be the right thing for most targets. I have not heard from the
>> > > maintainers of
>> > > X86 which I believe supports this type. I will subsequently
>> > > investigate the
>> > > impact of enabling this on X86.
>> >
>> > We're seeing build errors when targeting Android, which I think may
>> > be
>> > caused by this:
>> >
>> > [...]
>> > In file included from ../../v8/src/base/functional.cc:11:
>> > In file included from ../../v8/src/base/functional.h:13:
>> > In file included from
>> >
>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/functional:55:
>> > In file included from
>> > /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/tuple:38:
>> > In file included from
>> >
>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/utility:70:
>> > In file included from
>> >
>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/stl_pair.h:59:
>> > In file included from
>> >
>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/move.h:57:
>> >
>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/type_traits:269:39:
>> > error: __float128 is not supported on this target
>> > struct __is_floating_point_helper<__float128>
>> >   ^
>> >
>> > (From
>> >
>> https://build.chromium.org/p/tryserver.chromium.android/builders/linux_android_rel_ng/builds/54128/steps/compile%20%28with%20patch%29/logs/stdio
>> )
>> >
>> > Any idea what might be breaking here?
>>
>> Yep, see: http://reviews.llvm.org/D19125
>
>
> Since this is breaking real-world code, is it possible to revert this
> until http://reviews.llvm.org/D19125 is ready?
>
>
>>
>>
>>  -Hal
>>
>> >
>> > Thanks,
>> > Hans
>> > ___
>> > cfe-commits mailing list
>> > cfe-commits@lists.llvm.org
>> > http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
>> >
>>
>> --
>> Hal Finkel
>> Assistant Computational Scientist
>> Leadership Computing Facility
>> Argonne National Laboratory
>>
>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: r266186 - Enable support for __float128 in Clang

[Nemanja Ivanovic via cfe-commits]

OK, I'm reverting now. I've done an svn merge but I'm just re-running all
the tests to make sure something weird didn't happen that would cause
buildbot failures.


Perhaps I should have posted D19125 before committing D15120 rather than
sending an email to cfe-dev and asking which targets need the support
enabled. Well, I'll know for next time :).

Nemanja

On Fri, Apr 15, 2016 at 6:51 PM, Nico Weber  wrote:

> I've looked into this a bit, and this breaks compiling programs like
> `#include ` on linux, without passing any special flags (other than
> `-std=gnu++11`). That seems like a very big regression :-) I think this
> should be reverted, so that there's no rush for getting your other patch in.
>
> LLVM tries to keep trunk shippable at all times, and not being able to
> compile  on linux seems bad :-) We're trying to actually ship clang
> trunk every week or two, and this is already somewhat hard if things that
> break the world are reverted and fixed asynchronously.
>
> Can you revert, please?
>
> On Fri, Apr 15, 2016 at 11:53 AM, Nemanja Ivanovic <
> nemanja.i@gmail.com> wrote:
>
>> I have just pinged the patch to see if I can get it approved today. Can I
>> give it a few hours and if it isn't approved by tonight, I'll revert the
>> other patch?
>>
>> BTW. a temporary workaround for this issue if absolutely required in the
>> next few hours is to comment out the following define in bits/config.h:
>>
>> /* Define if __float128 is supported on this host. */
>> #define _GLIBCXX_USE_FLOAT128 1
>>
>>
>> On Fri, Apr 15, 2016 at 4:14 PM, Nico Weber  wrote:
>>
>>> On Fri, Apr 15, 2016 at 12:27 AM, Hal Finkel  wrote:
>>>
>>>> - Original Message -
>>>> > From: "Hans Wennborg via cfe-commits" 
>>>> > To: "Nemanja Ivanovic" , "Nico Weber" <
>>>> tha...@chromium.org>
>>>> > Cc: "cfe-commits" 
>>>> > Sent: Thursday, April 14, 2016 8:07:58 PM
>>>> > Subject: Re: r266186 - Enable support for __float128 in Clang
>>>> >
>>>> > On Wed, Apr 13, 2016 at 2:49 AM, Nemanja Ivanovic via cfe-commits
>>>> >  wrote:
>>>> > > Author: nemanjai
>>>> > > Date: Wed Apr 13 04:49:45 2016
>>>> > > New Revision: 266186
>>>> > >
>>>> > > URL: http://llvm.org/viewvc/llvm-project?rev=266186&view=rev
>>>> > > Log:
>>>> > > Enable support for __float128 in Clang
>>>> > >
>>>> > > This patch corresponds to review:
>>>> > > http://reviews.llvm.org/D15120
>>>> > >
>>>> > > It adds support for the __float128 keyword, literals and a target
>>>> > > feature to
>>>> > > enable it. This support is disabled by default on all targets and
>>>> > > any target
>>>> > > that has support for this type is free to add it.
>>>> > >
>>>> > > Based on feedback that I've received from target maintainers, this
>>>> > > appears to
>>>> > > be the right thing for most targets. I have not heard from the
>>>> > > maintainers of
>>>> > > X86 which I believe supports this type. I will subsequently
>>>> > > investigate the
>>>> > > impact of enabling this on X86.
>>>> >
>>>> > We're seeing build errors when targeting Android, which I think may
>>>> > be
>>>> > caused by this:
>>>> >
>>>> > [...]
>>>> > In file included from ../../v8/src/base/functional.cc:11:
>>>> > In file included from ../../v8/src/base/functional.h:13:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/functional:55:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/tuple:38:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/utility:70:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/stl_pair.h:59:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/move.h:57:
>>>

Re: r266186 - Enable support for __float128 in Clang

[Nemanja Ivanovic via cfe-commits]

It was not supported before but there was a workaround in Clang. As far as
I recall, it basically "secretly" provided a typedef for __float128
(presumably to long double on most targets). This workaround was in place
precisely to allow these headers to compile.

On Fri, Apr 15, 2016 at 7:58 PM, James Y Knight  wrote:

> I'm confused: why does it break targets if __float128 wasn't supported
> before, and still isn't supported?
>
> Surely enabling float128 support on some targets, and leaving it disabled
> on linux/x86 shouldn't actually *break* linux/x86?
>
> On Fri, Apr 15, 2016 at 11:53 AM, Nemanja Ivanovic via cfe-commits <
> cfe-commits@lists.llvm.org> wrote:
>
>> I have just pinged the patch to see if I can get it approved today. Can I
>> give it a few hours and if it isn't approved by tonight, I'll revert the
>> other patch?
>>
>> BTW. a temporary workaround for this issue if absolutely required in the
>> next few hours is to comment out the following define in bits/config.h:
>>
>> /* Define if __float128 is supported on this host. */
>> #define _GLIBCXX_USE_FLOAT128 1
>>
>>
>> On Fri, Apr 15, 2016 at 4:14 PM, Nico Weber  wrote:
>>
>>> On Fri, Apr 15, 2016 at 12:27 AM, Hal Finkel  wrote:
>>>
>>>> - Original Message -
>>>> > From: "Hans Wennborg via cfe-commits" 
>>>> > To: "Nemanja Ivanovic" , "Nico Weber" <
>>>> tha...@chromium.org>
>>>> > Cc: "cfe-commits" 
>>>> > Sent: Thursday, April 14, 2016 8:07:58 PM
>>>> > Subject: Re: r266186 - Enable support for __float128 in Clang
>>>> >
>>>> > On Wed, Apr 13, 2016 at 2:49 AM, Nemanja Ivanovic via cfe-commits
>>>> >  wrote:
>>>> > > Author: nemanjai
>>>> > > Date: Wed Apr 13 04:49:45 2016
>>>> > > New Revision: 266186
>>>> > >
>>>> > > URL: http://llvm.org/viewvc/llvm-project?rev=266186&view=rev
>>>> > > Log:
>>>> > > Enable support for __float128 in Clang
>>>> > >
>>>> > > This patch corresponds to review:
>>>> > > http://reviews.llvm.org/D15120
>>>> > >
>>>> > > It adds support for the __float128 keyword, literals and a target
>>>> > > feature to
>>>> > > enable it. This support is disabled by default on all targets and
>>>> > > any target
>>>> > > that has support for this type is free to add it.
>>>> > >
>>>> > > Based on feedback that I've received from target maintainers, this
>>>> > > appears to
>>>> > > be the right thing for most targets. I have not heard from the
>>>> > > maintainers of
>>>> > > X86 which I believe supports this type. I will subsequently
>>>> > > investigate the
>>>> > > impact of enabling this on X86.
>>>> >
>>>> > We're seeing build errors when targeting Android, which I think may
>>>> > be
>>>> > caused by this:
>>>> >
>>>> > [...]
>>>> > In file included from ../../v8/src/base/functional.cc:11:
>>>> > In file included from ../../v8/src/base/functional.h:13:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/functional:55:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/tuple:38:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/utility:70:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/stl_pair.h:59:
>>>> > In file included from
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/move.h:57:
>>>> >
>>>> /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/type_traits:269:39:
>>>> > error: __float128 is not supported on this target
>>>> > struct __is_floating_point_helper<__float128>
>>>> >   ^
>>>> >
>>>> > (From
>>>> >
>>>> https://build.chromium.org/p/tryserver.chromium.android/builders/linux_android_rel_ng/builds/54128/steps/compile%20%28with%20patch%29/logs/stdio
>>>> )
>>>> >
>>>> > Any idea what might be breaking here?
>>>>
>>>> Yep, see: http://reviews.llvm.org/D19125
>>>
>>>
>>> Since this is breaking real-world code, is it possible to revert this
>>> until http://reviews.llvm.org/D19125 is ready?
>>>
>>>
>>>>
>>>>
>>>>  -Hal
>>>>
>>>> >
>>>> > Thanks,
>>>> > Hans
>>>> > ___
>>>> > cfe-commits mailing list
>>>> > cfe-commits@lists.llvm.org
>>>> > http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
>>>> >
>>>>
>>>> --
>>>> Hal Finkel
>>>> Assistant Computational Scientist
>>>> Leadership Computing Facility
>>>> Argonne National Laboratory
>>>>
>>>
>>>
>>
>> ___
>> cfe-commits mailing list
>> cfe-commits@lists.llvm.org
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
>>
>>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r266460 - Revert 266186 as it breaks anything that includes type_traits on some platforms

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Fri Apr 15 13:04:13 2016
New Revision: 266460

URL: http://llvm.org/viewvc/llvm-project?rev=266460&view=rev
Log:
Revert 266186 as it breaks anything that includes type_traits on some platforms

Since this patch provided support for the __float128 type but disabled it
on all platforms by default, some platforms can't compile type_traits with
-std=gnu++11 since there is a specialization with __float128.
This reverts the patch until D19125 is approved (i.e. we know which platforms
need this support enabled).

Removed:
cfe/trunk/test/CodeGenCXX/float128-declarations.cpp
cfe/trunk/test/Sema/float128-ld-incompatibility.cpp
Modified:
cfe/trunk/bindings/python/clang/cindex.py
cfe/trunk/include/clang-c/Index.h
cfe/trunk/include/clang/AST/ASTContext.h
cfe/trunk/include/clang/AST/BuiltinTypes.def
cfe/trunk/include/clang/AST/Type.h
cfe/trunk/include/clang/AST/TypeLoc.h
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Basic/Specifiers.h
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/include/clang/Basic/TokenKinds.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Lex/LiteralSupport.h
cfe/trunk/include/clang/Sema/DeclSpec.h
cfe/trunk/include/clang/Serialization/ASTBitCodes.h
cfe/trunk/lib/AST/ASTContext.cpp
cfe/trunk/lib/AST/ItaniumMangle.cpp
cfe/trunk/lib/AST/MicrosoftMangle.cpp
cfe/trunk/lib/AST/NSAPI.cpp
cfe/trunk/lib/AST/StmtPrinter.cpp
cfe/trunk/lib/AST/Type.cpp
cfe/trunk/lib/AST/TypeLoc.cpp
cfe/trunk/lib/Analysis/PrintfFormatString.cpp
cfe/trunk/lib/Basic/TargetInfo.cpp
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/CGDebugInfo.cpp
cfe/trunk/lib/CodeGen/CGExprScalar.cpp
cfe/trunk/lib/CodeGen/CodeGenTypes.cpp
cfe/trunk/lib/CodeGen/ItaniumCXXABI.cpp
cfe/trunk/lib/Format/FormatToken.cpp
cfe/trunk/lib/Index/USRGeneration.cpp
cfe/trunk/lib/Lex/LiteralSupport.cpp
cfe/trunk/lib/Parse/ParseDecl.cpp
cfe/trunk/lib/Parse/ParseExpr.cpp
cfe/trunk/lib/Parse/ParseExprCXX.cpp
cfe/trunk/lib/Parse/ParseTentative.cpp
cfe/trunk/lib/Sema/DeclSpec.cpp
cfe/trunk/lib/Sema/SemaDecl.cpp
cfe/trunk/lib/Sema/SemaExpr.cpp
cfe/trunk/lib/Sema/SemaExprCXX.cpp
cfe/trunk/lib/Sema/SemaLookup.cpp
cfe/trunk/lib/Sema/SemaOverload.cpp
cfe/trunk/lib/Sema/SemaTemplateVariadic.cpp
cfe/trunk/lib/Sema/SemaType.cpp
cfe/trunk/lib/Serialization/ASTCommon.cpp
cfe/trunk/lib/Serialization/ASTReader.cpp
cfe/trunk/test/Preprocessor/init.c
cfe/trunk/test/Sema/128bitfloat.cpp
cfe/trunk/test/SemaCXX/deleted-operator.cpp
cfe/trunk/test/SemaCXX/overloaded-builtin-operators.cpp
cfe/trunk/tools/libclang/CXType.cpp

Modified: cfe/trunk/bindings/python/clang/cindex.py
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/bindings/python/clang/cindex.py?rev=266460&r1=266459&r2=266460&view=diff
==
--- cfe/trunk/bindings/python/clang/cindex.py (original)
+++ cfe/trunk/bindings/python/clang/cindex.py Fri Apr 15 13:04:13 2016
@@ -1685,7 +1685,6 @@ TypeKind.DEPENDENT = TypeKind(26)
 TypeKind.OBJCID = TypeKind(27)
 TypeKind.OBJCCLASS = TypeKind(28)
 TypeKind.OBJCSEL = TypeKind(29)
-TypeKind.FLOAT128 = TypeKind(30)
 TypeKind.COMPLEX = TypeKind(100)
 TypeKind.POINTER = TypeKind(101)
 TypeKind.BLOCKPOINTER = TypeKind(102)

Modified: cfe/trunk/include/clang-c/Index.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang-c/Index.h?rev=266460&r1=266459&r2=266460&view=diff
==
--- cfe/trunk/include/clang-c/Index.h (original)
+++ cfe/trunk/include/clang-c/Index.h Fri Apr 15 13:04:13 2016
@@ -2929,7 +2929,6 @@ enum CXTypeKind {
   CXType_ObjCId = 27,
   CXType_ObjCClass = 28,
   CXType_ObjCSel = 29,
-  CXType_Float128 = 30,
   CXType_FirstBuiltin = CXType_Void,
   CXType_LastBuiltin  = CXType_ObjCSel,
 

Modified: cfe/trunk/include/clang/AST/ASTContext.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/ASTContext.h?rev=266460&r1=266459&r2=266460&view=diff
==
--- cfe/trunk/include/clang/AST/ASTContext.h (original)
+++ cfe/trunk/include/clang/AST/ASTContext.h Fri Apr 15 13:04:13 2016
@@ -893,10 +893,9 @@ public:
   CanQualType SignedCharTy, ShortTy, IntTy, LongTy, LongLongTy, Int128Ty;
   CanQualType UnsignedCharTy, UnsignedShortTy, UnsignedIntTy, UnsignedLongTy;
   CanQualType UnsignedLongLongTy, UnsignedInt128Ty;
-  CanQualType FloatTy, DoubleTy, LongDoubleTy, Float128Ty;
+  CanQualType FloatTy, DoubleTy, LongDoubleTy;
   CanQualType HalfTy; // [OpenCL 6.1.1.1], ARM NEON
   CanQualType FloatComplexTy, DoubleComplexTy, LongDoubleComplexTy;
-  CanQualType Float128ComplexTy;
   CanQualType VoidPtrTy, NullPtrTy;
   CanQualType DependentTy, OverloadTy, Boun

[PATCH] D19684: Power9 - Support for -mcpu=pwr9 in the front end

[Nemanja Ivanovic via cfe-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, wschmidt, kbarton, amehsan, seurer, cycheng.
nemanjai added a subscriber: cfe-commits.
nemanjai set the repository for this revision to rL LLVM.

This patch simply adds support for the new CPU in anticipation of Power9. There 
isn't really any functionality added so there are no associated test cases at 
this time.

Repository:
  rL LLVM

http://reviews.llvm.org/D19684

Files:
  lib/Basic/Targets.cpp
  lib/Driver/Tools.cpp

Index: lib/Driver/Tools.cpp
===
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -1479,14 +1479,16 @@
 .Case("power6x", "pwr6x")
 .Case("power7", "pwr7")
 .Case("power8", "pwr8")
+.Case("power9", "pwr9")
 .Case("pwr3", "pwr3")
 .Case("pwr4", "pwr4")
 .Case("pwr5", "pwr5")
 .Case("pwr5x", "pwr5x")
 .Case("pwr6", "pwr6")
 .Case("pwr6x", "pwr6x")
 .Case("pwr7", "pwr7")
 .Case("pwr8", "pwr8")
+.Case("pwr9", "pwr9")
 .Case("powerpc", "ppc")
 .Case("powerpc64", "ppc64")
 .Case("powerpc64le", "ppc64le")
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -837,8 +837,9 @@
 ArchDefinePwr6x = 1 << 10,
 ArchDefinePwr7  = 1 << 11,
 ArchDefinePwr8  = 1 << 12,
-ArchDefineA2= 1 << 13,
-ArchDefineA2q   = 1 << 14
+ArchDefinePwr9  = 1 << 13,
+ArchDefineA2= 1 << 14,
+ArchDefineA2q   = 1 << 15
   } ArchDefineTypes;
 
   // Note: GCC recognizes the following additional cpus:
@@ -887,6 +888,8 @@
   .Case("pwr7", true)
   .Case("power8", true)
   .Case("pwr8", true)
+  .Case("power9", true)
+  .Case("pwr9", true)
   .Case("powerpc", true)
   .Case("ppc", true)
   .Case("powerpc64", true)
@@ -1179,6 +1182,10 @@
 .Case("pwr8",  ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
  | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
  | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+.Case("pwr9",  ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7
+ | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+ | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+ | ArchDefinePpcsq)
 .Case("power3",  ArchDefinePpcgr)
 .Case("power4",  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
 .Case("power5",  ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
@@ -1196,6 +1203,10 @@
 .Case("power8",  ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
| ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
| ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+.Case("power9",  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7
+   | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+   | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+   | ArchDefinePpcsq)
 .Default(ArchDefineNone);
 
   if (defs & ArchDefineName)
@@ -1224,6 +1235,8 @@
 Builder.defineMacro("_ARCH_PWR7");
   if (defs & ArchDefinePwr8)
 Builder.defineMacro("_ARCH_PWR8");
+  if (defs & ArchDefinePwr9)
+Builder.defineMacro("_ARCH_PWR9");
   if (defs & ArchDefineA2)
 Builder.defineMacro("_ARCH_A2");
   if (defs & ArchDefineA2q) {
@@ -1314,35 +1327,42 @@
 .Case("pwr6", true)
 .Case("pwr7", true)
 .Case("pwr8", true)
+.Case("pwr9", true)
 .Case("ppc64", true)
 .Case("ppc64le", true)
 .Default(false);
 
   Features["qpx"] = (CPU == "a2q");
   Features["crypto"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["power8-vector"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["bpermd"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);
   Features["extdiv"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);
   Features["direct-move"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["vsx"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D19684: Power9 - Support for -mcpu=pwr9 in the front end

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.


Comment at: lib/Basic/Targets.cpp:1239
@@ -1227,1 +1238,3 @@
+  if (defs & ArchDefinePwr9)
+Builder.defineMacro("_ARCH_PWR9");
   if (defs & ArchDefineA2)

Come to think of it - I should add a test case for this macro. It will be on 
the next revision if one is required or in the actual commit otherwise.


Repository:
  rL LLVM

http://reviews.llvm.org/D19684



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r268898 - Enable support for __float128 in Clang and enable it on pertinent platforms

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Mon May  9 03:52:33 2016
New Revision: 268898

URL: http://llvm.org/viewvc/llvm-project?rev=268898&view=rev
Log:
Enable support for __float128 in Clang and enable it on pertinent platforms

This patch corresponds to reviews:
http://reviews.llvm.org/D15120
http://reviews.llvm.org/D19125

It adds support for the __float128 keyword, literals and target feature to
enable it. Based on the latter of the two aforementioned reviews, this feature
is enabled on Linux on i386/X86 as well as SystemZ.
This is also the second attempt in commiting this feature. The first attempt
did not enable it on required platforms which caused failures when compiling
type_traits with -std=gnu++11.

If you see failures with compiling this header on your platform after this
commit, it is likely that your platform needs to have this feature enabled.

Added:
cfe/trunk/test/CodeGenCXX/float128-declarations.cpp
cfe/trunk/test/Sema/float128-ld-incompatibility.cpp
Modified:
cfe/trunk/bindings/python/clang/cindex.py
cfe/trunk/include/clang-c/Index.h
cfe/trunk/include/clang/AST/ASTContext.h
cfe/trunk/include/clang/AST/BuiltinTypes.def
cfe/trunk/include/clang/AST/Type.h
cfe/trunk/include/clang/AST/TypeLoc.h
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Basic/Specifiers.h
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/include/clang/Basic/TokenKinds.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Lex/LiteralSupport.h
cfe/trunk/include/clang/Sema/DeclSpec.h
cfe/trunk/include/clang/Serialization/ASTBitCodes.h
cfe/trunk/lib/AST/ASTContext.cpp
cfe/trunk/lib/AST/ItaniumMangle.cpp
cfe/trunk/lib/AST/MicrosoftMangle.cpp
cfe/trunk/lib/AST/NSAPI.cpp
cfe/trunk/lib/AST/StmtPrinter.cpp
cfe/trunk/lib/AST/Type.cpp
cfe/trunk/lib/AST/TypeLoc.cpp
cfe/trunk/lib/Analysis/PrintfFormatString.cpp
cfe/trunk/lib/Basic/TargetInfo.cpp
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/CGDebugInfo.cpp
cfe/trunk/lib/CodeGen/CGExprScalar.cpp
cfe/trunk/lib/CodeGen/CodeGenTypes.cpp
cfe/trunk/lib/CodeGen/ItaniumCXXABI.cpp
cfe/trunk/lib/Format/FormatToken.cpp
cfe/trunk/lib/Index/USRGeneration.cpp
cfe/trunk/lib/Lex/LiteralSupport.cpp
cfe/trunk/lib/Parse/ParseDecl.cpp
cfe/trunk/lib/Parse/ParseExpr.cpp
cfe/trunk/lib/Parse/ParseExprCXX.cpp
cfe/trunk/lib/Parse/ParseTentative.cpp
cfe/trunk/lib/Sema/DeclSpec.cpp
cfe/trunk/lib/Sema/SemaDecl.cpp
cfe/trunk/lib/Sema/SemaExpr.cpp
cfe/trunk/lib/Sema/SemaExprCXX.cpp
cfe/trunk/lib/Sema/SemaLookup.cpp
cfe/trunk/lib/Sema/SemaOverload.cpp
cfe/trunk/lib/Sema/SemaTemplateVariadic.cpp
cfe/trunk/lib/Sema/SemaType.cpp
cfe/trunk/lib/Serialization/ASTCommon.cpp
cfe/trunk/lib/Serialization/ASTReader.cpp
cfe/trunk/test/Preprocessor/init.c
cfe/trunk/test/Sema/128bitfloat.cpp
cfe/trunk/test/Sema/attr-mode.c
cfe/trunk/test/SemaCXX/deleted-operator.cpp
cfe/trunk/test/SemaCXX/overloaded-builtin-operators.cpp
cfe/trunk/tools/libclang/CXType.cpp

Modified: cfe/trunk/bindings/python/clang/cindex.py
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/bindings/python/clang/cindex.py?rev=268898&r1=268897&r2=268898&view=diff
==
--- cfe/trunk/bindings/python/clang/cindex.py (original)
+++ cfe/trunk/bindings/python/clang/cindex.py Mon May  9 03:52:33 2016
@@ -1731,6 +1731,7 @@ TypeKind.DEPENDENT = TypeKind(26)
 TypeKind.OBJCID = TypeKind(27)
 TypeKind.OBJCCLASS = TypeKind(28)
 TypeKind.OBJCSEL = TypeKind(29)
+TypeKind.FLOAT128 = TypeKind(30)
 TypeKind.COMPLEX = TypeKind(100)
 TypeKind.POINTER = TypeKind(101)
 TypeKind.BLOCKPOINTER = TypeKind(102)

Modified: cfe/trunk/include/clang-c/Index.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang-c/Index.h?rev=268898&r1=268897&r2=268898&view=diff
==
--- cfe/trunk/include/clang-c/Index.h (original)
+++ cfe/trunk/include/clang-c/Index.h Mon May  9 03:52:33 2016
@@ -2929,6 +2929,7 @@ enum CXTypeKind {
   CXType_ObjCId = 27,
   CXType_ObjCClass = 28,
   CXType_ObjCSel = 29,
+  CXType_Float128 = 30,
   CXType_FirstBuiltin = CXType_Void,
   CXType_LastBuiltin  = CXType_ObjCSel,
 

Modified: cfe/trunk/include/clang/AST/ASTContext.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/ASTContext.h?rev=268898&r1=268897&r2=268898&view=diff
==
--- cfe/trunk/include/clang/AST/ASTContext.h (original)
+++ cfe/trunk/include/clang/AST/ASTContext.h Mon May  9 03:52:33 2016
@@ -215,9 +215,6 @@ class ASTContext : public RefCountedBase
   /// \brief The typedef for the __uint128_t type.
   mutable TypedefDecl *UInt128Decl;
 
-  /// \brief The typedef for the __float128 stub type.
-  mutable TypeDecl

r268951 - [Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front end

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Mon May  9 13:58:02 2016
New Revision: 268951

URL: http://llvm.org/viewvc/llvm-project?rev=268951&view=rev
Log:
[Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front end

This patch corresponds to review:
http://reviews.llvm.org/D19684

It simply adds the handling for the option and the corresponding macros.

Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/test/Preprocessor/init.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=268951&r1=268950&r2=268951&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon May  9 13:58:02 2016
@@ -851,8 +851,9 @@ public:
 ArchDefinePwr6x = 1 << 10,
 ArchDefinePwr7  = 1 << 11,
 ArchDefinePwr8  = 1 << 12,
-ArchDefineA2= 1 << 13,
-ArchDefineA2q   = 1 << 14
+ArchDefinePwr9  = 1 << 13,
+ArchDefineA2= 1 << 14,
+ArchDefineA2q   = 1 << 15
   } ArchDefineTypes;
 
   // Note: GCC recognizes the following additional cpus:
@@ -901,6 +902,8 @@ public:
   .Case("pwr7", true)
   .Case("power8", true)
   .Case("pwr8", true)
+  .Case("power9", true)
+  .Case("pwr9", true)
   .Case("powerpc", true)
   .Case("ppc", true)
   .Case("powerpc64", true)
@@ -1195,6 +1198,10 @@ void PPCTargetInfo::getTargetDefines(con
 .Case("pwr8",  ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
  | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
  | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+.Case("pwr9",  ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7
+ | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+ | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+ | ArchDefinePpcsq)
 .Case("power3",  ArchDefinePpcgr)
 .Case("power4",  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
 .Case("power5",  ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
@@ -1212,6 +1219,10 @@ void PPCTargetInfo::getTargetDefines(con
 .Case("power8",  ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
| ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
| ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+.Case("power9",  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7
+   | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+   | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+   | ArchDefinePpcsq)
 .Default(ArchDefineNone);
 
   if (defs & ArchDefineName)
@@ -1240,6 +1251,8 @@ void PPCTargetInfo::getTargetDefines(con
 Builder.defineMacro("_ARCH_PWR7");
   if (defs & ArchDefinePwr8)
 Builder.defineMacro("_ARCH_PWR8");
+  if (defs & ArchDefinePwr9)
+Builder.defineMacro("_ARCH_PWR9");
   if (defs & ArchDefineA2)
 Builder.defineMacro("_ARCH_A2");
   if (defs & ArchDefineA2q) {
@@ -1339,6 +1352,7 @@ bool PPCTargetInfo::initFeatureMap(
 .Case("pwr6", true)
 .Case("pwr7", true)
 .Case("pwr8", true)
+.Case("pwr9", true)
 .Case("ppc64", true)
 .Case("ppc64le", true)
 .Default(false);
@@ -1346,28 +1360,34 @@ bool PPCTargetInfo::initFeatureMap(
   Features["qpx"] = (CPU == "a2q");
   Features["crypto"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["power8-vector"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["bpermd"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);
   Features["extdiv"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);
   Features["direct-move"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
   Features["vsx"] = llvm::StringSwitch(CPU)
 .Case("ppc64le", true)
+.Case("pwr9", true)
 .Case("pwr8", true)
 .Case("pwr7", true)
 .Default(false);

Modified: cfe/trunk/lib/Driver/Tools.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Tools.cpp?rev=268951&r1=268950&r2=268951&view=diff
==
--- cfe/trunk/lib/Driver/Tools.cpp (original)
+++ cfe/trunk/lib/Driver/Tools.cpp Mon May  9 13:58:02 2016
@@ -1479,6 +1479,7 @@ static std::string getPPCTargetCPU(const
 .Case("power6x", "pwr6x")
 .Case("power7", "pwr7")
 .Case("power8", "pwr8")
+.Case("power9", "pwr9")
 .Case("pwr3", "pwr3")
 .Case("pwr

Re: [PATCH] D19684: Power9 - Support for -mcpu=pwr9 in the front end

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 268951.


Repository:
  rL LLVM

http://reviews.llvm.org/D19684



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai added inline comments.



Comment at: lib/CodeGen/CGBuiltin.cpp:8182
+ConstantInt *ArgCI = dyn_cast(Ops[2]);
+assert(ArgCI);
+int64_t index = clamp(ArgCI->getSExtValue(), 0, 12);

```assert(ArgCI && "The third operand of this intrinsic must be a compile-time 
constant")```



Comment at: lib/CodeGen/CGBuiltin.cpp:8183
+assert(ArgCI);
+int64_t index = clamp(ArgCI->getSExtValue(), 0, 12);
+

s/index/Index



Comment at: lib/CodeGen/CGBuiltin.cpp:8191
+  // Create a shuffle mask of (1, 0)
+  Constant *ShuffleElts[2];
+  ShuffleElts[0] = ConstantInt::get(Int32Ty, 1);

Just a minor nit, but I'd initialize this inline here.



Comment at: lib/CodeGen/CGBuiltin.cpp:8213
+ConstantInt *ArgCI = dyn_cast(Ops[1]);
+assert(ArgCI);
+int64_t index = clamp(ArgCI->getSExtValue(), 0, 12);

Same comment as above - make sure your asserts tell the developer why they trip.



Comment at: test/CodeGen/builtins-ppc-p9vector.c:1183
 }
+vector unsigned char test116(void) {
+// CHECK-BE: [[T1:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxinsertw(<4 x i32> 
{{.+}}, <2 x i64> {{.+}}, i32 7)

Add testing with an argument out of range as well as non-constant (presumably 
in a separate test case for the latter).


Repository:
  rL LLVM

https://reviews.llvm.org/D26546



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D26546: [PPC] Add vec_insert4b/vec_extract4b to altivec.h

[Nemanja Ivanovic via cfe-commits]

nemanjai requested changes to this revision.
nemanjai added a comment.
This revision now requires changes to proceed.

Overall, I'd like to see another revision of this. This is not because I feel 
the patch requires major rework, but because there is a number of minor 
comments that I'd like to make sure are all addressed.
Just a few notes:

- Please be careful with the naming convention (mentioned in inline comments)
- Be descriptive with your asserts - imagine being a developer that gets an 
assert message that just says `ArgCI` - it would probably not mean much to you.
- I am pretty sure this does not require any work in Sema since AFAICT the 
builtins are defined to require that the third parameter is a constant (i.e. 
`Ii` rather than just `i`). But this should be tested (mentioned in inline 
comments).
- I would like to see testing cover all of the code you generate (i.e. you 
generate bitcasts to `<2 x i64>` and I don't see it in the tests)
- I would like to see early exits if the subtarget does not have P9Vector. This 
is kind of subtle, but for most builtins that lower to an intrinsic that 
requires some subtarget feature that isn't present, the user gets a `not able 
to compile this builtin yet`. As you have it implemented, it would not be the 
case here - it would lower to an intrinsic and we'd get an ISEL error. I think 
the latter situation is inferior so we should find a way to get the former. I 
am hoping this will not require Sema (I'm not sure if returning a `nullptr` 
will achieve this goal but hopefully something along those lines will). 
Basically, the point is that you shouldn't assume that the only way you'd get a 
builtin call is through the interface defined in the ABI, but that someone may 
actually insert a `__builtin_` in their code.




Comment at: lib/CodeGen/CGBuiltin.cpp:39
+static
+int64_t clamp(int64_t value, int64_t low, int64_t high) {
+  return std::min(high, std::max(low, value));

This nit applies to all naming in this changeset: variables start with an 
uppercase letter and functions with a lowercase letter.



Comment at: lib/CodeGen/CGBuiltin.cpp:8194
+  ShuffleElts[1] = ConstantInt::get(Int32Ty, 0);
+  Constant* ShuffleMask = llvm::ConstantVector::get(ShuffleElts);
+  // Reverse the double words in the second argument.

Minor nit: please settle on where the star goes when declaring pointers.



Comment at: lib/CodeGen/CGBuiltin.cpp:8198
+
+  // reverse the index
+  index = 12 - index;

Just a general nit here - we prefer comments to be complete sentences with 
capitalization and punctuation.



Comment at: test/CodeGen/builtins-ppc-p9vector.c:1188
+// CHECK-LE-NEXT: [[T2:%.+]] = call <4 x i32> @llvm.ppc.vsx.xxinsertw(<4 x 
i32> {{.+}}, <2 x i64> [[T1]], i32 5)
+// CHECK-LE-NEXT: bitcast <4 x i32> T2 to <16 x i8>
+  return vec_insert4b(vuia, vuca, 7);

How does this pass? The "T2" is not enclosed in double square brackets.


Repository:
  rL LLVM

https://reviews.llvm.org/D26546



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r282481 - [Power9] Builtins for ELF v.2 ABI conformance - front end portion

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Tue Sep 27 05:45:22 2016
New Revision: 282481

URL: http://llvm.org/viewvc/llvm-project?rev=282481&view=rev
Log:
[Power9] Builtins for ELF v.2 ABI conformance - front end portion

This patch corresponds to review:
https://reviews.llvm.org/D24397

It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with
a number of altivec.h functions (refer to the code review for a list).

Added:
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/Driver/ppc-dependent-options.cpp
cfe/trunk/test/Preprocessor/predefined-arch-macros.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=282481&r1=282480&r2=282481&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Tue Sep 27 05:45:22 2016
@@ -134,6 +134,14 @@ BUILTIN(__builtin_altivec_vcmpequw, "V4i
 BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "")
 BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "")
 
+BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "")
+BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "")
+BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "")
+
+BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "")
+BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "")
+BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "")
+
 BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "")
 BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "")
 BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "")
@@ -223,6 +231,11 @@ BUILTIN(__builtin_altivec_vcmpequw_p, "i
 BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "")
 BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "")
 
+BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "")
+BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "")
+BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "")
+BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "")
+
 BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "")
 BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "")
 BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "")
@@ -254,6 +267,16 @@ BUILTIN(__builtin_altivec_vclzb, "V16UcV
 BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "")
 BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "")
 BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "")
+BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "")
+BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "")
+
+// Vector population count built-ins
+BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "")
+BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "")
+BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "")
 
 // VSX built-ins.
 

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=282481&r1=282480&r2=282481&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Sep 27 05:45:22 2016
@@ -1572,6 +1572,10 @@ def mpower8_vector : Flag<["-"], "mpower
 Group;
 def mno_power8_vector : Flag<["-"], "mno-power8-vector">,
 Group;
+def mpower9_vector : Flag<["-"], "mpower9-vector">,
+Group;
+def mno_power9_vector : Flag<["-"], "mno-power9-vector">,
+Group;
 def mpower8_crypto : Flag<["-"], "mcrypto">,
 Group;
 def mnopower8_crypto : Flag<["-"], "mno-crypto">,

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=282481&r1=282480&r2=282481&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Tue Sep 27 05:45:22 2016
@@ -870,6 +870,7 @@ class PPCTargetInfo : public TargetInfo
   bool HasHTM;
   bool HasBPERMD;
   bool HasExtDiv;
+  bool HasP9Vector;
 
 protected:
   std::string ABI;
@@ -878,7 +879,7 @@ public:
   PPCTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
 : TargetInfo(Triple), HasVSX(false), HasP8Vector(false),
   HasP8Crypto(false), HasDirectMove(false), HasQPX(false), HasHTM(false),
-  HasBPERMD(false), HasExtDiv(false) {
+  HasBPERMD(false), HasExtDiv(false), HasP9Vector(false) {
 SimdDefaultAlign = 128;
 LongDoubleWidth = LongDoubleAlign = 128;
 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
@@ -1157,6 +1158,8 @@ bool PPCTargetInfo::handleTargetFeatures

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai closed this revision.
nemanjai added a comment.

Committed revision 282481.


Repository:
  rL LLVM

https://reviews.llvm.org/D24397



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D24397#555057, @bjope wrote:

> This test/CodeGen/builtins-ppc-p9vector.c test will fail together with this 
> upcoming LLVM patch https://reviews.llvm.org/D24955
>
> Problem is that lots of your
>
>   add i64 {{.*}}, 64
>
> checks will fails since the improved analysis will find out that the add has 
> the "nsw" "nuw" properties.
>
> I'm not so familiar with the regexps used by FileCheck, but somehow we need 
> to (also) allow
>
>   add nsw nuw i64 {{.*}}, 64
>
> in the checks to make it more future proof.


I can change the patterns that check for the add instructions to the following:
// CHECK: add {{[nsuw ]*}}i64 {{.*}}, 64

That will pass with:
add nsw i64
add nuw i64
add nsw nuw i64
...

Basically if all that is found between the "add" and "i64" is any combination 
of the letters "nsuw" and space, it will pass. As far as I'm concerned, 
ensuring that the strings there are well formed is irrelevant - all I'm testing 
is that an add instruction is emitted that adds the constant 64.

I can make the change and check it in if you're in agreement.


Repository:
  rL LLVM

https://reviews.llvm.org/D24397



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D24397#555470, @spatel wrote:

> Having a clang regression/unit test that depends on optimizer behavior is 
> generally viewed as wrong. Can the tests be split into front-end (clang) 
> tests and separate tests for the IR optimizer? Both x86 and AArch64 have done 
> something like that in the last few months for testing of builtins/intrinsics.


Yeah, that sounds reasonable. I'll remove the -O2 from the test case and remove 
the checks for the select instructions. That's really the only major 
difference. So am I to understand the nsw/nuw flags will not be added without 
-O2 and the aforementioned changes will suffice?


Repository:
  rL LLVM

https://reviews.llvm.org/D24397



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

Well, I don't know much about what Clang will actually do here, but I'll
follow your advice and add -O0 and pipe to opt -S -mem2reg. I'll also add a
test case in LLVM (test/CodeGen/PowerPC) that will test that after opt and
llc, we generate the desired code for these builtins.

Thanks Sanjay and Bjorn.

On Wed, Sep 28, 2016 at 6:53 PM, Sanjay Patel 
wrote:

> spatel added a comment.
>
> In https://reviews.llvm.org/D24397#52, @nemanjai wrote:
>
> > In https://reviews.llvm.org/D24397#555470, @spatel wrote:
> >
> > > Having a clang regression/unit test that depends on optimizer behavior
> is generally viewed as wrong. Can the tests be split into front-end (clang)
> tests and separate tests for the IR optimizer? Both x86 and AArch64 have
> done something like that in the last few months for testing of
> builtins/intrinsics.
> >
> >
> > Yeah, that sounds reasonable. I'll remove the -O2 from the test case and
> remove the checks for the select instructions. That's really the only major
> difference. So am I to understand the nsw/nuw flags will not be added
> without -O2 and the aforementioned changes will suffice?
>
>
> Changing to -O0 or using -disable-llvm-optzns should keep the clang tests
> from breaking due to underlying changes in the IR optimizer. That may lead
> to a lot of bloat though. In http://lists.llvm.org/
> pipermail/cfe-commits/Week-of-Mon-20160307/152324.html , it was viewed as
> ok, if not ideal, to pipe the clang IR output using "opt -S -mem2reg".
>
> Note that clang itself uses APIs like IRBuilder::CreateNUWSub(), so I
> think it's possible to see no-wrap IR even without the IR optimizer kicking
> in (but probably isn't a concern in this case?).
>
>
> Repository:
>   rL LLVM
>
> https://reviews.llvm.org/D24397
>
>
>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

OK, I get testing that I'm fine with if I remove the -O2 and the checks for
'select i1'.

Does that change suffice for the purposes of https://reviews.llvm.org/D24955
?

Namely, do I need to account for the possible addition of nsw/nuw flags to
the add instructions even without -O2?

On Wed, Oct 5, 2016 at 8:24 PM, Sanjay Patel  wrote:

> spatel added a comment.
>
> In https://reviews.llvm.org/D24397#562469, @bjope wrote:
>
> > (I'm still hesitating about commiting https://reviews.llvm.org/D24955
> in llvm since that would make these clang tests fail...)
>
>
> You can't do that. Bots will send you fail mail all day as they choke on
> the clang tests - speaking from experience. :)
> We either need to fix or revert this commit in order to let
> https://reviews.llvm.org/D24955 proceed.
>
>
> Repository:
>   rL LLVM
>
> https://reviews.llvm.org/D24397
>
>
>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

OK, will remove optimization and the selects and commit this now.
Sorry about the delay.

On Wed, Oct 5, 2016 at 9:16 PM, Sanjay Patel  wrote:

> You should not need to account for any nsw/nuw flags if the clang test
> does not enable the optimizer.
> Ie, D24955 should not be running at -O0.
>
> On Wed, Oct 5, 2016 at 1:09 PM, Nemanja Ivanovic 
> wrote:
>
>> OK, I get testing that I'm fine with if I remove the -O2 and the checks
>> for 'select i1'.
>>
>> Does that change suffice for the purposes of
>> https://reviews.llvm.org/D24955?
>>
>> Namely, do I need to account for the possible addition of nsw/nuw flags
>> to the add instructions even without -O2?
>>
>> On Wed, Oct 5, 2016 at 8:24 PM, Sanjay Patel 
>> wrote:
>>
>>> spatel added a comment.
>>>
>>> In https://reviews.llvm.org/D24397#562469, @bjope wrote:
>>>
>>> > (I'm still hesitating about commiting https://reviews.llvm.org/D24955
>>> in llvm since that would make these clang tests fail...)
>>>
>>>
>>> You can't do that. Bots will send you fail mail all day as they choke on
>>> the clang tests - speaking from experience. :)
>>> We either need to fix or revert this commit in order to let
>>> https://reviews.llvm.org/D24955 proceed.
>>>
>>>
>>> Repository:
>>>   rL LLVM
>>>
>>> https://reviews.llvm.org/D24397
>>>
>>>
>>>
>>>
>>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r283363 - Removing optimization from the RUN lines and adjusting the checks

[Nemanja Ivanovic via cfe-commits]

Author: nemanjai
Date: Wed Oct  5 14:11:36 2016
New Revision: 283363

URL: http://llvm.org/viewvc/llvm-project?rev=283363&view=rev
Log:
Removing optimization from the RUN lines and adjusting the checks
to not rely on optimization.

Modified:
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c

Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=283363&r1=283362&r2=283363&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Wed Oct  5 14:11:36 2016
@@ -1,11 +1,11 @@
 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
 // RUN:   -triple powerpc64-unknown-unknown -emit-llvm %s \
-// RUN:   -O2 -o - | FileCheck %s -check-prefix=CHECK-BE
+// RUN:   -o - | FileCheck %s -check-prefix=CHECK-BE
 
 // RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
 // RUN:   -triple powerpc64le-unknown-unknown -emit-llvm %s \
-// RUN:   -O2 -o - | FileCheck %s
+// RUN:   -o - | FileCheck %s
 
 #include 
 
@@ -31,7 +31,6 @@ unsigned test1(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 3
 // CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -39,7 +38,6 @@ unsigned test1(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 3
   return vec_first_match_index (vsca, vscb);
 }
@@ -50,7 +48,6 @@ unsigned test2(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 3
 // CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -58,7 +55,6 @@ unsigned test2(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 3
   return vec_first_match_index (vuca, vucb);
 }
@@ -69,7 +65,6 @@ unsigned test3(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 5
 // CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -77,7 +72,6 @@ unsigned test3(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 5
   return vec_first_match_index (vsia, vsib);
 }
@@ -88,7 +82,6 @@ unsigned test4(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 5
 // CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -96,7 +89,6 @@ unsigned test4(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 5
   return vec_first_match_index (vuia, vuib);
 }
@@ -107,7 +99,6 @@ unsigned test5(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 4
 // CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -115,7 +106,6 @@ unsigned test5(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 4
   return vec_first_match_index (vssa, vssb);
 }
@@ -126,7 +116,6 @@ unsigned test6(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 4
 // CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
 // CHECK: @llvm.cttz.v2i64(<2 x i64>
@@ -134,7 +123,6 @@ unsigned test6(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 4
   return vec_first_match_index (vusa, vusb);
 }
@@ -149,7 +137,6 @@ unsigned test7(void) {
 // CHECK-BE: icmp eq i64 {{.*}}, 64
 // CHECK-BE: extractelement <2 x i64>
 // CHECK-BE: add i64 {{.*}}, 64
-// CHECK-BE: select i1
 // CHECK-BE: lshr i64 {{.*}}, 3
 // CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
 // CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
@@ -161,7 +148,6 @@ unsigned test7(void) {
 // CHECK: icmp eq i64 {{.*}}, 64
 // CHECK: extractelement <2 x i64>
 // CHECK: add i64 {{.*}}, 64
-// CHECK: select i1
 // CHECK: lshr i64 {{.*}}, 3
   return vec_first_match_or_eos_index (vsca, vscb);
 }
@@ -176,7 +162,6 @@ unsigned tes

Re: [PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

 Committed revision 283363.

On Wed, Oct 5, 2016 at 9:18 PM, Nemanja Ivanovic 
wrote:

> OK, will remove optimization and the selects and commit this now.
> Sorry about the delay.
>
> On Wed, Oct 5, 2016 at 9:16 PM, Sanjay Patel 
> wrote:
>
>> You should not need to account for any nsw/nuw flags if the clang test
>> does not enable the optimizer.
>> Ie, D24955 should not be running at -O0.
>>
>> On Wed, Oct 5, 2016 at 1:09 PM, Nemanja Ivanovic > > wrote:
>>
>>> OK, I get testing that I'm fine with if I remove the -O2 and the checks
>>> for 'select i1'.
>>>
>>> Does that change suffice for the purposes of
>>> https://reviews.llvm.org/D24955?
>>>
>>> Namely, do I need to account for the possible addition of nsw/nuw flags
>>> to the add instructions even without -O2?
>>>
>>> On Wed, Oct 5, 2016 at 8:24 PM, Sanjay Patel 
>>> wrote:
>>>
 spatel added a comment.

 In https://reviews.llvm.org/D24397#562469, @bjope wrote:

 > (I'm still hesitating about commiting https://reviews.llvm.org/D24955
 in llvm since that would make these clang tests fail...)


 You can't do that. Bots will send you fail mail all day as they choke
 on the clang tests - speaking from experience. :)
 We either need to fix or revert this commit in order to let
 https://reviews.llvm.org/D24955 proceed.


 Repository:
   rL LLVM

 https://reviews.llvm.org/D24397




>>>
>>
>
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 54205f0 - [PowerPC] Allow const pointers for load builtins in altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-09-04T13:56:39-04:00
New Revision: 54205f0bd2377503b818d7f62cc4ed63ef5b1e94

URL: 
https://github.com/llvm/llvm-project/commit/54205f0bd2377503b818d7f62cc4ed63ef5b1e94
DIFF: 
https://github.com/llvm/llvm-project/commit/54205f0bd2377503b818d7f62cc4ed63ef5b1e94.diff

LOG: [PowerPC] Allow const pointers for load builtins in altivec.h

The load builtins in altivec.h do not have const in the signature
for the pointer parameter. This prevents using them for loading
from constant pointers. A notable case for such a use is Eigen.

This patch simply adds the missing const.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47408

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-altivec.c
clang/test/CodeGen/builtins-ppc-p10vector.c
clang/test/CodeGen/builtins-ppc-xl-xst.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 47119d702683..9fda383074f6 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -2702,67 +2702,67 @@ vec_insert_exp(vector unsigned int __a, vector unsigned 
int __b) {
 }
 
 #if defined(__powerpc64__)
-static __inline__ vector signed char __ATTRS_o_ai vec_xl_len(signed char *__a,
+static __inline__ vector signed char __ATTRS_o_ai vec_xl_len(const signed char 
*__a,
  size_t __b) {
   return (vector signed char)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_xl_len(unsigned char *__a, size_t __b) {
+vec_xl_len(const unsigned char *__a, size_t __b) {
   return (vector unsigned char)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
-static __inline__ vector signed short __ATTRS_o_ai vec_xl_len(signed short 
*__a,
+static __inline__ vector signed short __ATTRS_o_ai vec_xl_len(const signed 
short *__a,
   size_t __b) {
   return (vector signed short)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector unsigned short __ATTRS_o_ai
-vec_xl_len(unsigned short *__a, size_t __b) {
+vec_xl_len(const unsigned short *__a, size_t __b) {
   return (vector unsigned short)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
-static __inline__ vector signed int __ATTRS_o_ai vec_xl_len(signed int *__a,
+static __inline__ vector signed int __ATTRS_o_ai vec_xl_len(const signed int 
*__a,
 size_t __b) {
   return (vector signed int)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
-static __inline__ vector unsigned int __ATTRS_o_ai vec_xl_len(unsigned int 
*__a,
+static __inline__ vector unsigned int __ATTRS_o_ai vec_xl_len(const unsigned 
int *__a,
   size_t __b) {
   return (vector unsigned int)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
-static __inline__ vector float __ATTRS_o_ai vec_xl_len(float *__a, size_t __b) 
{
+static __inline__ vector float __ATTRS_o_ai vec_xl_len(const float *__a, 
size_t __b) {
   return (vector float)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector signed __int128 __ATTRS_o_ai
-vec_xl_len(signed __int128 *__a, size_t __b) {
+vec_xl_len(const signed __int128 *__a, size_t __b) {
   return (vector signed __int128)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector unsigned __int128 __ATTRS_o_ai
-vec_xl_len(unsigned __int128 *__a, size_t __b) {
+vec_xl_len(const unsigned __int128 *__a, size_t __b) {
   return (vector unsigned __int128)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector signed long long __ATTRS_o_ai
-vec_xl_len(signed long long *__a, size_t __b) {
+vec_xl_len(const signed long long *__a, size_t __b) {
   return (vector signed long long)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector unsigned long long __ATTRS_o_ai
-vec_xl_len(unsigned long long *__a, size_t __b) {
+vec_xl_len(const unsigned long long *__a, size_t __b) {
   return (vector unsigned long long)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
-static __inline__ vector double __ATTRS_o_ai vec_xl_len(double *__a,
+static __inline__ vector double __ATTRS_o_ai vec_xl_len(const double *__a,
 size_t __b) {
   return (vector double)__builtin_vsx_lxvl(__a, (__b << 56));
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_xl_len_r(unsigned char *__a, size_t __b) {
+vec_xl_len_r(const unsigned char *__a, size_t __b) {
   vector unsigned char __res =
   (vector unsigned char)__builtin_vsx_lxvll(__a, (__b << 56));
 #ifdef __LITTLE_ENDIAN__
@@ -16447,41 +16447,41 @@ typedef vector unsigned int unaligned_vec_uint 
__attribute__((aligned(1)));
 typedef vector float unaligned_vec_float __attribute__((aligned(1)));
 
 static inline __ATTRS_o_ai vector signed char vec_xl(signed long lon

[clang] 2d65294 - [PowerPC] Provide vec_cmpne on pre-Power9 architectures in altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-09-04T21:48:38-04:00
New Revision: 2d652949be4b772f2c11577621b0ad33052ac844

URL: 
https://github.com/llvm/llvm-project/commit/2d652949be4b772f2c11577621b0ad33052ac844
DIFF: 
https://github.com/llvm/llvm-project/commit/2d652949be4b772f2c11577621b0ad33052ac844.diff

LOG: [PowerPC] Provide vec_cmpne on pre-Power9 architectures in altivec.h

These overloads are listed in appendix A of the ELFv2 ABI specification
without a requirement for ISA 3.0. So these need to be available on
all Altivec-capable architectures. The implementation in altivec.h
erroneously had them guarded for Power9 due to the availability of
the VCMPNE[BHW] instructions. However these need to be implemented
in terms of the VCMPEQ[BHW] instructions on older architectures.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47423

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-altivec.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 9fda383074f6..a7c4fd23ef19 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -1766,36 +1766,12 @@ vec_cmpne(vector unsigned int __a, vector unsigned int 
__b) {
 (vector int)__b);
 }
 
-static __inline__ vector bool long long __ATTRS_o_ai
-vec_cmpne(vector bool long long __a, vector bool long long __b) {
-  return (vector bool long long)
-~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
-}
-
-static __inline__ vector bool long long __ATTRS_o_ai
-vec_cmpne(vector signed long long __a, vector signed long long __b) {
-  return (vector bool long long)
-~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
-}
-
-static __inline__ vector bool long long __ATTRS_o_ai
-vec_cmpne(vector unsigned long long __a, vector unsigned long long __b) {
-  return (vector bool long long)
-~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
-}
-
 static __inline__ vector bool int __ATTRS_o_ai
 vec_cmpne(vector float __a, vector float __b) {
   return (vector bool int)__builtin_altivec_vcmpnew((vector int)__a,
 (vector int)__b);
 }
 
-static __inline__ vector bool long long __ATTRS_o_ai
-vec_cmpne(vector double __a, vector double __b) {
-  return (vector bool long long)
-~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
-}
-
 /* vec_cmpnez */
 
 static __inline__ vector bool char __ATTRS_o_ai
@@ -1900,6 +1876,86 @@ vec_parity_lsbb(vector signed long long __a) {
   return __builtin_altivec_vprtybd(__a);
 }
 
+#else
+/* vec_cmpne */
+
+static __inline__ vector bool char __ATTRS_o_ai
+vec_cmpne(vector bool char __a, vector bool char __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool char __ATTRS_o_ai
+vec_cmpne(vector signed char __a, vector signed char __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool char __ATTRS_o_ai
+vec_cmpne(vector unsigned char __a, vector unsigned char __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool short __ATTRS_o_ai
+vec_cmpne(vector bool short __a, vector bool short __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool short __ATTRS_o_ai
+vec_cmpne(vector signed short __a, vector signed short __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool short __ATTRS_o_ai
+vec_cmpne(vector unsigned short __a, vector unsigned short __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool int __ATTRS_o_ai
+vec_cmpne(vector bool int __a, vector bool int __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool int __ATTRS_o_ai
+vec_cmpne(vector signed int __a, vector signed int __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool int __ATTRS_o_ai
+vec_cmpne(vector unsigned int __a, vector unsigned int __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+
+static __inline__ vector bool int __ATTRS_o_ai
+vec_cmpne(vector float __a, vector float __b) {
+  return ~(vec_cmpeq(__a, __b));
+}
+#endif
+
+#ifdef __POWER8_VECTOR__
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_cmpne(vector bool long long __a, vector bool long long __b) {
+  return (vector bool long long)
+~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
+}
+
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_cmpne(vector signed long long __a, vector signed long long __b) {
+  return (vector bool long long)
+~(__builtin_altivec_vcmpequd((vector long long)__a, (vector long 
long)__b));
+}
+
+static __inline__ vector bool long long __ATTRS_o_ai
+vec_cmpne(vector unsigned long long __a, vector unsigned long long __b) {
+  return (vector bool long long)
+~(__builtin_altivec_vcmpe

[clang] 3bc3983 - Fix bot failure after ccb4124a4172

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2020-09-15T12:36:47-05:00
New Revision: 3bc3983f229f9277d5bea3692b691f72ab8740dd

URL: 
https://github.com/llvm/llvm-project/commit/3bc3983f229f9277d5bea3692b691f72ab8740dd
DIFF: 
https://github.com/llvm/llvm-project/commit/3bc3983f229f9277d5bea3692b691f72ab8740dd.diff

LOG: Fix bot failure after ccb4124a4172

The test case has a check line for the option on a line that includes
the string lld surrounded by any characters. This causes failures
when said string is in the build path. What the test case presumably
means to test is the actual invocation of the LLD linker (i.e. a
linker that has that string as a suffix). This patch simply removes
the erroneous wildcard after the string.

Added: 


Modified: 
clang/test/Driver/hip-gz-options.hip

Removed: 




diff  --git a/clang/test/Driver/hip-gz-options.hip 
b/clang/test/Driver/hip-gz-options.hip
index b2544a42ebed..705c1be7b94e 100644
--- a/clang/test/Driver/hip-gz-options.hip
+++ b/clang/test/Driver/hip-gz-options.hip
@@ -9,6 +9,6 @@
 // RUN:   -ggdb -gz=zlib 2>&1 | FileCheck %s
 
 // CHECK-DAG: {{".*clang.*" .* "--compress-debug-sections=zlib"}}
-// CHECK-DAG: {{".*lld.*" .* "--compress-debug-sections=zlib"}}
+// CHECK-DAG: {{".*lld" .* "--compress-debug-sections=zlib"}}
 // CHECK-DAG: {{".*clang.*" .* "--compress-debug-sections=zlib"}}
 // CHECK: "--compress-debug-sections=zlib"



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 3f7b4ce - [PowerPC] Add support for embedded devices with EFPU2

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-01-12T09:47:00-06:00
New Revision: 3f7b4ce96065eea66bf4344973173e76ec1a4255

URL: 
https://github.com/llvm/llvm-project/commit/3f7b4ce96065eea66bf4344973173e76ec1a4255
DIFF: 
https://github.com/llvm/llvm-project/commit/3f7b4ce96065eea66bf4344973173e76ec1a4255.diff

LOG: [PowerPC] Add support for embedded devices with EFPU2

PowerPC cores like e200z759n3 [1] using an efpu2 only support single precision
hardware floating point instructions. The single precision instructions efs*
and evfs* are identical to the spe float instructions while efd* and evfd*
instructions trigger a not implemented exception.

This patch introduces a new command line option -mefpu2 which leads to
single-hardware / double-software code generation.

[1] Core reference:
  https://www.nxp.com/files-static/32bit/doc/ref_manual/e200z759CRM.pdf

Differential revision: https://reviews.llvm.org/D92935

Added: 


Modified: 
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/PPC.cpp
clang/test/Driver/ppc-features.cpp
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/test/CodeGen/PowerPC/spe.ll

Removed: 




diff  --git a/clang/docs/ClangCommandLineReference.rst 
b/clang/docs/ClangCommandLineReference.rst
index b46008970f57..ac97f6fed935 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -3145,6 +3145,8 @@ PowerPC
 
 .. option:: -mdirect-move, -mno-direct-move
 
+.. option:: -mefpu2
+
 .. option:: -mfloat128, -mno-float128
 
 .. option:: -mfprnd, -mno-fprnd

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 35643701f97e..d9586e086a9c 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3040,6 +3040,7 @@ def mpcrel: Flag<["-"], "mpcrel">, 
Group;
 def mno_pcrel: Flag<["-"], "mno-pcrel">, Group;
 def mspe : Flag<["-"], "mspe">, Group;
 def mno_spe : Flag<["-"], "mno-spe">, Group;
+def mefpu2 : Flag<["-"], "mefpu2">, Group;
 def mabi_EQ_vec_extabi : Flag<["-"], "mabi=vec-extabi">, Group, 
Flags<[CC1Option]>,
   HelpText<"Enable the extended Altivec ABI on AIX (AIX only). Uses volatile 
and nonvolatile vector registers">;
 def mabi_EQ_vec_default : Flag<["-"], "mabi=vec-default">, Group, 
Flags<[CC1Option]>,

diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 2be7555102f8..cfede6e6e756 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -56,7 +56,7 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
   HasP10Vector = true;
 } else if (Feature == "+pcrelative-memops") {
   HasPCRelativeMemops = true;
-} else if (Feature == "+spe") {
+} else if (Feature == "+spe" || Feature == "+efpu2") {
   HasSPE = true;
   LongDoubleWidth = LongDoubleAlign = 64;
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
@@ -402,6 +402,8 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
 void PPCTargetInfo::setFeatureEnabled(llvm::StringMap &Features,
   StringRef Name, bool Enabled) const {
   if (Enabled) {
+if (Name == "efpu2")
+  Features["spe"] = true;
 // If we're enabling any of the vsx based features then enable vsx and
 // altivec. We'll diagnose any problems later.
 bool FeatureHasVSX = llvm::StringSwitch(Name)
@@ -425,6 +427,8 @@ void PPCTargetInfo::setFeatureEnabled(llvm::StringMap 
&Features,
 else
   Features[Name] = true;
   } else {
+if (Name == "spe")
+  Features["efpu2"] = false;
 // If we're disabling altivec or vsx go ahead and disable all of the vsx
 // features.
 if ((Name == "altivec") || (Name == "vsx"))

diff  --git a/clang/test/Driver/ppc-features.cpp 
b/clang/test/Driver/ppc-features.cpp
index 85060951aa16..def96c351b34 100644
--- a/clang/test/Driver/ppc-features.cpp
+++ b/clang/test/Driver/ppc-features.cpp
@@ -155,6 +155,9 @@
 // CHECK-SPE: "-target-feature" "+spe"
 // CHECK-NOSPE: "-target-feature" "-spe"
 
+// RUN: %clang -target powerpc %s -mefpu2 -c -### 2>&1 | FileCheck 
-check-prefix=CHECK-EFPU2 %s
+// CHECK-EFPU2: "-target-feature" "+efpu2"
+
 // Assembler features
 // RUN: %clang -target powerpc-unknown-linux-gnu %s -### -o %t.o 
-no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_32_BE_AS_ARGS %s
 // CHECK_32_BE_AS_ARGS: "-mppc"

diff  --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 2975ae161aaa..06403f5e55a2 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -72,6 +72,9 @@ def FeatureAltivec   : 
SubtargetFeature<"altivec","HasAltivec", "true",
 def FeatureSPE   : SubtargetFeature<"spe","HasSPE"

[clang] 39e4676 - [PowerPC] Provide doubleword vector predicate form comparisons on Power7

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-05-13T04:56:56-05:00
New Revision: 39e4676ca798d9aba58823515ac9d48eb64863be

URL: 
https://github.com/llvm/llvm-project/commit/39e4676ca798d9aba58823515ac9d48eb64863be
DIFF: 
https://github.com/llvm/llvm-project/commit/39e4676ca798d9aba58823515ac9d48eb64863be.diff

LOG: [PowerPC] Provide doubleword vector predicate form comparisons on Power7

There are two reasons this shouldn't be restricted to Power8 and up:
1. For XL compatibility
2. Because clang will expand comparison operators to these intrinsics*

*Without this patch, the following causes a selection error:

int test(vector signed long a, vector signed long b) {
  return a < b;
}

This patch provides the handling for the intrinsics in the back
end and removes the Power8 guards from the predicate functions
(vec_{all|any}_{eq|ne|gt|ge|lt|le}).

Added: 
llvm/test/CodeGen/PowerPC/vec_cmpd_p7.ll

Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-p8vector.c
clang/test/CodeGen/builtins-ppc-vsx.c
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstrVSX.td

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index e28d234880fbb..25c1b1de998df 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -14790,7 +14790,7 @@ static __inline__ int __ATTRS_o_ai vec_all_eq(vector 
bool int __a,
   (vector int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_eq(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpequd_p(__CR6_LT, __a, __b);
@@ -14974,7 +14974,7 @@ static __inline__ int __ATTRS_o_ai vec_all_ge(vector 
bool int __a,
   (vector unsigned int)__a);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_ge(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpgtsd_p(__CR6_EQ, __b, __a);
@@ -15157,7 +15157,7 @@ static __inline__ int __ATTRS_o_ai vec_all_gt(vector 
bool int __a,
   (vector unsigned int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_gt(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpgtsd_p(__CR6_LT, __a, __b);
@@ -15347,7 +15347,7 @@ static __inline__ int __ATTRS_o_ai vec_all_le(vector 
bool int __a,
   (vector unsigned int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_le(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpgtsd_p(__CR6_EQ, __a, __b);
@@ -15531,7 +15531,7 @@ static __inline__ int __ATTRS_o_ai vec_all_lt(vector 
bool int __a,
   (vector unsigned int)__a);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_lt(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpgtsd_p(__CR6_LT, __b, __a);
@@ -15746,7 +15746,7 @@ static __inline__ int __ATTRS_o_ai vec_all_ne(vector 
bool int __a,
   (vector int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_all_ne(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpequd_p(__CR6_EQ, __a, __b);
@@ -16035,7 +16035,7 @@ static __inline__ int __ATTRS_o_ai vec_any_eq(vector 
bool int __a,
   (vector int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_any_eq(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpequd_p(__CR6_EQ_REV, __a, __b);
@@ -16225,7 +16225,7 @@ static __inline__ int __ATTRS_o_ai vec_any_ge(vector 
bool int __a,
   (vector unsigned int)__a);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_any_ge(vector signed long long __a,
   vector signed long long __b) {
   return __builtin_altivec_vcmpgtsd_p(__CR6_LT_REV, __b, __a);
@@ -16416,7 +16416,7 @@ static __inline__ int __ATTRS_o_ai vec_any_gt(vector 
bool int __a,
   (vector unsigned int)__b);
 }
 
-#ifdef __POWER8_VECTOR__
+#ifdef __VSX__
 static __inline__ int __ATTRS_o_ai vec_any_gt(vector s

[clang] 7cd2833 - [PowerPC] Add vec_vupkhpx and vec_vupklpx for XL compatibility

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-05-14T08:02:00-05:00
New Revision: 7cd2833311ab614775bc695e7bb808159a02e2a9

URL: 
https://github.com/llvm/llvm-project/commit/7cd2833311ab614775bc695e7bb808159a02e2a9
DIFF: 
https://github.com/llvm/llvm-project/commit/7cd2833311ab614775bc695e7bb808159a02e2a9.diff

LOG: [PowerPC] Add vec_vupkhpx and vec_vupklpx for XL compatibility

These are old names for these functions that XL still supports.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-altivec.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 25c1b1de998df..dadf6b5cf75bb 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -12520,6 +12520,13 @@ vec_vrfiz(vector float __a) {
 
 /* The vector unpack instructions all have a big-endian bias, so for
little endian we must reverse the meanings of "high" and "low."  */
+#ifdef __LITTLE_ENDIAN__
+#define vec_vupkhpx(__a) __builtin_altivec_vupklpx((vector short)(__a))
+#define vec_vupklpx(__a) __builtin_altivec_vupkhpx((vector short)(__a))
+#else
+#define vec_vupkhpx(__a) __builtin_altivec_vupkhpx((vector short)(__a))
+#define vec_vupklpx(__a) __builtin_altivec_vupklpx((vector short)(__a))
+#endif
 
 static __inline__ vector short __ATTRS_o_ai
 vec_unpackh(vector signed char __a) {

diff  --git a/clang/test/CodeGen/builtins-ppc-altivec.c 
b/clang/test/CodeGen/builtins-ppc-altivec.c
index e7593ca9021cf..8edef9806af22 100644
--- a/clang/test/CodeGen/builtins-ppc-altivec.c
+++ b/clang/test/CodeGen/builtins-ppc-altivec.c
@@ -5788,6 +5788,10 @@ void test6() {
 
   res_vui = vec_unpackh(vp);
 // CHECK: @llvm.ppc.altivec.vupkhpx
+// CHECK-LE: @llvm.ppc.altivec.vupklpx
+
+  res_vui = vec_vupkhpx(vp);
+// CHECK: @llvm.ppc.altivec.vupkhpx
 // CHECK-LE: @llvm.ppc.altivec.vupklpx
 
   res_vs  = vec_vupkhsb(vsc);
@@ -5829,6 +5833,10 @@ void test6() {
 
   res_vui = vec_unpackl(vp);
 // CHECK: @llvm.ppc.altivec.vupklpx
+// CHECK-LE: @llvm.ppc.altivec.vupkhpx
+
+  res_vui = vec_vupklpx(vp);
+// CHECK: @llvm.ppc.altivec.vupklpx
 // CHECK-LE: @llvm.ppc.altivec.vupkhpx
 
   res_vs  = vec_vupklsb(vsc);



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 9019b55 - [PowerPC] Fix byte ordering of ld/st with length on BE

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-07-30T14:37:24-05:00
New Revision: 9019b55b605a26cb5389399eceb34fa9ea0f

URL: 
https://github.com/llvm/llvm-project/commit/9019b55b605a26cb5389399eceb34fa9ea0f
DIFF: 
https://github.com/llvm/llvm-project/commit/9019b55b605a26cb5389399eceb34fa9ea0f.diff

LOG: [PowerPC] Fix byte ordering of ld/st with length on BE

The builtins vec_xl_len_r and vec_xst_len_r actually use the
wrong side of the vector on big endian Power9 systems. We never
spotted this before because there was no such thing as a big
endian distro that supported Power9. Now we have AIX and the
elements are in the wrong part of the vector. This just fixes
it so the elements are loaded to and stored from the right
side of the vector.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-ld-st-rmb.c
clang/test/CodeGen/builtins-ppc-p9vector.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 0dd8c859366b..d548d8a0dd75 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -3049,13 +3049,10 @@ static __inline__ vector unsigned char __ATTRS_o_ai
 vec_xl_len_r(const unsigned char *__a, size_t __b) {
   vector unsigned char __res =
   (vector unsigned char)__builtin_vsx_lxvll(__a, (__b << 56));
-#ifdef __LITTLE_ENDIAN__
   vector unsigned char __mask =
   (vector unsigned char)__builtin_altivec_lvsr(16 - __b, (int *)NULL);
-  __res = (vector unsigned char)__builtin_altivec_vperm_4si(
+  return (vector unsigned char)__builtin_altivec_vperm_4si(
   (vector int)__res, (vector int)__res, __mask);
-#endif
-  return __res;
 }
 
 // vec_xst_len
@@ -3130,15 +3127,11 @@ static __inline__ void __ATTRS_o_ai vec_xst_len(vector 
double __a, double *__b,
 static __inline__ void __ATTRS_o_ai vec_xst_len_r(vector unsigned char __a,
   unsigned char *__b,
   size_t __c) {
-#ifdef __LITTLE_ENDIAN__
   vector unsigned char __mask =
   (vector unsigned char)__builtin_altivec_lvsl(16 - __c, (int *)NULL);
   vector unsigned char __res =
   __builtin_altivec_vperm_4si((vector int)__a, (vector int)__a, __mask);
   return __builtin_vsx_stxvll((vector int)__res, __b, (__c << 56));
-#else
-  return __builtin_vsx_stxvll((vector int)__a, __b, (__c << 56));
-#endif
 }
 #endif
 #endif

diff  --git a/clang/test/CodeGen/builtins-ppc-ld-st-rmb.c 
b/clang/test/CodeGen/builtins-ppc-ld-st-rmb.c
index 0921d05f0325..76eb87c8db59 100644
--- a/clang/test/CodeGen/builtins-ppc-ld-st-rmb.c
+++ b/clang/test/CodeGen/builtins-ppc-ld-st-rmb.c
@@ -46,6 +46,7 @@
 // BE-PWR9-NEXT:[[__A_ADDR_I:%.*]] = alloca i8*, align 8
 // BE-PWR9-NEXT:[[__B_ADDR_I:%.*]] = alloca i64, align 8
 // BE-PWR9-NEXT:[[__RES_I:%.*]] = alloca <16 x i8>, align 16
+// BE-PWR9-NEXT:[[__MASK_I:%.*]] = alloca <16 x i8>, align 16
 // BE-PWR9-NEXT:[[PTR_ADDR:%.*]] = alloca i8*, align 8
 // BE-PWR9-NEXT:store i8* [[PTR:%.*]], i8** [[PTR_ADDR]], align 8
 // BE-PWR9-NEXT:[[TMP0:%.*]] = load i8*, i8** [[PTR_ADDR]], align 8
@@ -54,11 +55,23 @@
 // BE-PWR9-NEXT:[[TMP1:%.*]] = load i8*, i8** [[__A_ADDR_I]], align 8
 // BE-PWR9-NEXT:[[TMP2:%.*]] = load i64, i64* [[__B_ADDR_I]], align 8
 // BE-PWR9-NEXT:[[SHL_I:%.*]] = shl i64 [[TMP2]], 56
-// BE-PWR9-NEXT:[[TMP3:%.*]] = call <4 x i32> @llvm.ppc.vsx.lxvll(i8* 
[[TMP1]], i64 [[SHL_I]]) #[[ATTR3:[0-9]+]]
+// BE-PWR9-NEXT:[[TMP3:%.*]] = call <4 x i32> @llvm.ppc.vsx.lxvll(i8* 
[[TMP1]], i64 [[SHL_I]]) #[[ATTR4:[0-9]+]]
 // BE-PWR9-NEXT:[[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8>
 // BE-PWR9-NEXT:store <16 x i8> [[TMP4]], <16 x i8>* [[__RES_I]], align 16
-// BE-PWR9-NEXT:[[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[__RES_I]], 
align 16
-// BE-PWR9-NEXT:ret <16 x i8> [[TMP5]]
+// BE-PWR9-NEXT:[[TMP5:%.*]] = load i64, i64* [[__B_ADDR_I]], align 8
+// BE-PWR9-NEXT:[[SUB_I:%.*]] = sub i64 16, [[TMP5]]
+// BE-PWR9-NEXT:[[CONV_I:%.*]] = trunc i64 [[SUB_I]] to i8
+// BE-PWR9-NEXT:[[TMP6:%.*]] = getelementptr i8, i8* null, i8 [[CONV_I]]
+// BE-PWR9-NEXT:[[TMP7:%.*]] = call <16 x i8> @llvm.ppc.altivec.lvsr(i8* 
[[TMP6]]) #[[ATTR4]]
+// BE-PWR9-NEXT:store <16 x i8> [[TMP7]], <16 x i8>* [[__MASK_I]], align 16
+// BE-PWR9-NEXT:[[TMP8:%.*]] = load <16 x i8>, <16 x i8>* [[__RES_I]], 
align 16
+// BE-PWR9-NEXT:[[TMP9:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x i32>
+// BE-PWR9-NEXT:[[TMP10:%.*]] = load <16 x i8>, <16 x i8>* [[__RES_I]], 
align 16
+// BE-PWR9-NEXT:[[TMP11:%.*]] = bitcast <16 x i8> [[TMP10]] to <4 x i32>
+// BE-PWR9-NEXT:[[TMP12:%.*]] = load <16 x i8>, <16 x i8>* [[__MASK_I]], 
align 16
+// BE-PWR9-NEXT:[[TMP13:%.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 
x i32> [[TMP9]], <4 x i32> [[TMP11]], <16 x i8> [[TMP12]]) #[[ATTR

[clang] ef90657 - [PowerPC] Fix vec_add for 64-bit on pre-Power7 subtargets

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-06-24T18:42:44-05:00
New Revision: ef906573a127cffef7cae75d5155c15a8a2a3a5e

URL: 
https://github.com/llvm/llvm-project/commit/ef906573a127cffef7cae75d5155c15a8a2a3a5e
DIFF: 
https://github.com/llvm/llvm-project/commit/ef906573a127cffef7cae75d5155c15a8a2a3a5e.diff

LOG: [PowerPC] Fix vec_add for 64-bit on pre-Power7 subtargets

The shift of the carry was actually incorrect.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-vsx.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index dadf6b5cf75bb..3517da798547a 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -312,16 +312,20 @@ vec_add_u128(vector unsigned char __a, vector unsigned 
char __b) {
 #elif defined(__VSX__)
 static __inline__ vector signed long long __ATTRS_o_ai
 vec_add(vector signed long long __a, vector signed long long __b) {
+#ifdef __LITTLE_ENDIAN__
+  // Little endian systems on CPU's prior to Power8 don't really exist
+  // so scalarizing is fine.
+  return __a + __b;
+#else
   vector unsigned int __res =
   (vector unsigned int)__a + (vector unsigned int)__b;
   vector unsigned int __carry = __builtin_altivec_vaddcuw(
   (vector unsigned int)__a, (vector unsigned int)__b);
-#ifdef __LITTLE_ENDIAN__
-  __carry = __builtin_shufflevector(__carry, __carry, 3, 0, 1, 2);
-#else
-  __carry = __builtin_shufflevector(__carry, __carry, 1, 2, 3, 0);
-#endif
+  __carry = __builtin_shufflevector((vector unsigned char)__carry,
+(vector unsigned char)__carry, 0, 0, 0, 7,
+0, 0, 0, 0, 0, 0, 0, 15, 0, 0, 0, 0);
   return (vector signed long long)(__res + __carry);
+#endif
 }
 
 static __inline__ vector unsigned long long __ATTRS_o_ai

diff  --git a/clang/test/CodeGen/builtins-ppc-vsx.c 
b/clang/test/CodeGen/builtins-ppc-vsx.c
index abd08d463e634..b5ddd03722ad0 100644
--- a/clang/test/CodeGen/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/builtins-ppc-vsx.c
@@ -2319,21 +2319,15 @@ void test_p8overloads_backwards_compat() {
   res_vsll = vec_add(vsll, vsll);
   // CHECK: add <4 x i32>
   // CHECK: call <4 x i32> @llvm.ppc.altivec.vaddcuw
-  // CHECK: shufflevector <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> 
+  // CHECK: shufflevector <16 x i8> {{%.*}}, <16 x i8> {{%.*}}, <16 x i32> 

   // CHECK: add <4 x i32>
-  // CHECK-LE: add <4 x i32>
-  // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vaddcuw
-  // CHECK-LE: shufflevector <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> 

-  // CHECK-LE: add <4 x i32>
+  // CHECK-LE: add <2 x i64>
   res_vull = vec_add(vull, vull);
   // CHECK: add <4 x i32>
   // CHECK: call <4 x i32> @llvm.ppc.altivec.vaddcuw
-  // CHECK: shufflevector <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> 
+  // CHECK: shufflevector <16 x i8> {{%.*}}, <16 x i8> {{%.*}}, <16 x i32> 

   // CHECK: add <4 x i32>
-  // CHECK-LE: add <4 x i32>
-  // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vaddcuw
-  // CHECK-LE: shufflevector <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> 

-  // CHECK-LE: add <4 x i32>
+  // CHECK-LE: add <2 x i64>
   dummy();
   // CHECK: call void @dummy()
   // CHECK-LE: call void @dummy()



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 38a34e2 - [PowerPC] Use modulo arithmetic for vec_extract in altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-03-01T19:49:26-06:00
New Revision: 38a34e207f30747a4b0288d97ce67e422bf5f363

URL: 
https://github.com/llvm/llvm-project/commit/38a34e207f30747a4b0288d97ce67e422bf5f363
DIFF: 
https://github.com/llvm/llvm-project/commit/38a34e207f30747a4b0288d97ce67e422bf5f363.diff

LOG: [PowerPC] Use modulo arithmetic for vec_extract in altivec.h

These interfaces are not covered in the ELFv2 ABI but are rather
implemented to emulate those available in GCC/XLC. However, the
ones in the other compilers are documented to perform modulo
arithmetic on the element number. This patch just brings clang
inline with the other compilers at -O0 (with optimization, clang
already does the right thing).

Added: 


Modified: 
clang/lib/Headers/altivec.h

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 4d50d47d51b5..402f3b389496 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -12915,73 +12915,75 @@ vec_vxor(vector bool long long __a, vector bool long 
long __b) {
 /* vec_extract */
 
 static __inline__ signed char __ATTRS_o_ai vec_extract(vector signed char __a,
-   int __b) {
-  return __a[__b];
+   unsigned int __b) {
+  return __a[__b & 0xf];
 }
 
 static __inline__ unsigned char __ATTRS_o_ai
-vec_extract(vector unsigned char __a, int __b) {
-  return __a[__b];
+vec_extract(vector unsigned char __a, unsigned int __b) {
+  return __a[__b & 0xf];
 }
 
 static __inline__ unsigned char __ATTRS_o_ai vec_extract(vector bool char __a,
- int __b) {
-  return __a[__b];
+ unsigned int __b) {
+  return __a[__b & 0xf];
 }
 
 static __inline__ signed short __ATTRS_o_ai vec_extract(vector signed short 
__a,
-int __b) {
-  return __a[__b];
+unsigned int __b) {
+  return __a[__b & 0x7];
 }
 
 static __inline__ unsigned short __ATTRS_o_ai
-vec_extract(vector unsigned short __a, int __b) {
-  return __a[__b];
+vec_extract(vector unsigned short __a, unsigned int __b) {
+  return __a[__b & 0x7];
 }
 
 static __inline__ unsigned short __ATTRS_o_ai vec_extract(vector bool short 
__a,
-  int __b) {
-  return __a[__b];
+  unsigned int __b) {
+  return __a[__b & 0x7];
 }
 
 static __inline__ signed int __ATTRS_o_ai vec_extract(vector signed int __a,
-  int __b) {
-  return __a[__b];
+  unsigned int __b) {
+  return __a[__b & 0x3];
 }
 
 static __inline__ unsigned int __ATTRS_o_ai vec_extract(vector unsigned int 
__a,
-int __b) {
-  return __a[__b];
+unsigned int __b) {
+  return __a[__b & 0x3];
 }
 
 static __inline__ unsigned int __ATTRS_o_ai vec_extract(vector bool int __a,
-int __b) {
-  return __a[__b];
+unsigned int __b) {
+  return __a[__b & 0x3];
 }
 
 #ifdef __VSX__
 static __inline__ signed long long __ATTRS_o_ai
-vec_extract(vector signed long long __a, int __b) {
-  return __a[__b];
+vec_extract(vector signed long long __a, unsigned int __b) {
+  return __a[__b & 0x1];
 }
 
 static __inline__ unsigned long long __ATTRS_o_ai
-vec_extract(vector unsigned long long __a, int __b) {
-  return __a[__b];
+vec_extract(vector unsigned long long __a, unsigned int __b) {
+  return __a[__b & 0x1];
 }
 
 static __inline__ unsigned long long __ATTRS_o_ai
-vec_extract(vector bool long long __a, int __b) {
-  return __a[__b];
+vec_extract(vector bool long long __a, unsigned int __b) {
+  return __a[__b & 0x1];
 }
 
-static __inline__ double __ATTRS_o_ai vec_extract(vector double __a, int __b) {
-  return __a[__b];
+static __inline__ double __ATTRS_o_ai vec_extract(vector double __a,
+  unsigned int __b) {
+  return __a[__b & 0x1];
 }
 #endif
 
-static __inline__ float __ATTRS_o_ai vec_extract(vector float __a, int __b) {
-  return __a[__b];
+static __inline__ float __ATTRS_o_ai vec_extract(vector float __a,
+ unsigned int __b) {
+  return __a[__b & 0x3];
 }
 
 #ifdef __POWER9_VECTOR__



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 1ff9361 - [PowerPC] Add missing overloads of vec_promote to altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-03-01T21:40:30-06:00
New Revision: 1ff93618e58df210def48d26878c20a1b414d900

URL: 
https://github.com/llvm/llvm-project/commit/1ff93618e58df210def48d26878c20a1b414d900
DIFF: 
https://github.com/llvm/llvm-project/commit/1ff93618e58df210def48d26878c20a1b414d900.diff

LOG: [PowerPC] Add missing overloads of vec_promote to altivec.h

The VSX-only overloads (for 8-byte element vectors) are missing.
Add the missing overloads and convert element numbering to
modulo arithmetic to match GCC and XLC.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-vsx.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 402f3b389496..935eac3c8672 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -14024,49 +14024,71 @@ static __inline__ void __ATTRS_o_ai vec_stvrxl(vector 
float __a, int __b,
 static __inline__ vector signed char __ATTRS_o_ai vec_promote(signed char __a,
   int __b) {
   vector signed char __res = (vector signed char)(0);
-  __res[__b] = __a;
+  __res[__b & 0x7] = __a;
   return __res;
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
 vec_promote(unsigned char __a, int __b) {
   vector unsigned char __res = (vector unsigned char)(0);
-  __res[__b] = __a;
+  __res[__b & 0x7] = __a;
   return __res;
 }
 
 static __inline__ vector short __ATTRS_o_ai vec_promote(short __a, int __b) {
   vector short __res = (vector short)(0);
-  __res[__b] = __a;
+  __res[__b & 0x7] = __a;
   return __res;
 }
 
 static __inline__ vector unsigned short __ATTRS_o_ai
 vec_promote(unsigned short __a, int __b) {
   vector unsigned short __res = (vector unsigned short)(0);
-  __res[__b] = __a;
+  __res[__b & 0x7] = __a;
   return __res;
 }
 
 static __inline__ vector int __ATTRS_o_ai vec_promote(int __a, int __b) {
   vector int __res = (vector int)(0);
-  __res[__b] = __a;
+  __res[__b & 0x3] = __a;
   return __res;
 }
 
 static __inline__ vector unsigned int __ATTRS_o_ai vec_promote(unsigned int 
__a,
int __b) {
   vector unsigned int __res = (vector unsigned int)(0);
-  __res[__b] = __a;
+  __res[__b & 0x3] = __a;
   return __res;
 }
 
 static __inline__ vector float __ATTRS_o_ai vec_promote(float __a, int __b) {
   vector float __res = (vector float)(0);
-  __res[__b] = __a;
+  __res[__b & 0x3] = __a;
   return __res;
 }
 
+#ifdef __VSX__
+static __inline__ vector double __ATTRS_o_ai vec_promote(double __a, int __b) {
+  vector double __res = (vector double)(0);
+  __res[__b & 0x1] = __a;
+  return __res;
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_promote(signed long long __a, int __b) {
+  vector signed long long __res = (vector signed long long)(0);
+  __res[__b & 0x1] = __a;
+  return __res;
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_promote(unsigned long long __a, int __b) {
+  vector unsigned long long __res = (vector unsigned long long)(0);
+  __res[__b & 0x1] = __a;
+  return __res;
+}
+#endif
+
 /* vec_splats */
 
 static __inline__ vector signed char __ATTRS_o_ai vec_splats(signed char __a) {

diff  --git a/clang/test/CodeGen/builtins-ppc-vsx.c 
b/clang/test/CodeGen/builtins-ppc-vsx.c
index bd0e66e69800..53370cb3949e 100644
--- a/clang/test/CodeGen/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/builtins-ppc-vsx.c
@@ -22,6 +22,7 @@ vector signed long long vsll = { 255LL, -937LL };
 vector unsigned long long vull = { 1447LL, 2894LL };
 double d = 23.4;
 signed long long sll = 618LL;
+unsigned long long ull = 618ULL;
 float af[4] = {23.4f, 56.7f, 89.0f, 12.3f};
 double ad[2] = {23.4, 56.7};
 signed char asc[16] = { -8,  9, -10, 11, -12, 13, -14, 15,
@@ -1851,6 +1852,24 @@ res_vsc = vec_xxsldwi(vsc, vsc, 0);
 res_vuc = vec_xxsldwi(vuc, vuc, 1);
 // CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x 
i32> 
 // CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x 
i32> 
+
+res_vd = vec_promote(d, 0);
+// CHECK: store <2 x double> zeroinitializer
+// CHECK: insertelement <2 x double>
+// CHECK-LE: store <2 x double> zeroinitializer
+// CHECK-LE: insertelement <2 x double>
+
+res_vsll = vec_promote(sll, 0);
+// CHECK: store <2 x i64> zeroinitializer
+// CHECK: insertelement <2 x i64>
+// CHECK-LE: store <2 x i64> zeroinitializer
+// CHECK-LE: insertelement <2 x i64>
+
+res_vull = vec_promote(ull, 0);
+// CHECK: store <2 x i64> zeroinitializer
+// CHECK: insertelement <2 x i64>
+// CHECK-LE: store <2 x i64> zeroinitializer
+// CHECK-LE: insertelement <2 x i64>
 }
 
 // The return type of the call expression may be 
diff erent from the return type of the shufflevector.



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists

[clang] f4ad7a1 - [PowerPC] Add missing double precision vec_all overloads to altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-03-05T18:42:12-06:00
New Revision: f4ad7a1a15b7378522a17df7278856449005b8e1

URL: 
https://github.com/llvm/llvm-project/commit/f4ad7a1a15b7378522a17df7278856449005b8e1
DIFF: 
https://github.com/llvm/llvm-project/commit/f4ad7a1a15b7378522a17df7278856449005b8e1.diff

LOG: [PowerPC] Add missing double precision vec_all overloads to altivec.h

We somehow missed vec_all_nlt, vec_all_nle and vec_all_numeric
overloads for double precision vectors when VSX is enabled.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-vsx.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 935eac3c8672..55f04d0efbd6 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -15347,25 +15347,57 @@ static __inline__ int __ATTRS_o_ai vec_all_ngt(vector 
double __a,
 
 /* vec_all_nle */
 
-static __inline__ int __attribute__((__always_inline__))
+static __inline__ int __ATTRS_o_ai
 vec_all_nle(vector float __a, vector float __b) {
+#ifdef __VSX__
+  return __builtin_vsx_xvcmpgesp_p(__CR6_EQ, __b, __a);
+#else
   return __builtin_altivec_vcmpgefp_p(__CR6_EQ, __b, __a);
+#endif
 }
 
+#ifdef __VSX__
+static __inline__ int __ATTRS_o_ai vec_all_nle(vector double __a,
+   vector double __b) {
+  return __builtin_vsx_xvcmpgedp_p(__CR6_EQ, __b, __a);
+}
+#endif
+
 /* vec_all_nlt */
 
-static __inline__ int __attribute__((__always_inline__))
+static __inline__ int __ATTRS_o_ai
 vec_all_nlt(vector float __a, vector float __b) {
+#ifdef __VSX__
+  return __builtin_vsx_xvcmpgtsp_p(__CR6_EQ, __b, __a);
+#else
   return __builtin_altivec_vcmpgtfp_p(__CR6_EQ, __b, __a);
+#endif
 }
 
+#ifdef __VSX__
+static __inline__ int __ATTRS_o_ai vec_all_nlt(vector double __a,
+   vector double __b) {
+  return __builtin_vsx_xvcmpgtdp_p(__CR6_EQ, __b, __a);
+}
+#endif
+
 /* vec_all_numeric */
 
-static __inline__ int __attribute__((__always_inline__))
+static __inline__ int __ATTRS_o_ai
 vec_all_numeric(vector float __a) {
+#ifdef __VSX__
+  return __builtin_vsx_xvcmpeqsp_p(__CR6_LT, __a, __a);
+#else
   return __builtin_altivec_vcmpeqfp_p(__CR6_LT, __a, __a);
+#endif
 }
 
+#ifdef __VSX__
+static __inline__ int __ATTRS_o_ai vec_all_numeric(vector double __a) {
+  return __builtin_vsx_xvcmpeqdp_p(__CR6_LT, __a, __a);
+}
+#endif
+
 /* vec_any_eq */
 
 static __inline__ int __ATTRS_o_ai vec_any_eq(vector signed char __a,

diff  --git a/clang/test/CodeGen/builtins-ppc-vsx.c 
b/clang/test/CodeGen/builtins-ppc-vsx.c
index 53370cb3949e..398a5023eaf3 100644
--- a/clang/test/CodeGen/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/builtins-ppc-vsx.c
@@ -93,6 +93,34 @@ void test1() {
 // CHECK: fadd <2 x double>
 // CHECK-LE: fadd <2 x double>
 
+  res_i = vec_all_nle(vf, vf);
+// CHECK: @llvm.ppc.vsx.xvcmpgesp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgesp.p
+
+  res_i = vec_all_nle(vd, vd);
+// CHECK: @llvm.ppc.vsx.xvcmpgedp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgedp.p
+
+  res_i = vec_all_nlt(vf, vf);
+// CHECK: @llvm.ppc.vsx.xvcmpgtsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgtsp.p
+
+  res_i = vec_all_nlt(vd, vd);
+// CHECK: @llvm.ppc.vsx.xvcmpgtdp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpgtdp.p
+
+  res_i = vec_all_numeric(vf);
+// CHECK: @llvm.ppc.vsx.xvcmpeqsp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqsp.p
+
+  res_i = vec_all_numeric(vd);
+// CHECK: @llvm.ppc.vsx.xvcmpeqdp.p
+// CHECK-LE: @llvm.ppc.vsx.xvcmpeqdp.p
+
+  dummy();
+// CHECK: call void @dummy()
+// CHECK-LE: call void @dummy()
+
   res_vd = vec_and(vbll, vd);
 // CHECK: and <2 x i64>
 // CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 41ce5ec - [PowerPC] Remove unnecessary 64-bit guards from altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-07-12T04:59:00-05:00
New Revision: 41ce5ec5f6f3a03d70e0010e3a140fe129800637

URL: 
https://github.com/llvm/llvm-project/commit/41ce5ec5f6f3a03d70e0010e3a140fe129800637
DIFF: 
https://github.com/llvm/llvm-project/commit/41ce5ec5f6f3a03d70e0010e3a140fe129800637.diff

LOG: [PowerPC] Remove unnecessary 64-bit guards from altivec.h

A number of functions in the header have guards for 64-bit only
that were presumably added as some of the functions in the blocks
use vector __int128 which is only available in 64-bit mode.
A more appropriate guard (__SIZEOF_INT128__) has been added for
those functions since, making the 64-bit guards redundant.
This patch removes those guards as they inadvertently guard code
that uses vector long long which does not actually require 64-bit
mode.

Added: 
clang/test/CodeGen/builtins-ppc-32bit-vec-ll.c

Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-quadword-noi128.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 3517da798547a..c916017fad6af 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -124,7 +124,7 @@ vec_abs(vector signed int __a) {
   return __builtin_altivec_vmaxsw(__a, -__a);
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 static __inline__ vector signed long long __ATTRS_o_ai
 vec_abs(vector signed long long __a) {
   return __builtin_altivec_vmaxsd(__a, -__a);
@@ -282,7 +282,7 @@ vec_add(vector unsigned int __a, vector bool int __b) {
   return __a + (vector unsigned int)__b;
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 static __inline__ vector signed long long __ATTRS_o_ai
 vec_add(vector signed long long __a, vector signed long long __b) {
   return __a + __b;
@@ -333,7 +333,7 @@ vec_add(vector unsigned long long __a, vector unsigned long 
long __b) {
   return (vector unsigned long long)vec_add((vector signed long long)__a,
 (vector signed long long)__b);
 }
-#endif // defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#endif // __POWER8_VECTOR__
 
 static __inline__ vector float __ATTRS_o_ai vec_add(vector float __a,
 vector float __b) {
@@ -349,7 +349,7 @@ static __inline__ vector double __ATTRS_o_ai vec_add(vector 
double __a,
 
 /* vec_adde */
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 #ifdef __SIZEOF_INT128__
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_adde(vector signed __int128 __a, vector signed __int128 __b,
@@ -389,7 +389,7 @@ vec_adde(vector unsigned int __a, vector unsigned int __b,
 
 /* vec_addec */
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 #ifdef __SIZEOF_INT128__
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_addec(vector signed __int128 __a, vector signed __int128 __b,
@@ -410,6 +410,7 @@ vec_addec_u128(vector unsigned char __a, vector unsigned 
char __b,
   return (vector unsigned char)__builtin_altivec_vaddecuq(__a, __b, __c);
 }
 
+#ifdef __powerpc64__
 static __inline__ vector signed int __ATTRS_o_ai
 vec_addec(vector signed int __a, vector signed int __b,
   vector signed int __c) {
@@ -452,8 +453,8 @@ vec_addec(vector unsigned int __a, vector unsigned int __b,
   vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
   return ret;
 }
-
-#endif
+#endif // __powerpc64__
+#endif // __POWER8_VECTOR__
 
 /* vec_vaddubm */
 
@@ -579,7 +580,7 @@ vec_addc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vaddcuw(__a, __b);
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 #ifdef __SIZEOF_INT128__
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_addc(vector signed __int128 __a, vector signed __int128 __b) {
@@ -12026,7 +12027,7 @@ vec_subc(vector unsigned int __a, vector unsigned int 
__b) {
   return __builtin_altivec_vsubcuw(__a, __b);
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __POWER8_VECTOR__
 #ifdef __SIZEOF_INT128__
 static __inline__ vector unsigned __int128 __ATTRS_o_ai
 vec_subc(vector unsigned __int128 __a, vector unsigned __int128 __b) {
@@ -12043,7 +12044,7 @@ static __inline__ vector unsigned char 
__attribute__((__always_inline__))
 vec_subc_u128(vector unsigned char __a, vector unsigned char __b) {
   return (vector unsigned char)__builtin_altivec_vsubcuq(__a, __b);
 }
-#endif // defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#endif // __POWER8_VECTOR__
 
 /* vec_vsubcuw */
 
@@ -12246,7 +12247,7 @@ vec_vsubuws(vector unsigned int __a, vector bool int 
__b) {
   return __builtin_altivec_vsubuws(__a, (vector unsigned int)__b);
 }
 
-#if defined(__POWER8_VECTOR__) && 

[clang] 84e4296 - [PowerPC] Fix rounding mode for vec_round in altivec.h

[Nemanja Ivanovic via cfe-commits]

Author: Nemanja Ivanovic
Date: 2021-07-12T06:11:27-05:00
New Revision: 84e429693fe5f225fe68b9dd54043cddb9c4cd4c

URL: 
https://github.com/llvm/llvm-project/commit/84e429693fe5f225fe68b9dd54043cddb9c4cd4c
DIFF: 
https://github.com/llvm/llvm-project/commit/84e429693fe5f225fe68b9dd54043cddb9c4cd4c.diff

LOG: [PowerPC] Fix rounding mode for vec_round in altivec.h

The function is supposed to be the equivalent of rint() (as in
round to nearest, ties to even) rather than round() (round to
nearest, ties away from zero). In fact, the instruction we emit
without VSX is vrfin which is correct. However, with VSX we emit
xvrspi which is the equivalent of round() and therefore incorrect.
Since there is no equivalent VSX instruction, simply use vrfin
regardless of availability of VSX.

Added: 


Modified: 
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-vsx.c

Removed: 




diff  --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index c916017fad6a..35dde8203b7f 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -8386,11 +8386,7 @@ vec_vrlw(vector unsigned int __a, vector unsigned int 
__b) {
 /* vec_round */
 
 static __inline__ vector float __ATTRS_o_ai vec_round(vector float __a) {
-#ifdef __VSX__
-  return __builtin_vsx_xvrspi(__a);
-#else
   return __builtin_altivec_vrfin(__a);
-#endif
 }
 
 #ifdef __VSX__

diff  --git a/clang/test/CodeGen/builtins-ppc-vsx.c 
b/clang/test/CodeGen/builtins-ppc-vsx.c
index b5ddd03722ad..e1341dc589c5 100644
--- a/clang/test/CodeGen/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/builtins-ppc-vsx.c
@@ -407,8 +407,8 @@ void test1() {
 // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x 
i32> [[T2]], <16 x i8>
 
   res_vf = vec_round(vf);
-// CHECK: call <4 x float> @llvm.round.v4f32(<4 x float>
-// CHECK-LE: call <4 x float> @llvm.round.v4f32(<4 x float>
+// CHECK: call <4 x float> @llvm.ppc.altivec.vrfin(<4 x float>
+// CHECK-LE: call <4 x float> @llvm.ppc.altivec.vrfin(<4 x float>
 
   res_vd = vec_round(vd);
 // CHECK: call <2 x double> @llvm.round.v2f64(<2 x double>



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits