[libcxx] r329167 - [libcxx][cmake] Remove libatomic temporarily from CMAKE_REQUIRED_LIBRARIES when configuring

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Apr  4 04:05:03 2018
New Revision: 329167

URL: http://llvm.org/viewvc/llvm-project?rev=329167=rev
Log:
[libcxx][cmake] Remove libatomic temporarily from CMAKE_REQUIRED_LIBRARIES when 
configuring

When libcxx is built in tree for a host which requires libatomic, LLVM's
configuration steps will determine it is required and add it to
CMAKE_REQUIRED_LIBRARIES. When libcxx is later configured, it tests if it
has C++ atomics without libatomic. The test erroneously passes as libatomic
is already part of the set of required libraries.

In turn, a number of the atomic tests will fail as they require libatomic
but the test suite is configured not to use libatomic.

Address this by always dropping libatomic from the set of required libraries
before determining if LIBCXX_HAVE_CXX_ATOMICS_WITHOUT_LIB is true,
then restoring the set of required libraries.

Reviewers: EricWF

Differential Revision: https://reviews.llvm.org/D43509

Modified:
libcxx/trunk/cmake/Modules/CheckLibcxxAtomic.cmake

Modified: libcxx/trunk/cmake/Modules/CheckLibcxxAtomic.cmake
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/cmake/Modules/CheckLibcxxAtomic.cmake?rev=329167=329166=329167=diff
==
--- libcxx/trunk/cmake/Modules/CheckLibcxxAtomic.cmake (original)
+++ libcxx/trunk/cmake/Modules/CheckLibcxxAtomic.cmake Wed Apr  4 04:05:03 2018
@@ -31,7 +31,14 @@ int main() {
   set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS})
 endfunction(check_cxx_atomics)
 
+# Perform the check for 64bit atomics without libatomic. It may have been
+# added to the required libraries during in the configuration of LLVM, which
+# would cause the check for CXX atomics without libatomic to incorrectly pass.
+set(OLD_CMAKE_REQUIRED_LIBRARIES ${CMAKE_REQUIRED_LIBRARIES})
+list(REMOVE_ITEM CMAKE_REQUIRED_LIBRARIES "atomic")
 check_cxx_atomics(LIBCXX_HAVE_CXX_ATOMICS_WITHOUT_LIB)
+set(CMAKE_REQUIRED_LIBRARIES ${OLD_CMAKE_REQUIRED_LIBRARIES})
+
 check_library_exists(atomic __atomic_fetch_add_8 "" LIBCXX_HAS_ATOMIC_LIB)
 # If not, check if the library exists, and atomics work with it.
 if(NOT LIBCXX_HAVE_CXX_ATOMICS_WITHOUT_LIB)


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[clang-tools-extra] r329053 - [clangd][cmake] Provide libatomic when there is no native support for 64bit atomics

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Tue Apr  3 02:40:07 2018
New Revision: 329053

URL: http://llvm.org/viewvc/llvm-project?rev=329053=rev
Log:
[clangd][cmake] Provide libatomic when there is no native support for 64bit 
atomics

This addresses a persistent failure on clang-cmake-mips buildbot.

Reviewers: ioeric

Differential Revision: https://reviews.llvm.org/D44248

Modified:
clang-tools-extra/trunk/clangd/CMakeLists.txt

Modified: clang-tools-extra/trunk/clangd/CMakeLists.txt
URL: 
http://llvm.org/viewvc/llvm-project/clang-tools-extra/trunk/clangd/CMakeLists.txt?rev=329053=329052=329053=diff
==
--- clang-tools-extra/trunk/clangd/CMakeLists.txt (original)
+++ clang-tools-extra/trunk/clangd/CMakeLists.txt Tue Apr  3 02:40:07 2018
@@ -2,6 +2,11 @@ set(LLVM_LINK_COMPONENTS
   Support
   )
 
+set(CLANGD_ATOMIC_LIB "")
+if(NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
+  list(APPEND CLANGD_ATOMIC_LIB "atomic")
+endif()
+
 add_clang_library(clangDaemon
   AST.cpp
   ClangdLSPServer.cpp
@@ -50,6 +55,7 @@ add_clang_library(clangDaemon
   clangToolingCore
   clangToolingRefactor
   ${LLVM_PTHREAD_LIB}
+  ${CLANGD_ATOMIC_LIB}
   )
 
 if( LLVM_LIB_FUZZING_ENGINE OR LLVM_USE_SANITIZE_COVERAGE )


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RE: [llvm] r325653 - [mips] Spectre variant two mitigation for MIPSR2

[Simon Dardis via cfe-commits]

Apoloiges all, I spoke too soon. Some tests fail due to mir changes, and one 
which a slight different version of the memset intrinsic.

Attached is a patch which resolves the failures.

Thanks,
Simon

From: llvm-commits [llvm-commits-boun...@lists.llvm.org] on behalf of Simon 
Dardis via llvm-commits [llvm-comm...@lists.llvm.org]
Sent: Friday, March 9, 2018 3:05 PM
To: llvm-comm...@lists.llvm.org; cfe-commits@lists.llvm.org
Subject: RE: [llvm] r325653 - [mips] Spectre variant two mitigation for MIPSR2

Hi,

Any downstream users should be able to apply this, the corresponding clang
patch (r325651) and the LLD patch (r325657, and r325713) cleanly to the
release sources of LLVM 6.0, should they require it.

Thanks,
Simon

Author: sdardis
Date: Tue Feb 20 16:06:53 2018
New Revision: 325653

URL: http://llvm.org/viewvc/llvm-project?rev=325653=rev
Log:
[mips] Spectre variant two mitigation for MIPSR2

This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the P5600.

The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the attribute +use-indirect-jump-hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.

Reviewers: atanasyan, zoran.jovanovic

Differential Revision: https://reviews.llvm.org/D43486

Added:
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/calls.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/long-branch.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
Modified:
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/lib/Target/Mips/Mips.td
llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
llvm/trunk/lib/Target/Mips/Mips64r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsDSPInstrFormats.td
llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h

Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=325653=325652=325653=diff
==
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Tue Feb 20 16:06:53 
2018
@@ -5136,6 +5136,7 @@ unsigned MipsAsmParser::checkTargetMatch
   // It also applies for registers Rt and Rs of microMIPSr6 jalrc.hb 
instruction
   // and registers Rd and Base for microMIPS lwp instruction
   case Mips::JALR_HB:
+  case Mips::JALR_HB64:
   case Mips::JALRC_HB_MMR6:
   case Mips::JALRC_MMR6:
 if (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg())

Modified: llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td?rev=325653=325652=325653=diff
==
--- llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td Tue Feb 20 16:06:53 
2018
@@ -1713,6 +1713,12 @@ let AddedComplexity = 41 in {

 def TAILCALL_MMR6 : TailCall, ISA_MICROMIPS32R6;

+def 

RE: [llvm] r325653 - [mips] Spectre variant two mitigation for MIPSR2

[Simon Dardis via cfe-commits]

Hi,

Any downstream users should be able to apply this, the corresponding clang
patch (r325651) and the LLD patch (r325657, and r325713) cleanly to the
release sources of LLVM 6.0, should they require it.

Thanks,
Simon

Author: sdardis
Date: Tue Feb 20 16:06:53 2018
New Revision: 325653

URL: http://llvm.org/viewvc/llvm-project?rev=325653=rev
Log:
[mips] Spectre variant two mitigation for MIPSR2

This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the P5600.

The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the attribute +use-indirect-jump-hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.

Reviewers: atanasyan, zoran.jovanovic

Differential Revision: https://reviews.llvm.org/D43486

Added:
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/calls.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/long-branch.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
llvm/trunk/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
Modified:
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/lib/Target/Mips/Mips.td
llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
llvm/trunk/lib/Target/Mips/Mips64r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsDSPInstrFormats.td
llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h

Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=325653=325652=325653=diff
==
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Tue Feb 20 16:06:53 
2018
@@ -5136,6 +5136,7 @@ unsigned MipsAsmParser::checkTargetMatch
   // It also applies for registers Rt and Rs of microMIPSr6 jalrc.hb 
instruction
   // and registers Rd and Base for microMIPS lwp instruction
   case Mips::JALR_HB:
+  case Mips::JALR_HB64:
   case Mips::JALRC_HB_MMR6:
   case Mips::JALRC_MMR6:
 if (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg())

Modified: llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td?rev=325653=325652=325653=diff
==
--- llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td Tue Feb 20 16:06:53 
2018
@@ -1713,6 +1713,12 @@ let AddedComplexity = 41 in {

 def TAILCALL_MMR6 : TailCall, ISA_MICROMIPS32R6;

+def TAILCALLREG_MMR6  : TailCallReg, ISA_MICROMIPS32R6;
+
+def PseudoIndirectBranch_MMR6 : PseudoIndirectBranchBase,
+ISA_MICROMIPS32R6;
+
 def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)),
   (TAILCALL_MMR6 tglobaladdr:$dst)>, ISA_MICROMIPS32R6;


Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: 

r325651 - [mips] Spectre variant two mitigation for MIPSR2

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Tue Feb 20 16:05:05 2018
New Revision: 325651

URL: http://llvm.org/viewvc/llvm-project?rev=325651=rev
Log:
[mips] Spectre variant two mitigation for MIPSR2

This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It provides the option
-mindirect-jump=hazard, which instructs the LLVM backend to replace
indirect branches with their hazard barrier variants.

This option is accepted when targeting MIPS revision two or later.

The migitation strategy suggested by MIPS for these processors is to
use two hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the option -mindirect-jump=hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Implementation note: I've opted to provide this as an
-mindirect-jump={hazard,...} style option in case alternative
mitigation methods are required for other implementations of the MIPS
ISA in future, e.g. retpoline style solutions.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D43487

Added:
cfe/trunk/test/Driver/mips-indirect-branch.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/Mips.h
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.h
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=325651=325650=325651=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Tue Feb 20 16:05:05 
2018
@@ -333,6 +333,10 @@ def warn_drv_unsupported_abicalls : Warn
   "ignoring '-mabicalls' option as it cannot be used with "
   "non position-independent code and the N64 ABI">,
   InGroup;
+def err_drv_unsupported_indirect_jump_opt : Error<
+  "'-mindirect-jump=%0' is unsupported with the '%1' architecture">;
+def err_drv_unknown_indirect_jump_opt : Error<
+  "unknown '-mindirect-jump=' option '%0'">;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=325651=325650=325651=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Feb 20 16:05:05 2018
@@ -2022,6 +2022,9 @@ def mbranch_likely : Flag<["-"], "mbranc
   IgnoredGCCCompat;
 def mno_branch_likely : Flag<["-"], "mno-branch-likely">, Group,
   IgnoredGCCCompat;
+def mindirect_jump_EQ : Joined<["-"], "mindirect-jump=">,
+  Group,
+  HelpText<"Change indirect jump instructions to inhibit speculation">;
 def mdsp : Flag<["-"], "mdsp">, Group;
 def mno_dsp : Flag<["-"], "mno-dsp">, Group;
 def mdspr2 : Flag<["-"], "mdspr2">, Group;

Modified: cfe/trunk/lib/Basic/Targets/Mips.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/Mips.h?rev=325651=325650=325651=diff
==
--- cfe/trunk/lib/Basic/Targets/Mips.h (original)
+++ cfe/trunk/lib/Basic/Targets/Mips.h Tue Feb 20 16:05:05 2018
@@ -54,6 +54,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTarget
   enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
   bool HasMSA;
   bool DisableMadd4;
+  bool UseIndirectJumpHazard;
 
 protected:
   bool HasFP64;
@@ -64,7 +65,8 @@ public:
   : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
 IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
 IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
-DspRev(NoDSP), HasMSA(false), DisableMadd4(false), HasFP64(false) {
+DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
+UseIndirectJumpHazard(false), HasFP64(false) {
 TheCXXABI.set(TargetCXXABI::GenericMIPS);
 
 setABI((getTriple().getArch() == llvm::Triple::mips ||
@@ -339,6 +341,8 @@ public:
 IsAbs2008 = false;
   else if (Feature == "+noabicalls")
 IsNoABICalls = true;
+  else if (Feature == "+use-indirect-jump-hazard")
+UseIndirectJumpHazard = 

r323412 - [Driver] Add support for mips32 and scudo

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Jan 25 02:09:33 2018
New Revision: 323412

URL: http://llvm.org/viewvc/llvm-project?rev=323412=rev
Log:
[Driver] Add support for mips32 and scudo

r317337 missed that scudo is supported on MIPS32, so permit that option for
MIPS32.

Reviewers: cryptoad, atanasyan

Differential Revision: https://reviews.llvm.org/D42416

Modified:
cfe/trunk/lib/Driver/ToolChains/Linux.cpp
cfe/trunk/test/Driver/fsanitize.c

Modified: cfe/trunk/lib/Driver/ToolChains/Linux.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Linux.cpp?rev=323412=323411=323412=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Linux.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Linux.cpp Thu Jan 25 02:09:33 2018
@@ -846,6 +846,8 @@ bool Linux::isPIEDefault() const {
 SanitizerMask Linux::getSupportedSanitizers() const {
   const bool IsX86 = getTriple().getArch() == llvm::Triple::x86;
   const bool IsX86_64 = getTriple().getArch() == llvm::Triple::x86_64;
+  const bool IsMIPS = getTriple().getArch() == llvm::Triple::mips ||
+  getTriple().getArch() == llvm::Triple::mipsel;
   const bool IsMIPS64 = getTriple().getArch() == llvm::Triple::mips64 ||
 getTriple().getArch() == llvm::Triple::mips64el;
   const bool IsPowerPC64 = getTriple().getArch() == llvm::Triple::ppc64 ||
@@ -875,7 +877,7 @@ SanitizerMask Linux::getSupportedSanitiz
 Res |= SanitizerKind::Efficiency;
   if (IsX86 || IsX86_64)
 Res |= SanitizerKind::Function;
-  if (IsX86_64 || IsMIPS64 || IsAArch64 || IsX86 || IsArmArch)
+  if (IsX86_64 || IsMIPS64 || IsAArch64 || IsX86 || IsMIPS || IsArmArch)
 Res |= SanitizerKind::Scudo;
   if (IsAArch64)
 Res |= SanitizerKind::HWAddress;

Modified: cfe/trunk/test/Driver/fsanitize.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/fsanitize.c?rev=323412=323411=323412=diff
==
--- cfe/trunk/test/Driver/fsanitize.c (original)
+++ cfe/trunk/test/Driver/fsanitize.c Thu Jan 25 02:09:33 2018
@@ -628,6 +628,10 @@
 // RUN: %clang -target arm-linux-androideabi -fsanitize=scudo %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SCUDO
 // RUN: %clang -target x86_64-linux-gnu -fsanitize=scudo %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SCUDO
 // RUN: %clang -target i386-linux-gnu -fsanitize=scudo %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SCUDO
+// RUN: %clang -target mips64-unknown-linux-gnu -fsanitize=scudo %s -### 2>&1 
| FileCheck %s --check-prefix=CHECK-SCUDO
+// RUN: %clang -target mips64el-unknown-linux-gnu -fsanitize=scudo %s -### 
2>&1 | FileCheck %s --check-prefix=CHECK-SCUDO
+// RUN: %clang -target mips-unknown-linux-gnu -fsanitize=scudo %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SCUDO
+// RUN: %clang -target mipsel-unknown-linux-gnu -fsanitize=scudo %s -### 2>&1 
| FileCheck %s --check-prefix=CHECK-SCUDO
 // CHECK-SCUDO: "-fsanitize=scudo"
 
 // RUN: %clang -target x86_64-linux-gnu -fsanitize=scudo %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SCUDO-PIE


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r314213 - [mips] Accept but ignore -m(no-)branch-likely

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Tue Sep 26 08:01:21 2017
New Revision: 314213

URL: http://llvm.org/viewvc/llvm-project?rev=314213=rev
Log:
[mips] Accept but ignore -m(no-)branch-likely

-mbranch-likely and -mno-branch-likely are used in some build systems for
some MIPS targets. Accept these options but ignore them as they are an
(de)optimiztion hint, and that branch likely instructions were deprecated
but not removed from MIPS32 and MIPS64 ISAs.

Reviewers: atanasyan, nitesh.jain

Differential Revision: https://reviews.llvm.org/D38168

Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=314213=314212=314213=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Sep 26 08:01:21 2017
@@ -2047,6 +2047,10 @@ def mcheck_zero_division : Flag<["-"], "
 def mno_check_zero_division : Flag<["-"], "mno-check-zero-division">,
   Group;
 def mcompact_branches_EQ : Joined<["-"], "mcompact-branches=">, Group;
+def mbranch_likely : Flag<["-"], "mbranch-likely">, Group,
+  IgnoredGCCCompat;
+def mno_branch_likely : Flag<["-"], "mno-branch-likely">, Group,
+  IgnoredGCCCompat;
 def mdsp : Flag<["-"], "mdsp">, Group;
 def mno_dsp : Flag<["-"], "mno-dsp">, Group;
 def mdspr2 : Flag<["-"], "mdspr2">, Group;

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=314213=314212=314213=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Tue Sep 26 08:01:21 2017
@@ -392,3 +392,13 @@
 // LONG-CALLS-ON: "-target-feature" "+long-calls"
 // LONG-CALLS-OFF: "-target-feature" "-long-calls"
 // LONG-CALLS-DEF-NOT: "long-calls"
+//
+// -mbranch-likely
+// RUN: %clang -target -mips-mti-linux-gnu -### -c %s -mbranch-likely 2>&1 \
+// RUN:   | FileCheck --check-prefix=BRANCH-LIKELY %s
+// BRANCH-LIKELY: argument unused during compilation: '-mbranch-likely'
+//
+// -mno-branch-likely
+// RUN: %clang -target -mips-mti-linux-gnu -### -c %s -mno-branch-likely 2>&1 \
+// RUN:   | FileCheck --check-prefix=NO-BRANCH-LIKELY %s
+// NO-BRANCH-LIKELY: argument unused during compilation: '-mno-branch-likely'


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r310715 - [mips] Add missing mips-registered-target to mips test.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri Aug 11 08:23:23 2017
New Revision: 310715

URL: http://llvm.org/viewvc/llvm-project?rev=310715=rev
Log:
[mips] Add missing mips-registered-target to mips test.

Modified:
cfe/trunk/test/Driver/mips-abi.c

Modified: cfe/trunk/test/Driver/mips-abi.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-abi.c?rev=310715=310714=310715=diff
==
--- cfe/trunk/test/Driver/mips-abi.c (original)
+++ cfe/trunk/test/Driver/mips-abi.c Fri Aug 11 08:23:23 2017
@@ -1,5 +1,7 @@
 // Check passing Mips ABI options to the backend.
 //
+// REQUIRES: mips-registered-target
+//
 // RUN: %clang -target mips-linux-gnu -### -c %s 2>&1 \
 // RUN:   | FileCheck -check-prefix=MIPS32R2-O32 %s
 // RUN: %clang -target mips64-linux-gnu -mips32r2 -mabi=32 -### -c %s 2>&1 \


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r310714 - [mips] Support implicit gpopt with N64 when using -fno-pic

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri Aug 11 08:01:34 2017
New Revision: 310714

URL: http://llvm.org/viewvc/llvm-project?rev=310714=rev
Log:
[mips] Support implicit gpopt with N64 when using -fno-pic

As clang defaults to -mno-abicalls when using -fno-pic for N64, implicitly use
-mgpopt in that case.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D36315

Modified:
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=310714=310713=310714=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Fri Aug 11 08:01:34 2017
@@ -1473,8 +1473,21 @@ void Clang::AddMIPSTargetArgs(const ArgL
   // NOTE: We need a warning here or in the backend to warn when -mgpopt is
   //   passed explicitly when compiling something with -mabicalls
   //   (implictly) in affect. Currently the warning is in the backend.
+  //
+  // When the ABI in use is  N64, we also need to determine the PIC mode that
+  // is in use, as -fno-pic for N64 implies -mno-abicalls.
   bool NoABICalls =
   ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
+
+  llvm::Reloc::Model RelocationModel;
+  unsigned PICLevel;
+  bool IsPIE;
+  std::tie(RelocationModel, PICLevel, IsPIE) =
+  ParsePICArgs(getToolChain(), Args);
+
+  NoABICalls = NoABICalls ||
+   (RelocationModel == llvm::Reloc::Static && ABIName == "n64");
+
   bool WantGPOpt = GPOpt && GPOpt->getOption().matches(options::OPT_mgpopt);
   // We quietly ignore -mno-gpopt as the backend defaults to -mno-gpopt.
   if (NoABICalls && (!GPOpt || WantGPOpt)) {

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=310714=310713=310714=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Fri Aug 11 08:01:34 2017
@@ -85,6 +85,24 @@
 // RUN:   | FileCheck --check-prefix=CHECK-MEMBEDDEDDATADEF %s
 // CHECK-MEMBEDDEDDATADEF-NOT: "-mllvm" "-membedded-data"
 //
+// MIPS64 + N64: -fno-pic -> -mno-abicalls -mgpopt
+// RUN: %clang -target mips64-mti-elf -mabi=64 -### -c %s -fno-pic 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-N64-GPOPT %s
+// CHECK-N64-GPOPT: "-target-feature" "+noabicalls"
+// CHECK-N64-GPOPT: "-mllvm" "-mgpopt"
+//
+// MIPS64 + N64: -fno-pic -mno-gpopt
+// RUN: %clang -target mips64-mti-elf -mabi=64 -### -c %s -fno-pic -mno-gpopt 
2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-N64-MNO-GPOPT %s
+// CHECK-N64-MNO-GPOPT: "-target-feature" "+noabicalls"
+// CHECK-N64-MNO-GPOPT-NOT: "-mllvm" "-mgpopt"
+//
+// MIPS64 + N64: -mgpopt (-fpic is implicit)
+// RUN: %clang -target mips64-mti-linux-gnu -mabi=64 -### -c %s -mgpopt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-N64-PIC-GPOPT %s
+// CHECK-N64-PIC-GPOPT-NOT: "-mllvm" "-mgpopt"
+// CHECK-N64-PIC-GPOPT: ignoring '-mgpopt' option as it cannot be used with 
the implicit usage of -mabicalls
+//
 // -mips16
 // RUN: %clang -target mips-linux-gnu -### -c %s \
 // RUN: -mno-mips16 -mips16 2>&1 \


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RE: r308619 - Reland "[mips] Teach the driver to accept -m(no-)gpopt."

[Simon Dardis via cfe-commits]

> -Original Message-
> From: Simon Atanasyan [mailto:si...@atanasyan.com]
> Sent: 04 August 2017 11:29
> To: Simon Dardis
> Cc: Clang Commits
> Subject: Re: r308619 - Reland "[mips] Teach the driver to accept -m(no-
> )gpopt."
> 
> On Thu, Jul 20, 2017 at 5:04 PM, Simon Dardis via cfe-commits  comm...@lists.llvm.org> wrote:
> > Reland "[mips] Teach the driver to accept -m(no-)gpopt."
> >
> > This patch teaches the driver to pass -mgpopt by default to the
> > backend when it is supported, i.e. we are using -mno-abicalls.
> 
> [...]
> 
> > Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
> > URL:
> > http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Cl
> > ang.cpp?rev=308619=308618=308619=diff
> >
> ==
> 
> > 
> > --- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
> > +++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Jul 20 07:04:12 2017
> > @@ -1462,6 +1462,30 @@ void Clang::AddMIPSTargetArgs(const ArgL
> >  A->claim();
> >}
> >
> > +  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt,
> > + options::OPT_mno_gpopt);  Arg *ABICalls =
> > +  Args.getLastArg(options::OPT_mabicalls,
> > + options::OPT_mno_abicalls);
> > +
> > +  // -mabicalls is the default for many MIPS environments, even with -fno-
> pic.
> > +  // -mgpopt is the default for static, -fno-pic environments but
> > + these two  // options conflict. We want to be certain that
> > + -mno-abicalls -mgpopt is  // the only case where -mllvm -mgpopt is
> passed.
> > +  // NOTE: We need a warning here or in the backend to warn when -
> mgpopt is
> > +  //   passed explicitly when compiling something with -mabicalls
> > +  //   (implictly) in affect. Currently the warning is in the backend.
> > +  bool NoABICalls =
> > +  ABICalls &&
> > + ABICalls->getOption().matches(options::OPT_mno_abicalls);
> 
> What about N64 ABI + non-PIC code? In that case we pass the `+noabicalls`
> feature flag to the backend by default regardless of -mabicalls / -mnoabicalls
> options. Should we assign `true` to the NoABICalls in that case too to be
> consistent?

Yes, I think we should. I'll write a patch for this.

Thanks,
Simon
> 
> --
> Simon Atanasyan
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r309978 - [mips] Revert r309942 & r309940

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Aug  3 12:39:51 2017
New Revision: 309978

URL: http://llvm.org/viewvc/llvm-project?rev=309978=rev
Log:
[mips] Revert r309942 & r309940

This reverts commit r309942 & commit r309940.

A revert was requested following post commit review.

Removed:
cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c
Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Frontend/CodeGenOptions.def
cfe/trunk/lib/CodeGen/TargetInfo.cpp
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/lib/Frontend/CompilerInvocation.cpp

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=309978=309977=309978=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Aug  3 12:39:51 2017
@@ -2057,14 +2057,6 @@ def membedded_data : Flag<["-"], "membed
 def mno_embedded_data : Flag<["-"], "mno-embedded-data">, Group,
   HelpText<"Do not place constants in the .rodata section instead of the "
".sdata if they meet the -G  threshold (MIPS)">;
-def muninit_const_in_rodata : Flag<["-"], "muninit-const-in-rodata">,
-  Group, Flags<[DriverOption,CC1Option]>, HelpText<"Place "
-  "uninitialized constants in the read-only data section instead of"
-  " the common section (MIPS)">;
-def mno_uninit_const_in_rodata : Flag<["-"], "mno-uninit-const-in-rodata">,
-  Group, HelpText<"Do not place uninitialized constants in the "
-   "read-only data section instead of the common"
-   " section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/include/clang/Frontend/CodeGenOptions.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=309978=309977=309978=diff
==
--- cfe/trunk/include/clang/Frontend/CodeGenOptions.def (original)
+++ cfe/trunk/include/clang/Frontend/CodeGenOptions.def Thu Aug  3 12:39:51 2017
@@ -101,8 +101,6 @@ CODEGENOPT(MergeAllConstants , 1, 1) ///
 CODEGENOPT(MergeFunctions, 1, 0) ///< Set when -fmerge-functions is 
enabled.
 CODEGENOPT(MSVolatile, 1, 0) ///< Set when /volatile:ms is enabled.
 CODEGENOPT(NoCommon  , 1, 0) ///< Set when -fno-common or C++ is 
enabled.
-CODEGENOPT(UInitCstDataInROData, 1, 0) ///< Set when -mgpopt & -membedded-data
-   ///< & -muinit-const-in-rodata is set
 CODEGENOPT(NoDwarfDirectoryAsm , 1, 0) ///< Set when -fno-dwarf-directory-asm 
is
///< enabled.
 CODEGENOPT(NoExecStack   , 1, 0) ///< Set when -Wa,--noexecstack is 
enabled.

Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=309978=309977=309978=diff
==
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Thu Aug  3 12:39:51 2017
@@ -6656,20 +6656,6 @@ public:
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ,
ForDefinition_t IsForDefinition) const override {
-
-if (const VarDecl *VD = dyn_cast_or_null(D)) {
-  if (CGM.getCodeGenOpts().UInitCstDataInROData &&
-  VD->getType().isConstQualified() && !VD->hasInit()) {
-llvm::GlobalVariable *GVar = 
dyn_cast_or_null(GV);
-if (GVar && !GVar->hasSection()) {
-  GVar->setLinkage(llvm::GlobalValue::ExternalLinkage);
-  GVar->setSection("rodata");
-}
-  }
-
-  return;
-}
-
 const FunctionDecl *FD = dyn_cast_or_null(D);
 if (!FD) return;
 llvm::Function *Fn = cast(GV);

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=309978=309977=309978=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Aug  3 12:39:51 2017
@@ -1515,14 +1515,6 @@ void Clang::AddMIPSTargetArgs(const ArgL
 CmdArgs.push_back("-membedded-data=0");
   }
   EmbeddedData->claim();
-
-  if (Arg *A = Args.getLastArg(options::OPT_muninit_const_in_rodata,
-   options::OPT_mno_uninit_const_in_rodata)) {
-if (A->getOption().matches(options::OPT_muninit_const_in_rodata)) {
-  CmdArgs.push_back("-muninit-const-in-rodata");
-  A->claim();
-}
-  }
 }
 
   } else if ((!ABICalls 

RE: r309940 - [mips] Implement -muninit-const-in-rodata

[Simon Dardis via cfe-commits]

> From: Joerg Sonnenberger [mailto:jo...@bec.de]
> Sent: 03 August 2017 15:12
> To: cfe-commits@lists.llvm.org
> Cc: Simon Dardis
> Subject: Re: r309940 - [mips] Implement -muninit-const-in-rodata
> 
> On Thu, Aug 03, 2017 at 02:01:17PM -0000, Simon Dardis via cfe-commits
> wrote:
> > Author: sdardis
> > Date: Thu Aug  3 07:01:17 2017
> > New Revision: 309940
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=309940=rev
> > Log:
> > [mips] Implement -muninit-const-in-rodata
> >
> > This option when combined with -mgpopt and -membedded-data places all
> > uninitialized constant variables in the read-only section.
> 
> I don't get it. Why is this preferable to just forbidding the use of common
> variables in first placce?
> 
> Joerg

This was added for feature parity with GCC. as -membedded-data changes how
data is laid out in the binary. Using -fno-common places the item in the .bss 
section
which takes up memory at runtime. Both of those options are provided to reduce
the amount of memory required for some embedded programs.

Thanks,
Simon

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r309942 - [mips] Fixup r309940.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Aug  3 07:35:06 2017
New Revision: 309942

URL: http://llvm.org/viewvc/llvm-project?rev=309942=rev
Log:
[mips] Fixup r309940.

Needed a // REQUIRES: mips-registered-target

Modified:
cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c

Modified: cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c?rev=309942=309941=309942=diff
==
--- cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c (original)
+++ cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c Thu Aug  3 07:35:06 2017
@@ -3,6 +3,8 @@
 // RUN:-membedded-data=1 -muninit-const-in-rodata -o - %s | \
 // RUN:   FileCheck %s
 
+// REQUIRES: mips-registered-target
+
 // Test that -muninit-const-in-rodata places constant uninitialized structures
 // in the .rodata section rather than the commeon section.
 


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r309940 - [mips] Implement -muninit-const-in-rodata

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Aug  3 07:01:17 2017
New Revision: 309940

URL: http://llvm.org/viewvc/llvm-project?rev=309940=rev
Log:
[mips] Implement -muninit-const-in-rodata

This option when combined with -mgpopt and -membedded-data places all
uninitialized constant variables in the read-only section.

Reviewers: atanasyan, nitesh.jain

Differential Revision: https://reviews.llvm.org/D35917

Added:
cfe/trunk/test/CodeGen/mips-uninit-const-in-ro.c
Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Frontend/CodeGenOptions.def
cfe/trunk/lib/CodeGen/TargetInfo.cpp
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/lib/Frontend/CompilerInvocation.cpp

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=309940=309939=309940=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Aug  3 07:01:17 2017
@@ -2057,6 +2057,14 @@ def membedded_data : Flag<["-"], "membed
 def mno_embedded_data : Flag<["-"], "mno-embedded-data">, Group,
   HelpText<"Do not place constants in the .rodata section instead of the "
".sdata if they meet the -G  threshold (MIPS)">;
+def muninit_const_in_rodata : Flag<["-"], "muninit-const-in-rodata">,
+  Group, Flags<[DriverOption,CC1Option]>, HelpText<"Place "
+  "uninitialized constants in the read-only data section instead of"
+  " the common section (MIPS)">;
+def mno_uninit_const_in_rodata : Flag<["-"], "mno-uninit-const-in-rodata">,
+  Group, HelpText<"Do not place uninitialized constants in the "
+   "read-only data section instead of the common"
+   " section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/include/clang/Frontend/CodeGenOptions.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=309940=309939=309940=diff
==
--- cfe/trunk/include/clang/Frontend/CodeGenOptions.def (original)
+++ cfe/trunk/include/clang/Frontend/CodeGenOptions.def Thu Aug  3 07:01:17 2017
@@ -101,6 +101,8 @@ CODEGENOPT(MergeAllConstants , 1, 1) ///
 CODEGENOPT(MergeFunctions, 1, 0) ///< Set when -fmerge-functions is 
enabled.
 CODEGENOPT(MSVolatile, 1, 0) ///< Set when /volatile:ms is enabled.
 CODEGENOPT(NoCommon  , 1, 0) ///< Set when -fno-common or C++ is 
enabled.
+CODEGENOPT(UInitCstDataInROData, 1, 0) ///< Set when -mgpopt & -membedded-data
+   ///< & -muinit-const-in-rodata is set
 CODEGENOPT(NoDwarfDirectoryAsm , 1, 0) ///< Set when -fno-dwarf-directory-asm 
is
///< enabled.
 CODEGENOPT(NoExecStack   , 1, 0) ///< Set when -Wa,--noexecstack is 
enabled.

Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=309940=309939=309940=diff
==
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Thu Aug  3 07:01:17 2017
@@ -6656,6 +6656,20 @@ public:
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ,
ForDefinition_t IsForDefinition) const override {
+
+if (const VarDecl *VD = dyn_cast_or_null(D)) {
+  if (CGM.getCodeGenOpts().UInitCstDataInROData &&
+  VD->getType().isConstQualified() && !VD->hasInit()) {
+llvm::GlobalVariable *GVar = 
dyn_cast_or_null(GV);
+if (GVar && !GVar->hasSection()) {
+  GVar->setLinkage(llvm::GlobalValue::ExternalLinkage);
+  GVar->setSection("rodata");
+}
+  }
+
+  return;
+}
+
 const FunctionDecl *FD = dyn_cast_or_null(D);
 if (!FD) return;
 llvm::Function *Fn = cast(GV);

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=309940=309939=309940=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Aug  3 07:01:17 2017
@@ -1515,6 +1515,14 @@ void Clang::AddMIPSTargetArgs(const ArgL
 CmdArgs.push_back("-membedded-data=0");
   }
   EmbeddedData->claim();
+
+  if (Arg *A = Args.getLastArg(options::OPT_muninit_const_in_rodata,
+   options::OPT_mno_uninit_const_in_rodata)) {
+if (A->getOption().matches(options::OPT_muninit_const_in_rodata)) {
+   

r309935 - [mips] Add support -m(no-)embedded-data option

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Aug  3 06:04:29 2017
New Revision: 309935

URL: http://llvm.org/viewvc/llvm-project?rev=309935=rev
Log:
[mips] Add support -m(no-)embedded-data option

Add support for the -membedded-data option which places constant data in
the .rodata section, rather than the .sdata section.

Reviewers: atanasyan, nitesh.jain

Differential Revision: https://reviews.llvm.org/D35914

Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=309935=309934=309935=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Aug  3 06:04:29 2017
@@ -2051,6 +2051,12 @@ def mextern_sdata : Flag<["-"], "mextern
 def mno_extern_sdata : Flag<["-"], "mno-extern-sdata">, Group,
   HelpText<"Do not assume that externally defined data is in the small data if"
" it meets the -G  threshold (MIPS)">;
+def membedded_data : Flag<["-"], "membedded-data">, Group,
+  HelpText<"Place constants in the .rodata section instead of the .sdata "
+   "section even if they meet the -G  threshold (MIPS)">;
+def mno_embedded_data : Flag<["-"], "mno-embedded-data">, Group,
+  HelpText<"Do not place constants in the .rodata section instead of the "
+   ".sdata if they meet the -G  threshold (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=309935=309934=309935=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Aug  3 06:04:29 2017
@@ -1484,7 +1484,9 @@ void Clang::AddMIPSTargetArgs(const ArgL
 Arg *LocalSData = Args.getLastArg(options::OPT_mlocal_sdata,
   options::OPT_mno_local_sdata);
 Arg *ExternSData = Args.getLastArg(options::OPT_mextern_sdata,
-  options::OPT_mno_extern_sdata);
+   options::OPT_mno_extern_sdata);
+Arg *EmbeddedData = Args.getLastArg(options::OPT_membedded_data,
+options::OPT_mno_embedded_data);
 if (LocalSData) {
   CmdArgs.push_back("-mllvm");
   if (LocalSData->getOption().matches(options::OPT_mlocal_sdata)) {
@@ -1504,6 +1506,17 @@ void Clang::AddMIPSTargetArgs(const ArgL
   }
   ExternSData->claim();
 }
+
+if (EmbeddedData) {
+  CmdArgs.push_back("-mllvm");
+  if (EmbeddedData->getOption().matches(options::OPT_membedded_data)) {
+CmdArgs.push_back("-membedded-data=1");
+  } else {
+CmdArgs.push_back("-membedded-data=0");
+  }
+  EmbeddedData->claim();
+}
+
   } else if ((!ABICalls || (!NoABICalls && ABICalls)) && WantGPOpt)
 D.Diag(diag::warn_drv_unsupported_gpopt) << (ABICalls ? 0 : 1);
 

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=309935=309934=309935=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Thu Aug  3 06:04:29 2017
@@ -65,6 +65,21 @@
 // RUN:   | FileCheck --check-prefix=CHECK-MEXTERNSDATADEF %s
 // CHECK-MEXTERNSDATADEF-NOT: "-mllvm" "-mextern-sdata"
 //
+// -mno-abicalls -mgpopt -membedded-data
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 
-mno-embedded-data -membedded-data 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MEMBEDDEDDATA %s
+// CHECK-MEMBEDDEDDATA: "-mllvm" "-membedded-data=1"
+//
+// -mno-abicalls -mgpopt -mno-embedded-data
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 
-membedded-data -mno-embedded-data 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MNOEMBEDDEDDATA %s
+// CHECK-MNOEMBEDDEDDATA: "-mllvm" "-membedded-data=0"
+//
+// -mno-abicalls -mgpopt
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MEMBEDDEDDATADEF %s
+// CHECK-MEMBEDDEDDATADEF-NOT: "-mllvm" "-membedded-data"
+//
 // -mips16
 // RUN: %clang -target mips-linux-gnu -### -c %s \
 // RUN: -mno-mips16 -mips16 2>&1 \


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r308879 - [mips] Add support for -m(no-)extern-data.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Mon Jul 24 07:02:09 2017
New Revision: 308879

URL: http://llvm.org/viewvc/llvm-project?rev=308879=rev
Log:
[mips] Add support for -m(no-)extern-data.

Add support for -m(no-)extern-data when using -mgpopt in the driver. It is
enabled by default in the backend.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35550

Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308879=308878=308879=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Mon Jul 24 07:02:09 2017
@@ -2045,6 +2045,12 @@ def mlocal_sdata : Flag<["-"], "mlocal-s
   HelpText<"Extend the -G behaviour to object local data (MIPS)">;
 def mno_local_sdata : Flag<["-"], "mno-local-sdata">, Group,
   HelpText<"Do not extend the -G behaviour to object local data (MIPS)">;
+def mextern_sdata : Flag<["-"], "mextern-sdata">, Group,
+  HelpText<"Assume that externally defined data is in the small data if it"
+   " meets the -G  threshold (MIPS)">;
+def mno_extern_sdata : Flag<["-"], "mno-extern-sdata">, Group,
+  HelpText<"Do not assume that externally defined data is in the small data if"
+   " it meets the -G  threshold (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308879=308878=308879=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Mon Jul 24 07:02:09 2017
@@ -1483,6 +1483,8 @@ void Clang::AddMIPSTargetArgs(const ArgL
 
 Arg *LocalSData = Args.getLastArg(options::OPT_mlocal_sdata,
   options::OPT_mno_local_sdata);
+Arg *ExternSData = Args.getLastArg(options::OPT_mextern_sdata,
+  options::OPT_mno_extern_sdata);
 if (LocalSData) {
   CmdArgs.push_back("-mllvm");
   if (LocalSData->getOption().matches(options::OPT_mlocal_sdata)) {
@@ -1493,6 +1495,15 @@ void Clang::AddMIPSTargetArgs(const ArgL
   LocalSData->claim();
 }
 
+if (ExternSData) {
+  CmdArgs.push_back("-mllvm");
+  if (ExternSData->getOption().matches(options::OPT_mextern_sdata)) {
+CmdArgs.push_back("-mextern-sdata=1");
+  } else {
+CmdArgs.push_back("-mextern-sdata=0");
+  }
+  ExternSData->claim();
+}
   } else if ((!ABICalls || (!NoABICalls && ABICalls)) && WantGPOpt)
 D.Diag(diag::warn_drv_unsupported_gpopt) << (ABICalls ? 0 : 1);
 

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=308879=308878=308879=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Mon Jul 24 07:02:09 2017
@@ -50,6 +50,21 @@
 // RUN:   | FileCheck --check-prefix=CHECK-MLOCALSDATADEF %s
 // CHECK-MLOCALSDATADEF-NOT: "-mllvm" "-mlocal-sdata"
 //
+// -mno-abicalls -mgpopt -mextern-sdata
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 
-mno-extern-sdata -mextern-sdata 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MEXTERNSDATA %s
+// CHECK-MEXTERNSDATA: "-mllvm" "-mextern-sdata=1"
+//
+// -mno-abicalls -mgpopt -mno-extern-sdata
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 
-mextern-sdata -mno-extern-sdata 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MNOEXTERNSDATA %s
+// CHECK-MNOEXTERNSDATA: "-mllvm" "-mextern-sdata=0"
+//
+// -mno-abicalls -mgpopt
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MEXTERNSDATADEF %s
+// CHECK-MEXTERNSDATADEF-NOT: "-mllvm" "-mextern-sdata"
+//
 // -mips16
 // RUN: %clang -target mips-linux-gnu -### -c %s \
 // RUN: -mno-mips16 -mips16 2>&1 \


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r308683 - [mips] Add support for -m(no-)local-sdata

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Jul 20 15:23:21 2017
New Revision: 308683

URL: http://llvm.org/viewvc/llvm-project?rev=308683=rev
Log:
[mips] Add support for -m(no-)local-sdata

Teach the driver to support -mlocal-sdata. The backend already matches GCC's
default behaviour.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35549

Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308683=308682=308683=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Jul 20 15:23:21 2017
@@ -2041,6 +2041,10 @@ def mgpopt : Flag<["-"], "mgpopt">, Grou
 def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
   HelpText<"Do not use GP relative accesses for symbols known to be in a small"
" data section (MIPS)">;
+def mlocal_sdata : Flag<["-"], "mlocal-sdata">, Group,
+  HelpText<"Extend the -G behaviour to object local data (MIPS)">;
+def mno_local_sdata : Flag<["-"], "mno-local-sdata">, Group,
+  HelpText<"Do not extend the -G behaviour to object local data (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308683=308682=308683=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Jul 20 15:23:21 2017
@@ -1480,6 +1480,19 @@ void Clang::AddMIPSTargetArgs(const ArgL
   if (NoABICalls && (!GPOpt || WantGPOpt)) {
 CmdArgs.push_back("-mllvm");
 CmdArgs.push_back("-mgpopt");
+
+Arg *LocalSData = Args.getLastArg(options::OPT_mlocal_sdata,
+  options::OPT_mno_local_sdata);
+if (LocalSData) {
+  CmdArgs.push_back("-mllvm");
+  if (LocalSData->getOption().matches(options::OPT_mlocal_sdata)) {
+CmdArgs.push_back("-mlocal-sdata=1");
+  } else {
+CmdArgs.push_back("-mlocal-sdata=0");
+  }
+  LocalSData->claim();
+}
+
   } else if ((!ABICalls || (!NoABICalls && ABICalls)) && WantGPOpt)
 D.Diag(diag::warn_drv_unsupported_gpopt) << (ABICalls ? 0 : 1);
 

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=308683=308682=308683=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Thu Jul 20 15:23:21 2017
@@ -35,6 +35,21 @@
 // RUN:   | FileCheck --check-prefix=CHECK-MGPOPTDEF %s
 // CHECK-MGPOPTDEF: "-mllvm" "-mgpopt"
 //
+// -mgpopt -mno-abicalls -mlocal-sdata
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mno-gpopt 
-mgpopt -mno-local-sdata -mlocal-sdata 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MLOCALSDATA %s
+// CHECK-MLOCALSDATA: "-mllvm" "-mlocal-sdata=1"
+//
+// -mgpopt -mno-abicalls -mno-local-sdata
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mno-gpopt 
-mgpopt -mlocal-sdata -mno-local-sdata 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MNOLOCALSDATA %s
+// CHECK-MNOLOCALSDATA: "-mllvm" "-mlocal-sdata=0"
+//
+// -mgpopt -mno-abicalls
+// RUN: %clang -target mips-linux-gnu -### -c %s -mno-abicalls -mgpopt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MLOCALSDATADEF %s
+// CHECK-MLOCALSDATADEF-NOT: "-mllvm" "-mlocal-sdata"
+//
 // -mips16
 // RUN: %clang -target mips-linux-gnu -### -c %s \
 // RUN: -mno-mips16 -mips16 2>&1 \


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r308619 - Reland "[mips] Teach the driver to accept -m(no-)gpopt."

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Jul 20 07:04:12 2017
New Revision: 308619

URL: http://llvm.org/viewvc/llvm-project?rev=308619=rev
Log:
Reland "[mips] Teach the driver to accept -m(no-)gpopt."

This patch teaches the driver to pass -mgpopt by default to the backend when it
is supported, i.e. we are using -mno-abicalls.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35548

This version fixes a logic error that generated warnings incorrectly and
gets rid of spurious arguments to the backend when -mgpopt is not used.

Added:
cfe/trunk/test/Driver/mips-gpopt-warning.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=308619=308618=308619=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Thu Jul 20 07:04:12 
2017
@@ -279,6 +279,10 @@ def warn_target_unsupported_nanlegacy :
 def warn_target_unsupported_compact_branches : Warning<
   "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
   " support it">, InGroup;
+def warn_drv_unsupported_gpopt : Warning<
+  "ignoring '-mgpopt' option as it cannot be used with %select{|the implicit"
+  " usage of}0-mabicalls">,
+  InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=308619=308618=308619=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Thu Jul 20 07:04:12 2017
@@ -61,6 +61,7 @@ def DoublePromotion : DiagGroup<"double-
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
 def UnsupportedCB : DiagGroup<"unsupported-cb">;
+def UnsupportedGPOpt : DiagGroup<"unsupported-gpopt">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308619=308618=308619=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Jul 20 07:04:12 2017
@@ -2035,6 +2035,12 @@ def mfp64 : Flag<["-"], "mfp64">, Group<
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,
   HelpText<"Use 32-bit floating point registers (MIPS only)">;
+def mgpopt : Flag<["-"], "mgpopt">, Group,
+  HelpText<"Use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
+def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
+  HelpText<"Do not use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308619=308618=308619=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Jul 20 07:04:12 2017
@@ -1462,6 +1462,30 @@ void Clang::AddMIPSTargetArgs(const ArgL
 A->claim();
   }
 
+  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt, options::OPT_mno_gpopt);
+  Arg *ABICalls =
+  Args.getLastArg(options::OPT_mabicalls, options::OPT_mno_abicalls);
+
+  // -mabicalls is the default for many MIPS environments, even with -fno-pic.
+  // -mgpopt is the default for static, -fno-pic environments but these two
+  // options conflict. We want to be certain that -mno-abicalls -mgpopt is
+  // the only case where -mllvm -mgpopt is passed.
+  // NOTE: We need a warning here or in the backend to warn when -mgpopt is
+  //   passed explicitly when compiling something with -mabicalls
+  //   (implictly) in affect. Currently the warning is in the backend.
+  bool NoABICalls =
+  ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
+  bool 

r308459 - Revert "Reland "[mips] Teach the driver to accept -m(no-)gpopt.""

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 19 06:34:08 2017
New Revision: 308459

URL: http://llvm.org/viewvc/llvm-project?rev=308459=rev
Log:
Revert "Reland "[mips] Teach the driver to accept -m(no-)gpopt.""

This reverts r308458. Investigating further buildbot breakage.

Removed:
cfe/trunk/test/Driver/mips-gpopt-warning.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=308459=308458=308459=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Wed Jul 19 06:34:08 
2017
@@ -279,10 +279,6 @@ def warn_target_unsupported_nanlegacy :
 def warn_target_unsupported_compact_branches : Warning<
   "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
   " support it">, InGroup;
-def warn_drv_unsupported_gpopt : Warning<
-  "ignoring '-mgpopt' option as it cannot be used with %select{|the implicit"
-  " usage of}0-mabicalls">,
-  InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=308459=308458=308459=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Wed Jul 19 06:34:08 2017
@@ -61,7 +61,6 @@ def DoublePromotion : DiagGroup<"double-
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
 def UnsupportedCB : DiagGroup<"unsupported-cb">;
-def UnsupportedGPOpt : DiagGroup<"unsupported-gpopt">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308459=308458=308459=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Jul 19 06:34:08 2017
@@ -2035,12 +2035,6 @@ def mfp64 : Flag<["-"], "mfp64">, Group<
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,
   HelpText<"Use 32-bit floating point registers (MIPS only)">;
-def mgpopt : Flag<["-"], "mgpopt">, Group,
-  HelpText<"Use GP relative accesses for symbols known to be in a small"
-   " data section (MIPS)">;
-def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
-  HelpText<"Do not use GP relative accesses for symbols known to be in a small"
-   " data section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308459=308458=308459=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Wed Jul 19 06:34:08 2017
@@ -1462,33 +1462,6 @@ void Clang::AddMIPSTargetArgs(const ArgL
 A->claim();
   }
 
-  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt, options::OPT_mno_gpopt);
-  Arg *ABICalls =
-  Args.getLastArg(options::OPT_mabicalls, options::OPT_mno_abicalls);
-
-  // -mabicalls is the default for many MIPS environments, even with -fno-pic.
-  // -mgpopt is the default for static, -fno-pic environments but these two
-  // options conflict. We want to be certain that -mno-abicalls -mgpopt is
-  // the only case where -mllvm -mgpopt is passed.
-  // NOTE: We need a warning here or in the backend to warn when -mgpopt is
-  //   passed explicitly when compiling something with -mabicalls
-  //   (implictly) in affect. Currently the warning is in the backend.
-  bool NoABICalls =
-  ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
-  bool WantGPOpt = GPOpt && GPOpt->getOption().matches(options::OPT_mgpopt);
-  if (NoABICalls && (!GPOpt || WantGPOpt)) {
-  CmdArgs.push_back("-mllvm");
-  CmdArgs.push_back("-mgpopt=1");
-  } else {
-  CmdArgs.push_back("-mllvm");
-  CmdArgs.push_back("-mgpopt=0");
-  if 

r308458 - Reland "[mips] Teach the driver to accept -m(no-)gpopt."

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 19 06:12:37 2017
New Revision: 308458

URL: http://llvm.org/viewvc/llvm-project?rev=308458=rev
Log:
Reland "[mips] Teach the driver to accept -m(no-)gpopt."

This patch teaches the driver to pass -mgpopt by default to the backend when it
is supported, i.e. we are using -mno-abicalls.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35548

This version fixes a logic error that generated warnings incorrectly.

Added:
cfe/trunk/test/Driver/mips-gpopt-warning.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=308458=308457=308458=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Wed Jul 19 06:12:37 
2017
@@ -279,6 +279,10 @@ def warn_target_unsupported_nanlegacy :
 def warn_target_unsupported_compact_branches : Warning<
   "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
   " support it">, InGroup;
+def warn_drv_unsupported_gpopt : Warning<
+  "ignoring '-mgpopt' option as it cannot be used with %select{|the implicit"
+  " usage of}0-mabicalls">,
+  InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=308458=308457=308458=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Wed Jul 19 06:12:37 2017
@@ -61,6 +61,7 @@ def DoublePromotion : DiagGroup<"double-
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
 def UnsupportedCB : DiagGroup<"unsupported-cb">;
+def UnsupportedGPOpt : DiagGroup<"unsupported-gpopt">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308458=308457=308458=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Jul 19 06:12:37 2017
@@ -2035,6 +2035,12 @@ def mfp64 : Flag<["-"], "mfp64">, Group<
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,
   HelpText<"Use 32-bit floating point registers (MIPS only)">;
+def mgpopt : Flag<["-"], "mgpopt">, Group,
+  HelpText<"Use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
+def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
+  HelpText<"Do not use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308458=308457=308458=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Wed Jul 19 06:12:37 2017
@@ -1462,6 +1462,33 @@ void Clang::AddMIPSTargetArgs(const ArgL
 A->claim();
   }
 
+  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt, options::OPT_mno_gpopt);
+  Arg *ABICalls =
+  Args.getLastArg(options::OPT_mabicalls, options::OPT_mno_abicalls);
+
+  // -mabicalls is the default for many MIPS environments, even with -fno-pic.
+  // -mgpopt is the default for static, -fno-pic environments but these two
+  // options conflict. We want to be certain that -mno-abicalls -mgpopt is
+  // the only case where -mllvm -mgpopt is passed.
+  // NOTE: We need a warning here or in the backend to warn when -mgpopt is
+  //   passed explicitly when compiling something with -mabicalls
+  //   (implictly) in affect. Currently the warning is in the backend.
+  bool NoABICalls =
+  ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
+  bool WantGPOpt = GPOpt && GPOpt->getOption().matches(options::OPT_mgpopt);
+  if 

r308436 - Revert "[mips] Teach the driver to accept -m(no-)gpopt."

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 19 04:11:02 2017
New Revision: 308436

URL: http://llvm.org/viewvc/llvm-project?rev=308436=rev
Log:
Revert "[mips] Teach the driver to accept -m(no-)gpopt."

Revert r308431 and r308432, these caused broke some buildbots.

Removed:
cfe/trunk/test/Driver/mips-gpopt-warning.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=308436=308435=308436=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Wed Jul 19 04:11:02 
2017
@@ -279,10 +279,6 @@ def warn_target_unsupported_nanlegacy :
 def warn_target_unsupported_compact_branches : Warning<
   "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
   " support it">, InGroup;
-def warn_drv_unsupported_gpopt : Warning<
-  "ignoring '-mgpopt' option as it cannot be used with %select{|the implicit"
-  " usage of}0-mabicalls">,
-  InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=308436=308435=308436=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Wed Jul 19 04:11:02 2017
@@ -61,7 +61,6 @@ def DoublePromotion : DiagGroup<"double-
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
 def UnsupportedCB : DiagGroup<"unsupported-cb">;
-def UnsupportedGPOpt : DiagGroup<"unsupported-gpopt">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308436=308435=308436=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Jul 19 04:11:02 2017
@@ -2035,12 +2035,6 @@ def mfp64 : Flag<["-"], "mfp64">, Group<
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,
   HelpText<"Use 32-bit floating point registers (MIPS only)">;
-def mgpopt : Flag<["-"], "mgpopt">, Group,
-  HelpText<"Use GP relative accesses for symbols known to be in a small"
-   " data section (MIPS)">;
-def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
-  HelpText<"Do not use GP relative accesses for symbols known to be in a small"
-   " data section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308436=308435=308436=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Wed Jul 19 04:11:02 2017
@@ -1462,32 +1462,6 @@ void Clang::AddMIPSTargetArgs(const ArgL
 A->claim();
   }
 
-  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt, options::OPT_mno_gpopt);
-  Arg *ABICalls = Args.getLastArg(options::OPT_mabicalls, 
options::OPT_mno_abicalls);
-
-  // -mabicalls is the default for many MIPS environments, even with -fno-pic.
-  // -mgpopt is the default for static, -fno-pic environments but these two
-  // options conflict. We want to be certain that -mno-abicalls -mgpopt is
-  // the only case where -mllvm -mgpopt is passed.
-  // NOTE: We need a warning here or in the backend to warn when -mgpopt is
-  //   passed explicitly when compiling something with -mabicalls
-  //   (implictly) in affect. Currently the warning is in the backend.
-  bool NoABICalls =
-  ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
-  bool WantGPOpt = GPOpt && GPOpt->getOption().matches(options::OPT_mgpopt);
-  if (NoABICalls && (!GPOpt || WantGPOpt)) {
-  CmdArgs.push_back("-mllvm");
-  CmdArgs.push_back("-mgpopt=1");
-  } else {
-  CmdArgs.push_back("-mllvm");
-  CmdArgs.push_back("-mgpopt=0");
-  if ((!ABICalls || 

r308432 - [mips] Add warning test for -mgpopt option.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 19 03:39:15 2017
New Revision: 308432

URL: http://llvm.org/viewvc/llvm-project?rev=308432=rev
Log:
[mips] Add warning test for -mgpopt option.

Added:
cfe/trunk/test/Driver/mips-gpopt-warning.c

Added: cfe/trunk/test/Driver/mips-gpopt-warning.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-gpopt-warning.c?rev=308432=auto
==
--- cfe/trunk/test/Driver/mips-gpopt-warning.c (added)
+++ cfe/trunk/test/Driver/mips-gpopt-warning.c Wed Jul 19 03:39:15 2017
@@ -0,0 +1,6 @@
+// REQUIRES: mips-registered-target
+// RUN: %clang -### -c -target mips-mti-elf %s -mgpopt 2>&1 | FileCheck 
-check-prefix=IMPLICIT %s
+// IMPLICIT: warning: ignoring '-mgpopt' option as it cannot be used with the 
implicit usage of-mabicalls
+
+// RUN: %clang -### -c -target mips-mti-elf %s -mgpopt -mabicalls 2>&1 | 
FileCheck -check-prefix=EXPLICIT %s
+// EXPLICIT: warning: ignoring '-mgpopt' option as it cannot be used with 
-mabicalls


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r308431 - [mips] Teach the driver to accept -m(no-)gpopt.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 19 03:38:03 2017
New Revision: 308431

URL: http://llvm.org/viewvc/llvm-project?rev=308431=rev
Log:
[mips] Teach the driver to accept -m(no-)gpopt.

This patch teaches the driver to pass -mgpopt by default to the backend when it
is supported, i.e. we are using -mno-abicalls.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35548

Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=308431=308430=308431=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Wed Jul 19 03:38:03 
2017
@@ -279,6 +279,10 @@ def warn_target_unsupported_nanlegacy :
 def warn_target_unsupported_compact_branches : Warning<
   "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
   " support it">, InGroup;
+def warn_drv_unsupported_gpopt : Warning<
+  "ignoring '-mgpopt' option as it cannot be used with %select{|the implicit"
+  " usage of}0-mabicalls">,
+  InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=308431=308430=308431=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Wed Jul 19 03:38:03 2017
@@ -61,6 +61,7 @@ def DoublePromotion : DiagGroup<"double-
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
 def UnsupportedCB : DiagGroup<"unsupported-cb">;
+def UnsupportedGPOpt : DiagGroup<"unsupported-gpopt">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=308431=308430=308431=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Jul 19 03:38:03 2017
@@ -2035,6 +2035,12 @@ def mfp64 : Flag<["-"], "mfp64">, Group<
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,
   HelpText<"Use 32-bit floating point registers (MIPS only)">;
+def mgpopt : Flag<["-"], "mgpopt">, Group,
+  HelpText<"Use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
+def mno_gpopt : Flag<["-"], "mno-gpopt">, Group,
+  HelpText<"Do not use GP relative accesses for symbols known to be in a small"
+   " data section (MIPS)">;
 def mnan_EQ : Joined<["-"], "mnan=">, Group;
 def mabicalls : Flag<["-"], "mabicalls">, Group,
   HelpText<"Enable SVR4-style position-independent code (Mips only)">;

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=308431=308430=308431=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Wed Jul 19 03:38:03 2017
@@ -1462,6 +1462,32 @@ void Clang::AddMIPSTargetArgs(const ArgL
 A->claim();
   }
 
+  Arg *GPOpt = Args.getLastArg(options::OPT_mgpopt, options::OPT_mno_gpopt);
+  Arg *ABICalls = Args.getLastArg(options::OPT_mabicalls, 
options::OPT_mno_abicalls);
+
+  // -mabicalls is the default for many MIPS environments, even with -fno-pic.
+  // -mgpopt is the default for static, -fno-pic environments but these two
+  // options conflict. We want to be certain that -mno-abicalls -mgpopt is
+  // the only case where -mllvm -mgpopt is passed.
+  // NOTE: We need a warning here or in the backend to warn when -mgpopt is
+  //   passed explicitly when compiling something with -mabicalls
+  //   (implictly) in affect. Currently the warning is in the backend.
+  bool NoABICalls =
+  ABICalls && ABICalls->getOption().matches(options::OPT_mno_abicalls);
+  bool WantGPOpt = GPOpt && GPOpt->getOption().matches(options::OPT_mgpopt);
+  if (NoABICalls && (!GPOpt || WantGPOpt)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-mgpopt=1");
+  } else {
+  

r307847 - [mips][mt][7/7] Add driver option for the MIPS MT ASE.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jul 12 14:13:05 2017
New Revision: 307847

URL: http://llvm.org/viewvc/llvm-project?rev=307847=rev
Log:
[mips][mt][7/7] Add driver option for the MIPS MT ASE.

Reviewers: atanasyan, slthakur

Differential Revision: https://reviews.llvm.org/D35254

Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=307847=307846=307847=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Jul 12 14:13:05 2017
@@ -2027,6 +2027,10 @@ def mmsa : Flag<["-"], "mmsa">, Group;
 def mno_msa : Flag<["-"], "mno-msa">, Group,
   HelpText<"Disable MSA ASE (MIPS only)">;
+def mmt : Flag<["-"], "mmt">, Group,
+  HelpText<"Enable MT ASE (MIPS only)">;
+def mno_mt : Flag<["-"], "mno-mt">, Group,
+  HelpText<"Disable MT ASE (MIPS only)">;
 def mfp64 : Flag<["-"], "mfp64">, Group,
   HelpText<"Use 64-bit floating point registers (MIPS only)">;
 def mfp32 : Flag<["-"], "mfp32">, Group,

Modified: cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp?rev=307847=307846=307847=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp Wed Jul 12 14:13:05 2017
@@ -301,6 +301,7 @@ void mips::getMIPSTargetFeatures(const D
"nomadd4");
   AddTargetFeature(Args, Features, options::OPT_mlong_calls,
options::OPT_mno_long_calls, "long-calls");
+  AddTargetFeature(Args, Features, options::OPT_mmt, options::OPT_mno_mt,"mt");
 }
 
 mips::NanEncoding mips::getSupportedNanEncoding(StringRef ) {

Modified: cfe/trunk/test/Driver/mips-features.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-features.c?rev=307847=307846=307847=diff
==
--- cfe/trunk/test/Driver/mips-features.c (original)
+++ cfe/trunk/test/Driver/mips-features.c Wed Jul 12 14:13:05 2017
@@ -70,6 +70,18 @@
 // RUN:   | FileCheck --check-prefix=CHECK-NOMMSA %s
 // CHECK-NOMMSA: "-target-feature" "-msa"
 //
+// -mmt
+// RUN: %clang -target mips-linux-gnu -### -c %s \
+// RUN: -mno-mt -mmt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-MMT %s
+// CHECK-MMT: "-target-feature" "+mt"
+//
+// -mno-mt
+// RUN: %clang -target mips-linux-gnu -### -c %s \
+// RUN: -mmt -mno-mt 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-NOMMT %s
+// CHECK-NOMMT: "-target-feature" "-mt"
+//
 // -modd-spreg
 // RUN: %clang -target mips-linux-gnu -### -c %s -mno-odd-spreg -modd-spreg 
2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MODDSPREG %s


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RE: r304935 - Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt

[Simon Dardis via cfe-commits]

Appears to be fixed, r304936. I'll keep an eye on the buildbots.

Thanks,
Simon

From: cfe-commits [cfe-commits-boun...@lists.llvm.org] on behalf of Evgenii 
Stepanov via cfe-commits [cfe-commits@lists.llvm.org]
Sent: 07 June 2017 20:53
To: Petar Jovanovic
Cc: cfe-commits
Subject: Re: r304935 - Revert r304929 [mips] Add runtime options to 
enable/disable madd/sub.fmt

You've left an empty file in test/CodeGen/mips-madd4.c

On Wed, Jun 7, 2017 at 11:57 AM, Petar Jovanovic via cfe-commits
 wrote:
> Author: petarj
> Date: Wed Jun  7 13:57:56 2017
> New Revision: 304935
>
> URL: http://llvm.org/viewvc/llvm-project?rev=304935=rev
> Log:
> Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
>
> Revert r304929 since the test broke buildbots.
>
> Original commit:
>
>   [mips] Add runtime options to enable/disable madd.fmt and msub.fmt
>
>   Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
>   generation of madd.fmt and similar instructions respectively, as per GCC.
>
>   Patch by Stefan Maksimovic.
>
> Modified:
> cfe/trunk/include/clang/Driver/Options.td
> cfe/trunk/lib/Basic/Targets.cpp
> cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
> cfe/trunk/test/CodeGen/mips-madd4.c
> cfe/trunk/test/Preprocessor/init.c
>
> Modified: cfe/trunk/include/clang/Driver/Options.td
> URL: 
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=304935=304934=304935=diff
> ==
> --- cfe/trunk/include/clang/Driver/Options.td (original)
> +++ cfe/trunk/include/clang/Driver/Options.td Wed Jun  7 13:57:56 2017
> @@ -2001,10 +2001,6 @@ def mdspr2 : Flag<["-"], "mdspr2">, Grou
>  def mno_dspr2 : Flag<["-"], "mno-dspr2">, Group;
>  def msingle_float : Flag<["-"], "msingle-float">, Group;
>  def mdouble_float : Flag<["-"], "mdouble-float">, Group;
> -def mmadd4 : Flag<["-"], "mmadd4">, Group,
> -  HelpText<"Enable the generation of 4-operand madd.s, madd.d and related 
> instructions.">;
> -def mno_madd4 : Flag<["-"], "mno-madd4">, Group,
> -  HelpText<"Disable the generation of 4-operand madd.s, madd.d and related 
> instructions.">;
>  def mmsa : Flag<["-"], "mmsa">, Group,
>HelpText<"Enable MSA ASE (MIPS only)">;
>  def mno_msa : Flag<["-"], "mno-msa">, Group,
>
> Modified: cfe/trunk/lib/Basic/Targets.cpp
> URL: 
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=304935=304934=304935=diff
> ==
> --- cfe/trunk/lib/Basic/Targets.cpp (original)
> +++ cfe/trunk/lib/Basic/Targets.cpp Wed Jun  7 13:57:56 2017
> @@ -7737,7 +7737,6 @@ class MipsTargetInfo : public TargetInfo
>  NoDSP, DSP1, DSP2
>} DspRev;
>bool HasMSA;
> -  bool DisableMadd4;
>
>  protected:
>bool HasFP64;
> @@ -7748,7 +7747,7 @@ public:
>: TargetInfo(Triple), IsMips16(false), IsMicromips(false),
>  IsNan2008(false), IsSingleFloat(false), IsNoABICalls(false),
>  CanUseBSDABICalls(false), FloatABI(HardFloat), DspRev(NoDSP),
> -HasMSA(false), DisableMadd4(false), HasFP64(false) {
> +HasMSA(false), HasFP64(false) {
>  TheCXXABI.set(TargetCXXABI::GenericMIPS);
>
>  setABI((getTriple().getArch() == llvm::Triple::mips ||
> @@ -7994,9 +7993,6 @@ public:
>  if (HasMSA)
>Builder.defineMacro("__mips_msa", Twine(1));
>
> -if (DisableMadd4)
> -  Builder.defineMacro("__mips_no_madd4", Twine(1));
> -
>  Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
>  Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
>  Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
> @@ -8159,8 +8155,6 @@ public:
>  DspRev = std::max(DspRev, DSP2);
>else if (Feature == "+msa")
>  HasMSA = true;
> -  else if (Feature == "+nomadd4")
> -DisableMadd4 = true;
>else if (Feature == "+fp64")
>  HasFP64 = true;
>else if (Feature == "-fp64")
>
> Modified: cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
> URL: 
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp?rev=304935=304934=304935=diff
> ==
> --- cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp (original)
> +++ cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp Wed Jun  7 13:57:56 2017
> @@ -298,13 +298,6 @@ void mips::getMIPSTargetFeatures(const D
>
>AddTargetFeature(Args, Features, options::OPT_mno_odd_spreg,
> options::OPT_modd_spreg, "nooddspreg");
> -
> -  if (Arg *A = Args.getLastArg(options::OPT_mmadd4, options::OPT_mno_madd4)) 
> {
> -if (A->getOption().matches(options::OPT_mmadd4))
> -  Features.push_back("-nomadd4");
> -else
> -  Features.push_back("+nomadd4");
> -  }
>  }
>
>  mips::NanEncoding 

r304936 - Finish revert of "r304929, [mips] Add runtime options to enable/disable madd/sub.fmt"

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Jun  7 15:02:24 2017
New Revision: 304936

URL: http://llvm.org/viewvc/llvm-project?rev=304936=rev
Log:
Finish revert of "r304929, [mips] Add runtime options to enable/disable 
madd/sub.fmt"

The r304935 missed deleting the test case.


Removed:
cfe/trunk/test/CodeGen/mips-madd4.c

Removed: cfe/trunk/test/CodeGen/mips-madd4.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/mips-madd4.c?rev=304935=auto
==
(empty)


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RE: r302935 - [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

Thanks, I'll try and look at this tomorrow.

Simon



From: Vitaly Buka [vitalyb...@google.com]

Sent: 15 May 2017 20:57

To: Simon Dardis; cfe-commits@lists.llvm.org

Subject: Re: r302935 - [Sema] Support implicit scalar to vector conversions


From ubsan bot:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/4892/steps/check-clang%20ubsan/logs/stdio

llvm/tools/clang/lib/Sema/SemaExpr.cpp:8257:9: runtime error: load of value 
4294967295, which is not a valid value for type 'clang::CastKind'
#0 0x5bc3b88 in tryGCCVectorConvertAndSplat(clang::Sema&, 
clang::ActionResult<clang::Expr*, true>*, clang::ActionResult<clang::Expr*, 
true>*) 
/mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/tools/clang/lib/Sema/SemaExpr.cpp:8257:9
#1 0x5bbbea5 in 
clang::Sema::CheckVectorOperands(clang::ActionResult<clang::Expr*, true>&, 
clang::ActionResult<clang::Expr*, true>&, clang::SourceLocation, bool, bool, 
bool) 
/mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/tools/clang/lib/Sema/SemaExpr.cpp:8352:12
#2 0x5bcc553 in 
clang::Sema::CheckVectorCompareOperands(clang::ActionResult<clang::Expr*, 
true>&, clang::ActionResult<clang::Expr*, true>&, clang::SourceLocation, bool) 
/mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/tools/clang/lib/Sema/SemaExpr.cpp:9990:20
#3 0x5bc93a8 in 
clang::Sema::CheckCompareOperands(clang::ActionResult<clang::Expr*, true>&, 
clang::ActionResult<clang::Expr*, true>&, clang::SourceLocation, 
clang::BinaryOperatorKind, bool) 
/mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/tools/clang/lib/Sema/SemaExpr.cpp:9495:12



On Fri, May 12, 2017 at 12:24 PM Simon Dardis via cfe-commits 
<cfe-commits@lists.llvm.org> wrote:



Author: sdardis

Date: Fri May 12 14:11:06 2017

New Revision: 302935



URL: 
http://llvm.org/viewvc/llvm-project?rev=302935=rev

Log:

[Sema] Support implicit scalar to vector conversions



This patch teaches clang to perform implicit scalar to vector conversions

when one of the operands of a binary vector expression is a scalar which

can be converted to the element type of the vector without truncation

following GCC's implementation.



If the (constant) scalar is can be casted safely, it is implicitly casted to the

vector elements type and splatted to produce a vector of the same type.



Contributions from: Petar Jovanovic



Reviewers: bruno, vkalintiris



Differential Revision: 
https://reviews.llvm.org/D25866





Added:

cfe/trunk/test/Sema/vector-gcc-compat.c

cfe/trunk/test/Sema/vector-gcc-compat.cpp

Modified:

cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td

cfe/trunk/include/clang/Sema/Sema.h

cfe/trunk/lib/Sema/SemaExpr.cpp

cfe/trunk/lib/Sema/SemaExprCXX.cpp

cfe/trunk/test/Sema/vector-cast.c

cfe/trunk/test/Sema/vector-ops.c

cfe/trunk/test/Sema/zvector.c

cfe/trunk/test/SemaCXX/vector-no-lax.cpp



Modified: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td

URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td?rev=302935=302934=302935=diff

==

--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td (original)

+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td Fri May 12 14:11:06 
2017

@@ -2465,6 +2465,9 @@ def err_attribute_invalid_size : Error<

   "vector size not an integral multiple of component size">;

 def err_attribute_zero_size : Error<"zero vector size">;

 def err_attribute_size_too_large : Error<"vector size too large">;

+def err_typecheck_vector_not_convertable_implict_truncation : Error<

+   "cannot convert between %select{scalar|vector}0 type %1 and vector type"

+   " %2 as implicit conversion would cause truncation">;

 def err_typecheck_vector_not_convertable : Error<

   "cannot convert between vector values of different size (%0 and %1)">;

 def err_typecheck_vector_not_convertable_non_scalar : Error<

@@ -5779,6 +5782,9 @@ def err_objc_object_assignment : Error<

   "cannot assign to class object (%0 invalid)">;

 def err_typecheck_invalid_operands : Error<

   "invalid operands to binary expression (%0 and %1)">;

+def err_typecheck_logical_vector_expr_gnu_cpp_restrict : Error<

+  "logical expression with vector %select{type %1 and non-vector type %2|types"

+  " %1 and %2}0 is only supported in C++">;

 def err_typecheck_sub_ptr_compatible : Error<

   "%diff{$ and $ are not pointers to compatible types|"

   "pointers to incompatible types}0,1">;



Modified: cfe/trunk/include/clang/Sema/Sema.h

URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Sema/Sema.h?rev=302935=302934=302935=dif

r302941 - [Sema] Silence buildbot failures introduced by r302935

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri May 12 14:55:32 2017
New Revision: 302941

URL: http://llvm.org/viewvc/llvm-project?rev=302941=rev
Log:
[Sema] Silence buildbot failures introduced by r302935

Attempt to silence buildbot failures by pinning the test to a given
triple rather than the host's triple.


Modified:
cfe/trunk/test/Sema/vector-gcc-compat.c
cfe/trunk/test/Sema/vector-gcc-compat.cpp

Modified: cfe/trunk/test/Sema/vector-gcc-compat.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/vector-gcc-compat.c?rev=302941=302940=302941=diff
==
--- cfe/trunk/test/Sema/vector-gcc-compat.c (original)
+++ cfe/trunk/test/Sema/vector-gcc-compat.c Fri May 12 14:55:32 2017
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything -triple 
x86_64-apple-darwin10
 
 // Test the compatibility of clang's vector extensions with gcc's vector
 // extensions for C. Notably &&, ||, ?: and ! are not available.

Modified: cfe/trunk/test/Sema/vector-gcc-compat.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/vector-gcc-compat.cpp?rev=302941=302940=302941=diff
==
--- cfe/trunk/test/Sema/vector-gcc-compat.cpp (original)
+++ cfe/trunk/test/Sema/vector-gcc-compat.cpp Fri May 12 14:55:32 2017
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything -std=c++11
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything -std=c++11 -triple 
x86_64-apple-darwin10
 
 // Test the compatibility of clang++'s vector extensions with g++'s vector
 // extensions. In comparison to the extensions available in C, the !, ?:, && 
and


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r302935 - [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri May 12 14:11:06 2017
New Revision: 302935

URL: http://llvm.org/viewvc/llvm-project?rev=302935=rev
Log:
[Sema] Support implicit scalar to vector conversions

This patch teaches clang to perform implicit scalar to vector conversions
when one of the operands of a binary vector expression is a scalar which
can be converted to the element type of the vector without truncation
following GCC's implementation.

If the (constant) scalar is can be casted safely, it is implicitly casted to the
vector elements type and splatted to produce a vector of the same type.

Contributions from: Petar Jovanovic

Reviewers: bruno, vkalintiris

Differential Revision: https://reviews.llvm.org/D25866


Added:
cfe/trunk/test/Sema/vector-gcc-compat.c
cfe/trunk/test/Sema/vector-gcc-compat.cpp
Modified:
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Sema/Sema.h
cfe/trunk/lib/Sema/SemaExpr.cpp
cfe/trunk/lib/Sema/SemaExprCXX.cpp
cfe/trunk/test/Sema/vector-cast.c
cfe/trunk/test/Sema/vector-ops.c
cfe/trunk/test/Sema/zvector.c
cfe/trunk/test/SemaCXX/vector-no-lax.cpp

Modified: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td?rev=302935=302934=302935=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td Fri May 12 14:11:06 
2017
@@ -2465,6 +2465,9 @@ def err_attribute_invalid_size : Error<
   "vector size not an integral multiple of component size">;
 def err_attribute_zero_size : Error<"zero vector size">;
 def err_attribute_size_too_large : Error<"vector size too large">;
+def err_typecheck_vector_not_convertable_implict_truncation : Error<
+   "cannot convert between %select{scalar|vector}0 type %1 and vector type"
+   " %2 as implicit conversion would cause truncation">;
 def err_typecheck_vector_not_convertable : Error<
   "cannot convert between vector values of different size (%0 and %1)">;
 def err_typecheck_vector_not_convertable_non_scalar : Error<
@@ -5779,6 +5782,9 @@ def err_objc_object_assignment : Error<
   "cannot assign to class object (%0 invalid)">;
 def err_typecheck_invalid_operands : Error<
   "invalid operands to binary expression (%0 and %1)">;
+def err_typecheck_logical_vector_expr_gnu_cpp_restrict : Error<
+  "logical expression with vector %select{type %1 and non-vector type %2|types"
+  " %1 and %2}0 is only supported in C++">;
 def err_typecheck_sub_ptr_compatible : Error<
   "%diff{$ and $ are not pointers to compatible types|"
   "pointers to incompatible types}0,1">;

Modified: cfe/trunk/include/clang/Sema/Sema.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Sema/Sema.h?rev=302935=302934=302935=diff
==
--- cfe/trunk/include/clang/Sema/Sema.h (original)
+++ cfe/trunk/include/clang/Sema/Sema.h Fri May 12 14:11:06 2017
@@ -9285,6 +9285,8 @@ public:
   /// type checking binary operators (subroutines of CreateBuiltinBinOp).
   QualType InvalidOperands(SourceLocation Loc, ExprResult ,
ExprResult );
+  QualType InvalidLogicalVectorOperands(SourceLocation Loc, ExprResult ,
+ ExprResult );
   QualType CheckPointerToMemberOperands( // C++ 5.5
 ExprResult , ExprResult , ExprValueKind ,
 SourceLocation OpLoc, bool isIndirect);

Modified: cfe/trunk/lib/Sema/SemaExpr.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaExpr.cpp?rev=302935=302934=302935=diff
==
--- cfe/trunk/lib/Sema/SemaExpr.cpp (original)
+++ cfe/trunk/lib/Sema/SemaExpr.cpp Fri May 12 14:11:06 2017
@@ -8031,6 +8031,33 @@ QualType Sema::InvalidOperands(SourceLoc
   return QualType();
 }
 
+// Diagnose cases where a scalar was implicitly converted to a vector and
+// diagnose the underlying types. Otherwise, diagnose the error
+// as invalid vector logical operands for non-C++ cases.
+QualType Sema::InvalidLogicalVectorOperands(SourceLocation Loc, ExprResult 
,
+ExprResult ) {
+  QualType LHSType = LHS.get()->IgnoreImpCasts()->getType();
+  QualType RHSType = RHS.get()->IgnoreImpCasts()->getType();
+
+  bool LHSNatVec = LHSType->isVectorType();
+  bool RHSNatVec = RHSType->isVectorType();
+
+  if (!(LHSNatVec && RHSNatVec)) {
+Expr *Vector = LHSNatVec ? LHS.get() : RHS.get();
+Expr *NonVector = !LHSNatVec ? LHS.get() : RHS.get();
+Diag(Loc, diag::err_typecheck_logical_vector_expr_gnu_cpp_restrict)
+<< 0 << Vector->getType() << NonVector->IgnoreImpCasts()->getType()
+<< Vector->getSourceRange();
+return QualType();
+  }
+
+  Diag(Loc, 

r299643 - [Sema] Retarget test to a specific platform for consistent datasizes

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Apr  6 06:12:14 2017
New Revision: 299643

URL: http://llvm.org/viewvc/llvm-project?rev=299643=rev
Log:
[Sema] Retarget test to a specific platform for consistent datasizes

Attempt to satisfy llvm-clang-x86_64-expensive-checks-win by targeting
x86_64-apple-darwin10 for Sema/vector-ops.c. The underlying failure is
due to datatype differences between platforms.


Modified:
cfe/trunk/test/Sema/vector-ops.c

Modified: cfe/trunk/test/Sema/vector-ops.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/vector-ops.c?rev=299643=299642=299643=diff
==
--- cfe/trunk/test/Sema/vector-ops.c (original)
+++ cfe/trunk/test/Sema/vector-ops.c Thu Apr  6 06:12:14 2017
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -verify -fsyntax-only -Wvector-conversion
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Wvector-conversion -triple 
x86_64-apple-darwin10
 typedef unsigned int v2u __attribute__ ((vector_size (8)));
 typedef int v2s __attribute__ ((vector_size (8)));
 typedef float v2f __attribute__ ((vector_size(8)));


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r299641 - [Sema] Extend GetSignedVectorType to deal with non ExtVector types

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Apr  6 05:38:03 2017
New Revision: 299641

URL: http://llvm.org/viewvc/llvm-project?rev=299641=rev
Log:
[Sema] Extend GetSignedVectorType to deal with non ExtVector types

This improves some error messages which would otherwise refer to
ext_vector_type types in contexts where there are no such types.

Factored out from D25866 at reviewer's request.

Reviewers: bruno

Differential Revision: https://reviews.llvm.org/D31667


Modified:
cfe/trunk/lib/Sema/SemaExpr.cpp
cfe/trunk/test/Sema/vector-ops.c

Modified: cfe/trunk/lib/Sema/SemaExpr.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaExpr.cpp?rev=299641=299640=299641=diff
==
--- cfe/trunk/lib/Sema/SemaExpr.cpp (original)
+++ cfe/trunk/lib/Sema/SemaExpr.cpp Thu Apr  6 05:38:03 2017
@@ -9711,24 +9711,45 @@ QualType Sema::CheckCompareOperands(Expr
   return InvalidOperands(Loc, LHS, RHS);
 }
 
-
-// Return a signed type that is of identical size and number of elements.
-// For floating point vectors, return an integer type of identical size 
-// and number of elements.
+// Return a signed ext_vector_type that is of identical size and number of
+// elements. For floating point vectors, return an integer type of identical
+// size and number of elements. In the non ext_vector_type case, search from
+// the largest type to the smallest type to avoid cases where long long == 
long,
+// where long gets picked over long long.
 QualType Sema::GetSignedVectorType(QualType V) {
   const VectorType *VTy = V->getAs();
   unsigned TypeSize = Context.getTypeSize(VTy->getElementType());
-  if (TypeSize == Context.getTypeSize(Context.CharTy))
-return Context.getExtVectorType(Context.CharTy, VTy->getNumElements());
-  else if (TypeSize == Context.getTypeSize(Context.ShortTy))
-return Context.getExtVectorType(Context.ShortTy, VTy->getNumElements());
-  else if (TypeSize == Context.getTypeSize(Context.IntTy))
-return Context.getExtVectorType(Context.IntTy, VTy->getNumElements());
+
+  if (isa(VTy)) {
+if (TypeSize == Context.getTypeSize(Context.CharTy))
+  return Context.getExtVectorType(Context.CharTy, VTy->getNumElements());
+else if (TypeSize == Context.getTypeSize(Context.ShortTy))
+  return Context.getExtVectorType(Context.ShortTy, VTy->getNumElements());
+else if (TypeSize == Context.getTypeSize(Context.IntTy))
+  return Context.getExtVectorType(Context.IntTy, VTy->getNumElements());
+else if (TypeSize == Context.getTypeSize(Context.LongTy))
+  return Context.getExtVectorType(Context.LongTy, VTy->getNumElements());
+assert(TypeSize == Context.getTypeSize(Context.LongLongTy) &&
+   "Unhandled vector element size in vector compare");
+return Context.getExtVectorType(Context.LongLongTy, VTy->getNumElements());
+  }
+
+  if (TypeSize == Context.getTypeSize(Context.LongLongTy))
+return Context.getVectorType(Context.LongLongTy, VTy->getNumElements(),
+ VectorType::GenericVector);
   else if (TypeSize == Context.getTypeSize(Context.LongTy))
-return Context.getExtVectorType(Context.LongTy, VTy->getNumElements());
-  assert(TypeSize == Context.getTypeSize(Context.LongLongTy) &&
+return Context.getVectorType(Context.LongTy, VTy->getNumElements(),
+ VectorType::GenericVector);
+  else if (TypeSize == Context.getTypeSize(Context.IntTy))
+return Context.getVectorType(Context.IntTy, VTy->getNumElements(),
+ VectorType::GenericVector);
+  else if (TypeSize == Context.getTypeSize(Context.ShortTy))
+return Context.getVectorType(Context.ShortTy, VTy->getNumElements(),
+ VectorType::GenericVector);
+  assert(TypeSize == Context.getTypeSize(Context.CharTy) &&
  "Unhandled vector element size in vector compare");
-  return Context.getExtVectorType(Context.LongLongTy, VTy->getNumElements());
+  return Context.getVectorType(Context.CharTy, VTy->getNumElements(),
+   VectorType::GenericVector);
 }
 
 /// CheckVectorCompareOperands - vector comparisons are a clang extension that
@@ -9775,7 +9796,7 @@ QualType Sema::CheckVectorCompareOperand
 assert (RHS.get()->getType()->hasFloatingRepresentation());
 CheckFloatComparison(Loc, LHS.get(), RHS.get());
   }
-  
+
   // Return a signed type for the vector.
   return GetSignedVectorType(vType);
 }
@@ -9792,7 +9813,7 @@ QualType Sema::CheckVectorLogicalOperand
   if (getLangOpts().OpenCL && getLangOpts().OpenCLVersion < 120 &&
   vType->hasFloatingRepresentation())
 return InvalidOperands(Loc, LHS, RHS);
-  
+
   return GetSignedVectorType(LHS.get()->getType());
 }
 

Modified: cfe/trunk/test/Sema/vector-ops.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/vector-ops.c?rev=299641=299640=299641=diff

r295728 - [mips] Define macros related to -mabicalls in the preprocessor

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Tue Feb 21 10:01:00 2017
New Revision: 295728

URL: http://llvm.org/viewvc/llvm-project?rev=295728=rev
Log:
[mips] Define macros related to -mabicalls in the preprocessor

Summary:
Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in
the preprocessor when -mabicalls is in effect.

Mainline GCC later defined __mips_abicalls when -mabicalls is in effect.

This patch teaches the preprocessor to define these macros when appropriate.

NetBSD does not require the ABICALLS macro.

This resolves PR/31694.

Thanks to Sean Bruno for highlighting this issue!

Reviewers: slthakur, seanbruno

Reviewed By: seanbruno

Subscribers: joerg, brad, emaste, seanbruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D29032


Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/Preprocessor/init.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=295728=295727=295728=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Tue Feb 21 10:01:00 2017
@@ -7464,6 +7464,8 @@ class MipsTargetInfo : public TargetInfo
   bool IsMicromips;
   bool IsNan2008;
   bool IsSingleFloat;
+  bool IsNoABICalls;
+  bool CanUseBSDABICalls;
   enum MipsFloatABI {
 HardFloat, SoftFloat
   } FloatABI;
@@ -7479,8 +7481,9 @@ protected:
 public:
   MipsTargetInfo(const llvm::Triple , const TargetOptions &)
   : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
-IsNan2008(false), IsSingleFloat(false), FloatABI(HardFloat),
-DspRev(NoDSP), HasMSA(false), HasFP64(false) {
+IsNan2008(false), IsSingleFloat(false), IsNoABICalls(false),
+CanUseBSDABICalls(false), FloatABI(HardFloat), DspRev(NoDSP),
+HasMSA(false), HasFP64(false) {
 TheCXXABI.set(TargetCXXABI::GenericMIPS);
 
 setABI((getTriple().getArch() == llvm::Triple::mips ||
@@ -7489,6 +7492,9 @@ public:
: "n64");
 
 CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
+
+CanUseBSDABICalls = Triple.getOS() == llvm::Triple::FreeBSD ||
+Triple.getOS() == llvm::Triple::OpenBSD;
   }
 
   bool isNaN2008Default() const {
@@ -7669,6 +7675,12 @@ public:
 } else
   llvm_unreachable("Invalid ABI.");
 
+if (!IsNoABICalls) {
+  Builder.defineMacro("__mips_abicalls");
+  if (CanUseBSDABICalls)
+Builder.defineMacro("__ABICALLS__");
+}
+
 Builder.defineMacro("__REGISTER_PREFIX__", "");
 
 switch (FloatABI) {
@@ -7883,6 +7895,8 @@ public:
 IsNan2008 = true;
   else if (Feature == "-nan2008")
 IsNan2008 = false;
+  else if (Feature == "+noabicalls")
+IsNoABICalls = true;
 }
 
 setDataLayout();

Modified: cfe/trunk/test/Preprocessor/init.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/init.c?rev=295728=295727=295728=diff
==
--- cfe/trunk/test/Preprocessor/init.c (original)
+++ cfe/trunk/test/Preprocessor/init.c Tue Feb 21 10:01:00 2017
@@ -3040,6 +3040,7 @@
 // MIPS32BE:#define __llvm__ 1
 // MIPS32BE:#define __mips 32
 // MIPS32BE:#define __mips__ 1
+// MIPS32BE:#define __mips_abicalls 1
 // MIPS32BE:#define __mips_fpr 32
 // MIPS32BE:#define __mips_hard_float 1
 // MIPS32BE:#define __mips_o32 1
@@ -3246,6 +3247,7 @@
 // MIPS32EL:#define __llvm__ 1
 // MIPS32EL:#define __mips 32
 // MIPS32EL:#define __mips__ 1
+// MIPS32EL:#define __mips_abicalls 1
 // MIPS32EL:#define __mips_fpr 32
 // MIPS32EL:#define __mips_hard_float 1
 // MIPS32EL:#define __mips_o32 1
@@ -3555,6 +3557,7 @@
 // MIPSN32BE: #define __mips64 1
 // MIPSN32BE: #define __mips64__ 1
 // MIPSN32BE: #define __mips__ 1
+// MIPSN32BE: #define __mips_abicalls 1
 // MIPSN32BE: #define __mips_fpr 64
 // MIPSN32BE: #define __mips_hard_float 1
 // MIPSN32BE: #define __mips_isa_rev 2
@@ -3861,6 +3864,7 @@
 // MIPSN32EL: #define __mips64 1
 // MIPSN32EL: #define __mips64__ 1
 // MIPSN32EL: #define __mips__ 1
+// MIPSN32EL: #define __mips_abicalls 1
 // MIPSN32EL: #define __mips_fpr 64
 // MIPSN32EL: #define __mips_hard_float 1
 // MIPSN32EL: #define __mips_isa_rev 2
@@ -4073,6 +4077,7 @@
 // MIPS64BE:#define __mips64 1
 // MIPS64BE:#define __mips64__ 1
 // MIPS64BE:#define __mips__ 1
+// MIPS64BE:#define __mips_abicalls 1
 // MIPS64BE:#define __mips_fpr 64
 // MIPS64BE:#define __mips_hard_float 1
 // MIPS64BE:#define __mips_n64 1
@@ -4282,6 +4287,7 @@
 // MIPS64EL:#define __mips64 1
 // MIPS64EL:#define __mips64__ 1
 // MIPS64EL:#define __mips__ 1
+// MIPS64EL:#define __mips_abicalls 1
 // MIPS64EL:#define __mips_fpr 64
 // MIPS64EL:#define __mips_hard_float 1
 // MIPS64EL:#define __mips_n64 1
@@ -4513,6 +4519,45 @@
 // MIPS-XXR6:#define __mips_fpr 64
 // MIPS-XXR6:#define __mips_nan2008 1
 //
+// RUN: %clang_cc1 -target-cpu mips32 \
+// RUN:   

r293285 - [mips] Add support for static model on N64

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri Jan 27 09:05:25 2017
New Revision: 293285

URL: http://llvm.org/viewvc/llvm-project?rev=293285=rev
Log:
[mips] Add support for static model on N64

The patch teaches the Clang driver how to handle the N64 static
relocation model properly. It enforces the correct target feature
(+noabicalls) when -fno-pic is used. This is required as non-pic
N64 code as the abi extension to call PIC code (CPIC) is unsupported.

Make PIC the default for mips64 and mips64el, this affects both N32
& N64 ABIs, to better match GCC.

As part of this effort, clean up the assembler invocation command
builder, so the correct flags are used.

This and r293279 in LLVM resolves PR/23485.

Thanks to Brooks Davis for reporting the issue!

Reviewers: slthakur, seanbruno

Differential Revision: https://reviews.llvm.org/D29031


Modified:
cfe/trunk/lib/Driver/ToolChains.cpp
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/test/Driver/mips-as.c

Modified: cfe/trunk/lib/Driver/ToolChains.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains.cpp?rev=293285=293284=293285=diff
==
--- cfe/trunk/lib/Driver/ToolChains.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains.cpp Fri Jan 27 09:05:25 2017
@@ -2892,6 +2892,9 @@ bool Generic_GCC::isPICDefault() const {
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
 return !getTriple().isOSBinFormatMachO() && !getTriple().isMacOSX();
+  case llvm::Triple::mips64:
+  case llvm::Triple::mips64el:
+return true;
   default:
 return false;
   }

Modified: cfe/trunk/lib/Driver/Tools.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Tools.cpp?rev=293285=293284=293285=diff
==
--- cfe/trunk/lib/Driver/Tools.cpp (original)
+++ cfe/trunk/lib/Driver/Tools.cpp Fri Jan 27 09:05:25 2017
@@ -1540,8 +1540,54 @@ static void getMIPSTargetFeatures(const
   mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
   ABIName = getGnuCompatibleMipsABIName(ABIName);
 
-  AddTargetFeature(Args, Features, options::OPT_mno_abicalls,
-   options::OPT_mabicalls, "noabicalls");
+  // Historically, PIC code for MIPS was associated with -mabicalls, a.k.a
+  // SVR4 abicalls. Static code does not use SVR4 calling sequences. An ABI
+  // extension was developed by Richard Sandiford & Code Sourcery to support
+  // static code calling PIC code (CPIC). For O32 and N32 this means we have
+  // several combinations of PIC/static and abicalls. Pure static, static
+  // with the CPIC extension, and pure PIC code.
+
+  // At final link time, O32 and N32 with CPIC will have another section
+  // added to the binary which contains the stub functions to perform
+  // any fixups required for PIC code.
+
+  // For N64, the situation is more regular: code can either be static
+  // (non-abicalls) or PIC (abicalls). GCC has traditionally picked PIC code
+  // code for N64. Since Clang has already built the relocation model portion
+  // of the commandline, we pick add +noabicalls feature in the N64 static
+  // case.
+
+  // The is another case to be accounted for: -msym32, which enforces that all
+  // symbols have 32 bits in size. In this case, N64 can in theory use CPIC
+  // but it is unsupported.
+
+  // The combinations for N64 are:
+  // a) Static without abicalls and 64bit symbols.
+  // b) Static with abicalls and 32bit symbols.
+  // c) PIC with abicalls and 64bit symbols.
+
+  // For case (a) we need to add +noabicalls for N64.
+
+  bool IsN64 = ABIName == "64";
+  bool NonPIC = false;
+
+  Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
+options::OPT_fpic, options::OPT_fno_pic,
+options::OPT_fPIE, options::OPT_fno_PIE,
+options::OPT_fpie, options::OPT_fno_pie);
+  if (LastPICArg) {
+Option O = LastPICArg->getOption();
+NonPIC =
+(O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
+ O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
+  }
+
+  if (IsN64 && NonPIC) {
+Features.push_back("+noabicalls");
+  } else {
+AddTargetFeature(Args, Features, options::OPT_mno_abicalls,
+ options::OPT_mabicalls, "noabicalls");
+  }
 
   mips::FloatABI FloatABI = getMipsFloatABI(D, Args);
   if (FloatABI == mips::FloatABI::Soft) {
@@ -3973,6 +4019,13 @@ ParsePICArgs(const ToolChain ,
   if ((ROPI || RWPI) && (PIC || PIE))
 ToolChain.getDriver().Diag(diag::err_drv_ropi_rwpi_incompatible_with_pic);
 
+  // When targettng MIPS64 with N64, the default is PIC, unless -mno-abicalls 
is
+  // used.
+  if ((Triple.getArch() == llvm::Triple::mips64 ||
+   Triple.getArch() == llvm::Triple::mips64el) &&
+  Args.hasArg(options::OPT_mno_abicalls))
+return 

[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 78531.
sdardis marked 4 inline comments as done.
sdardis added a comment.

Addressed review comments.


https://reviews.llvm.org/D25866

Files:
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/Sema/SemaExpr.cpp
  test/Sema/vector-cast.c
  test/Sema/vector-gcc-compat.c
  test/Sema/zvector.c
  test/SemaCXX/vector-no-lax.cpp

Index: test/SemaCXX/vector-no-lax.cpp
===
--- test/SemaCXX/vector-no-lax.cpp
+++ test/SemaCXX/vector-no-lax.cpp
@@ -4,6 +4,6 @@
 
 vSInt32 foo (vUInt32 a) {
   vSInt32 b = { 0, 0, 0, 0 };
-  b += a; // expected-error{{cannot convert between vector values}}
+  b += a; // expected-error{{cannot convert between vector type 'vUInt32' (vector of 4 'unsigned int' values) and vector type 'vSInt32' (vector of 4 'int' values) as implicit conversion would cause truncation}}
   return b;
 }
Index: test/Sema/zvector.c
===
--- test/Sema/zvector.c
+++ test/Sema/zvector.c
@@ -326,14 +326,14 @@
   bc = bc + sc2; // expected-error {{incompatible type}}
   bc = sc + bc2; // expected-error {{incompatible type}}
 
-  sc = sc + sc_scalar; // expected-error {{cannot convert}}
-  sc = sc + uc_scalar; // expected-error {{cannot convert}}
-  sc = sc_scalar + sc; // expected-error {{cannot convert}}
-  sc = uc_scalar + sc; // expected-error {{cannot convert}}
-  uc = uc + sc_scalar; // expected-error {{cannot convert}}
-  uc = uc + uc_scalar; // expected-error {{cannot convert}}
-  uc = sc_scalar + uc; // expected-error {{cannot convert}}
-  uc = uc_scalar + uc; // expected-error {{cannot convert}}
+  sc = sc + sc_scalar;
+  sc = sc + uc_scalar; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  sc = sc_scalar + sc;
+  sc = uc_scalar + sc; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  uc = uc + sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc + uc_scalar;
+  uc = sc_scalar + uc; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc_scalar + uc;
 
   ss = ss + ss2;
   us = us + us2;
@@ -368,10 +368,10 @@
   sc += sl2; // expected-error {{cannot convert}}
   sc += fd2; // expected-error {{cannot convert}}
 
-  sc += sc_scalar; // expected-error {{cannot convert}}
-  sc += uc_scalar; // expected-error {{cannot convert}}
-  uc += sc_scalar; // expected-error {{cannot convert}}
-  uc += uc_scalar; // expected-error {{cannot convert}}
+  sc += sc_scalar;
+  sc += uc_scalar; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  uc += sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc += uc_scalar;
 
   ss += ss2;
   us += us2;
Index: test/Sema/vector-gcc-compat.c
===
--- /dev/null
+++ test/Sema/vector-gcc-compat.c
@@ -0,0 +1,304 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything
+typedef long long v2i64 __attribute__((vector_size(16)));
+typedef int v2i32 __attribute__((vector_size(8)));
+typedef short v2i16 __attribute__((vector_size(4)));
+typedef char v2i8 __attribute__((vector_size(2)));
+
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+typedef unsigned int v2u32 __attribute__((vector_size(8)));
+typedef unsigned short v2u16 __attribute__((vector_size(4)));
+typedef unsigned char v2u8 __attribute__((vector_size(2)));
+
+typedef float v4f32 __attribute__((vector_size(16)));
+typedef double v4f64 __attribute__((vector_size(32)));
+
+void arithmeticTest(void);
+void logicTest(void);
+void comparisonTest(void);
+void floatTestSignedType(char a, short b, int c, long long d);
+void floatTestUnsignedType(unsigned char a, unsigned short b, unsigned int c,
+   unsigned long long d);
+void floatTestConstant(void);
+void intTestType(char a, short b, int c, long long d);
+void intTestTypeUnsigned(unsigned char a, unsigned short b, unsigned int c,
+ unsigned long long d);
+void uintTestType(char a, short b, int c, long long d);
+void uintTestTypeUnsigned(unsigned char a, unsigned short b, unsigned int c,
+  unsigned long long d);
+void uintTestConstant(v2u64 v2u64_a, v2u32 v2u32_a, v2u16 v2u16_a, v2u8 v2u8_a);
+void intTestConstant(v2i64 v2i64_a, v2i32 

[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis added inline comments.



Comment at: lib/Sema/SemaExpr.cpp:8064
+  ScalarCast = CK_FloatingCast;
+} else if (ScalarTy->isIntegralType(S.Context)) {
+  // Determine if the integer constant can be expressed as a floating point

bruno wrote:
> I don't see why it's necessary to check for all specific cases where the 
> scalar is a constant. For all the others scenarios it should be enough to get 
> the right answer via `getIntegerTypeOrder` or `getFloatTypeOrder`. For this 
> is specific condition, the `else` part for the `CstScalar` below should also 
> handle the constant case, right? 
> 
> 
If we have a scalar constant, it is necessary to examine it's actual value to 
see if it can be casted without truncation. The scalar constant's type is 
somewhat irrelevant. Consider:

   v4f32 f(v4f32 a) {
 return a + (double)1.0;
   }

In this case examining the order only works if the vector's order is greater 
than or equal to the scalar constant's order. Instead, if we ask whether the 
scalar constant can be represented as a constant scalar of the vector's element 
type, then we know if we can convert without the loss of precision.

For integers, the case is a little more contrived due to native integer width, 
but the question is the same. Can a scalar constant X be represented as a given 
floating point type. Consider:

   v4f32 f(v4f32 a) {
 return a + (signed int)1;
}

This would rejected for platforms where a signed integer's width is greater 
than the precision of float if we examined it based purely on types and their 
sizes. Instead, if we convert the integer to the float point's type with 
APFloat and convert back to see if we have the same value, we can determine if 
the scalar constant can be safely converted without the loss of precision.

I based the logic examining the value of the constant scalar based on GCC's 
behaviour, which implicitly converts scalars regardless of their type if they 
can be represented in the same type of the vector's element type without the 
loss of precision. If the scalar cannot be evaluated to a constant at compile 
time, then the size in bits for the scalar's type determines if it can be 
converted safely.



Comment at: lib/Sema/SemaExpr.cpp:8267
+  }
+
   // Otherwise, use the generic diagnostic.

bruno wrote:
> This change seems orthogonal to this patch. Can you make it a separated patch 
> with the changes from test/Sema/vector-cast.c?
This change is a necessary part of this patch and it can't be split out in 
sensible fashion.

For example, line 329 of test/Sema/zvector.c adds a scalar signed character to 
a vector of signed characters. With just this change we would report "cannot 
convert between scalar type 'signed char' and vector type '__vector signed 
char' (vector of 16 'signed char' values) as implicit conversion would cause 
truncation".

This is heavily misleading for C and C++ code as we don't perform implicit 
conversions and signed char could be implicitly converted to a vector of signed 
char without the loss of precision.

To make this diagnostic precise without performing implicit conversions 
requires determining cases where implicit conversion would cause truncation and 
reporting that failure reason, or defaulting to the generic diagnostic.

Keeping this change as part of this patch is cleaner and simpler as it covers 
both implicit conversions and more precise diagnostics.


https://reviews.llvm.org/D25866



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[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis added a comment.

Ping.


https://reviews.llvm.org/D25866



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[PATCH] D21072: [mips] Account for -mabi when determining whether IAS is the default or not.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 76824.
sdardis added a comment.

Rebase and ping


https://reviews.llvm.org/D21072

Files:
  include/clang/Driver/ToolChain.h
  lib/Driver/MSVCToolChain.cpp
  lib/Driver/MinGWToolChain.cpp
  lib/Driver/ToolChain.cpp
  lib/Driver/ToolChains.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  test/Driver/mips-integrated-as.s

Index: test/Driver/mips-integrated-as.s
===
--- test/Driver/mips-integrated-as.s
+++ test/Driver/mips-integrated-as.s
@@ -1,3 +1,5 @@
+// RUN: %clang -target mips-linux-gnu -### -c %s 2>&1 | \
+// RUN:   FileCheck -check-prefix=ABI-O32 %s
 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s 2>&1 | \
 // RUN:   FileCheck -check-prefix=ABI-O32 %s
 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s -mabi=32 2>&1 | \
@@ -293,3 +295,13 @@
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+single-float"
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+fpxx"
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+nooddspreg"
+
+// RUN: %clang -target mips-linux-gnu -### -c %s -mips64 -mabi=n32 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips64-linux-gnu -### -c %s -mabi=n32 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips-linux-gnu -### -c %s -mips64 -mabi=64 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips64-linux-gnu -### -c %s 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// GAS-NOT: -cc1as
Index: lib/Driver/Tools.cpp
===
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -4552,7 +4552,7 @@
   // Decide whether to use verbose asm. Verbose assembly is the default on
   // toolchains which have the integrated assembler on by default.
   bool IsIntegratedAssemblerDefault =
-  getToolChain().IsIntegratedAssemblerDefault();
+  getToolChain().IsIntegratedAssemblerDefault(Args);
   if (Args.hasFlag(options::OPT_fverbose_asm, options::OPT_fno_verbose_asm,
IsIntegratedAssemblerDefault) ||
   Args.hasArg(options::OPT_dA))
Index: lib/Driver/ToolChains.h
===
--- lib/Driver/ToolChains.h
+++ lib/Driver/ToolChains.h
@@ -221,7 +221,8 @@
   bool isPICDefault() const override;
   bool isPIEDefault() const override;
   bool isPICDefaultForced() const override;
-  bool IsIntegratedAssemblerDefault() const override;
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override;
   llvm::opt::DerivedArgList *
   TranslateArgs(const llvm::opt::DerivedArgList , StringRef BoundArch,
 Action::OffloadKind DeviceOffloadKind) const override;
@@ -339,7 +340,8 @@
 // expected to use /usr/include/Block.h.
 return true;
   }
-  bool IsIntegratedAssemblerDefault() const override {
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
 // Default integrated assembler to on for Apple's MachO targets.
 return true;
   }
@@ -657,7 +659,10 @@
   Solaris(const Driver , const llvm::Triple ,
   const llvm::opt::ArgList );
 
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 
   void AddClangCXXStdlibIncludeArgs(
   const llvm::opt::ArgList ,
@@ -675,7 +680,8 @@
   MinGW(const Driver , const llvm::Triple ,
 const llvm::opt::ArgList );
 
-  bool IsIntegratedAssemblerDefault() const override;
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override;
   bool IsUnwindTablesDefault() const override;
   bool isPICDefault() const override;
   bool isPIEDefault() const override;
@@ -943,7 +949,10 @@
   const llvm::opt::ArgList ,
   llvm::opt::ArgStringList ) const override {}
 
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY HexagonToolChain : public Linux {
@@ -966,7 +975,8 @@
   CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
 
   StringRef GetGCCLibAndIncVersion() const { return GCCLibAndIncVersion.Text; }
-  bool IsIntegratedAssemblerDefault() const override {
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
 return true;
   }
 
@@ -991,7 +1001,10 @@
   AMDGPUToolChain(const Driver , const llvm::Triple ,
 const llvm::opt::ArgList );
   unsigned GetDefaultDwarfVersion() const override { return 2; }
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY NaClToolChain : public Generic_ELF {

[PATCH] D21070: Pass the ABI in the triple when appropriate (currently for MIPS) for 'clang -cc1' and 'clang -cc1as'

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 76823.
sdardis added a comment.

Rebase and ping.


https://reviews.llvm.org/D21070

Files:
  lib/Basic/Targets.cpp
  lib/Driver/ToolChains.cpp
  lib/Driver/Tools.cpp
  lib/Frontend/CompilerInvocation.cpp
  tools/driver/cc1as_main.cpp

Index: tools/driver/cc1as_main.cpp
===
--- tools/driver/cc1as_main.cpp
+++ tools/driver/cc1as_main.cpp
@@ -69,6 +69,10 @@
   /// The name of the target triple to assemble for.
   std::string Triple;
 
+  /// The name of the ABI to assembler for or the empty string for the default
+  /// ABI.
+  std::string ABI;
+
   /// If given, the name of the target CPU to determine which instructions
   /// are legal.
   std::string CPU;
@@ -134,6 +138,7 @@
 public:
   AssemblerInvocation() {
 Triple = "";
+ABI = "";
 NoInitialTextSection = 0;
 InputFile = "-";
 OutputPath = "-";
@@ -185,13 +190,24 @@
 
   // Target Options
   Opts.Triple = llvm::Triple::normalize(Args.getLastArgValue(OPT_triple));
+  Opts.ABI = Args.getLastArgValue(OPT_target_abi);
   Opts.CPU = Args.getLastArgValue(OPT_target_cpu);
   Opts.Features = Args.getAllArgValues(OPT_target_feature);
 
   // Use the default target triple if unspecified.
   if (Opts.Triple.empty())
 Opts.Triple = llvm::sys::getDefaultTargetTriple();
 
+  // Modify the Triple and ABI according to the Triple and ABI.
+  llvm::Triple ABITriple;
+  StringRef ABIName;
+  std::tie(ABITriple, ABIName) =
+  llvm::Triple(Opts.Triple).getABIVariant(Opts.ABI);
+  if (ABITriple.getArch() == llvm::Triple::UnknownArch)
+Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
+  Opts.Triple = ABITriple.str();
+  Opts.ABI = ABIName;
+
   // Language Options
   Opts.IncludePaths = Args.getAllArgValues(OPT_I);
   Opts.NoInitialTextSection = Args.hasArg(OPT_n);
Index: lib/Frontend/CompilerInvocation.cpp
===
--- lib/Frontend/CompilerInvocation.cpp
+++ lib/Frontend/CompilerInvocation.cpp
@@ -2385,6 +2385,17 @@
   // Use the default target triple if unspecified.
   if (Opts.Triple.empty())
 Opts.Triple = llvm::sys::getDefaultTargetTriple();
+
+  // Modify the Triple and ABI according to the Triple and ABI.
+  llvm::Triple ABITriple;
+  StringRef ABIName;
+  std::tie(ABITriple, ABIName) =
+  llvm::Triple(Opts.Triple).getABIVariant(Opts.ABI);
+  if (ABITriple.getArch() == llvm::Triple::UnknownArch)
+Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
+  Opts.Triple = ABITriple.str();
+  Opts.ABI = ABIName;
+
   Opts.OpenCLExtensionsAsWritten = Args.getAllArgValues(OPT_cl_ext_EQ);
 }
 
Index: lib/Driver/Tools.cpp
===
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -1355,7 +1355,7 @@
   // MIPS32r6 is the default for mips(el)?-img-linux-gnu and MIPS64r6 is the
   // default for mips64(el)?-img-linux-gnu.
   if (Triple.getVendor() == llvm::Triple::ImaginationTechnologies &&
-  Triple.getEnvironment() == llvm::Triple::GNU) {
+  Triple.isGNUEnvironment()) {
 DefMips32CPU = "mips32r6";
 DefMips64CPU = "mips64r6";
   }
Index: lib/Driver/ToolChains.cpp
===
--- lib/Driver/ToolChains.cpp
+++ lib/Driver/ToolChains.cpp
@@ -2470,7 +2470,7 @@
 
   if (TargetTriple.getVendor() == llvm::Triple::ImaginationTechnologies &&
   TargetTriple.getOS() == llvm::Triple::Linux &&
-  TargetTriple.getEnvironment() == llvm::Triple::GNU)
+  TargetTriple.isGNUEnvironment())
 return findMipsImgMultilibs(Flags, NonExistent, Result);
 
   if (findMipsCsMultilibs(Flags, NonExistent, Result))
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -7318,10 +7318,22 @@
 DspRev(NoDSP), HasMSA(false), HasFP64(false) {
 TheCXXABI.set(TargetCXXABI::GenericMIPS);
 
-setABI((getTriple().getArch() == llvm::Triple::mips ||
-getTriple().getArch() == llvm::Triple::mipsel)
-   ? "o32"
-   : "n64");
+if (getTriple().getEnvironment() == llvm::Triple::ABI32 ||
+getTriple().getEnvironment() == llvm::Triple::GNUABI32 ||
+getTriple().getEnvironment() == llvm::Triple::AndroidABI32)
+  setABI("o32");
+else if (getTriple().getEnvironment() == llvm::Triple::ABIN32 ||
+getTriple().getEnvironment() == llvm::Triple::GNUABIN32)
+  setABI("n32");
+else if (getTriple().getEnvironment() == llvm::Triple::ABI64 ||
+ getTriple().getEnvironment() == llvm::Triple::GNUABI64 ||
+ getTriple().getEnvironment() == llvm::Triple::AndroidABI64)
+  setABI("n64");
+else
+  setABI((getTriple().getArch() == llvm::Triple::mips ||
+  getTriple().getArch() == llvm::Triple::mipsel)
+ ? "o32"
+ : "n64");
 
 CPU 

[PATCH] D24448: [atomics] New warning -Watomic-libcall when atomic operation expands to a library call

[Simon Dardis via cfe-commits]

sdardis added a comment.

Ping.


https://reviews.llvm.org/D24448



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[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis updated the summary for this revision.
sdardis updated this revision to Diff 76385.
sdardis added a comment.

Split out a variant of tryVectorConvertAndSplat called 
tryGCCVectorConvertAndSplat. This variant checks the types more strictly than 
tryVectorConvertAndSplat and handles implicit conversion of constants which can 
be safely demoted to a smaller type.
Added more testing to vector-gcc-compat.c


https://reviews.llvm.org/D25866

Files:
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/Sema/SemaExpr.cpp
  test/Sema/vector-cast.c
  test/Sema/vector-gcc-compat.c
  test/Sema/zvector.c
  test/SemaCXX/vector-no-lax.cpp

Index: test/SemaCXX/vector-no-lax.cpp
===
--- test/SemaCXX/vector-no-lax.cpp
+++ test/SemaCXX/vector-no-lax.cpp
@@ -4,6 +4,6 @@
 
 vSInt32 foo (vUInt32 a) {
   vSInt32 b = { 0, 0, 0, 0 };
-  b += a; // expected-error{{cannot convert between vector values}}
+  b += a; // expected-error{{cannot convert between vector type 'vUInt32' (vector of 4 'unsigned int' values) and vector type 'vSInt32' (vector of 4 'int' values) as implicit conversion would cause truncation}}
   return b;
 }
Index: test/Sema/zvector.c
===
--- test/Sema/zvector.c
+++ test/Sema/zvector.c
@@ -326,14 +326,14 @@
   bc = bc + sc2; // expected-error {{incompatible type}}
   bc = sc + bc2; // expected-error {{incompatible type}}
 
-  sc = sc + sc_scalar; // expected-error {{cannot convert}}
-  sc = sc + uc_scalar; // expected-error {{cannot convert}}
-  sc = sc_scalar + sc; // expected-error {{cannot convert}}
-  sc = uc_scalar + sc; // expected-error {{cannot convert}}
-  uc = uc + sc_scalar; // expected-error {{cannot convert}}
-  uc = uc + uc_scalar; // expected-error {{cannot convert}}
-  uc = sc_scalar + uc; // expected-error {{cannot convert}}
-  uc = uc_scalar + uc; // expected-error {{cannot convert}}
+  sc = sc + sc_scalar;
+  sc = sc + uc_scalar; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  sc = sc_scalar + sc;
+  sc = uc_scalar + sc; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  uc = uc + sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc + uc_scalar;
+  uc = sc_scalar + uc; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc_scalar + uc;
 
   ss = ss + ss2;
   us = us + us2;
@@ -368,10 +368,10 @@
   sc += sl2; // expected-error {{cannot convert}}
   sc += fd2; // expected-error {{cannot convert}}
 
-  sc += sc_scalar; // expected-error {{cannot convert}}
-  sc += uc_scalar; // expected-error {{cannot convert}}
-  uc += sc_scalar; // expected-error {{cannot convert}}
-  uc += uc_scalar; // expected-error {{cannot convert}}
+  sc += sc_scalar;
+  sc += uc_scalar; // expected-error {{cannot convert between scalar type 'unsigned char' and vector type '__vector signed char' (vector of 16 'signed char' values) as implicit conversion would cause truncation}}
+  uc += sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc += uc_scalar;
 
   ss += ss2;
   us += us2;
Index: test/Sema/vector-gcc-compat.c
===
--- /dev/null
+++ test/Sema/vector-gcc-compat.c
@@ -0,0 +1,312 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything
+
+typedef long long v2i64 __attribute__((vector_size(16)));
+typedef int v2i32 __attribute__((vector_size(8)));
+typedef short v2i16 __attribute__((vector_size(4)));
+typedef char v2i8 __attribute__((vector_size(2)));
+
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+typedef unsigned int v2u32 __attribute__((vector_size(8)));
+typedef unsigned short v2u16 __attribute__((vector_size(4)));
+typedef unsigned char v2u8 __attribute__((vector_size(2)));
+
+typedef float v4f32 __attribute__((vector_size(16)));
+typedef double v4f64 __attribute__((vector_size(32)));
+
+void arithmeticTest (void);
+void logicTest (void);
+void comparisonTest (void);
+void floatTestSignedType (char a, short b, int c, long long d);
+void floatTestUnsignedType (unsigned char a, unsigned short b, unsigned int c, unsigned long long d);
+void floatTestConstant (void);
+void intTestType (char a, short b, int c, long long d);
+void intTestTypeUnsigned (unsigned char a, unsigned short b, unsigned int c, unsigned long long d);
+void uintTestType (char a, short b, int c, long long d);
+void 

[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 75708.
sdardis marked an inline comment as done.
sdardis added a comment.

Extra testing for cases where the operand on the left of an operation is a 
vector.
Removed two spurious checks for vector types.


https://reviews.llvm.org/D25866

Files:
  lib/Sema/SemaExpr.cpp
  test/Sema/vector-cast.c
  test/Sema/vector-scalar-implict-conv.c
  test/Sema/zvector.c

Index: test/Sema/zvector.c
===
--- test/Sema/zvector.c
+++ test/Sema/zvector.c
@@ -326,14 +326,14 @@
   bc = bc + sc2; // expected-error {{incompatible type}}
   bc = sc + bc2; // expected-error {{incompatible type}}
 
-  sc = sc + sc_scalar; // expected-error {{cannot convert}}
-  sc = sc + uc_scalar; // expected-error {{cannot convert}}
-  sc = sc_scalar + sc; // expected-error {{cannot convert}}
-  sc = uc_scalar + sc; // expected-error {{cannot convert}}
-  uc = uc + sc_scalar; // expected-error {{cannot convert}}
-  uc = uc + uc_scalar; // expected-error {{cannot convert}}
-  uc = sc_scalar + uc; // expected-error {{cannot convert}}
-  uc = uc_scalar + uc; // expected-error {{cannot convert}}
+  sc = sc + sc_scalar;
+  sc = sc + uc_scalar; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  sc = sc_scalar + sc;
+  sc = uc_scalar + sc; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  uc = uc + sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc + uc_scalar;
+  uc = sc_scalar + uc; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc_scalar + uc;
 
   ss = ss + ss2;
   us = us + us2;
@@ -368,10 +368,10 @@
   sc += sl2; // expected-error {{cannot convert}}
   sc += fd2; // expected-error {{cannot convert}}
 
-  sc += sc_scalar; // expected-error {{cannot convert}}
-  sc += uc_scalar; // expected-error {{cannot convert}}
-  uc += sc_scalar; // expected-error {{cannot convert}}
-  uc += uc_scalar; // expected-error {{cannot convert}}
+  sc += sc_scalar;
+  sc += uc_scalar; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  uc += sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc += uc_scalar;
 
   ss += ss2;
   us += us2;
Index: test/Sema/vector-scalar-implict-conv.c
===
--- /dev/null
+++ test/Sema/vector-scalar-implict-conv.c
@@ -0,0 +1,97 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything
+
+typedef long long v2i64 __attribute__((vector_size(16)));
+typedef long long v2i64 __attribute__((vector_size(16)));
+
+typedef int v2i32 __attribute__((vector_size(8)));
+typedef int v2i32 __attribute__((vector_size(8)));
+
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+
+typedef float v4f32 __attribute__((vector_size(16)));
+typedef double v4f64 __attribute__((vector_size(32)));
+
+void test (void);
+
+void test (void){
+
+  v2i64 v2i64_a = (v2i64) {0, 1};
+  v2i64 v2i64_r;
+
+  v2i32 v2i32_a = (v2i32) {0 , 1};
+
+  v2u64 v2u64_a = (v2u64) {0, 1};
+
+  v4f32 v4f32_a = (v4f32) {0.1f, 0.2f, 0.3f, 0.4f};
+
+  v4f64 v4f64_r = v4f32_a; // expected-error {{initializing 'v4f64' (vector of 4 'double' values) with an expression of incompatible type 'v4f32' (vector of 4 'float' values)}}
+
+  v4f64_r = v4f32_a;
+
+  // FIXME: this should warn about truncation.
+  v4f32_a = v4f64_r;
+
+  v2i64_r = v2i32_a; // expected-error {{assigning to 'v2i64' (vector of 2 'long long' values) from incompatible type 'v2i32' (vector of 2 'int' values)}}
+
+  v2i64_r = v2u64_a; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'v2u64' (vector of 2 'unsigned long long' values)}}
+
+  v2i64_r = v2i64_a + 1;
+  v2i64_r = v2i64_a - 1;
+  v2i64_r = v2i64_a * 1;
+  v2i64_r = v2i64_a / 1;
+  v2i64_r = v2i64_a % 1;
+
+  v2i64_r = 1 + v2i64_a;
+  v2i64_r = 1 - v2i64_a;
+  v2i64_r = 1 * v2i64_a;
+  v2i64_r = 1 / v2i64_a;
+  v2i64_r = 1 % v2i64_a;
+
+
+  v2i64_a += 1;
+  v2i64_a -= 1;
+  v2i64_a *= 1;
+  v2i64_a /= 1;
+  v2i64_a %= 1;
+
+  v2i64_r = v2i64_a == 1; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'long __attribute__((ext_vector_type(2)))' (vector of 2 'long' values)}}
+  v2i64_r = v2i64_a != 1; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'long 

[PATCH] D25866: [Sema] Support implicit scalar to vector conversions

[Simon Dardis via cfe-commits]

sdardis created this revision.
sdardis added subscribers: rnk, bruno, ahatanak, cfe-commits.
Herald added a reviewer: vkalintiris.

This patch teaches clang to perform implicit scalar to vector conversions
when one of the operands to a binary vector expression is a scalar like GCC.

The scalar is implicitly casted to the vector elements type and splatted to
produce a vector of the same type.


https://reviews.llvm.org/D25866

Files:
  lib/Sema/SemaExpr.cpp
  test/Sema/vector-cast.c
  test/Sema/vector-scalar-implict-conv.c
  test/Sema/zvector.c

Index: test/Sema/zvector.c
===
--- test/Sema/zvector.c
+++ test/Sema/zvector.c
@@ -326,14 +326,14 @@
   bc = bc + sc2; // expected-error {{incompatible type}}
   bc = sc + bc2; // expected-error {{incompatible type}}
 
-  sc = sc + sc_scalar; // expected-error {{cannot convert}}
-  sc = sc + uc_scalar; // expected-error {{cannot convert}}
-  sc = sc_scalar + sc; // expected-error {{cannot convert}}
-  sc = uc_scalar + sc; // expected-error {{cannot convert}}
-  uc = uc + sc_scalar; // expected-error {{cannot convert}}
-  uc = uc + uc_scalar; // expected-error {{cannot convert}}
-  uc = sc_scalar + uc; // expected-error {{cannot convert}}
-  uc = uc_scalar + uc; // expected-error {{cannot convert}}
+  sc = sc + sc_scalar;
+  sc = sc + uc_scalar; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  sc = sc_scalar + sc;
+  sc = uc_scalar + sc; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  uc = uc + sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc + uc_scalar;
+  uc = sc_scalar + uc; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc = uc_scalar + uc;
 
   ss = ss + ss2;
   us = us + us2;
@@ -368,10 +368,10 @@
   sc += sl2; // expected-error {{cannot convert}}
   sc += fd2; // expected-error {{cannot convert}}
 
-  sc += sc_scalar; // expected-error {{cannot convert}}
-  sc += uc_scalar; // expected-error {{cannot convert}}
-  uc += sc_scalar; // expected-error {{cannot convert}}
-  uc += uc_scalar; // expected-error {{cannot convert}}
+  sc += sc_scalar;
+  sc += uc_scalar; // expected-error {{implicit conversion changes signedness: 'unsigned char' to '__vector signed char' (vector of 16 'signed char' values)}}
+  uc += sc_scalar; // expected-error {{implicit conversion changes signedness: 'signed char' to '__vector unsigned char' (vector of 16 'unsigned char' values)}}
+  uc += uc_scalar;
 
   ss += ss2;
   us += us2;
Index: test/Sema/vector-scalar-implict-conv.c
===
--- /dev/null
+++ test/Sema/vector-scalar-implict-conv.c
@@ -0,0 +1,81 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -Weverything
+
+typedef long long v2i64 __attribute__((vector_size(16)));
+typedef long long v2i64 __attribute__((vector_size(16)));
+
+typedef int v2i32 __attribute__((vector_size(8)));
+typedef int v2i32 __attribute__((vector_size(8)));
+
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+typedef unsigned long long v2u64 __attribute__((vector_size(16)));
+
+typedef float v4f32 __attribute__((vector_size(16)));
+typedef double v4f64 __attribute__((vector_size(32)));
+
+void test (void);
+
+void test (void){
+
+  v2i64 v2i64_a = (v2i64) {0, 1};
+  v2i64 v2i64_r;
+
+  v2i32 v2i32_a = (v2i32) {0 , 1};
+
+  v2u64 v2u64_a = (v2u64) {0, 1};
+
+  v4f32 v4f32_a = (v4f32) {0.1f, 0.2f, 0.3f, 0.4f};
+
+  v4f64 v4f64_r = v4f32_a; // expected-error {{initializing 'v4f64' (vector of 4 'double' values) with an expression of incompatible type 'v4f32' (vector of 4 'float' values)}}
+
+  v4f64_r = v4f32_a;
+
+  // FIXME: this should warn about truncation.
+  v4f32_a = v4f64_r;
+
+  v2i64_r = v2i32_a; // expected-error {{assigning to 'v2i64' (vector of 2 'long long' values) from incompatible type 'v2i32' (vector of 2 'int' values)}}
+
+  v2i64_r = v2u64_a; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'v2u64' (vector of 2 'unsigned long long' values)}}
+
+  v2i64_r = v2i64_a + 1;
+  v2i64_r = v2i64_a - 1;
+  v2i64_r = v2i64_a * 1;
+  v2i64_r = v2i64_a / 1;
+  v2i64_r = v2i64_a % 1;
+
+  v2i64_a += 1;
+  v2i64_a -= 1;
+  v2i64_a *= 1;
+  v2i64_a /= 1;
+  v2i64_a %= 1;
+
+  v2i64_r = v2i64_a == 1; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'long __attribute__((ext_vector_type(2)))' (vector of 2 'long' values)}}
+  v2i64_r = v2i64_a != 1; // expected-warning {{incompatible vector types assigning to 'v2i64' (vector of 2 'long long' values) from 'long 

[PATCH] D25017: [mips][msa] Range check MSA intrinsics with immediates

[Simon Dardis via cfe-commits]

sdardis added a comment.

Thanks.


Repository:
  rL LLVM

https://reviews.llvm.org/D25017



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[PATCH] D25017: [mips][msa] Range check MSA intrinsics with immediates

[Simon Dardis via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL284620: [mips][msa] Range check MSA intrinsics with 
immediates (authored by sdardis).

Changed prior to commit:
  https://reviews.llvm.org/D25017?vs=74499=75173#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D25017

Files:
  cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
  cfe/trunk/include/clang/Sema/Sema.h
  cfe/trunk/lib/Sema/SemaChecking.cpp
  cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
  cfe/trunk/test/CodeGen/builtins-mips-msa.c

Index: cfe/trunk/include/clang/Sema/Sema.h
===
--- cfe/trunk/include/clang/Sema/Sema.h
+++ cfe/trunk/include/clang/Sema/Sema.h
@@ -9715,6 +9715,8 @@
   llvm::APSInt );
   bool SemaBuiltinConstantArgRange(CallExpr *TheCall, int ArgNum,
int Low, int High);
+  bool SemaBuiltinConstantArgMultiple(CallExpr *TheCall, int ArgNum,
+  unsigned Multiple);
   bool SemaBuiltinARMSpecialReg(unsigned BuiltinID, CallExpr *TheCall,
 int ArgNum, unsigned ExpectedFieldNum,
 bool AllowName);
Index: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
===
--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
@@ -7752,6 +7752,8 @@
   "incompatible constant for this __builtin_neon function">; 
 def err_argument_invalid_range : Error<
   "argument should be a value from %0 to %1">;
+def err_argument_not_multiple : Error<
+  "argument should be a multiple of %0">;
 def warn_neon_vector_initializer_non_portable : Warning<
   "vector initializers are not compatible with NEON intrinsics in big endian "
   "mode">, InGroup>;
Index: cfe/trunk/test/CodeGen/builtins-mips-msa.c
===
--- cfe/trunk/test/CodeGen/builtins-mips-msa.c
+++ cfe/trunk/test/CodeGen/builtins-mips-msa.c
@@ -138,28 +138,28 @@
   v4i32_r = __msa_bclr_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bclr.w(
   v2i64_r = __msa_bclr_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bclr.d(
 
-  v16i8_r = __msa_bclri_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
-  v8i16_r = __msa_bclri_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
+  v16i8_r = __msa_bclri_b(v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
+  v8i16_r = __msa_bclri_h(v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
   v4i32_r = __msa_bclri_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bclri.w(
   v2i64_r = __msa_bclri_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bclri.d(
 
   v16i8_r = __msa_binsl_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsl.b(
   v8i16_r = __msa_binsl_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsl.h(
   v4i32_r = __msa_binsl_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsl.w(
   v2i64_r = __msa_binsl_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsl.d(
 
-  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
-  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
+  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
+  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
   v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsli.w(
   v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsli.d(
 
   v16i8_r = __msa_binsr_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsr.b(
   v8i16_r = __msa_binsr_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsr.h(
   v4i32_r = __msa_binsr_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsr.w(
   v2i64_r = __msa_binsr_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsr.d(
 
-  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
-  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
+  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 5); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
+  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 15); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
   v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsri.w(
   v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsri.d(
 
@@ -182,8 +182,8 @@
   v4i32_r = __msa_bneg_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> 

r284620 - [mips][msa] Range check MSA intrinsics with immediates

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Wed Oct 19 12:50:52 2016
New Revision: 284620

URL: http://llvm.org/viewvc/llvm-project?rev=284620=rev
Log:
[mips][msa] Range check MSA intrinsics with immediates

This patch teaches clang to range check immediates for MIPS MSA instrinsics.
This checking is done strictly in comparison to some existing GCC
implementations. E.g. msa_andvi_b(var, 257) does not result in andvi $wX, 1.
Similarily msa_ldi_b takes a range of -128 to 127.

As part of this effort, correct the existing MSA test as it has both illegal
types and immediates.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25017


Added:
cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Sema/Sema.h
cfe/trunk/lib/Sema/SemaChecking.cpp
cfe/trunk/test/CodeGen/builtins-mips-msa.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td?rev=284620=284619=284620=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td Wed Oct 19 12:50:52 
2016
@@ -7752,6 +7752,8 @@ def err_invalid_neon_type_code : Error<
   "incompatible constant for this __builtin_neon function">; 
 def err_argument_invalid_range : Error<
   "argument should be a value from %0 to %1">;
+def err_argument_not_multiple : Error<
+  "argument should be a multiple of %0">;
 def warn_neon_vector_initializer_non_portable : Warning<
   "vector initializers are not compatible with NEON intrinsics in big endian "
   "mode">, InGroup>;

Modified: cfe/trunk/include/clang/Sema/Sema.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Sema/Sema.h?rev=284620=284619=284620=diff
==
--- cfe/trunk/include/clang/Sema/Sema.h (original)
+++ cfe/trunk/include/clang/Sema/Sema.h Wed Oct 19 12:50:52 2016
@@ -9715,6 +9715,8 @@ private:
   llvm::APSInt );
   bool SemaBuiltinConstantArgRange(CallExpr *TheCall, int ArgNum,
int Low, int High);
+  bool SemaBuiltinConstantArgMultiple(CallExpr *TheCall, int ArgNum,
+  unsigned Multiple);
   bool SemaBuiltinARMSpecialReg(unsigned BuiltinID, CallExpr *TheCall,
 int ArgNum, unsigned ExpectedFieldNum,
 bool AllowName);

Modified: cfe/trunk/lib/Sema/SemaChecking.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=284620=284619=284620=diff
==
--- cfe/trunk/lib/Sema/SemaChecking.cpp (original)
+++ cfe/trunk/lib/Sema/SemaChecking.cpp Wed Oct 19 12:50:52 2016
@@ -1455,8 +1455,17 @@ bool Sema::CheckAArch64BuiltinFunctionCa
   return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
 }
 
+// CheckMipsBuiltinFunctionCall - Checks the constant value passed to the
+// intrinsic is correct. The switch statement is ordered by DSP, MSA. The
+// ordering for DSP is unspecified. MSA is ordered by the data format used
+// by the underlying instruction i.e., df/m, df/n and then by size.
+//
+// FIXME: The size tests here should instead be tablegen'd along with the
+//definitions from include/clang/Basic/BuiltinsMips.def.
+// FIXME: GCC is strict on signedness for some of these intrinsics, we should
+//be too.
 bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) 
{
-  unsigned i = 0, l = 0, u = 0;
+  unsigned i = 0, l = 0, u = 0, m = 0;
   switch (BuiltinID) {
   default: return false;
   case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break;
@@ -1466,9 +1475,168 @@ bool Sema::CheckMipsBuiltinFunctionCall(
   case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break;
   case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break;
   case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break;
+  // MSA instrinsics. Instructions (which the intrinsics maps to) which use the
+  // df/m field.
+  // These intrinsics take an unsigned 3 bit immediate.
+  case Mips::BI__builtin_msa_bclri_b:
+  case Mips::BI__builtin_msa_bnegi_b:
+  case Mips::BI__builtin_msa_bseti_b:
+  case Mips::BI__builtin_msa_sat_s_b:
+  case Mips::BI__builtin_msa_sat_u_b:
+  case Mips::BI__builtin_msa_slli_b:
+  case Mips::BI__builtin_msa_srai_b:
+  case Mips::BI__builtin_msa_srari_b:
+  case Mips::BI__builtin_msa_srli_b:
+  case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break;
+  case Mips::BI__builtin_msa_binsli_b:
+  case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break;
+  // These intrinsics take an unsigned 4 bit 

[PATCH] D25017: [mips][msa] Range check MSA intrinsics with immediates

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 74499.
sdardis added a comment.

Update ld / st to respect their range and multiple of 16 constraint.


https://reviews.llvm.org/D25017

Files:
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Sema/Sema.h
  lib/Sema/SemaChecking.cpp
  test/CodeGen/builtins-mips-msa-error.c
  test/CodeGen/builtins-mips-msa.c

Index: test/CodeGen/builtins-mips-msa.c
===
--- test/CodeGen/builtins-mips-msa.c
+++ test/CodeGen/builtins-mips-msa.c
@@ -138,28 +138,28 @@
   v4i32_r = __msa_bclr_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bclr.w(
   v2i64_r = __msa_bclr_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bclr.d(
 
-  v16i8_r = __msa_bclri_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
-  v8i16_r = __msa_bclri_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
+  v16i8_r = __msa_bclri_b(v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
+  v8i16_r = __msa_bclri_h(v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
   v4i32_r = __msa_bclri_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bclri.w(
   v2i64_r = __msa_bclri_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bclri.d(
 
   v16i8_r = __msa_binsl_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsl.b(
   v8i16_r = __msa_binsl_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsl.h(
   v4i32_r = __msa_binsl_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsl.w(
   v2i64_r = __msa_binsl_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsl.d(
 
-  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
-  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
+  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
+  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
   v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsli.w(
   v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsli.d(
 
   v16i8_r = __msa_binsr_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsr.b(
   v8i16_r = __msa_binsr_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsr.h(
   v4i32_r = __msa_binsr_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsr.w(
   v2i64_r = __msa_binsr_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsr.d(
 
-  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
-  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
+  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 5); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
+  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 15); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
   v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsri.w(
   v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsri.d(
 
@@ -182,8 +182,8 @@
   v4i32_r = __msa_bneg_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bneg.w(
   v2i64_r = __msa_bneg_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bneg.d(
 
-  v16i8_r = __msa_bnegi_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bnegi.b(
-  v8i16_r = __msa_bnegi_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bnegi.h(
+  v16i8_r = __msa_bnegi_b(v16i8_a, 6); // CHECK: call <16 x i8>  @llvm.mips.bnegi.b(
+  v8i16_r = __msa_bnegi_h(v8i16_a, 14); // CHECK: call <8  x i16> @llvm.mips.bnegi.h(
   v4i32_r = __msa_bnegi_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bnegi.w(
   v2i64_r = __msa_bnegi_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bnegi.d(
 
@@ -206,8 +206,8 @@
   v4i32_r = __msa_bset_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bset.w(
   v2i64_r = __msa_bset_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bset.d(
 
-  v16i8_r = __msa_bseti_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bseti.b(
-  v8i16_r = __msa_bseti_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bseti.h(
+  v16i8_r = __msa_bseti_b(v16i8_a, 5); // CHECK: call <16 x i8>  @llvm.mips.bseti.b(
+  v8i16_r = __msa_bseti_h(v8i16_a, 15); // CHECK: call <8  x i16> @llvm.mips.bseti.h(
   v4i32_r = __msa_bseti_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bseti.w(
   v2i64_r = __msa_bseti_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bseti.d(
 
@@ -223,10 +223,10 @@
   v4i32_r = __msa_ceq_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.ceq.w(
   v2i64_r = __msa_ceq_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.ceq.d(
 
-  v16i8_r = __msa_ceqi_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.ceqi.b(
-  

[PATCH] D25017: [mips][msa] Range check MSA intrinsics with immediates

[Simon Dardis via cfe-commits]

sdardis created this revision.
sdardis added reviewers: vkalintiris, zoran.jovanovic.
sdardis added a subscriber: cfe-commits.
Herald added a subscriber: sdardis.

This patch teaches clang to range check immediates for MIPS MSA instrincs. This
checking is done strictly in comparison to some existing GCC implementations.
E.g. __msa_andvi_b(var, 257) does not result in andvi $wX, 1. Similarily
__msa_ldi_b takes a range of -128 to 127.

As part of this effort, correct the existing MSA test as it has both illegal 
types and
immediates.

https://reviews.llvm.org/D25017

Files:
  lib/Sema/SemaChecking.cpp
  test/CodeGen/builtins-mips-msa-error.c
  test/CodeGen/builtins-mips-msa.c

Index: test/CodeGen/builtins-mips-msa.c
===
--- test/CodeGen/builtins-mips-msa.c
+++ test/CodeGen/builtins-mips-msa.c
@@ -138,28 +138,28 @@
   v4i32_r = __msa_bclr_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bclr.w(
   v2i64_r = __msa_bclr_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bclr.d(
 
-  v16i8_r = __msa_bclri_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
-  v8i16_r = __msa_bclri_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
+  v16i8_r = __msa_bclri_b(v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.bclri.b(
+  v8i16_r = __msa_bclri_h(v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.bclri.h(
   v4i32_r = __msa_bclri_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bclri.w(
   v2i64_r = __msa_bclri_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bclri.d(
 
   v16i8_r = __msa_binsl_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsl.b(
   v8i16_r = __msa_binsl_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsl.h(
   v4i32_r = __msa_binsl_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsl.w(
   v2i64_r = __msa_binsl_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsl.d(
 
-  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
-  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
+  v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.binsli.b(
+  v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 8); // CHECK: call <8  x i16> @llvm.mips.binsli.h(
   v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsli.w(
   v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsli.d(
 
   v16i8_r = __msa_binsr_b(v16i8_r, v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.binsr.b(
   v8i16_r = __msa_binsr_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.binsr.h(
   v4i32_r = __msa_binsr_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.binsr.w(
   v2i64_r = __msa_binsr_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.binsr.d(
 
-  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
-  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
+  v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 5); // CHECK: call <16 x i8>  @llvm.mips.binsri.b(
+  v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 15); // CHECK: call <8  x i16> @llvm.mips.binsri.h(
   v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.binsri.w(
   v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.binsri.d(
 
@@ -182,8 +182,8 @@
   v4i32_r = __msa_bneg_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bneg.w(
   v2i64_r = __msa_bneg_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bneg.d(
 
-  v16i8_r = __msa_bnegi_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bnegi.b(
-  v8i16_r = __msa_bnegi_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bnegi.h(
+  v16i8_r = __msa_bnegi_b(v16i8_a, 6); // CHECK: call <16 x i8>  @llvm.mips.bnegi.b(
+  v8i16_r = __msa_bnegi_h(v8i16_a, 14); // CHECK: call <8  x i16> @llvm.mips.bnegi.h(
   v4i32_r = __msa_bnegi_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bnegi.w(
   v2i64_r = __msa_bnegi_d(v2i64_a, 25); // CHECK: call <2  x i64> @llvm.mips.bnegi.d(
 
@@ -206,8 +206,8 @@
   v4i32_r = __msa_bset_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.bset.w(
   v2i64_r = __msa_bset_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.bset.d(
 
-  v16i8_r = __msa_bseti_b(v16i8_a, 25); // CHECK: call <16 x i8>  @llvm.mips.bseti.b(
-  v8i16_r = __msa_bseti_h(v8i16_a, 25); // CHECK: call <8  x i16> @llvm.mips.bseti.h(
+  v16i8_r = __msa_bseti_b(v16i8_a, 5); // CHECK: call <16 x i8>  @llvm.mips.bseti.b(
+  v8i16_r = __msa_bseti_h(v8i16_a, 15); // CHECK: call <8  x i16> @llvm.mips.bseti.h(
   v4i32_r = __msa_bseti_w(v4i32_a, 25); // CHECK: call <4  x i32> @llvm.mips.bseti.w(
   v2i64_r = __msa_bseti_d(v2i64_a, 25); // CHECK: call 

Re: [PATCH] D24798: [mips] Fix msa builtins test

[Simon Dardis via cfe-commits]

sdardis abandoned this revision.
sdardis added a comment.

I'm abandoning this revision. This test is riddled with errors such as out of 
range immediates and type errors that aren't warned about. I'll post a more 
substantial patch to address the handling of those cases + update this test and 
I'll squash these small changes into that patch.


https://reviews.llvm.org/D24798



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[PATCH] D24798: [mips] Fix msa builtins test

[Simon Dardis via cfe-commits]

sdardis created this revision.
sdardis added reviewers: vkalintiris, zoran.jovanovic.
sdardis added a subscriber: cfe-commits.
Herald added a subscriber: sdardis.

This test was using the wrong types in several places.

https://reviews.llvm.org/D24798

Files:
  test/CodeGen/builtins-mips-msa.c

Index: test/CodeGen/builtins-mips-msa.c
===
--- test/CodeGen/builtins-mips-msa.c
+++ test/CodeGen/builtins-mips-msa.c
@@ -387,11 +387,11 @@
   v4i32_r = __msa_fill_w(3); // CHECK: call <4  x i32> @llvm.mips.fill.w(
   v2i64_r = __msa_fill_d(3); // CHECK: call <2  x i64> @llvm.mips.fill.d(
 
-  v4f32_r = __msa_flog2_w(v8f16_a); // CHECK: call <4 x float>  
@llvm.mips.flog2.w(
-  v2f64_r = __msa_flog2_d(v4f32_a); // CHECK: call <2 x double> 
@llvm.mips.flog2.d(
+  v4f32_r = __msa_flog2_w(v4f32_a); // CHECK: call <4 x float>  
@llvm.mips.flog2.w(
+  v2f64_r = __msa_flog2_d(v2f64_a); // CHECK: call <2 x double> 
@llvm.mips.flog2.d(
 
-  v4f32_r = __msa_fmadd_w(v8f16_r, v8f16_a, v8f16_b); // CHECK: call <4 x 
float>  @llvm.mips.fmadd.w(
-  v2f64_r = __msa_fmadd_d(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <2 x 
double> @llvm.mips.fmadd.d(
+  v4f32_r = __msa_fmadd_w(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <4 x 
float>  @llvm.mips.fmadd.w(
+  v2f64_r = __msa_fmadd_d(v2f64_r, v2f64_a, v2f64_b); // CHECK: call <2 x 
double> @llvm.mips.fmadd.d(
 
   v4f32_r = __msa_fmax_w(v4f32_a, v4f32_b); // CHECK: call <4 x float>  
@llvm.mips.fmax.w(
   v2f64_r = __msa_fmax_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> 
@llvm.mips.fmax.d(
@@ -405,20 +405,20 @@
   v4f32_r = __msa_fmin_a_w(v4f32_a, v4f32_b); // CHECK: call <4 x float>  
@llvm.mips.fmin.a.w(
   v2f64_r = __msa_fmin_a_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> 
@llvm.mips.fmin.a.d(
 
-  v4f32_r = __msa_fmsub_w(v8f16_r, v8f16_a, v8f16_b); // CHECK: call <4 x 
float>  @llvm.mips.fmsub.w(
-  v2f64_r = __msa_fmsub_d(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <2 x 
double> @llvm.mips.fmsub.d(
+  v4f32_r = __msa_fmsub_w(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <4 x 
float>  @llvm.mips.fmsub.w(
+  v2f64_r = __msa_fmsub_d(v2f64_r, v2f64_a, v2f64_b); // CHECK: call <2 x 
double> @llvm.mips.fmsub.d(
 
   v4f32_r = __msa_fmul_w(v4f32_a, v4f32_b); // CHECK: call <4 x float>  
@llvm.mips.fmul.w(
   v2f64_r = __msa_fmul_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> 
@llvm.mips.fmul.d(
 
-  v4f32_r = __msa_frint_w(v8f16_a); // CHECK: call <4 x float>  
@llvm.mips.frint.w(
-  v2f64_r = __msa_frint_d(v4f32_a); // CHECK: call <2 x double> 
@llvm.mips.frint.d(
+  v4f32_r = __msa_frint_w(v4f32_a); // CHECK: call <4 x float>  
@llvm.mips.frint.w(
+  v2f64_r = __msa_frint_d(v2f64_a); // CHECK: call <2 x double> 
@llvm.mips.frint.d(
 
-  v4f32_r = __msa_frcp_w(v8f16_a); // CHECK: call <4 x float>  
@llvm.mips.frcp.w(
-  v2f64_r = __msa_frcp_d(v4f32_a); // CHECK: call <2 x double> 
@llvm.mips.frcp.d(
+  v4f32_r = __msa_frcp_w(v4f32_a); // CHECK: call <4 x float>  
@llvm.mips.frcp.w(
+  v2f64_r = __msa_frcp_d(v2f64_a); // CHECK: call <2 x double> 
@llvm.mips.frcp.d(
 
-  v4f32_r = __msa_frsqrt_w(v8f16_a); // CHECK: call <4 x float>  
@llvm.mips.frsqrt.w(
-  v2f64_r = __msa_frsqrt_d(v4f32_a); // CHECK: call <2 x double> 
@llvm.mips.frsqrt.d(
+  v4f32_r = __msa_frsqrt_w(v4f32_a); // CHECK: call <4 x float>  
@llvm.mips.frsqrt.w(
+  v2f64_r = __msa_frsqrt_d(v2f64_a); // CHECK: call <2 x double> 
@llvm.mips.frsqrt.d(
 
   v4i32_r = __msa_fseq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> 
@llvm.mips.fseq.w(
   v2i64_r = __msa_fseq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> 
@llvm.mips.fseq.d(
@@ -438,8 +438,8 @@
   v4i32_r = __msa_fsor_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> 
@llvm.mips.fsor.w(
   v2i64_r = __msa_fsor_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> 
@llvm.mips.fsor.d(
 
-  v4f32_r = __msa_fsqrt_w(v8f16_a); // CHECK: call <4 x float>  
@llvm.mips.fsqrt.w(
-  v2f64_r = __msa_fsqrt_d(v4f32_a); // CHECK: call <2 x double> 
@llvm.mips.fsqrt.d(
+  v4f32_r = __msa_fsqrt_w(v4f32_a); // CHECK: call <4 x float>  
@llvm.mips.fsqrt.w(
+  v2f64_r = __msa_fsqrt_d(v2f64_a); // CHECK: call <2 x double> 
@llvm.mips.fsqrt.d(
 
   v4f32_r = __msa_fsub_w(v4f32_a, v4f32_b); // CHECK: call <4 x float>  
@llvm.mips.fsub.w(
   v2f64_r = __msa_fsub_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> 
@llvm.mips.fsub.d(


Index: test/CodeGen/builtins-mips-msa.c
===
--- test/CodeGen/builtins-mips-msa.c
+++ test/CodeGen/builtins-mips-msa.c
@@ -387,11 +387,11 @@
   v4i32_r = __msa_fill_w(3); // CHECK: call <4  x i32> @llvm.mips.fill.w(
   v2i64_r = __msa_fill_d(3); // CHECK: call <2  x i64> @llvm.mips.fill.d(
 
-  v4f32_r = __msa_flog2_w(v8f16_a); // CHECK: call <4 x float>  @llvm.mips.flog2.w(
-  v2f64_r = __msa_flog2_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.flog2.d(
+  v4f32_r = __msa_flog2_w(v4f32_a); // CHECK: call <4 x float>  @llvm.mips.flog2.w(
+  

Re: [PATCH] D24674: [mips] MSA intrinsics header file

[Simon Dardis via cfe-commits]

sdardis added a comment.

Checking the generated IR for the incorrect uses of v8f16 shows that clang is 
silently generating bitcasts from <8 x i16> to <4 x float>. There are some 
other cases where the type of the operands is incorrect w.r.t. the builtin used.

I'm not familiar with the type checking machinery, so I'm unsure if the silent 
conversion is a bug or feature.


https://reviews.llvm.org/D24674



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Re: [PATCH] D24674: [mips] MSA intrinsics header file

[Simon Dardis via cfe-commits]

sdardis closed this revision.
sdardis added a comment.

As stated I'll do a follow-up patch to fix the test. Committed as r281975.

Thanks,
Simon


https://reviews.llvm.org/D24674



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Re: [PATCH] D24674: [mips] MSA intrinsics header file

[Simon Dardis via cfe-commits]

sdardis added a comment.

@mpf
I'll correct the incorrect uses in a followup patch.

Thanks,
Simon


https://reviews.llvm.org/D24674



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Re: [PATCH] D24448: [atomics] New warning -Watomic-libcall when atomic operation expands to a library call

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 71507.
sdardis added a comment.

Update comment and test for atomic expansion.


https://reviews.llvm.org/D24448

Files:
  include/clang/Basic/DiagnosticGroups.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/Sema/SemaChecking.cpp
  test/Sema/atomic-libcall.c

Index: test/Sema/atomic-libcall.c
===
--- /dev/null
+++ test/Sema/atomic-libcall.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -triple=mips-mti-linux-gnu 
-Watomic-libcall
+
+// Test that larger than word size atomics are warned about.
+
+long long var;
+
+void foo(long long a) {
+  __sync_fetch_and_add(, 0, a); // expected-warning {{atomic builtin 
expands to library call}}
+}
Index: lib/Sema/SemaChecking.cpp
===
--- lib/Sema/SemaChecking.cpp
+++ lib/Sema/SemaChecking.cpp
@@ -3035,6 +3035,14 @@
 
   ASTContext& Context = this->getASTContext();
 
+  // Warn if the atomic will expand into a library call if requested.
+  TypeInfo ValueTI = Context.getTypeInfo(ValType);
+  uint64_t Size = ValueTI.Width;
+  uint64_t Align = ValueTI.Align;
+  if (!Context.getTargetInfo().hasBuiltinAtomic(Size, Align)) {
+Diag(DRE->getLocStart(), diag::warn_atomic_builtin_expands_to_libcall);
+  }
+
   // Create a new DeclRefExpr to refer to the new decl.
   DeclRefExpr* NewDRE = DeclRefExpr::Create(
   Context,
Index: include/clang/Basic/DiagnosticSemaKinds.td
===
--- include/clang/Basic/DiagnosticSemaKinds.td
+++ include/clang/Basic/DiagnosticSemaKinds.td
@@ -5120,6 +5120,8 @@
   "_Atomic cannot be applied to "
   "%select{incomplete |array |function |reference |atomic |qualified |}0type "
   "%1 %select{||which is not trivially copyable}0">;
+def warn_atomic_builtin_expands_to_libcall : Warning<
+  "atomic builtin expands to library call">, InGroup, 
DefaultIgnore;
 
 // Expressions.
 def ext_sizeof_alignof_function_type : Extension<
Index: include/clang/Basic/DiagnosticGroups.td
===
--- include/clang/Basic/DiagnosticGroups.td
+++ include/clang/Basic/DiagnosticGroups.td
@@ -861,6 +861,8 @@
 def ProfileInstrOutOfDate : DiagGroup<"profile-instr-out-of-date">;
 def ProfileInstrUnprofiled : DiagGroup<"profile-instr-unprofiled">;
 
+def AtomicLibcall : DiagGroup<"atomic-libcall">;
+
 // AddressSanitizer frontent instrumentation remarks.
 def SanitizeAddressRemarks : DiagGroup<"sanitize-address">;
 


Index: test/Sema/atomic-libcall.c
===
--- /dev/null
+++ test/Sema/atomic-libcall.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -triple=mips-mti-linux-gnu -Watomic-libcall
+
+// Test that larger than word size atomics are warned about.
+
+long long var;
+
+void foo(long long a) {
+  __sync_fetch_and_add(, 0, a); // expected-warning {{atomic builtin expands to library call}}
+}
Index: lib/Sema/SemaChecking.cpp
===
--- lib/Sema/SemaChecking.cpp
+++ lib/Sema/SemaChecking.cpp
@@ -3035,6 +3035,14 @@
 
   ASTContext& Context = this->getASTContext();
 
+  // Warn if the atomic will expand into a library call if requested.
+  TypeInfo ValueTI = Context.getTypeInfo(ValType);
+  uint64_t Size = ValueTI.Width;
+  uint64_t Align = ValueTI.Align;
+  if (!Context.getTargetInfo().hasBuiltinAtomic(Size, Align)) {
+Diag(DRE->getLocStart(), diag::warn_atomic_builtin_expands_to_libcall);
+  }
+
   // Create a new DeclRefExpr to refer to the new decl.
   DeclRefExpr* NewDRE = DeclRefExpr::Create(
   Context,
Index: include/clang/Basic/DiagnosticSemaKinds.td
===
--- include/clang/Basic/DiagnosticSemaKinds.td
+++ include/clang/Basic/DiagnosticSemaKinds.td
@@ -5120,6 +5120,8 @@
   "_Atomic cannot be applied to "
   "%select{incomplete |array |function |reference |atomic |qualified |}0type "
   "%1 %select{||which is not trivially copyable}0">;
+def warn_atomic_builtin_expands_to_libcall : Warning<
+  "atomic builtin expands to library call">, InGroup, DefaultIgnore;
 
 // Expressions.
 def ext_sizeof_alignof_function_type : Extension<
Index: include/clang/Basic/DiagnosticGroups.td
===
--- include/clang/Basic/DiagnosticGroups.td
+++ include/clang/Basic/DiagnosticGroups.td
@@ -861,6 +861,8 @@
 def ProfileInstrOutOfDate : DiagGroup<"profile-instr-out-of-date">;
 def ProfileInstrUnprofiled : DiagGroup<"profile-instr-unprofiled">;
 
+def AtomicLibcall : DiagGroup<"atomic-libcall">;
+
 // AddressSanitizer frontent instrumentation remarks.
 def SanitizeAddressRemarks : DiagGroup<"sanitize-address">;
 
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Re: [PATCH] D22679: [mips][ias] Enable IAS by default for N64 on Debian mips64el.

[Simon Dardis via cfe-commits]

sdardis closed this revision.
sdardis added a comment.

Committed as https://reviews.llvm.org/rL281610.


https://reviews.llvm.org/D22679



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r281610 - [mips][ias] Enable IAS by default for N64 on Debian mips64el.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Thu Sep 15 09:01:55 2016
New Revision: 281610

URL: http://llvm.org/viewvc/llvm-project?rev=281610=rev
Log:
[mips][ias] Enable IAS by default for N64 on Debian mips64el.

Unfortunately we can't enable it for all N64 because it is not yet possible to
distinguish N32 from N64 from the triple on other environments.

N64 has been confirmed to produce identical (within reason) objects to GAS
during stage 2 of compiler recursion on N64-abi Fedora. Unfortunately,
Fedora's triples do not distinguish N32 from N64 so I can't enable it by
default there. I'm currently repeating this testing for Debian mips64el but
it's very unlikely to produce a different result.

Patch by: Daniel Sanders

Reviewers: sdardis

Differential Review: https://reviews.llvm.org/D22679

Modified:
cfe/trunk/lib/Driver/ToolChains.cpp

Modified: cfe/trunk/lib/Driver/ToolChains.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains.cpp?rev=281610=281609=281610=diff
==
--- cfe/trunk/lib/Driver/ToolChains.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains.cpp Thu Sep 15 09:01:55 2016
@@ -2778,6 +2778,13 @@ bool Generic_GCC::IsIntegratedAssemblerD
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
 return true;
+  case llvm::Triple::mips64:
+  case llvm::Triple::mips64el:
+// Enabled for Debian mips64/mips64el only. Other targets are unable to
+// distinguish N32 from N64.
+if (getTriple().getEnvironment() == llvm::Triple::GNUABI64)
+  return true;
+return false;
   default:
 return false;
   }


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Re: [PATCH] D21070: Pass the ABI in the triple when appropriate (currently for MIPS) for 'clang -cc1' and 'clang -cc1as'

[Simon Dardis via cfe-commits]

sdardis added a comment.

Ping.


https://reviews.llvm.org/D21070



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[PATCH] D24448: [atomics] New warning -Watomic-libcall when atomic operation expands to a library call

[Simon Dardis via cfe-commits]

sdardis created this revision.
sdardis added a subscriber: cfe-commits.
Herald added a reviewer: vkalintiris.
Herald added a subscriber: aemerson.

Targets typically support atomics that are word sized (e.g. 32 or 64 bit) or
half word sized (e.g. 32 bit on 64 bit systems). For larger sizes, some
targets can perform them directly (x86, ARM), other must expand them into
a library call. This patch adds the optional warning -Watomic-libcall which
warns when a atomic operation cannot be expanded inline and must use a
library call.

https://reviews.llvm.org/D24448

Files:
  include/clang/Basic/DiagnosticGroups.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/Sema/SemaChecking.cpp
  test/Sema/atomic-libcall.c

Index: test/Sema/atomic-libcall.c
===
--- /dev/null
+++ test/Sema/atomic-libcall.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -triple=mips-mti-linux-gnu 
-Watomic-libcall
+
+// Test that larger than word size atomics are warned about.
+
+long long var;
+
+void foo(long long a) {
+  __sync_fetch_and_add(, 0, a); // expected-warning {{atomic builtin 
expands to library call}}
+}
Index: lib/Sema/SemaChecking.cpp
===
--- lib/Sema/SemaChecking.cpp
+++ lib/Sema/SemaChecking.cpp
@@ -3035,6 +3035,15 @@
 
   ASTContext& Context = this->getASTContext();
 
+  // Warn if the requested atomic will expand into a library call, as this can
+  // impact performance significantly if it requires kernel intervention or
+  // some other shared but hidden lock.
+  if (Context.getTypeSizeInChars(ValType) >
+  Context.toCharUnitsFromBits(
+  Context.getTargetInfo().getMaxAtomicInlineWidth())) {
+Diag(DRE->getLocStart(), diag::warn_atomic_builtin_expands_to_libcall);
+  }
+
   // Create a new DeclRefExpr to refer to the new decl.
   DeclRefExpr* NewDRE = DeclRefExpr::Create(
   Context,
Index: include/clang/Basic/DiagnosticSemaKinds.td
===
--- include/clang/Basic/DiagnosticSemaKinds.td
+++ include/clang/Basic/DiagnosticSemaKinds.td
@@ -5118,6 +5118,8 @@
   "_Atomic cannot be applied to "
   "%select{incomplete |array |function |reference |atomic |qualified |}0type "
   "%1 %select{||which is not trivially copyable}0">;
+def warn_atomic_builtin_expands_to_libcall : Warning<
+  "atomic builtin expands to library call">, InGroup, 
DefaultIgnore;
 
 // Expressions.
 def ext_sizeof_alignof_function_type : Extension<
Index: include/clang/Basic/DiagnosticGroups.td
===
--- include/clang/Basic/DiagnosticGroups.td
+++ include/clang/Basic/DiagnosticGroups.td
@@ -859,6 +859,8 @@
 def ProfileInstrOutOfDate : DiagGroup<"profile-instr-out-of-date">;
 def ProfileInstrUnprofiled : DiagGroup<"profile-instr-unprofiled">;
 
+def AtomicLibcall : DiagGroup<"atomic-libcall">;
+
 // AddressSanitizer frontent instrumentation remarks.
 def SanitizeAddressRemarks : DiagGroup<"sanitize-address">;
 
@@ -880,4 +882,4 @@
 
 // A warning group for warnings about code that clang accepts when
 // compiling OpenCL C/C++ but which is not compatible with the SPIR spec.
-def SpirCompat : DiagGroup<"spir-compat">;
\ No newline at end of file
+def SpirCompat : DiagGroup<"spir-compat">;


Index: test/Sema/atomic-libcall.c
===
--- /dev/null
+++ test/Sema/atomic-libcall.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 %s -verify -fsyntax-only -triple=mips-mti-linux-gnu -Watomic-libcall
+
+// Test that larger than word size atomics are warned about.
+
+long long var;
+
+void foo(long long a) {
+  __sync_fetch_and_add(, 0, a); // expected-warning {{atomic builtin expands to library call}}
+}
Index: lib/Sema/SemaChecking.cpp
===
--- lib/Sema/SemaChecking.cpp
+++ lib/Sema/SemaChecking.cpp
@@ -3035,6 +3035,15 @@
 
   ASTContext& Context = this->getASTContext();
 
+  // Warn if the requested atomic will expand into a library call, as this can
+  // impact performance significantly if it requires kernel intervention or
+  // some other shared but hidden lock.
+  if (Context.getTypeSizeInChars(ValType) >
+  Context.toCharUnitsFromBits(
+  Context.getTargetInfo().getMaxAtomicInlineWidth())) {
+Diag(DRE->getLocStart(), diag::warn_atomic_builtin_expands_to_libcall);
+  }
+
   // Create a new DeclRefExpr to refer to the new decl.
   DeclRefExpr* NewDRE = DeclRefExpr::Create(
   Context,
Index: include/clang/Basic/DiagnosticSemaKinds.td
===
--- include/clang/Basic/DiagnosticSemaKinds.td
+++ include/clang/Basic/DiagnosticSemaKinds.td
@@ -5118,6 +5118,8 @@
   "_Atomic cannot be applied to "
   "%select{incomplete |array |function |reference |atomic |qualified |}0type "
   "%1 

Re: [PATCH] D21072: [mips] Account for -mabi when determining whether IAS is the default or not.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 68993.
sdardis added a comment.

Rebase + ping.


https://reviews.llvm.org/D21072

Files:
  include/clang/Driver/ToolChain.h
  lib/Driver/MSVCToolChain.cpp
  lib/Driver/MinGWToolChain.cpp
  lib/Driver/ToolChain.cpp
  lib/Driver/ToolChains.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  test/Driver/mips-integrated-as.s

Index: test/Driver/mips-integrated-as.s
===
--- test/Driver/mips-integrated-as.s
+++ test/Driver/mips-integrated-as.s
@@ -1,3 +1,5 @@
+// RUN: %clang -target mips-linux-gnu -### -c %s 2>&1 | \
+// RUN:   FileCheck -check-prefix=ABI-O32 %s
 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s 2>&1 | \
 // RUN:   FileCheck -check-prefix=ABI-O32 %s
 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s -mabi=32 2>&1 | \
@@ -293,3 +295,13 @@
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+single-float"
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+fpxx"
 // IMG-SINGLEFLOAT-EXPLICIT-FPXX: "-target-feature" "+nooddspreg"
+
+// RUN: %clang -target mips-linux-gnu -### -c %s -mips64 -mabi=n32 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips64-linux-gnu -### -c %s -mabi=n32 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips-linux-gnu -### -c %s -mips64 -mabi=64 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// RUN: %clang -target mips64-linux-gnu -### -c %s 2>&1 | \
+// RUN:   FileCheck -check-prefix=GAS %s
+// GAS-NOT: -cc1as
Index: lib/Driver/Tools.cpp
===
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -4384,7 +4384,7 @@
   // Decide whether to use verbose asm. Verbose assembly is the default on
   // toolchains which have the integrated assembler on by default.
   bool IsIntegratedAssemblerDefault =
-  getToolChain().IsIntegratedAssemblerDefault();
+  getToolChain().IsIntegratedAssemblerDefault(Args);
   if (Args.hasFlag(options::OPT_fverbose_asm, options::OPT_fno_verbose_asm,
IsIntegratedAssemblerDefault) ||
   Args.hasArg(options::OPT_dA))
Index: lib/Driver/ToolChains.h
===
--- lib/Driver/ToolChains.h
+++ lib/Driver/ToolChains.h
@@ -221,7 +221,8 @@
   bool isPICDefault() const override;
   bool isPIEDefault() const override;
   bool isPICDefaultForced() const override;
-  bool IsIntegratedAssemblerDefault() const override;
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override;
 
 protected:
   Tool *getTool(Action::ActionClass AC) const override;
@@ -325,7 +326,8 @@
 // expected to use /usr/include/Block.h.
 return true;
   }
-  bool IsIntegratedAssemblerDefault() const override {
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
 // Default integrated assembler to on for Apple's MachO targets.
 return true;
   }
@@ -645,7 +647,10 @@
   Solaris(const Driver , const llvm::Triple ,
   const llvm::opt::ArgList );
 
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 
   void AddClangCXXStdlibIncludeArgs(
   const llvm::opt::ArgList ,
@@ -663,7 +668,8 @@
   MinGW(const Driver , const llvm::Triple ,
 const llvm::opt::ArgList );
 
-  bool IsIntegratedAssemblerDefault() const override;
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override;
   bool IsUnwindTablesDefault() const override;
   bool isPICDefault() const override;
   bool isPIEDefault() const override;
@@ -920,7 +926,10 @@
   LanaiToolChain(const Driver , const llvm::Triple ,
  const llvm::opt::ArgList )
   : Generic_ELF(D, Triple, Args) {}
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY HexagonToolChain : public Linux {
@@ -943,7 +952,8 @@
   CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
 
   StringRef GetGCCLibAndIncVersion() const { return GCCLibAndIncVersion.Text; }
-  bool IsIntegratedAssemblerDefault() const override {
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
 return true;
   }
 
@@ -968,7 +978,10 @@
   AMDGPUToolChain(const Driver , const llvm::Triple ,
 const llvm::opt::ArgList );
   unsigned GetDefaultDwarfVersion() const override { return 2; }
-  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool
+  IsIntegratedAssemblerDefault(const llvm::opt::ArgList ) const override {
+return true;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY NaClToolChain : public Generic_ELF {
@@ -988,7 +1001,8 @@
   void 

Re: [PATCH] D21072: [mips] Account for -mabi when determining whether IAS is the default or not.

[Simon Dardis via cfe-commits]

sdardis commandeered this revision.
sdardis added a reviewer: dsanders.
sdardis added a comment.
Herald added a reviewer: vkalintiris.

Taking over this patch series.


https://reviews.llvm.org/D21072



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Re: [PATCH] D21070: Pass the ABI in the triple when appropriate (currently for MIPS) for 'clang -cc1' and 'clang -cc1as'

[Simon Dardis via cfe-commits]

sdardis added a subscriber: sdardis.
sdardis commandeered this revision.
sdardis added a reviewer: dsanders.
sdardis added a comment.
Herald added a reviewer: vkalintiris.

Taking over this patch series.


https://reviews.llvm.org/D21070



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Re: [PATCH] D22679: [mips][ias] Enable IAS by default for N64 on Debian mips64el.

[Simon Dardis via cfe-commits]

sdardis added a comment.

Actually, seeing your reply on the related patch, keep the comment as it 
reflects trunk.


https://reviews.llvm.org/D22679



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Re: [PATCH] D22679: [mips][ias] Enable IAS by default for N64 on Debian mips64el.

[Simon Dardis via cfe-commits]

sdardis added a comment.

Yes, I think you should also reflect mpf's comment here too.


https://reviews.llvm.org/D22679



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Re: [PATCH] D22679: [mips][ias] Enable IAS by default for N64 on Debian mips64el.

[Simon Dardis via cfe-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM.


https://reviews.llvm.org/D22679



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Re: [PATCH] D20729: [mips] Compact branch policy setting

[Simon Dardis via cfe-commits]

sdardis added a comment.

Thanks for the review.


Repository:
  rL LLVM

http://reviews.llvm.org/D20729



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r271000 - [mips] Compact branch policy setting.

[Simon Dardis via cfe-commits]

Author: sdardis
Date: Fri May 27 10:13:31 2016
New Revision: 271000

URL: http://llvm.org/viewvc/llvm-project?rev=271000=rev
Log:
[mips] Compact branch policy setting.

This patch adds the commandline option 
-mcompact-branches={never,optimal,always),
which controls how LLVM generates compact branches for MIPSR6 targets. By 
default,
the compact branch policy is 'optimal' where LLVM will generate the most
appropriate branch for any situation. The 'never' and 'always' policy will 
disable
or always generate compact branches wherever possible respectfully.

Reviewers: dsanders, vkalintiris, atanasyan

Differential Revision: http://reviews.llvm.org/D20729

Modified:
cfe/trunk/docs/UsersManual.rst
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/lib/Driver/Tools.h
cfe/trunk/test/Driver/mips-features.c

Modified: cfe/trunk/docs/UsersManual.rst
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/UsersManual.rst?rev=271000=270999=271000=diff
==
--- cfe/trunk/docs/UsersManual.rst (original)
+++ cfe/trunk/docs/UsersManual.rst Fri May 27 10:13:31 2016
@@ -1140,6 +1140,16 @@ are listed below.
This option restricts the generated code to use general registers
only. This only applies to the AArch64 architecture.
 
+.. option:: -mcompact-branches=[values]
+
+   Control the usage of compact branches for MIPSR6.
+
+   Valid values are: ``never``, ``optimal`` and ``always``.
+   The default value is ``optimal`` which generates compact branches
+   when a delay slot cannot be filled. ``never`` disables the usage of
+   compact branches and ``always`` generates compact branches whenever
+   possible.
+
 **-f[no-]max-type-align=[number]**
Instruct the code generator to not enforce a higher alignment than the given
number (of bytes) when accessing memory via an opaque pointer or reference.

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=271000=270999=271000=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Fri May 27 10:13:31 
2016
@@ -238,6 +238,9 @@ def warn_target_unsupported_nan2008 : Wa
 def warn_target_unsupported_nanlegacy : Warning<
   "ignoring '-mnan=legacy' option because the '%0' architecture does not 
support it">,
   InGroup;
+def warn_target_unsupported_compact_branches : Warning<
+  "ignoring '-mcompact-branches=' option because the '%0' architecture does 
not"
+  " support it">, InGroup;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=271000=270999=271000=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Fri May 27 10:13:31 2016
@@ -56,6 +56,7 @@ def FloatConversion :
 def DoublePromotion : DiagGroup<"double-promotion">;
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
+def UnsupportedCB : DiagGroup<"unsupported-cb">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=271000=270999=271000=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Fri May 27 10:13:31 2016
@@ -1621,6 +1621,7 @@ def mno_ldc1_sdc1 : Flag<["-"], "mno-ldc
 def mcheck_zero_division : Flag<["-"], "mcheck-zero-division">, Group;
 def mno_check_zero_division : Flag<["-"], "mno-check-zero-division">,
   Group;
+def mcompact_branches_EQ : Joined<["-"], "mcompact-branches=">, Group;
 def mdsp : Flag<["-"], "mdsp">, Group;
 def mno_dsp : Flag<["-"], "mno-dsp">, Group;
 def mdspr2 : Flag<["-"], "mdspr2">, Group;

Modified: cfe/trunk/lib/Driver/Tools.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Tools.cpp?rev=271000=270999=271000=diff
==
--- cfe/trunk/lib/Driver/Tools.cpp (original)
+++ cfe/trunk/lib/Driver/Tools.cpp Fri May 27 10:13:31 2016
@@ -1436,6 +1436,19 @@ void 

[PATCH] D20729: [mips] Compact branch policy setting

[Simon Dardis via cfe-commits]

sdardis created this revision.
sdardis added reviewers: dsanders, atanasyan.
sdardis added a subscriber: cfe-commits.
Herald added a reviewer: vkalintiris.
Herald added a subscriber: sdardis.

This patch adds the commandline option 
-mcompact-branches={never,optimal,always),
which controls how LLVM generates compact branches for MIPSR6 targets. By 
default,
the compact branch policy is 'optimal' where LLVM will generate the most
appropriate branch for any situation. The 'never' and 'always' policy will 
disable
or always generate compact branches wherever possible respectfully.

http://reviews.llvm.org/D20729

Files:
  docs/UsersManual.rst
  include/clang/Basic/DiagnosticDriverKinds.td
  include/clang/Basic/DiagnosticGroups.td
  include/clang/Driver/Options.td
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/Driver/mips-features.c

Index: test/Driver/mips-features.c
===
--- test/Driver/mips-features.c
+++ test/Driver/mips-features.c
@@ -116,6 +116,24 @@
 // RUN:   | FileCheck --check-prefix=CHECK-NANLEGACY %s
 // CHECK-NANLEGACY: "-target-feature" "-nan2008"
 //
+// -mcompact-branches=never
+// RUN: %clang -target mips-linux-gnu -march=mips32r6 -### -c %s \
+// RUN: -mcompact-branches=never 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-CBNEVER %s
+// CHECK-CBNEVER: "-mllvm" "-mips-compact-branches=never"
+//
+// -mcompact-branches=optimal
+// RUN: %clang -target mips-linux-gnu -march=mips32r6 -### -c %s \
+// RUN: -mcompact-branches=optimal 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-CBOPTIMAL %s
+// CHECK-CBOPTIMAL: "-mllvm" "-mips-compact-branches=optimal"
+//
+// -mcompact-branches=always
+// RUN: %clang -target mips-linux-gnu -march=mips32r6 -### -c %s \
+// RUN: -mcompact-branches=always 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-CBALWAYS %s
+// CHECK-CBALWAYS: "-mllvm" "-mips-compact-branches=always"
+//
 // -mxgot
 // RUN: %clang -target mips-linux-gnu -### -c %s \
 // RUN: -mno-xgot -mxgot 2>&1 \
Index: lib/Driver/Tools.h
===
--- lib/Driver/Tools.h
+++ lib/Driver/Tools.h
@@ -291,6 +291,7 @@
 };
 
 NanEncoding getSupportedNanEncoding(StringRef );
+bool hasCompactBranches(StringRef );
 void getMipsCPUAndABI(const llvm::opt::ArgList ,
   const llvm::Triple , StringRef ,
   StringRef );
Index: lib/Driver/Tools.cpp
===
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -1436,6 +1436,20 @@
 CmdArgs.push_back(Args.MakeArgString("-mips-ssection-threshold=" + v));
 A->claim();
   }
+
+  if (Arg *A = Args.getLastArg(options::OPT_mcompact_branches_EQ)) {
+StringRef Val = StringRef(A->getValue());
+if (mips::hasCompactBranches(CPUName)) {
+  if (Val == "never" || Val == "always" || Val == "optimal") {
+CmdArgs.push_back("-mllvm");
+CmdArgs.push_back(Args.MakeArgString("-mips-compact-branches=" + Val));
+
+  } else
+D.Diag(diag::err_drv_unsupported_option_argument)
+<< A->getOption().getName() << Val;
+} else
+  D.Diag(diag::warn_target_unsupported_compact_branches) << CPUName;
+  }
 }
 
 /// getPPCTargetCPU - Get the (LLVM) name of the PowerPC cpu we are targeting.
@@ -7065,6 +7079,15 @@
   .Default(NanLegacy);
 }
 
+bool mips::hasCompactBranches(StringRef ) {
+  // mips32r6 and mips64r6 have compact branches.
+
+  return (bool)llvm::StringSwitch(CPU)
+  .Case("mips32r6", true)
+  .Case("mips64r6", true)
+  .Default(false);
+}
+
 bool mips::hasMipsAbiArg(const ArgList , const char *Value) {
   Arg *A = Args.getLastArg(options::OPT_mabi_EQ);
   return A && (A->getValue() == StringRef(Value));
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1621,6 +1621,7 @@
 def mcheck_zero_division : Flag<["-"], "mcheck-zero-division">, Group;
 def mno_check_zero_division : Flag<["-"], "mno-check-zero-division">,
   Group;
+def mcompact_branches_EQ : Joined<["-"], "mcompact-branches=">, Group;
 def mdsp : Flag<["-"], "mdsp">, Group;
 def mno_dsp : Flag<["-"], "mno-dsp">, Group;
 def mdspr2 : Flag<["-"], "mdspr2">, Group;
Index: include/clang/Basic/DiagnosticGroups.td
===
--- include/clang/Basic/DiagnosticGroups.td
+++ include/clang/Basic/DiagnosticGroups.td
@@ -56,6 +56,7 @@
 def DoublePromotion : DiagGroup<"double-promotion">;
 def EnumTooLarge : DiagGroup<"enum-too-large">;
 def UnsupportedNan : DiagGroup<"unsupported-nan">;
+def UnsupportedCB : DiagGroup<"unsupported-cb">;
 def NonLiteralNullConversion : DiagGroup<"non-literal-null-conversion">;
 def NullConversion : DiagGroup<"null-conversion">;
 def ImplicitConversionFloatingPointToBool :
Index: 

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 41283.
sdardis added a comment.

Nit addressed.

Daniel or Aaron, can one of you commit on my behalf? Thanks.

Aaron, thanks for the review.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c

Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+struct a { int b; };
+
+struct a test __attribute__((interrupt)); // expected-warning {{'interrupt' attribute only applies to functions and methods}}
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: 'EIC'}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3() {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+__attribute__((interrupt(""))) void food() {}
+
+__attribute__((interrupt)) int foob() {return 0;} // expected-warning {{MIPS 'interrupt' attribute only applies to functions that have a 'void' return type}}
+__attribute__((interrupt())) void fooc(int a) {} // expected-warning {{MIPS 'interrupt' attribute only applies to functions that have no parameters}}
+__attribute__((interrupt,mips16)) void fooe() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((mips16,interrupt)) void foof() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((interrupt)) __attribute__ ((mips16)) void foo10() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+// expected-note {{conflicting attribute is here}}
+__attribute__((mips16)) __attribute ((interrupt)) void foo11() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+  // expected-note {{conflicting attribute is here}}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+  // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+  // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} }
Index: lib/Sema/SemaDeclAttr.cpp

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 41041.
sdardis added a comment.

Updated text of return type/parameters warning to Aaron's suggestion. 
Dropped '\' escape characters from warning/error text. 
Removed mips16/nomips16 check.
Tweak of comment in handleMipsInterruptAttr.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c

Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+struct a { int b; };
+
+struct a test __attribute__((interrupt)); // expected-warning {{'interrupt' attribute only applies to functions and methods}}
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: 'EIC'}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3() {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+__attribute__((interrupt(""))) void food() {}
+
+__attribute__((interrupt)) int foob() {return 0;} // expected-warning {{MIPS 'interrupt' attribute only applies to functions that have a 'void' return type}}
+__attribute__((interrupt())) void fooc(int a) {} // expected-warning {{MIPS 'interrupt' attribute only applies to functions that have no parameters}}
+__attribute__((interrupt,mips16)) void fooe() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((mips16,interrupt)) void foof() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((interrupt)) __attribute__ ((mips16)) void foo10() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+// expected-note {{conflicting attribute is here}}
+__attribute__((mips16)) __attribute ((interrupt)) void foo11() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+  // expected-note {{conflicting attribute is here}}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+  // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+  // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} 

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 40782.
sdardis marked 4 inline comments as done.
sdardis added a comment.

Updated comments, used cast as suggested, added mutual exclusion check for 
mips16+interrupt combination.

Extended mips16/nomips16 attribute handlers for mutual exclusion, add to 
pre-existing test.

Thanks.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c
  test/Sema/mips16_attr_allowed.c

Index: test/Sema/mips16_attr_allowed.c
===
--- test/Sema/mips16_attr_allowed.c
+++ test/Sema/mips16_attr_allowed.c
@@ -19,6 +19,9 @@
 void __attribute__((nomips16(1, 2))) foo32b(); // expected-error {{'nomips16' attribute takes no arguments}}
 void __attribute__((mips16(1, 2))) foo16b(); // expected-error {{'mips16' attribute takes no arguments}}
 
+void __attribute__((mips16, nomips16)) foo16c(); // expected-error {{'mips16' and 'nomips16' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+
 
 __attribute((nomips16)) int a; // expected-error {{attribute only applies to functions}}
 
Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+struct a { int b; };
+
+struct a test __attribute__((interrupt)); // expected-warning {{'interrupt' attribute only applies to functions and methods}}
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: 'EIC'}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3() {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+__attribute__((interrupt(""))) void food() {}
+
+__attribute__((interrupt)) int foob() {return 0;} // expected-warning {{function 'foob' must have the 'void' return type for the 'interrupt' attribute for MIPS}}
+__attribute__((interrupt())) void fooc(int a) {} // expected-warning {{function 'fooc' must take no arguments for the 'interrupt' attribute for MIPS}}
+__attribute__((interrupt,mips16)) void fooe() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((mips16,interrupt)) void foof() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+ // expected-note {{conflicting attribute is here}}
+__attribute__((interrupt)) __attribute__ ((mips16)) void foo10() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}} \
+// expected-note {{conflicting attribute is here}}
+__attribute__((mips16)) __attribute ((interrupt)) void foo11() {} // expected-error {{'mips16' and 'interrupt' attributes are not compatible}} \
+  // expected-note {{conflicting attribute is here}}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void 

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 40382.
sdardis marked 12 inline comments as done.
sdardis added a comment.

Updated documentation text.

Switched the various hard failures to semantic warnings/failures.

Strangely, the 'interrupt' attribute on a non-function defaults to a warning.

Thanks.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/DiagnosticSemaKinds.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c

Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,22 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+struct a { int b; };
+
+struct a test __attribute__((interrupt)); // expected-warning {{'interrupt' attribute only applies to functions and methods}}
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: 'EIC'}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3() {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+
+__attribute__((interrupt)) int foob() {} // expected-error {{function 'foob' does not have the 'void' return type}}
+__attribute__((interrupt())) void fooc(int a) {} // expected-error {{function 'fooc' has too many arguments}}
+__attribute__((interrupt(""))) void food() {}
+__attribute__((interrupt,mips16)) void fooe() {} // expected-error {{'interrupt' and 'mips16' attributes are not compatible}}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+  // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+  // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} }
Index: lib/Sema/SemaDeclAttr.cpp
===
--- lib/Sema/SemaDeclAttr.cpp
+++ lib/Sema/SemaDeclAttr.cpp
@@ -4408,10 +4408,74 @@
   D->addAttr(UsedAttr::CreateImplicit(S.Context));
 }
 
+static void handleMipsInterruptAttr(Sema , Decl *D,
+const AttributeList ) {
+  // Only one optional argument permitted.
+  if (Attr.getNumArgs() > 1) {
+S.Diag(Attr.getLoc(), diag::err_attribute_too_many_arguments)
+<< Attr.getName() << 1;
+return;
+  }
+
+  StringRef Str;
+  SourceLocation ArgLoc;
+
+  if (Attr.getNumArgs() == 0)
+Str = "";
+  else if (!S.checkStringLiteralArgumentAttr(Attr, 0, Str, ))
+return;
+
+
+  // Semantic checks for a function with the 'interrupt' attribute.
+  // a) Must be a function.
+  // b) Must take no arguments.
+  // c) Must have the 'void' return type.
+  // d) Cannot also 

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated this revision to Diff 38533.
sdardis added a comment.

Updated tests along the lines of what vkalintiris did for llvm.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr-arg.c
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c

Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: EIC}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3() {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+
+__attribute__((interrupt)) void foob() {}
+__attribute__((interrupt())) void fooc() {}
+__attribute__((interrupt(""))) void food() {}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+  // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+  // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} }
Index: test/CodeGen/mips-interrupt-attr-arg.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr-arg.c
@@ -0,0 +1,8 @@
+// RUN: not %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s >2 %t
+// FileCheck %s < %t
+
+; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments!
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (char * a)
+{
+}
Index: lib/Sema/SemaDeclAttr.cpp
===
--- lib/Sema/SemaDeclAttr.cpp
+++ lib/Sema/SemaDeclAttr.cpp
@@ -4251,10 +4251,44 @@
   D->addAttr(UsedAttr::CreateImplicit(S.Context));
 }
 
+static void handleMipsInterruptAttr(Sema , Decl *D,
+const AttributeList ) {
+  // Only one optional argument permitted.
+  if (Attr.getNumArgs() > 1) {
+S.Diag(Attr.getLoc(), diag::err_attribute_too_many_arguments)
+<< Attr.getName() << 1;
+return;
+  }
+
+  StringRef Str;
+  SourceLocation ArgLoc;
+
+  if (Attr.getNumArgs() == 0)
+Str = "";
+  else if (!S.checkStringLiteralArgumentAttr(Attr, 0, Str, ))
+return;
+
+  MipsInterruptAttr::InterruptType Kind;
+  if (!MipsInterruptAttr::ConvertStrToInterruptType(Str, Kind)) {
+S.Diag(Attr.getLoc(), diag::warn_attribute_type_not_supported)
+<< Attr.getName() << Str << ArgLoc;
+return;
+  }
+
+  unsigned Index = Attr.getAttributeSpellingListIndex();
+  D->addAttr(::new (S.Context)
+  

Re: [PATCH] D10802: [mips] Interrupt attribute support.

[Simon Dardis via cfe-commits]

sdardis updated the summary for this revision.
sdardis updated this revision to Diff 38102.
sdardis marked 3 inline comments as done.
sdardis added a comment.

Nits addressed and XFAIL tests added for functions having arguments and the 
interrupt attribute.

Test added to cover semantic warnings.

Rejects functions with mips16 & interrupt attributes.

Text in the bullet points of MipsInterruptDocs section expanded.


http://reviews.llvm.org/D10802

Files:
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  lib/CodeGen/TargetInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  test/CodeGen/mips-interrupt-attr-arg.c
  test/CodeGen/mips-interrupt-attr.c
  test/Sema/mips-interrupt-attr.c

Index: test/Sema/mips-interrupt-attr.c
===
--- /dev/null
+++ test/Sema/mips-interrupt-attr.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 %s -triple mips-img-elf -verify -fsyntax-only
+
+__attribute__((interrupt("EIC"))) void foo1() {} // expected-warning {{'interrupt' attribute argument not supported: EIC}}
+
+__attribute__((interrupt("eic", 1))) void foo2() {} // expected-error {{'interrupt' attribute takes no more than 1 argument}}
+
+__attribute__((interrupt("eic"))) void foo3(int a) {}
+__attribute__((interrupt("vector=sw0"))) void foo4() {}
+__attribute__((interrupt("vector=hw0"))) void foo5() {}
+__attribute__((interrupt("vector=hw1"))) void foo6() {}
+__attribute__((interrupt("vector=hw2"))) void foo7() {}
+__attribute__((interrupt("vector=hw3"))) void foo8() {}
+__attribute__((interrupt("vector=hw4"))) void foo9() {}
+__attribute__((interrupt("vector=hw5"))) void fooa() {}
+
+__attribute__((interrupt)) void foob() {}
+__attribute__((interrupt())) void fooc() {}
+__attribute__((interrupt(""))) void food() {}
Index: test/CodeGen/mips-interrupt-attr.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+  // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+  // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+  // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+  // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+  // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+  // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+  // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+  // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+  // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} }
Index: test/CodeGen/mips-interrupt-attr-arg.c
===
--- /dev/null
+++ test/CodeGen/mips-interrupt-attr-arg.c
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+// XFAIL: *
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (char * a)
+{
+  // CHECK: define void @isr_sw0(i8* %a) [[SW0:#[0-9]+]]
+}
+
+
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+
Index: lib/Sema/SemaDeclAttr.cpp
===
--- lib/Sema/SemaDeclAttr.cpp
+++ lib/Sema/SemaDeclAttr.cpp
@@ -4251,10 +4251,44 @@
   D->addAttr(UsedAttr::CreateImplicit(S.Context));
 }
 
+static void handleMipsInterruptAttr(Sema , Decl *D,
+const AttributeList ) {
+  // Only one optional argument permitted.
+  if (Attr.getNumArgs() > 1) {
+S.Diag(Attr.getLoc(), diag::err_attribute_too_many_arguments)
+<< Attr.getName() << 1;
+return;
+  }
+
+  StringRef Str;
+  SourceLocation ArgLoc;
+
+  if (Attr.getNumArgs() == 0)
+Str = "";
+  else if (!S.checkStringLiteralArgumentAttr(Attr, 0, Str,