[clang] [llvm] [HLSL][DXIL][SPIRV] Create llvm dot intrinsic and use for HLSL (PR #102872)

2024-08-16 Thread Thorsten Schütt via cfe-commits 


@@ -303,6 +303,14 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const 
SPIRVSubtarget &ST) {
   getActionDefinitionsBuilder(G_FPOWI).legalForCartesianProduct(
   allFloatScalarsAndVectors, allIntScalarsAndVectors);
 
+  getActionDefinitionsBuilder(G_FDOTPROD)
+  .legalForCartesianProduct(allFloatScalarsAndVectors,

tschuett wrote:

```
getActionDefinitionBuilder(G_FDOTPROD)
  .legalFor({{s32, s32vector}, {s64, s64vector}, });
```

https://github.com/llvm/llvm-project/pull/102872
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[clang] [llvm] [HLSL][DXIL][SPIRV] Create llvm dot intrinsic and use for HLSL (PR #102872)

2024-08-16 Thread Thorsten Schütt via cfe-commits 


@@ -303,6 +303,14 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const 
SPIRVSubtarget &ST) {
   getActionDefinitionsBuilder(G_FPOWI).legalForCartesianProduct(
   allFloatScalarsAndVectors, allIntScalarsAndVectors);
 
+  getActionDefinitionsBuilder(G_FDOTPROD)
+  .legalForCartesianProduct(allFloatScalarsAndVectors,

tschuett wrote:

I am not convinced that this is correct. Are you ruling out vectors for the sum 
type?

https://github.com/llvm/llvm-project/pull/102872
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[clang] [llvm] [HLSL][DXIL][SPIRV] Create llvm dot intrinsic and use for HLSL (PR #102872)

2024-08-13 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Please update the 
https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/MachineVerifier.cpp
 to protect against misuse.

https://github.com/llvm/llvm-project/pull/102872
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[clang] [llvm] [HLSL][DXIL][SPIRV] Create llvm dot intrinsic and use for HLSL (PR #102872)

2024-08-13 Thread Thorsten Schütt via cfe-commits 


@@ -1088,6 +1088,27 @@ def G_FNEARBYINT : GenericInstruction {
   let hasSideEffects = false;
 }
 
+/// Floating point vector dot product
+def G_FDOTPROD : GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src1, type0:$src2);
+  let hasSideEffects = false;

tschuett wrote:

dot products take two vectors and return a scalar.
```
f G_FDOTPROD : GenericInstruction {
  let OutOperandList = (outs type0:$dst);
  let InOperandList = (ins type1:$src1, type1:$src2);
  let hasSideEffects = false;
```
You have to change the sources to type1 and adapt your legalizer accordingly.

https://github.com/llvm/llvm-project/pull/102872
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[clang] [llvm] [HLSL][DXIL][SPIRV] Create llvm dot intrinsic and use for HLSL (PR #102872)

2024-08-12 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Please advertise your achievements: 
https://github.com/llvm/llvm-project/blob/main/llvm/docs/GlobalISel/GenericOpcode.rst
Please add the intrinsics with semantics to the langref: 
https://github.com/llvm/llvm-project/blob/main/llvm/docs/LangRef.rst
@nikic will review
Please protect against misuse of your achievements: 
https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/MachineVerifier.cpp


https://github.com/llvm/llvm-project/pull/102872
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[clang] [clang][Interp] Fix assignment operator call eval order (PR #101845)

2024-08-04 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

No review?

https://github.com/llvm/llvm-project/pull/101845
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[clang] [llvm] [APFloat] Add support for f8E3M4 IEEE 754 type (PR #99698)

2024-07-26 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

> @tschuett, Could you please help review this change?

I did. I gave you the float reviewer of the house.

https://github.com/llvm/llvm-project/pull/99698
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[clang] [clang] Add deprecation warning for `-Ofast` driver option (PR #98736)

2024-07-16 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

> > We are deprecating -Ofast and I would prefer to hint users first at 
> > conforming behaviour -O3 and then as last resort at -O3 with -ffast-math.
> 
> @tschuett I'm sympathetic to this arguments, but I think it's no less 
> important to tell users in no uncertain terms how to preserve their current 
> behavior. If there's a wording that achieves both goals, I'd be happy to 
> incorporate it into this PR.

No worries. I have zero voting rights in Clang.

https://github.com/llvm/llvm-project/pull/98736
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[clang] [clang] Add deprecation warning for `-Ofast` driver option (PR #98736)

2024-07-16 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

We are deprecating -Ofast and I would prefer to hint users first at conforming 
behaviour -O3 and then as last resort at -O3 with -ffast-math.

https://github.com/llvm/llvm-project/pull/98736
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[clang] [clang] Use internal linkage for c23 constexpr vars. (PR #97846)

2024-07-05 Thread Thorsten Schütt via cfe-commits 


@@ -4428,10 +4428,14 @@ void Parser::ParseDeclarationSpecifiers(
 
 // constexpr, consteval, constinit specifiers
 case tok::kw_constexpr:
-  if (getLangOpts().C23)
+  if (getLangOpts().C23) {
 Diag(Tok, diag::warn_c23_compat_keyword) << Tok.getName();
-  isInvalid = DS.SetConstexprSpec(ConstexprSpecKind::Constexpr, Loc,
-  PrevSpec, DiagID);
+isInvalid = DS.SetConstexprSpec(ConstexprSpecKind::Constexpr, Loc,
+PrevSpec, DiagID);
+
+isInvalid = DS.SetStorageClassSpec(Actions, DeclSpec::SCS_static, Loc,

tschuett wrote:

Are you sure that you want to assign `isInvalid` twice?

https://github.com/llvm/llvm-project/pull/97846
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[clang] [llvm] [mlir] [MLIR] Add f8E4M3 IEEE 754 type (PR #97118)

2024-06-30 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett edited 
https://github.com/llvm/llvm-project/pull/97118
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[clang] [llvm] [APFloat] Add support for f8E4M3 IEEE 754 type (PR #97179)

2024-06-30 Thread Thorsten Schütt via cfe-commits 


@@ -136,6 +136,7 @@ static constexpr fltSemantics semIEEEquad = {16383, -16382, 
113, 128};
 static constexpr fltSemantics semFloat8E5M2 = {15, -14, 3, 8};
 static constexpr fltSemantics semFloat8E5M2FNUZ = {
 15, -15, 3, 8, fltNonfiniteBehavior::NanOnly, 
fltNanEncoding::NegativeZero};
+static constexpr fltSemantics semFloat8E4M3 = {7, -6, 4, 8};

tschuett wrote:

Just checking that you want default semantics?

https://github.com/llvm/llvm-project/pull/97179
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[clang] [llvm] [APFloat] Add support for f8E4M3 IEEE 754 type (PR #97179)

2024-06-30 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett edited 
https://github.com/llvm/llvm-project/pull/97179
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[clang] [llvm] [APFloat] Add support for f8E4M3 IEEE 754 type (PR #97179)

2024-06-30 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett edited 
https://github.com/llvm/llvm-project/pull/97179
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[clang] [llvm] Add f8E4M3 IEEE 754 type to llvm (PR #97179)

2024-06-30 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

For reference the last type added:
https://github.com/llvm/llvm-project/pull/95392

https://github.com/llvm/llvm-project/pull/97179
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[clang] [llvm] [mlir] Add f8E4M3 IEEE 754 type (PR #97118)

2024-06-29 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

If this is a new float type, could you please split out the apfloat changes in 
separate PR.

https://github.com/llvm/llvm-project/pull/97118
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[clang] [llvm] [llvm][AArch64] Support -mcpu=apple-m4 (PR #95478)

2024-06-14 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

It is a problem that is worth fixing long term. How to correctly model release 
versions and their optional dependencies. Furthermore, for the BTI example how 
remove features.

https://github.com/llvm/llvm-project/pull/95478
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[clang] [llvm] [APFloat] Add APFloat support for FP4 data type (PR #95392)

2024-06-13 Thread Thorsten Schütt via cfe-commits 


@@ -69,8 +69,8 @@ enum class fltNonfiniteBehavior {
   // encodings do not distinguish between signalling and quiet NaN.
   NanOnly,
 
-  // This behavior is present in Float6E3M2FN and Float6E2M3FN types,
-  // which do not support Inf or NaN values.
+  // This behavior is present in Float6E3M2FN, Float6E2M3FN and
+  // Float4E2M1FN types, which do not support Inf or NaN values.

tschuett wrote:

I would enjoy an Oxford comma, but feel free to ignore.

https://github.com/llvm/llvm-project/pull/95392
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[clang] Improve error message for invalid lambda captures (PR #94865)

2024-06-08 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Needs a test.

https://github.com/llvm/llvm-project/pull/94865
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[clang] [llvm] [APFloat] Add APFloat support for FP6 data types (PR #94735)

2024-06-07 Thread Thorsten Schütt via cfe-commits 


@@ -3518,13 +3542,17 @@ APInt IEEEFloat::convertIEEEFloatToAPInt() const {
 myexponent = ::exponentZero(S) + bias;
 mysignificand.fill(0);
   } else if (category == fcInfinity) {
-if (S.nonFiniteBehavior == fltNonfiniteBehavior::NanOnly) {
+if (S.nonFiniteBehavior == fltNonfiniteBehavior::NanOnly ||
+S.nonFiniteBehavior == fltNonfiniteBehavior::NoNanInf) {

tschuett wrote:

Same here.

https://github.com/llvm/llvm-project/pull/94735
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[clang] [llvm] [APFloat] Add APFloat support for FP6 data types (PR #94735)

2024-06-07 Thread Thorsten Schütt via cfe-commits 


@@ -3518,13 +3542,17 @@ APInt IEEEFloat::convertIEEEFloatToAPInt() const {
 myexponent = ::exponentZero(S) + bias;
 mysignificand.fill(0);
   } else if (category == fcInfinity) {
-if (S.nonFiniteBehavior == fltNonfiniteBehavior::NanOnly) {
+if (S.nonFiniteBehavior == fltNonfiniteBehavior::NanOnly ||
+S.nonFiniteBehavior == fltNonfiniteBehavior::NoNanInf) {
   llvm_unreachable("semantics don't support inf!");
 }
 myexponent = ::exponentInf(S) + bias;
 mysignificand.fill(0);
   } else {
 assert(category == fcNaN && "Unknown category!");
+if (S.nonFiniteBehavior == fltNonfiniteBehavior::NoNanInf) {

tschuett wrote:

No redundant braces.

https://github.com/llvm/llvm-project/pull/94735
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[clang] [llvm] [IR] Add getelementptr nusw and nuw flags (PR #90824)

2024-05-01 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Could you please add a TODO here:
https://github.com/llvm/llvm-project/blob/e3f42b02a4129947ca2dd820bfb63ffed83027b7/llvm/lib/CodeGen/MachineInstr.cpp#L565
Thanks.

https://github.com/llvm/llvm-project/pull/90824
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[clang] [llvm] [x86] Add tan intrinsic part 4 (PR #90503)

2024-04-29 Thread Thorsten Schütt via cfe-commits 


@@ -674,6 +674,9 @@
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 1, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
+# DEBUG-NEXT: G_FTAN (opcode {{[0-9]+}}): 1 type index, 0 imm indices

tschuett wrote:

It means that the AArch64 GlobalIsel legalizer does not say anything about 
G_FTAN.

https://github.com/llvm/llvm-project/pull/90503
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[clang] [llvm] [x86] Add tan intrinsic part 4 (PR #90503)

2024-04-29 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Firstly, it is a nit. The IRTranslator translates LLVM-IR into GMIR for 
GlobalIsel. Testing the IRTranslator is independent of any SDAG changes.

https://github.com/llvm/llvm-project/pull/90503
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[clang] [llvm] [x86] Add tan intrinsic part 4 (PR #90503)

2024-04-29 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Nit: the `declare` is not necessary anymore. You touched the IRTranslator 
without a test at, e.g., 
https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

https://github.com/llvm/llvm-project/pull/90503
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[clang] [llvm] Move several vector intrinsics out of experimental namespace (PR #88748)

2024-04-15 Thread Thorsten Schütt via cfe-commits 


@@ -18914,13 +18914,13 @@ This is an overloaded intrinsic.
 
 ::
 
-  declare <2 x double> @llvm.experimental.vector.splice.v2f64(<2 x double> 
%vec1, <2 x double> %vec2, i32 %imm)
-  declare  
@llvm.experimental.vector.splice.nxv4i32( %vec1,  %vec2, i32 %imm)
+  declare <2 x double> @llvm.vector.splice.v2f64(<2 x double> %vec1, <2 x 
double> %vec2, i32 %imm)
+  declare  @llvm.vector.splice.nxv4i32( %vec1,  %vec2, i32 %imm)
 
 Overview:
 "
 
-The '``llvm.experimental.vector.splice.*``' intrinsics construct a vector by
+The '``llvm.vector.splice.*``' intrinsics construct a vector by

tschuett wrote:

`While this intrinsicis marked as experimental,`

https://github.com/llvm/llvm-project/pull/88748
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[clang] [llvm] Move several vector intrinsics out of experimental namespace (PR #88748)

2024-04-15 Thread Thorsten Schütt via cfe-commits 


@@ -18779,13 +18779,13 @@ This is an overloaded intrinsic.
 
 ::
 
-  declare <2 x i8> @llvm.experimental.vector.reverse.v2i8(<2 x i8> %a)
-  declare  
@llvm.experimental.vector.reverse.nxv4i32( %a)
+  declare <2 x i8> @llvm.vector.reverse.v2i8(<2 x i8> %a)
+  declare  @llvm.vector.reverse.nxv4i32( %a)
 
 Overview:
 "
 
-The '``llvm.experimental.vector.reverse.*``' intrinsics reverse a vector.
+The '``llvm.vector.reverse.*``' intrinsics reverse a vector.
 The intrinsic takes a single vector and returns a vector of matching type but
 with the original lane order reversed. These intrinsics work for both fixed
 and scalable vectors. While this intrinsic is marked as experimental the

tschuett wrote:

`this intrinsic is marked as experimental`

https://github.com/llvm/llvm-project/pull/88748
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[clang] [clang] Fix high memory consumption during pack deduction (PR #88637)

2024-04-14 Thread Thorsten Schütt via cfe-commits 


@@ -831,7 +831,7 @@ class PackDeductionScope {
 if (IsPartiallyExpanded)
   PackElements += NumPartialPackArgs;
 else if (IsExpanded)
-  PackElements += *FixedNumExpansions;
+  PackElements += FixedNumExpansions.value_or(1);

tschuett wrote:

```
.value_or(1)
```
cannot be the solution. `FixedNumExpansions` is nullopt. Why is `1` an 
improvement over nullopt?

https://github.com/llvm/llvm-project/pull/88637
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[clang] [clang] Fix high memory consumption during pack deduction (PR #88637)

2024-04-14 Thread Thorsten Schütt via cfe-commits 


@@ -831,7 +831,7 @@ class PackDeductionScope {
 if (IsPartiallyExpanded)
   PackElements += NumPartialPackArgs;
 else if (IsExpanded)
-  PackElements += *FixedNumExpansions;
+  PackElements += FixedNumExpansions.value_or(1);

tschuett wrote:

Could you add an assert:
```
assert(FixedNumExpansions && "unexpected nullopt");
```

https://github.com/llvm/llvm-project/pull/88637
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-14 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

The bigger issue is that it needs a test. Unfortunately, I am less familiar 
with the Clang test infrastructure.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-14 Thread Thorsten Schütt via cfe-commits 


@@ -12696,6 +12696,56 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const 
CallExpr *E,
 return BuiltinOp == Builtin::BI__atomic_always_lock_free ?
 Success(0, E) : Error(E);
   }
+  case Builtin::BI__builtin_addcb:
+  case Builtin::BI__builtin_addcs:
+  case Builtin::BI__builtin_addc:
+  case Builtin::BI__builtin_addcl:
+  case Builtin::BI__builtin_addcll:
+  case Builtin::BI__builtin_subcb:
+  case Builtin::BI__builtin_subcs:
+  case Builtin::BI__builtin_subc:
+  case Builtin::BI__builtin_subcl:
+  case Builtin::BI__builtin_subcll: {
+LValue CarryOutLValue;
+APSInt LHS, RHS, CarryIn, Result;

tschuett wrote:

If you search the internet for `llvm APSInt`, you will find the `S` means 
signed. You will also find `llvm APInt`. The latter is the unsigned version.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-14 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Sorry for the confusion, but the codegen test showed it makes sense what you 
are doing.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-13 Thread Thorsten Schütt via cfe-commits 


@@ -12691,6 +12691,56 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const 
CallExpr *E,
 return BuiltinOp == Builtin::BI__atomic_always_lock_free ?
 Success(0, E) : Error(E);
   }
+  case Builtin::BI__builtin_addcb:
+  case Builtin::BI__builtin_addcs:
+  case Builtin::BI__builtin_addc:
+  case Builtin::BI__builtin_addcl:
+  case Builtin::BI__builtin_addcll:
+  case Builtin::BI__builtin_subcb:
+  case Builtin::BI__builtin_subcs:
+  case Builtin::BI__builtin_subc:
+  case Builtin::BI__builtin_subcl:
+  case Builtin::BI__builtin_subcll: {
+LValue CarryOutLValue;
+APSInt LHS, RHS, CarryIn, Result;
+QualType ResultType = E->getArg(0)->getType();
+if (!EvaluateInteger(E->getArg(0), LHS, Info) ||
+!EvaluateInteger(E->getArg(1), RHS, Info) ||
+!EvaluateInteger(E->getArg(2), CarryIn, Info) ||
+!EvaluatePointer(E->getArg(3), CarryOutLValue, Info))
+  return false;
+
+bool FirstOverflowed = false;
+bool SecondOverflowed = false;
+switch (BuiltinOp) {
+default:
+  llvm_unreachable("Invalid value for BuiltinOp");
+case Builtin::BI__builtin_addcb:
+case Builtin::BI__builtin_addcs:
+case Builtin::BI__builtin_addc:
+case Builtin::BI__builtin_addcl:
+case Builtin::BI__builtin_addcll:
+  Result =
+  LHS.uadd_ov(RHS, FirstOverflowed).uadd_ov(CarryIn, SecondOverflowed);
+  break;
+case Builtin::BI__builtin_subcb:
+case Builtin::BI__builtin_subcs:
+case Builtin::BI__builtin_subc:
+case Builtin::BI__builtin_subcl:
+case Builtin::BI__builtin_subcll:
+  Result =
+  LHS.usub_ov(RHS, FirstOverflowed).usub_ov(CarryIn, SecondOverflowed);

tschuett wrote:

The codegen test 
https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/builtins-multiprecision.c
also subtracts the carrying for subc.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-13 Thread Thorsten Schütt via cfe-commits 


@@ -12691,6 +12691,56 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const 
CallExpr *E,
 return BuiltinOp == Builtin::BI__atomic_always_lock_free ?
 Success(0, E) : Error(E);
   }
+  case Builtin::BI__builtin_addcb:
+  case Builtin::BI__builtin_addcs:
+  case Builtin::BI__builtin_addc:
+  case Builtin::BI__builtin_addcl:
+  case Builtin::BI__builtin_addcll:
+  case Builtin::BI__builtin_subcb:
+  case Builtin::BI__builtin_subcs:
+  case Builtin::BI__builtin_subc:
+  case Builtin::BI__builtin_subcl:
+  case Builtin::BI__builtin_subcll: {
+LValue CarryOutLValue;
+APSInt LHS, RHS, CarryIn, Result;
+QualType ResultType = E->getArg(0)->getType();
+if (!EvaluateInteger(E->getArg(0), LHS, Info) ||
+!EvaluateInteger(E->getArg(1), RHS, Info) ||
+!EvaluateInteger(E->getArg(2), CarryIn, Info) ||
+!EvaluatePointer(E->getArg(3), CarryOutLValue, Info))
+  return false;
+
+bool FirstOverflowed = false;
+bool SecondOverflowed = false;
+switch (BuiltinOp) {
+default:
+  llvm_unreachable("Invalid value for BuiltinOp");
+case Builtin::BI__builtin_addcb:
+case Builtin::BI__builtin_addcs:
+case Builtin::BI__builtin_addc:
+case Builtin::BI__builtin_addcl:
+case Builtin::BI__builtin_addcll:
+  Result =
+  LHS.uadd_ov(RHS, FirstOverflowed).uadd_ov(CarryIn, SecondOverflowed);

tschuett wrote:

Why is it always unsigned and never signed?

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-13 Thread Thorsten Schütt via cfe-commits 


@@ -12691,6 +12691,56 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const 
CallExpr *E,
 return BuiltinOp == Builtin::BI__atomic_always_lock_free ?
 Success(0, E) : Error(E);
   }
+  case Builtin::BI__builtin_addcb:
+  case Builtin::BI__builtin_addcs:
+  case Builtin::BI__builtin_addc:
+  case Builtin::BI__builtin_addcl:
+  case Builtin::BI__builtin_addcll:
+  case Builtin::BI__builtin_subcb:
+  case Builtin::BI__builtin_subcs:
+  case Builtin::BI__builtin_subc:
+  case Builtin::BI__builtin_subcl:
+  case Builtin::BI__builtin_subcll: {
+LValue CarryOutLValue;
+APSInt LHS, RHS, CarryIn, Result;
+QualType ResultType = E->getArg(0)->getType();
+if (!EvaluateInteger(E->getArg(0), LHS, Info) ||
+!EvaluateInteger(E->getArg(1), RHS, Info) ||
+!EvaluateInteger(E->getArg(2), CarryIn, Info) ||
+!EvaluatePointer(E->getArg(3), CarryOutLValue, Info))
+  return false;
+
+bool FirstOverflowed = false;
+bool SecondOverflowed = false;
+switch (BuiltinOp) {
+default:
+  llvm_unreachable("Invalid value for BuiltinOp");
+case Builtin::BI__builtin_addcb:
+case Builtin::BI__builtin_addcs:
+case Builtin::BI__builtin_addc:
+case Builtin::BI__builtin_addcl:
+case Builtin::BI__builtin_addcll:
+  Result =
+  LHS.uadd_ov(RHS, FirstOverflowed).uadd_ov(CarryIn, SecondOverflowed);
+  break;
+case Builtin::BI__builtin_subcb:
+case Builtin::BI__builtin_subcs:
+case Builtin::BI__builtin_subc:
+case Builtin::BI__builtin_subcl:
+case Builtin::BI__builtin_subcll:
+  Result =
+  LHS.usub_ov(RHS, FirstOverflowed).usub_ov(CarryIn, SecondOverflowed);

tschuett wrote:

I thought the `CarryIn` is always additive.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [clang] Allow builtin addc/subc to be constant evaluated (PR #81656)

2024-02-13 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Nice trick.

https://github.com/llvm/llvm-project/pull/81656
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[clang] [compiler-rt] [Sanitizer] add signed-integer-wrap sanitizer (PR #80089)

2024-01-31 Thread Thorsten Schütt via cfe-commits 


@@ -0,0 +1,66 @@
+// Check that -fsanitize=signed-integer-wrap instruments with -fwrapv
+// RUN: %clang_cc1 -fwrapv -triple x86_64-apple-darwin -emit-llvm -o - %s 
-fsanitize=signed-integer-wrap | FileCheck %s --check-prefix=CHECK
+
+// Check that -fsanitize=signed-integer-overflow doesn't instrument with 
-fwrapv
+// RUN: %clang_cc1 -fwrapv -triple x86_64-apple-darwin -emit-llvm -o - %s 
-fsanitize=signed-integer-overflow | FileCheck %s --check-prefix=CHECKSIO
+
+extern volatile int a, b, c;
+
+// CHECK-LABEL: define void @test_add_overflow
+void test_add_overflow(void) {
+  // CHECK: [[ADD0:%.*]] = load {{.*}} i32
+  // CHECK-NEXT: [[ADD1:%.*]] = load {{.*}} i32
+  // CHECK-NEXT: {{%.*}} = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 
[[ADD0]], i32 [[ADD1]])
+  // CHECK: call void @__ubsan_handle_add_overflow
+
+  // CHECKSIO-NOT: call void @__ubsan_handle_add_overflow
+  a = b + c;
+}
+
+// CHECK-LABEL: define void @test_inc_overflow
+void test_inc_overflow(void) {
+  // This decays and gets handled by __ubsan_handle_add_overflow...
+  // CHECK: [[INC0:%.*]] = load {{.*}} i32
+  // CHECK-NEXT: call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[INC0]], 
i32 1)
+  // CHECK: br {{.*}} %handler.add_overflow
+
+  // CHECKSIO-NOT: br {{.*}} %handler.add_overflow

tschuett wrote:

In some tests the branch on the overflow bit is not visible. It gives you more 
confidence, if there is always a branch on the overflow bit.

https://github.com/llvm/llvm-project/pull/80089
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[clang] [llvm] [Clang][RISCV] Move getVScaleRange logic into libLLVMFrontendDriver. NFC (PR #77327)

2024-01-10 Thread Thorsten Schütt via cfe-commits 


@@ -2,6 +2,7 @@ set(LLVM_LINK_COMPONENTS
   Support
   TargetParser
   FrontendOpenMP
+  FrontendDriver

tschuett wrote:

I would prefer putting it into FrontendDriver for style and as a precedence to 
encourage others to put more into the frontend.

https://github.com/llvm/llvm-project/pull/77327
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[flang] [clang] [llvm] [compiler-rt] [libc] [clang-tools-extra] [lldb] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-06 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

I reverted the commit.

https://github.com/llvm/llvm-project/pull/76763
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[clang-tools-extra] [compiler-rt] [lldb] [llvm] [libc] [flang] [clang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-06 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

The file was not changed by this PR and there is no `select` in the file.

https://github.com/llvm/llvm-project/pull/76763
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[clang-tools-extra] [compiler-rt] [lldb] [llvm] [libc] [flang] [clang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-06 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

I had also issues with this test. There is also a GH issue: 
https://github.com/llvm/llvm-project/issues/76821.

https://github.com/llvm/llvm-project/pull/76763
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[flang] [lldb] [compiler-rt] [libc] [clang] [clang-tools-extra] [llvm] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-06 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett closed 
https://github.com/llvm/llvm-project/pull/76763
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[compiler-rt] [clang] [clang-tools-extra] [llvm] [libc] [flang] [lldb] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 


@@ -544,3 +544,154 @@ body: |
 %ext:_(s32) = G_ANYEXT %sel
 $w0 = COPY %ext(s32)
 ...
+---
+# select cond, and(x, y), and(z, y) --> and (select cond, x, z), y
+name:select_cond_and_x_y_and_z_y_and_select_x_z_y
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_and_x_y_and_z_y_and_select_x_z_y
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %b:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s8) = G_SELECT %c(s1), %a, %d
+; CHECK-NEXT: %sel:_(s8) = G_AND [[SELECT]], %b
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%and1:_(s8) = G_AND %a, %b
+%and2:_(s8) = G_AND %d, %b
+%sel:_(s8) = G_SELECT %c, %and1, %and2
+%ext:_(s32) = G_ANYEXT %sel
+$w0 = COPY %ext(s32)
+...
+---
+# select cond, xor(x, y), xor(x, z) --> xor x, select, x, z)
+name:select_cond_xor_x_y_xor_x_z_xor_x__select_x_y
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_xor_x_y_xor_x_z_xor_x__select_x_y
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x4
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %e:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s8) = G_SELECT %c(s1), %e, %d
+; CHECK-NEXT: %sel:_(s8) = G_XOR %a, [[SELECT]]
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%xor1:_(s8) = G_XOR %a, %e
+%xor2:_(s8) = G_XOR %a, %d
+%sel:_(s8) = G_SELECT %c, %xor1, %xor2
+%ext:_(s32) = G_ANYEXT %sel
+$w0 = COPY %ext(s32)
+...
+---
+# negative test select cond, and(x, y), or(z, a) --> failed
+name:select_cond_and_x_y_or_z_a_failed
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_and_x_y_or_z_a_failed
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %b:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: %e:_(s8) = G_TRUNC [[COPY4]](s64)
+; CHECK-NEXT: %and1:_(s8) = G_AND %a, %b
+; CHECK-NEXT: %or2:_(s8) = G_OR %e, %d
+; CHECK-NEXT: %sel:_(s8) = G_SELECT %c(s1), %and1, %or2
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%and1:_(s8) = G_AND %a, %b
+%or2:_(s8) = G_OR %e, %d

tschuett wrote:

This failed because and and or.

https://github.com/llvm/llvm-project/pull/76763
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[compiler-rt] [clang] [clang-tools-extra] [llvm] [libc] [flang] [lldb] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 


@@ -544,3 +544,154 @@ body: |
 %ext:_(s32) = G_ANYEXT %sel
 $w0 = COPY %ext(s32)
 ...
+---
+# select cond, and(x, y), and(z, y) --> and (select cond, x, z), y
+name:select_cond_and_x_y_and_z_y_and_select_x_z_y
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_and_x_y_and_z_y_and_select_x_z_y
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %b:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s8) = G_SELECT %c(s1), %a, %d
+; CHECK-NEXT: %sel:_(s8) = G_AND [[SELECT]], %b
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%and1:_(s8) = G_AND %a, %b
+%and2:_(s8) = G_AND %d, %b
+%sel:_(s8) = G_SELECT %c, %and1, %and2
+%ext:_(s32) = G_ANYEXT %sel
+$w0 = COPY %ext(s32)
+...
+---
+# select cond, xor(x, y), xor(x, z) --> xor x, select, x, z)
+name:select_cond_xor_x_y_xor_x_z_xor_x__select_x_y
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_xor_x_y_xor_x_z_xor_x__select_x_y
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x4
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %e:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s8) = G_SELECT %c(s1), %e, %d
+; CHECK-NEXT: %sel:_(s8) = G_XOR %a, [[SELECT]]
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%xor1:_(s8) = G_XOR %a, %e
+%xor2:_(s8) = G_XOR %a, %d
+%sel:_(s8) = G_SELECT %c, %xor1, %xor2
+%ext:_(s32) = G_ANYEXT %sel
+$w0 = COPY %ext(s32)
+...
+---
+# negative test select cond, and(x, y), or(z, a) --> failed
+name:select_cond_and_x_y_or_z_a_failed
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: select_cond_and_x_y_or_z_a_failed
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
+; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
+; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
+; CHECK-NEXT: %a:_(s8) = G_TRUNC [[COPY1]](s64)
+; CHECK-NEXT: %b:_(s8) = G_TRUNC [[COPY2]](s64)
+; CHECK-NEXT: %d:_(s8) = G_TRUNC [[COPY3]](s64)
+; CHECK-NEXT: %e:_(s8) = G_TRUNC [[COPY4]](s64)
+; CHECK-NEXT: %and1:_(s8) = G_AND %a, %b
+; CHECK-NEXT: %or2:_(s8) = G_OR %e, %d
+; CHECK-NEXT: %sel:_(s8) = G_SELECT %c(s1), %and1, %or2
+; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s8)
+; CHECK-NEXT: $w0 = COPY %ext(s32)
+%0:_(s64) = COPY $x0
+%1:_(s64) = COPY $x1
+%2:_(s64) = COPY $x2
+%3:_(s64) = COPY $x3
+%4:_(s64) = COPY $x4
+%c:_(s1) = G_TRUNC %0
+%a:_(s8) = G_TRUNC %1
+%b:_(s8) = G_TRUNC %2
+%d:_(s8) = G_TRUNC %3
+%e:_(s8) = G_TRUNC %4
+%and1:_(s8) = G_AND %a, %b
+%or2:_(s8) = G_OR %e, %d
+%sel:_(s8) = G_SELECT %c, %and1, %or2
+%ext:_(s32) = G_ANYEXT %sel
+$w0 = COPY %ext(s32)
+...
+---
+# flags test select cond, xor(x, y), xor(x, z) --> xor x, select, cond, x, z)
+name:flags_select_cond_xor_x_y_xor_x_z_xor_x__select_cond_x_y
+body: |
+  bb.1:
+liveins: $x0, $x1, $x2
+; CHECK-LABEL: name: 
flags_select_cond_xor_x_y_xor_x_z_xor_x__select_cond_x_y
+; CHECK: liveins: $x0, $x1, $x2
+; CHECK-NEXT: {{  $}}
+; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x3
+; CHECK-NEX

[compiler-rt] [clang] [clang-tools-extra] [llvm] [libc] [flang] [lldb] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 


@@ -6548,6 +6534,54 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect 
*Select,
   return false;
 }
 
+bool CombinerHelper::tryFoldSelectOfBinOps(GSelect *Select,
+   BuildFnTy &MatchInfo) {
+  Register DstReg = Select->getReg(0);
+  Register Cond = Select->getCondReg();
+  Register False = Select->getFalseReg();
+  Register True = Select->getTrueReg();
+  LLT DstTy = MRI.getType(DstReg);
+
+  GBinOp *LHS = getOpcodeDef(True, MRI);
+  GBinOp *RHS = getOpcodeDef(False, MRI);
+
+  // We need two binops of the same kind on the true/false registers.
+  if (!LHS || !RHS || LHS->getOpcode() != RHS->getOpcode())
+return false;
+
+  // Note that there are no constraints on CondTy.
+  unsigned Flags = (LHS->getFlags() & RHS->getFlags()) | Select->getFlags();
+  unsigned Opcode = LHS->getOpcode();
+
+  // Fold select(cond, binop(x, y), binop(z, y))
+  //  --> binop(select(cond, x, z), y)
+  if (LHS->getRHSReg() == RHS->getRHSReg()) {
+MatchInfo = [=](MachineIRBuilder &B) {
+  B.setInstrAndDebugLoc(*Select);
+  auto Sel = B.buildSelect(DstTy, Cond, LHS->getLHSReg(), RHS->getLHSReg(),
+   Select->getFlags());

tschuett wrote:

And Flags are added to selects.

https://github.com/llvm/llvm-project/pull/76763
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[compiler-rt] [clang] [clang-tools-extra] [llvm] [libc] [flang] [lldb] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 


@@ -6548,6 +6534,54 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect 
*Select,
   return false;
 }
 
+bool CombinerHelper::tryFoldSelectOfBinOps(GSelect *Select,
+   BuildFnTy &MatchInfo) {
+  Register DstReg = Select->getReg(0);
+  Register Cond = Select->getCondReg();
+  Register False = Select->getFalseReg();
+  Register True = Select->getTrueReg();
+  LLT DstTy = MRI.getType(DstReg);
+
+  GBinOp *LHS = getOpcodeDef(True, MRI);
+  GBinOp *RHS = getOpcodeDef(False, MRI);
+
+  // We need two binops of the same kind on the true/false registers.
+  if (!LHS || !RHS || LHS->getOpcode() != RHS->getOpcode())
+return false;
+
+  // Note that there are no constraints on CondTy.
+  unsigned Flags = (LHS->getFlags() & RHS->getFlags()) | Select->getFlags();

tschuett wrote:

This line differs from the Dag combiner.

https://github.com/llvm/llvm-project/pull/76763
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[clang-tools-extra] [lldb] [clang] [llvm] [libc] [compiler-rt] [flang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett updated 
https://github.com/llvm/llvm-project/pull/76763

From e713bb6e2c36ec16c731217f0c3be19b040a03d0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thorsten=20Sch=C3=BCtt?= 
Date: Tue, 2 Jan 2024 18:00:45 +0100
Subject: [PATCH 1/4] [GlobalIsel] Combine select of binops

---
 .../llvm/CodeGen/GlobalISel/CombinerHelper.h  |   3 +
 .../CodeGen/GlobalISel/GenericMachineInstrs.h | 103 ++
 .../lib/CodeGen/GlobalISel/CombinerHelper.cpp |  91 +++-
 .../AArch64/GlobalISel/combine-select.mir |  74 +
 4 files changed, 243 insertions(+), 28 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h 
b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index dcc1a4580b14a2..f3b68623596c46 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -910,6 +910,9 @@ class CombinerHelper {
 
   bool tryFoldSelectOfConstants(GSelect *Select, BuildFnTy &MatchInfo);
 
+  /// Try to fold select(cc, binop(), binop()) -> binop(select(), X)
+  bool tryFoldSelectOfBinOps(GSelect *Select, BuildFnTy &MatchInfo);
+
   bool isOneOrOneSplat(Register Src, bool AllowUndefs);
   bool isZeroOrZeroSplat(Register Src, bool AllowUndefs);
   bool isConstantSplatVector(Register Src, int64_t SplatValue,
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h 
b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
index 6ab1d4550c51ca..21d98d30356c93 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
@@ -558,6 +558,109 @@ class GVecReduce : public GenericMachineInstr {
   }
 };
 
+// Represents a binary operation, i.e, x = y op z.
+class GBinOp : public GenericMachineInstr {
+public:
+  Register getLHSReg() const { return getReg(1); }
+  Register getRHSReg() const { return getReg(2); }
+
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+// Integer.
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+// Floating point.
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+// Logical.
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents an integer binary operation.
+class GIntBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a floating point binary operation.
+class GFBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a logical binary operation.
+class GLogicalBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
 
 } // namespace llvm
 
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp 
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 8b15bdb0aca30b..102b49c48460b1 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -6390,8 +6390,7 @@ bool CombinerHelper::tryFoldSelectOfConstants(GSelect 
*Select,
   if (TrueValue.isZero() && FalseValue.isOne()) {
 MatchInfo = [=](MachineIR

[clang-tools-extra] [lldb] [clang] [llvm] [libc] [compiler-rt] [flang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Please review changes (C++ and mir) regarding flag handling.

https://github.com/llvm/llvm-project/pull/76763
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[clang-tools-extra] [lldb] [clang] [llvm] [libc] [compiler-rt] [flang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett updated 
https://github.com/llvm/llvm-project/pull/76763

From e713bb6e2c36ec16c731217f0c3be19b040a03d0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thorsten=20Sch=C3=BCtt?= 
Date: Tue, 2 Jan 2024 18:00:45 +0100
Subject: [PATCH 1/3] [GlobalIsel] Combine select of binops

---
 .../llvm/CodeGen/GlobalISel/CombinerHelper.h  |   3 +
 .../CodeGen/GlobalISel/GenericMachineInstrs.h | 103 ++
 .../lib/CodeGen/GlobalISel/CombinerHelper.cpp |  91 +++-
 .../AArch64/GlobalISel/combine-select.mir |  74 +
 4 files changed, 243 insertions(+), 28 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h 
b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index dcc1a4580b14a2..f3b68623596c46 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -910,6 +910,9 @@ class CombinerHelper {
 
   bool tryFoldSelectOfConstants(GSelect *Select, BuildFnTy &MatchInfo);
 
+  /// Try to fold select(cc, binop(), binop()) -> binop(select(), X)
+  bool tryFoldSelectOfBinOps(GSelect *Select, BuildFnTy &MatchInfo);
+
   bool isOneOrOneSplat(Register Src, bool AllowUndefs);
   bool isZeroOrZeroSplat(Register Src, bool AllowUndefs);
   bool isConstantSplatVector(Register Src, int64_t SplatValue,
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h 
b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
index 6ab1d4550c51ca..21d98d30356c93 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
@@ -558,6 +558,109 @@ class GVecReduce : public GenericMachineInstr {
   }
 };
 
+// Represents a binary operation, i.e, x = y op z.
+class GBinOp : public GenericMachineInstr {
+public:
+  Register getLHSReg() const { return getReg(1); }
+  Register getRHSReg() const { return getReg(2); }
+
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+// Integer.
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+// Floating point.
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+// Logical.
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents an integer binary operation.
+class GIntBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a floating point binary operation.
+class GFBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a logical binary operation.
+class GLogicalBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
 
 } // namespace llvm
 
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp 
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 8b15bdb0aca30b..102b49c48460b1 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -6390,8 +6390,7 @@ bool CombinerHelper::tryFoldSelectOfConstants(GSelect 
*Select,
   if (TrueValue.isZero() && FalseValue.isOne()) {
 MatchInfo = [=](MachineIR

[clang-tools-extra] [lldb] [clang] [llvm] [libc] [compiler-rt] [flang] [GlobalIsel] Combine select of binops (PR #76763)

2024-01-03 Thread Thorsten Schütt via cfe-commits 

https://github.com/tschuett updated 
https://github.com/llvm/llvm-project/pull/76763

From e713bb6e2c36ec16c731217f0c3be19b040a03d0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thorsten=20Sch=C3=BCtt?= 
Date: Tue, 2 Jan 2024 18:00:45 +0100
Subject: [PATCH] [GlobalIsel] Combine select of binops

---
 .../llvm/CodeGen/GlobalISel/CombinerHelper.h  |   3 +
 .../CodeGen/GlobalISel/GenericMachineInstrs.h | 103 ++
 .../lib/CodeGen/GlobalISel/CombinerHelper.cpp |  91 +++-
 .../AArch64/GlobalISel/combine-select.mir |  74 +
 4 files changed, 243 insertions(+), 28 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h 
b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index dcc1a4580b14a2..f3b68623596c46 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -910,6 +910,9 @@ class CombinerHelper {
 
   bool tryFoldSelectOfConstants(GSelect *Select, BuildFnTy &MatchInfo);
 
+  /// Try to fold select(cc, binop(), binop()) -> binop(select(), X)
+  bool tryFoldSelectOfBinOps(GSelect *Select, BuildFnTy &MatchInfo);
+
   bool isOneOrOneSplat(Register Src, bool AllowUndefs);
   bool isZeroOrZeroSplat(Register Src, bool AllowUndefs);
   bool isConstantSplatVector(Register Src, int64_t SplatValue,
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h 
b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
index 6ab1d4550c51ca..21d98d30356c93 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
@@ -558,6 +558,109 @@ class GVecReduce : public GenericMachineInstr {
   }
 };
 
+// Represents a binary operation, i.e, x = y op z.
+class GBinOp : public GenericMachineInstr {
+public:
+  Register getLHSReg() const { return getReg(1); }
+  Register getRHSReg() const { return getReg(2); }
+
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+// Integer.
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+// Floating point.
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+// Logical.
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents an integer binary operation.
+class GIntBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_ADD:
+case TargetOpcode::G_SUB:
+case TargetOpcode::G_MUL:
+case TargetOpcode::G_SDIV:
+case TargetOpcode::G_UDIV:
+case TargetOpcode::G_SREM:
+case TargetOpcode::G_UREM:
+case TargetOpcode::G_SMIN:
+case TargetOpcode::G_SMAX:
+case TargetOpcode::G_UMIN:
+case TargetOpcode::G_UMAX:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a floating point binary operation.
+class GFBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_FMINNUM:
+case TargetOpcode::G_FMAXNUM:
+case TargetOpcode::G_FMINNUM_IEEE:
+case TargetOpcode::G_FMAXNUM_IEEE:
+case TargetOpcode::G_FMINIMUM:
+case TargetOpcode::G_FMAXIMUM:
+case TargetOpcode::G_FADD:
+case TargetOpcode::G_FSUB:
+case TargetOpcode::G_FMUL:
+case TargetOpcode::G_FDIV:
+case TargetOpcode::G_FPOW:
+  return true;
+default:
+  return false;
+}
+  };
+};
+
+// Represents a logical binary operation.
+class GLogicalBinOp : public GBinOp {
+public:
+  static bool classof(const MachineInstr *MI) {
+switch (MI->getOpcode()) {
+case TargetOpcode::G_AND:
+case TargetOpcode::G_OR:
+case TargetOpcode::G_XOR:
+  return true;
+default:
+  return false;
+}
+  };
+};
 
 } // namespace llvm
 
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp 
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 8b15bdb0aca30b..102b49c48460b1 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -6390,8 +6390,7 @@ bool CombinerHelper::tryFoldSelectOfConstants(GSelect 
*Select,
   if (TrueValue.isZero() && FalseValue.isOne()) {
 MatchInfo = [=](MachineIRBuil

[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-29 Thread Thorsten Schütt via cfe-commits 


@@ -2164,6 +2164,12 @@ bool Driver::HandleImmediateArgs(const Compilation &C) {
 return false;
   }
 
+  if (C.getArgs().hasArg(options::OPT_print_library_module_manifest_path)) {
+llvm::outs() << "module: ="

tschuett wrote:

If the output starts with a /, then it is the path. If the output starts with 
error:, then there will be some actionable information. 

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-28 Thread Thorsten Schütt via cfe-commits 


@@ -2164,6 +2164,12 @@ bool Driver::HandleImmediateArgs(const Compilation &C) {
 return false;
   }
 
+  if (C.getArgs().hasArg(options::OPT_print_library_module_manifest_path)) {
+llvm::outs() << "module: ="

tschuett wrote:

```shell
> clang --print-resource-dir

prints just a path without any prefix.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -6135,6 +6141,40 @@ std::string Driver::GetProgramPath(StringRef Name, const 
ToolChain &TC) const {
   return std::string(Name);
 }
 
+std::string Driver::GetModuleManifestPath(const Compilation &C,
+  const ToolChain &TC) const {
+
+  switch (TC.GetCXXStdlibType(C.getArgs())) {
+  case ToolChain::CST_Libcxx: {
+std::string lib = "libc++.so";
+std::string path = GetFilePath(lib, TC);
+
+// Note when there are multiple flavours of libc++ the module json needs to
+// look at the command-line arguments for the proper json.
+
+// For example
+/*
+const SanitizerArgs &Sanitize = TC.getSanitizerArgs(C.getArgs());
+if (Sanitize.needsAsanRt())
+  return path.replace(path.size() - lib.size(), lib.size(),
+  "modules-asan.json");
+*/
+
+path = path.replace(path.size() - lib.size(), lib.size(), "modules.json");
+if (TC.getVFS().exists(path))
+  return path;
+
+return "";
+  }
+
+  case ToolChain::CST_Libstdcxx:
+// libstdc++ does not provide Standard library modules yet.
+return "";
+  }
+
+  return "";

tschuett wrote:

Note: found unknown STL.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -6135,6 +6141,40 @@ std::string Driver::GetProgramPath(StringRef Name, const 
ToolChain &TC) const {
   return std::string(Name);
 }
 
+std::string Driver::GetModuleManifestPath(const Compilation &C,
+  const ToolChain &TC) const {
+
+  switch (TC.GetCXXStdlibType(C.getArgs())) {
+  case ToolChain::CST_Libcxx: {
+std::string lib = "libc++.so";
+std::string path = GetFilePath(lib, TC);
+
+// Note when there are multiple flavours of libc++ the module json needs to
+// look at the command-line arguments for the proper json.
+
+// For example
+/*
+const SanitizerArgs &Sanitize = TC.getSanitizerArgs(C.getArgs());
+if (Sanitize.needsAsanRt())
+  return path.replace(path.size() - lib.size(), lib.size(),
+  "modules-asan.json");
+*/
+
+path = path.replace(path.size() - lib.size(), lib.size(), "modules.json");
+if (TC.getVFS().exists(path))
+  return path;
+
+return "";
+  }
+
+  case ToolChain::CST_Libstdcxx:
+// libstdc++ does not provide Standard library modules yet.
+return "";

tschuett wrote:

Note: libstdc++ is not supported.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -6135,6 +6141,40 @@ std::string Driver::GetProgramPath(StringRef Name, const 
ToolChain &TC) const {
   return std::string(Name);
 }
 
+std::string Driver::GetModuleManifestPath(const Compilation &C,
+  const ToolChain &TC) const {
+
+  switch (TC.GetCXXStdlibType(C.getArgs())) {
+  case ToolChain::CST_Libcxx: {
+std::string lib = "libc++.so";
+std::string path = GetFilePath(lib, TC);
+
+// Note when there are multiple flavours of libc++ the module json needs to
+// look at the command-line arguments for the proper json.
+
+// For example
+/*
+const SanitizerArgs &Sanitize = TC.getSanitizerArgs(C.getArgs());
+if (Sanitize.needsAsanRt())
+  return path.replace(path.size() - lib.size(), lib.size(),
+  "modules-asan.json");
+*/
+
+path = path.replace(path.size() - lib.size(), lib.size(), "modules.json");
+if (TC.getVFS().exists(path))
+  return path;
+
+return "";

tschuett wrote:

Note: path foo does not exist.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -0,0 +1,15 @@
+// Test that -print-library-module-manifest-path finds the correct file.
+
+// RUN: %clang -print-library-module-manifest-path \

tschuett wrote:

The trend seems to go to two dashes and there are no tests for 2 dashes.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -0,0 +1,15 @@
+// Test that -print-library-module-manifest-path finds the correct file.
+
+// RUN: %clang -print-library-module-manifest-path \

tschuett wrote:

--print-runtime-dir, --print-target-triple,  --print-supported-cpus, and 
--print-supported-extensions take 2 dashes.

https://github.com/llvm/llvm-project/pull/76451
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[clang] [clang][modules] Print library module manifest path. (PR #76451)

2023-12-27 Thread Thorsten Schütt via cfe-commits 


@@ -602,6 +602,16 @@ class Driver {
   // FIXME: This should be in CompilationInfo.
   std::string GetProgramPath(StringRef Name, const ToolChain &TC) const;
 
+  /// GetModuleManifestPath - Lookup the name of the Standard library manifest.
+  ///
+  /// \param C - The compilation.
+  /// \param TC - The tool chain for additional information on
+  /// directories to search.
+  //
+  // FIXME: This should be in CompilationInfo.
+  std::string GetModuleManifestPath(const Compilation &C,

tschuett wrote:

Could this be something fallible instead? Printing "" for GNU is suboptimal.

https://github.com/llvm/llvm-project/pull/76451
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[llvm] [clang] [AArch64] Correctly mark Neoverse N2 as an Armv9.0a core (PR #75055)

2023-12-11 Thread Thorsten Schütt via cfe-commits 


@@ -94,6 +94,11 @@ Changes to the AArch64 Backend
 
 * Added support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs.
 
+* Neoverse-N2 was incorrectly marked as an Armv8.5a core. This has been
+  changed to an Armv9.0a core. However, crypto options are not enabled
+  by default for Armv9 cores, so `-mcpu=neoverse-n2+crypto` is required

tschuett wrote:

After this PR the N2 secretly got support for SVE2. v8.1-a+sve2 is a ton of 
problems.

https://github.com/llvm/llvm-project/pull/75055
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[clang] [llvm] [AArch64] Correctly mark Neoverse N2 as an Armv9.0a core (PR #75055)

2023-12-11 Thread Thorsten Schütt via cfe-commits 


@@ -94,6 +94,11 @@ Changes to the AArch64 Backend
 
 * Added support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs.
 
+* Neoverse-N2 was incorrectly marked as an Armv8.5a core. This has been
+  changed to an Armv9.0a core. However, crypto options are not enabled
+  by default for Armv9 cores, so `-mcpu=neoverse-n2+crypto` is required

tschuett wrote:

The SVE2 family of features seems to be v9.0-a only. They are not available in 
v8.5-a.

https://github.com/llvm/llvm-project/pull/75055
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[flang] [clang] [flang][driver] Rename `flang-new` as `flang` (PR #74377)

2023-12-06 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Clang PRs often update the release notes and features.

ala: The LLVM 19 release will not contain flang-new.

https://github.com/llvm/llvm-project/pull/74377
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[clang] [flang] [flang][driver] Rename `flang-new` as `flang` (PR #74377)

2023-12-04 Thread Thorsten Schütt via cfe-commits 

tschuett wrote:

Are you going to add an entry to the [Release 
Nodes](https://github.com/llvm/llvm-project/blob/main/flang/docs/ReleaseNotes.md)?

https://github.com/llvm/llvm-project/pull/74377
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[clang] e486e48 - [clang] fix deprecation

2022-08-09 Thread Thorsten Schütt via cfe-commits 

Author: Thorsten Schütt
Date: 2022-08-09T17:42:55+02:00
New Revision: e486e48c3d9e99e4c17d365bbc4b429c8e5b5999

URL: 
https://github.com/llvm/llvm-project/commit/e486e48c3d9e99e4c17d365bbc4b429c8e5b5999
DIFF: 
https://github.com/llvm/llvm-project/commit/e486e48c3d9e99e4c17d365bbc4b429c8e5b5999.diff

LOG: [clang] fix deprecation

Added: 


Modified: 
clang/lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp

Removed: 




diff  --git a/clang/lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp 
b/clang/lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp
index bdc3895162898..b8788bae8171c 100644
--- a/clang/lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp
+++ b/clang/lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp
@@ -136,7 +136,7 @@ static void eventStreamCallback(ConstFSEventStreamRef 
Stream,
   llvm::sys::path::filename(Path));
   continue;
 } else if (Flags & ModifyingFileEvents) {
-  if (!getFileStatus(Path).hasValue()) {
+  if (!getFileStatus(Path).has_value()) {
 Events.emplace_back(DirectoryWatcher::Event::EventKind::Removed,
 llvm::sys::path::filename(Path));
   } else {



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[clang] 955341a - test commit

2020-11-18 Thread Thorsten Schütt via cfe-commits 

Author: Thorsten Schütt
Date: 2020-11-18T09:20:37+01:00
New Revision: 955341a722a0a204c79f6b948e4fe0f23bb56e30

URL: 
https://github.com/llvm/llvm-project/commit/955341a722a0a204c79f6b948e4fe0f23bb56e30
DIFF: 
https://github.com/llvm/llvm-project/commit/955341a722a0a204c79f6b948e4fe0f23bb56e30.diff

LOG: test commit

add whitespace

Added: 


Modified: 
clang/lib/Tooling/Tooling.cpp

Removed: 




diff  --git a/clang/lib/Tooling/Tooling.cpp b/clang/lib/Tooling/Tooling.cpp
index 063f4df2da5f..79851ac723da 100644
--- a/clang/lib/Tooling/Tooling.cpp
+++ b/clang/lib/Tooling/Tooling.cpp
@@ -645,7 +645,7 @@ std::unique_ptr buildASTFromCodeWithArgs(
 
   if (!Invocation.run())
 return nullptr;
-
+ 
   assert(ASTs.size() == 1);
   return std::move(ASTs[0]);
 }



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