subject:"\[PATCH\] D128288\: \[PowerPC\] Fix signatures for vec_replace

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

2022-06-29 Thread Lei Huang via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rGcaf7243a6b53: [PowerPC] Fix signatures for 
vec_replace_unaligned builtin (authored by lei).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128288/new/

https://reviews.llvm.org/D128288

Files:
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c

Index: clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
@@ -49,12 +49,12 @@
 }
 
 #elif defined(__TEST_UNALIGNED_UI)
-vector unsigned int test_vec_replace_unaligned_ui(void) {
+vector unsigned char test_vec_replace_unaligned_ui(void) {
   return vec_replace_unaligned(vuia, uia, 16); // expected-error {{byte number 16 is outside of the valid range [0, 12]}}
 }
 
 #else
-vector unsigned long long test_vec_replace_unaligned_ull(void) {
+vector unsigned char test_vec_replace_unaligned_ull(void) {
   return vec_replace_unaligned(vulla, ulla, 12); // expected-error {{byte number 12 is outside of the valid range [0, 8]}}
 }
 #endif
Index: clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
@@ -1183,8 +1183,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 6)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-BE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_si(
 // CHECK-LE-NEXT:  entry:
@@ -1194,10 +1193,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 6)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-LE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[TMP5]]
 //
-vector signed int test_vec_replace_unaligned_si(void) {
+vector unsigned char test_vec_replace_unaligned_si(void) {
   return vec_replace_unaligned(vsia, sia, 6);
 }
 
@@ -1209,8 +1207,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 8)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-BE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_ui(
 // CHECK-LE-NEXT:  entry:
@@ -1220,10 +1217,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 8)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-LE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[TMP5]]
 //
-vector unsigned int test_vec_replace_unaligned_ui(void) {
+vector unsigned char test_vec_replace_unaligned_ui(void) {
   return vec_replace_unaligned(vuia, uia, 8);
 }
 
@@ -1236,8 +1232,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[CONV]], i32 12)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-BE-NEXT:ret <4 x float> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_f(
 // CHECK-LE-NEXT:  entry:
@@ -1248,10 +1243,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[CONV]], i32 12)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-LE-NEXT:ret <4 x float> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[TMP5]]
 //
-vector float test_vec_replace_unaligned_f(void) {
+vector unsigned char test_vec_

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

2022-06-28 Thread Amy Kwan via Phabricator via cfe-commits

amyk accepted this revision.
amyk added a comment.

LGTM too. Thank you Lei.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128288/new/

https://reviews.llvm.org/D128288

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[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

2022-06-28 Thread Quinn Pham via Phabricator via cfe-commits

quinnp accepted this revision.
quinnp added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128288/new/

https://reviews.llvm.org/D128288

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[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

2022-06-21 Thread Lei Huang via Phabricator via cfe-commits

lei created this revision.
lei added reviewers: amyk, quinnp, power-llvm-team.
Herald added subscribers: shchenz, nemanjai.
Herald added a project: All.
lei requested review of this revision.
Herald added a project: clang.

``vec_replace_unaligned`` is meant to return vuc to emphasize that elements
are being inserted on unnatural boundaries.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D128288

Files:
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c

Index: clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-vec-ins-error.c
@@ -49,12 +49,12 @@
 }
 
 #elif defined(__TEST_UNALIGNED_UI)
-vector unsigned int test_vec_replace_unaligned_ui(void) {
+vector unsigned char test_vec_replace_unaligned_ui(void) {
   return vec_replace_unaligned(vuia, uia, 16); // expected-error {{byte number 16 is outside of the valid range [0, 12]}}
 }
 
 #else
-vector unsigned long long test_vec_replace_unaligned_ull(void) {
+vector unsigned char test_vec_replace_unaligned_ull(void) {
   return vec_replace_unaligned(vulla, ulla, 12); // expected-error {{byte number 12 is outside of the valid range [0, 8]}}
 }
 #endif
Index: clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c
@@ -1183,8 +1183,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 6)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-BE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_si(
 // CHECK-LE-NEXT:  entry:
@@ -1194,10 +1193,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 6)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-LE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[TMP5]]
 //
-vector signed int test_vec_replace_unaligned_si(void) {
+vector unsigned char test_vec_replace_unaligned_si(void) {
   return vec_replace_unaligned(vsia, sia, 6);
 }
 
@@ -1209,8 +1207,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 8)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-BE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_ui(
 // CHECK-LE-NEXT:  entry:
@@ -1220,10 +1217,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[TMP2]], i32 8)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32>
-// CHECK-LE-NEXT:ret <4 x i32> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[TMP5]]
 //
-vector unsigned int test_vec_replace_unaligned_ui(void) {
+vector unsigned char test_vec_replace_unaligned_ui(void) {
   return vec_replace_unaligned(vuia, uia, 8);
 }
 
@@ -1236,8 +1232,7 @@
 // CHECK-BE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-BE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[CONV]], i32 12)
 // CHECK-BE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-BE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-BE-NEXT:ret <4 x float> [[TMP6]]
+// CHECK-BE-NEXT:ret <16 x i8> [[TMP5]]
 //
 // CHECK-LE-LABEL: @test_vec_replace_unaligned_f(
 // CHECK-LE-NEXT:  entry:
@@ -1248,10 +1243,9 @@
 // CHECK-LE-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-LE-NEXT:[[TMP4:%.*]] = call <4 x i32> @llvm.ppc.altivec.vinsw(<4 x i32> [[TMP3]], i32 [[CONV]], i32 12)
 // CHECK-LE-NEXT:[[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8>
-// CHECK-LE-NEXT:[[TMP6:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-LE-NEXT:ret <4 x float> [[TMP6]]
+// CHECK-LE-NEXT:ret <16 x i8> [[T

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

[PATCH] D128288: [PowerPC] Fix signatures for vec_replace_unaligned builtin

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