[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Alvin Wong via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG8cd90fd1a823: [X86][MC] Fix parsing Intel syntax indirect 
branch with symbol only (authored by alvinhochun).

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Files:
  clang/test/CodeGen/ms-inline-asm-functions.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/MC/X86/intel-syntax-branch.s

Index: llvm/test/MC/X86/intel-syntax-branch.s
===
--- /dev/null
+++ llvm/test/MC/X86/intel-syntax-branch.s
@@ -0,0 +1,71 @@
+// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-32,CHECK
+// RUN: llvm-mc -triple x86_64-unknown-unknown --defsym X64=1 -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-64,CHECK
+
+// RUN: not llvm-mc -triple i686-unknown-unknown --defsym ERR=1 -x86-asm-syntax=intel %s 2>&1 | FileCheck %s --check-prefixes=ERR-32
+
+t0:
+call direct_branch
+jmp direct_branch
+// CHECK-LABEL: t0:
+// CHECK-64: callq direct_branch
+// CHECK-32: calll direct_branch
+// CHECK:jmp direct_branch
+
+t1:
+call [fn_ref]
+jmp [fn_ref]
+// CHECK-LABEL: t1:
+// CHECK-64: callq *fn_ref
+// CHECK-64: jmpq *fn_ref
+// CHECK-32: calll *fn_ref
+// CHECK-32: jmpl *fn_ref
+
+.ifdef X64
+
+  t2:
+  call qword ptr [fn_ref]
+  jmp qword ptr [fn_ref]
+  // CHECK-64-LABEL: t2:
+  // CHECK-64: callq *fn_ref
+  // CHECK-64: jmpq *fn_ref
+
+  t3:
+  call qword ptr [rip + fn_ref]
+  jmp qword ptr [rip + fn_ref]
+  // CHECK-64-LABEL: t3:
+  // CHECK-64: callq *fn_ref(%rip)
+  // CHECK-64: jmpq *fn_ref(%rip)
+
+.else
+
+  t4:
+  call dword ptr [fn_ref]
+  jmp dword ptr [fn_ref]
+  // CHECK-32-LABEL: t4:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t5:
+  call dword ptr fn_ref
+  jmp dword ptr fn_ref
+  // CHECK-32-LABEL: t5:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t6:
+  call dword ptr [offset fn_ref]
+  jmp dword ptr [offset fn_ref]
+  // CHECK-32-LABEL: t6:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+.ifdef ERR
+
+  call offset fn_ref
+  // ERR-32: {{.*}}.s:[[#@LINE-1]]:3: error: invalid operand for instruction
+  jmp offset fn_ref
+  // ERR-32: {{.*}}.s:[[#@LINE-1]]:3: error: invalid operand for instruction
+
+.endif
+
+.endif
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -433,6 +433,7 @@
 InlineAsmIdentifierInfo Info;
 short BracCount = 0;
 bool MemExpr = false;
+bool BracketUsed = false;
 bool OffsetOperator = false;
 bool AttachToOperandIdx = false;
 bool IsPIC = false;
@@ -455,6 +456,7 @@
 void addImm(int64_t imm) { Imm += imm; }
 short getBracCount() const { return BracCount; }
 bool isMemExpr() const { return MemExpr; }
+bool isBracketUsed() const { return BracketUsed; }
 bool isOffsetOperator() const { return OffsetOperator; }
 SMLoc getOffsetLoc() const { return OffsetOperatorLoc; }
 unsigned getBaseReg() const { return BaseReg; }
@@ -955,6 +957,7 @@
 break;
   }
   MemExpr = true;
+  BracketUsed = true;
   BracCount++;
   return false;
 }
@@ -2628,9 +2631,9 @@
   unsigned DefaultBaseReg = X86::NoRegister;
   bool MaybeDirectBranchDest = true;
 
+  bool IsUnconditionalBranch =
+  Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
   if (Parser.isParsingMasm()) {
-bool IsUnconditionalBranch =
-Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
 if (is64BitMode() && SM.getElementSize() > 0) {
   DefaultBaseReg = X86::RIP;
 }
@@ -2652,6 +2655,9 @@
 }
   }
 }
+  } else if (IsUnconditionalBranch) {
+if (PtrInOperand || SM.isBracketUsed())
+  MaybeDirectBranchDest = false;
   }
 
   if ((BaseReg || IndexReg || RegNo || DefaultBaseReg != X86::NoRegister))
Index: clang/test/CodeGen/ms-inline-asm-functions.c
===
--- clang/test/CodeGen/ms-inline-asm-functions.c
+++ clang/test/CodeGen/ms-inline-asm-functions.c
@@ -24,10 +24,9 @@
   __asm call kimport;
   // CHECK: calll   *({{.*}})
 
-  // Broken case: Call through a global function pointer.
+  // Call through a global function pointer.
   __asm call kptr;
-  // CHECK: calll   _kptr
-  // CHECK-FIXME: calll   *_kptr
+  // CHECK: calll   *_kptr
 }
 
 int bar(void) {
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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Alvin Wong via Phabricator via cfe-commits]

alvinhochun updated this revision to Diff 520158.
alvinhochun added a comment.

Apply suggestions: remove TODO, put negative tests in the same file as positive 
tests.


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Files:
  clang/test/CodeGen/ms-inline-asm-functions.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/MC/X86/intel-syntax-branch.s

Index: llvm/test/MC/X86/intel-syntax-branch.s
===
--- /dev/null
+++ llvm/test/MC/X86/intel-syntax-branch.s
@@ -0,0 +1,71 @@
+// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-32,CHECK
+// RUN: llvm-mc -triple x86_64-unknown-unknown --defsym X64=1 -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-64,CHECK
+
+// RUN: not llvm-mc -triple i686-unknown-unknown --defsym ERR=1 -x86-asm-syntax=intel %s 2>&1 | FileCheck %s --check-prefixes=ERR-32
+
+t0:
+call direct_branch
+jmp direct_branch
+// CHECK-LABEL: t0:
+// CHECK-64: callq direct_branch
+// CHECK-32: calll direct_branch
+// CHECK:jmp direct_branch
+
+t1:
+call [fn_ref]
+jmp [fn_ref]
+// CHECK-LABEL: t1:
+// CHECK-64: callq *fn_ref
+// CHECK-64: jmpq *fn_ref
+// CHECK-32: calll *fn_ref
+// CHECK-32: jmpl *fn_ref
+
+.ifdef X64
+
+  t2:
+  call qword ptr [fn_ref]
+  jmp qword ptr [fn_ref]
+  // CHECK-64-LABEL: t2:
+  // CHECK-64: callq *fn_ref
+  // CHECK-64: jmpq *fn_ref
+
+  t3:
+  call qword ptr [rip + fn_ref]
+  jmp qword ptr [rip + fn_ref]
+  // CHECK-64-LABEL: t3:
+  // CHECK-64: callq *fn_ref(%rip)
+  // CHECK-64: jmpq *fn_ref(%rip)
+
+.else
+
+  t4:
+  call dword ptr [fn_ref]
+  jmp dword ptr [fn_ref]
+  // CHECK-32-LABEL: t4:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t5:
+  call dword ptr fn_ref
+  jmp dword ptr fn_ref
+  // CHECK-32-LABEL: t5:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t6:
+  call dword ptr [offset fn_ref]
+  jmp dword ptr [offset fn_ref]
+  // CHECK-32-LABEL: t6:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+.ifdef ERR
+
+  call offset fn_ref
+  // ERR-32: {{.*}}.s:[[#@LINE-1]]:3: error: invalid operand for instruction
+  jmp offset fn_ref
+  // ERR-32: {{.*}}.s:[[#@LINE-1]]:3: error: invalid operand for instruction
+
+.endif
+
+.endif
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -432,6 +432,7 @@
 InlineAsmIdentifierInfo Info;
 short BracCount = 0;
 bool MemExpr = false;
+bool BracketUsed = false;
 bool OffsetOperator = false;
 bool AttachToOperandIdx = false;
 bool IsPIC = false;
@@ -454,6 +455,7 @@
 void addImm(int64_t imm) { Imm += imm; }
 short getBracCount() const { return BracCount; }
 bool isMemExpr() const { return MemExpr; }
+bool isBracketUsed() const { return BracketUsed; }
 bool isOffsetOperator() const { return OffsetOperator; }
 SMLoc getOffsetLoc() const { return OffsetOperatorLoc; }
 unsigned getBaseReg() const { return BaseReg; }
@@ -954,6 +956,7 @@
 break;
   }
   MemExpr = true;
+  BracketUsed = true;
   BracCount++;
   return false;
 }
@@ -2630,9 +2633,9 @@
   unsigned DefaultBaseReg = X86::NoRegister;
   bool MaybeDirectBranchDest = true;
 
+  bool IsUnconditionalBranch =
+  Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
   if (Parser.isParsingMasm()) {
-bool IsUnconditionalBranch =
-Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
 if (is64BitMode() && SM.getElementSize() > 0) {
   DefaultBaseReg = X86::RIP;
 }
@@ -2654,6 +2657,9 @@
 }
   }
 }
+  } else if (IsUnconditionalBranch) {
+if (PtrInOperand || SM.isBracketUsed())
+  MaybeDirectBranchDest = false;
   }
 
   if ((BaseReg || IndexReg || RegNo || DefaultBaseReg != X86::NoRegister))
Index: clang/test/CodeGen/ms-inline-asm-functions.c
===
--- clang/test/CodeGen/ms-inline-asm-functions.c
+++ clang/test/CodeGen/ms-inline-asm-functions.c
@@ -24,10 +24,9 @@
   __asm call kimport;
   // CHECK: calll   *({{.*}})
 
-  // Broken case: Call through a global function pointer.
+  // Call through a global function pointer.
   __asm call kptr;
-  // CHECK: calll   _kptr
-  // CHECK-FIXME: calll   *_kptr
+  // CHECK: calll   *_kptr
 }
 
 int bar(void) {
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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: llvm/test/MC/X86/intel-syntax-branch-fail.s:5
+// call [offset fn_ref]
+// // TODO-CHECK: {{.*}}intel-syntax-branch-fail.s:[[#@LINE+-1]]:1: error: 
`OFFSET` operator cannot be used in an unconditional branch
+// jmp [offset fn_ref]

`[[#@LINE+-1]]` => `[[#@LINE-1]]`

Remove the file name `intel-syntax-branch-fail.s`.

I'd remove `TODO-CHECK` in this patch and add ``// CHECK: :[[#@LINE+-1]]:1: 
error: `OFFSET` operator cannot be used in an unconditional branch`` in D150048.


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: llvm/test/MC/X86/intel-syntax-branch-fail.s:1
+// RUN: not llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s 2>&1 
| FileCheck %s
+

Don't create a separate test for negative tests. Use the `--defsym=ERR=1` and 
`.ifdef ERR` pattern to keep positive and negative tests in one file.


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2662
+// TODO: Consider making the `call [offset fn_ref]` syntax an error?
+#if 0
+if (!PtrInOperand && SM.isOffsetOperator())

I think this patch can be pushed now. 

Remove `#if 0` from this patch. Just add the lines in D150048.


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Fangrui Song via Phabricator via cfe-commits]

MaskRay accepted this revision.
MaskRay added a comment.
This revision is now accepted and ready to land.

Thanks!


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: llvm/test/MC/X86/intel-syntax-branch.s:61-67
+  // FIXME: MASM does not accept this syntax and GAS assembles this as a direct
+  //call/jump instead of indirect. Consider making this syntax an 
error?
+  call [offset fn_ref]
+  jmp [offset fn_ref]
+  // CHECK-32-LABEL: t7:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref

alvinhochun wrote:
> About the `call [offset fn_ref]` case, do you think we should reject it since 
> MASM does not accept this syntax and GAS appears to behave oddly with it? The 
> `ms-inline-asm-functions.c` test does generate `call [offset _kptr]` so this 
> will also need to be changed.
Yes, I think we should reject `call [offset fn_ref]`. Confirmed with a MinGW 
dev (lh_mouse) that this is invalid.



Comment at: llvm/test/MC/X86/intel-syntax-branch.s:48
+  call dword ptr fn_ref
+  jmp dword ptr fn_ref
+  // CHECK-32-LABEL: t5:

alvinhochun wrote:
> MaskRay wrote:
> > ICC and MSVC parse this differently.
> > 
> > Is this syntax valid?
> MASM ml.exe assembles this as `jmp dword ptr [fn_ref]` in my test, so does 
> GAS. I don't know how valid this syntax is though.
LG. cl.exe compiles `void (*kptr)(); ... __asm call kptr;` to `callDWORD 
PTR _kptr`, so it seems that the bracket can be omitted.


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Alvin Wong via Phabricator via cfe-commits]

alvinhochun marked an inline comment as not done.
alvinhochun added a comment.

In D149579#4320765 , @MaskRay wrote:

> OK. I  think after D149695  (landed), 
> D149920 , and this patch D149579 
> , these cases should be correct.

Thank you so much for looking into this!

I have one question in inline comment.




Comment at: llvm/test/MC/X86/intel-syntax-branch.s:61-67
+  // FIXME: MASM does not accept this syntax and GAS assembles this as a direct
+  //call/jump instead of indirect. Consider making this syntax an 
error?
+  call [offset fn_ref]
+  jmp [offset fn_ref]
+  // CHECK-32-LABEL: t7:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref

About the `call [offset fn_ref]` case, do you think we should reject it since 
MASM does not accept this syntax and GAS appears to behave oddly with it? The 
`ms-inline-asm-functions.c` test does generate `call [offset _kptr]` so this 
will also need to be changed.



Comment at: llvm/test/MC/X86/intel-syntax-branch.s:48
+  call dword ptr fn_ref
+  jmp dword ptr fn_ref
+  // CHECK-32-LABEL: t5:

MaskRay wrote:
> ICC and MSVC parse this differently.
> 
> Is this syntax valid?
MASM ml.exe assembles this as `jmp dword ptr [fn_ref]` in my test, so does GAS. 
I don't know how valid this syntax is though.


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[PATCH] D149579: [X86][MC] Fix parsing Intel syntax indirect branch with symbol only

[Alvin Wong via Phabricator via cfe-commits]

alvinhochun updated this revision to Diff 519869.
alvinhochun edited the summary of this revision.
alvinhochun added a comment.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Rebase and add test cases with `offset` operator, and some TODOs/FIXMEs for 
comment


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Files:
  clang/test/CodeGen/ms-inline-asm-functions.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/MC/X86/intel-syntax-branch-fail.s
  llvm/test/MC/X86/intel-syntax-branch.s

Index: llvm/test/MC/X86/intel-syntax-branch.s
===
--- /dev/null
+++ llvm/test/MC/X86/intel-syntax-branch.s
@@ -0,0 +1,69 @@
+// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-32,CHECK
+// RUN: llvm-mc -triple x86_64-unknown-unknown --defsym X64=1 -x86-asm-syntax=intel %s | FileCheck %s --check-prefixes=CHECK-64,CHECK
+
+t0:
+call direct_branch
+jmp direct_branch
+// CHECK-LABEL: t0:
+// CHECK-64: callq direct_branch
+// CHECK-32: calll direct_branch
+// CHECK:jmp direct_branch
+
+t1:
+call [fn_ref]
+jmp [fn_ref]
+// CHECK-LABEL: t1:
+// CHECK-64: callq *fn_ref
+// CHECK-64: jmpq *fn_ref
+// CHECK-32: calll *fn_ref
+// CHECK-32: jmpl *fn_ref
+
+.ifdef X64
+
+  t2:
+  call qword ptr [fn_ref]
+  jmp qword ptr [fn_ref]
+  // CHECK-64-LABEL: t2:
+  // CHECK-64: callq *fn_ref
+  // CHECK-64: jmpq *fn_ref
+
+  t3:
+  call qword ptr [rip + fn_ref]
+  jmp qword ptr [rip + fn_ref]
+  // CHECK-64-LABEL: t3:
+  // CHECK-64: callq *fn_ref(%rip)
+  // CHECK-64: jmpq *fn_ref(%rip)
+
+.else
+
+  t4:
+  call dword ptr [fn_ref]
+  jmp dword ptr [fn_ref]
+  // CHECK-32-LABEL: t4:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t5:
+  call dword ptr fn_ref
+  jmp dword ptr fn_ref
+  // CHECK-32-LABEL: t5:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t6:
+  call dword ptr [offset fn_ref]
+  jmp dword ptr [offset fn_ref]
+  // CHECK-32-LABEL: t6:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+  t7:
+  // FIXME: MASM does not accept this syntax and GAS assembles this as a direct
+  //call/jump instead of indirect. Consider making this syntax an error?
+  call [offset fn_ref]
+  jmp [offset fn_ref]
+  // CHECK-32-LABEL: t7:
+  // CHECK-32: calll *fn_ref
+  // CHECK-32: jmpl *fn_ref
+
+.endif
Index: llvm/test/MC/X86/intel-syntax-branch-fail.s
===
--- /dev/null
+++ llvm/test/MC/X86/intel-syntax-branch-fail.s
@@ -0,0 +1,12 @@
+// RUN: not llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s 2>&1 | FileCheck %s
+
+// TODO: Consider making this syntax an error?
+// call [offset fn_ref]
+// // TODO-CHECK: {{.*}}intel-syntax-branch-fail.s:[[#@LINE+-1]]:1: error: `OFFSET` operator cannot be used in an unconditional branch
+// jmp [offset fn_ref]
+// // TODO-CHECK: {{.*}}intel-syntax-branch-fail.s:[[#@LINE+-1]]:1: error: `OFFSET` operator cannot be used in an unconditional branch
+
+call offset fn_ref
+// CHECK: {{.*}}intel-syntax-branch-fail.s:[[#@LINE+-1]]:1: error: invalid operand for instruction
+jmp offset fn_ref
+// CHECK: {{.*}}intel-syntax-branch-fail.s:[[#@LINE+-1]]:1: error: invalid operand for instruction
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -432,6 +432,7 @@
 InlineAsmIdentifierInfo Info;
 short BracCount = 0;
 bool MemExpr = false;
+bool BracketUsed = false;
 bool OffsetOperator = false;
 bool AttachToOperandIdx = false;
 bool IsPIC = false;
@@ -454,6 +455,7 @@
 void addImm(int64_t imm) { Imm += imm; }
 short getBracCount() const { return BracCount; }
 bool isMemExpr() const { return MemExpr; }
+bool isBracketUsed() const { return BracketUsed; }
 bool isOffsetOperator() const { return OffsetOperator; }
 SMLoc getOffsetLoc() const { return OffsetOperatorLoc; }
 unsigned getBaseReg() const { return BaseReg; }
@@ -954,6 +956,7 @@
 break;
   }
   MemExpr = true;
+  BracketUsed = true;
   BracCount++;
   return false;
 }
@@ -2630,9 +2633,9 @@
   unsigned DefaultBaseReg = X86::NoRegister;
   bool MaybeDirectBranchDest = true;
 
+  bool IsUnconditionalBranch =
+  Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
   if (Parser.isParsingMasm()) {
-bool IsUnconditionalBranch =
-Name.equals_insensitive("jmp") || Name.equals_insensitive("call");
 if (is64BitMode() && SM.getElementSize() > 0) {
   DefaultBaseReg = X86::RIP;
 }
@@ -2654,6 +2657,14 @@
 }
   }
 }
+  } else if (IsUnconditionalBranch) {
+// TODO: Consider making the `call [offset fn_