[PATCH] D152627: [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.

[Craig Topper via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2f2af2d01763: [RISCV] Change the immediate argument to Zk* 
intrinsics/builtins from i8 to i32. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152627/new/

https://reviews.llvm.org/D152627

Files:
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zkne.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zksed.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zksed.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoZk.td
  llvm/test/CodeGen/RISCV/rv32zknd-intrinsic-autoupgrade.ll
  llvm/test/CodeGen/RISCV/rv32zknd-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zkne-intrinsic-autoupgrade.ll
  llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zksed-intrinsic-autoupgrade.ll
  llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zksed-intrinsic-autoupgrade.ll
  llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll

Index: llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
===
--- llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
@@ -2,24 +2,24 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+zksed -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZKSED
 
-declare i64 @llvm.riscv.sm4ks.i64(i64, i64, i8);
+declare i64 @llvm.riscv.sm4ks.i64(i64, i64, i32);
 
 define i64 @sm4ks_i64(i64 %a, i64 %b) nounwind {
 ; RV64ZKSED-LABEL: sm4ks_i64:
 ; RV64ZKSED:   # %bb.0:
 ; RV64ZKSED-NEXT:sm4ks a0, a0, a1, 0
 ; RV64ZKSED-NEXT:ret
-  %val = call i64 @llvm.riscv.sm4ks.i64(i64 %a, i64 %b, i8 0)
+  %val = call i64 @llvm.riscv.sm4ks.i64(i64 %a, i64 %b, i32 0)
   ret i64 %val
 }
 
-declare i64 @llvm.riscv.sm4ed.i64(i64, i64, i8);
+declare i64 @llvm.riscv.sm4ed.i64(i64, i64, i32);
 
 define i64 @sm4ed_i64(i64 %a, i64 %b) nounwind {
 ; RV64ZKSED-LABEL: sm4ed_i64:
 ; RV64ZKSED:   # %bb.0:
 ; RV64ZKSED-NEXT:sm4ed a0, a0, a1, 1
 ; RV64ZKSED-NEXT:ret
-  %val = call i64 @llvm.riscv.sm4ed.i64(i64 %a, i64 %b, i8 1)
+  %val = call i64 @llvm.riscv.sm4ed.i64(i64 %a, i64 %b, i32 1)
   ret i64 %val
 }
Index: llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
===
--- llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
@@ -2,24 +2,24 @@
 ; RUN: llc -mtriple=riscv32 -mattr=+zksed -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZKSED
 
-declare i32 @llvm.riscv.sm4ks.i32(i32, i32, i8);
+declare i32 @llvm.riscv.sm4ks.i32(i32, i32, i32);
 
 define i32 @sm4ks_i32(i32 %a, i32 %b) nounwind {
 ; RV32ZKSED-LABEL: sm4ks_i32:
 ; RV32ZKSED:   # %bb.0:
 ; RV32ZKSED-NEXT:sm4ks a0, a0, a1, 2
 ; RV32ZKSED-NEXT:ret
-  %val = call i32 @llvm.riscv.sm4ks.i32(i32 %a, i32 %b, i8 2)
+  %val = call i32 @llvm.riscv.sm4ks.i32(i32 %a, i32 %b, i32 2)
   ret i32 %val
 }
 
-declare i32 @llvm.riscv.sm4ed.i32(i32, i32, i8);
+declare i32 @llvm.riscv.sm4ed.i32(i32, i32, i32);
 
 define i32 @sm4ed_i32(i32 %a, i32 %b) nounwind {
 ; RV32ZKSED-LABEL: sm4ed_i32:
 ; RV32ZKSED:   # %bb.0:
 ; RV32ZKSED-NEXT:sm4ed a0, a0, a1, 3
 ; RV32ZKSED-NEXT:ret
-  %val = call i32 @llvm.riscv.sm4ed.i32(i32 %a, i32 %b, i8 3)
+  %val = call i32 @llvm.riscv.sm4ed.i32(i32 %a, i32 %b, i32 3)
   ret i32 %val
 }
Index: llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
===
--- llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
@@ -2,24 +2,24 @@
 ; RUN: llc -mtriple=riscv32 -mattr=+zkne -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZKNE
 
-declare i32 @llvm.riscv.aes32esi(i32, i32, i8);
+declare i32 @llvm.riscv.aes32esi(i32, i32, i32);
 
 define i32 @aes32esi(i32 %a, i32 %b) nounwind {
 ; RV32ZKNE-LABEL: aes32esi:
 ; RV32ZKNE:   # %bb.0:
 ; RV32ZKNE-NEXT:aes32esi a0, a0, a1, 2
 ; RV32ZKNE-NEXT:ret
-%val = call i32 @llvm.riscv.aes32esi(i32 %a, i32 %b, i8 2)
+%val = call i32 @llvm.riscv.aes32esi(i32 %a, i32 %b, i32 2)
 ret i32 %val
 }
 
-declare i32 @llvm.riscv.aes32esmi(i32, i32, i8);
+declare i32 @llvm.riscv.aes32esmi(i32, i32, i32);
 
 define i32 @aes32esmi(i32 %a, i32 %b) nounwind {
 ; RV32ZKNE-LABEL: aes32esmi:
 ; RV32ZKNE:   # %bb.0:
 ; RV32ZKNE-NEXT:aes32esmi a0, a0, a1, 3
 ; RV32ZKNE-NEXT:ret
-%val = call i32 @llvm.riscv.aes32esmi(i32 %a, i32 %b, i8 3)
+%val = call i32 @llvm.riscv.aes32esmi(i32 %a, i32 %b, i32 3)
 ret i32 %val
 }
Index: llvm/test/CodeGen/RISCV/rv32zknd-intrinsic.ll
=

[PATCH] D152627: [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.

[Alex Bradbury via Phabricator via cfe-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

LGTM. llvm/test/Bitcode is the other place the autoupgrade tests could go, but 
it looks like it's not used any more frequently for such tests than 
llvm/test/CodeGen/$tgt/.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152627/new/

https://reviews.llvm.org/D152627

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