[PATCH] D45515: [NEON] Support vrndns_f32 intrinsic

2018-04-13 Thread Ivan Kosarev via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rC330012: [NEON] Support vrndns_f32 intrinsic (authored by 
kosarev, committed by ).

Repository:
  rC Clang

https://reviews.llvm.org/D45515

Files:
  include/clang/Basic/arm_neon.td
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/arm-neon-directed-rounding.c


Index: test/CodeGen/arm-neon-directed-rounding.c
===
--- test/CodeGen/arm-neon-directed-rounding.c
+++ test/CodeGen/arm-neon-directed-rounding.c
@@ -1,4 +1,6 @@
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 
-ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | 
FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
+// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
+// RUN: opt -S -mem2reg | FileCheck %s
 
 #include 
 
@@ -85,3 +87,10 @@
 float32x4_t test_vrndq_f32(float32x4_t a) {
   return vrndq_f32(a);
 }
+
+// CHECK-LABEL: define float @test_vrndns_f32(float %a) #0 {
+// CHECK:   [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) #2
+// CHECK:   ret float [[VRNDN_I]]
+float32_t test_vrndns_f32(float32_t a) {
+  return vrndns_f32(a);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -5590,6 +5590,12 @@
   case NEON::BI__builtin_neon_vgetq_lane_f32:
 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane");
 
+  case NEON::BI__builtin_neon_vrndns_f32: {
+Value *Arg = EmitScalarExpr(E->getArg(0));
+llvm::Type *Tys[] = {Arg->getType()};
+Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys);
+return Builder.CreateCall(F, {Arg}, "vrndn"); }
+
   case NEON::BI__builtin_neon_vset_lane_i8:
   case NEON::BI__builtin_neon_vset_lane_i16:
   case NEON::BI__builtin_neon_vset_lane_i32:
Index: include/clang/Basic/arm_neon.td
===
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -1116,6 +1116,12 @@
 }
 
 

+// Scalar Floating-point Round to Integral
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" 
in {
+def SCALAR_FRINTN_S32 : SInst<"vrndn", "ss", "Sf">;
+}
+
+
 // Scalar Reduce Pairwise Addition (Scalar and Floating Point)
 def SCALAR_ADDP  : SInst<"vpadd", "sd", "SfSHlSHdSHUl">;
 


Index: test/CodeGen/arm-neon-directed-rounding.c
===
--- test/CodeGen/arm-neon-directed-rounding.c
+++ test/CodeGen/arm-neon-directed-rounding.c
@@ -1,4 +1,6 @@
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
+// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
+// RUN: opt -S -mem2reg | FileCheck %s
 
 #include 
 
@@ -85,3 +87,10 @@
 float32x4_t test_vrndq_f32(float32x4_t a) {
   return vrndq_f32(a);
 }
+
+// CHECK-LABEL: define float @test_vrndns_f32(float %a) #0 {
+// CHECK:   [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) #2
+// CHECK:   ret float [[VRNDN_I]]
+float32_t test_vrndns_f32(float32_t a) {
+  return vrndns_f32(a);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -5590,6 +5590,12 @@
   case NEON::BI__builtin_neon_vgetq_lane_f32:
 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane");
 
+  case NEON::BI__builtin_neon_vrndns_f32: {
+Value *Arg = EmitScalarExpr(E->getArg(0));
+llvm::Type *Tys[] = {Arg->getType()};
+Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys);
+return Builder.CreateCall(F, {Arg}, "vrndn"); }
+
   case NEON::BI__builtin_neon_vset_lane_i8:
   case NEON::BI__builtin_neon_vset_lane_i16:
   case NEON::BI__builtin_neon_vset_lane_i32:
Index: include/clang/Basic/arm_neon.td
===
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -1116,6 +1116,12 @@
 }
 
 
+// Scalar Floating-point Round to Integral
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in {
+def SCALAR_FRINTN_S32 : SInst<"vrndn", "ss", "Sf">;
+}
+
+
 // Scalar Reduce Pairwise Addition (Scalar and Floating Point)
 def SCALAR_ADDP  : SInst<"vpadd", "sd", "SfSHlSHdSHUl">;

[PATCH] D45515: [NEON] Support vrndns_f32 intrinsic

2018-04-11 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

Looks good to me.


https://reviews.llvm.org/D45515



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[PATCH] D45515: [NEON] Support vrndns_f32 intrinsic

2018-04-11 Thread Ivan Kosarev via Phabricator via cfe-commits 
kosarev created this revision.
kosarev added reviewers: t.p.northover, rengolin, SjoerdMeijer.
kosarev added a project: clang.
Herald added a subscriber: javed.absar.

https://reviews.llvm.org/D45515

Files:
  include/clang/Basic/arm_neon.td
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/arm-neon-directed-rounding.c


Index: test/CodeGen/arm-neon-directed-rounding.c
===
--- test/CodeGen/arm-neon-directed-rounding.c
+++ test/CodeGen/arm-neon-directed-rounding.c
@@ -1,4 +1,6 @@
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 
-ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | 
FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
+// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
+// RUN: opt -S -mem2reg | FileCheck %s
 
 #include 
 
@@ -85,3 +87,10 @@
 float32x4_t test_vrndq_f32(float32x4_t a) {
   return vrndq_f32(a);
 }
+
+// CHECK-LABEL: define float @test_vrndns_f32(float %a) #0 {
+// CHECK:   [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) #2
+// CHECK:   ret float [[VRNDN_I]]
+float32_t test_vrndns_f32(float32_t a) {
+  return vrndns_f32(a);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -5485,6 +5485,12 @@
   case NEON::BI__builtin_neon_vgetq_lane_f32:
 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane");
 
+  case NEON::BI__builtin_neon_vrndns_f32: {
+Value *Arg = EmitScalarExpr(E->getArg(0));
+llvm::Type *Tys[] = {Arg->getType()};
+Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys);
+return Builder.CreateCall(F, {Arg}, "vrndn"); }
+
   case NEON::BI__builtin_neon_vset_lane_i8:
   case NEON::BI__builtin_neon_vset_lane_i16:
   case NEON::BI__builtin_neon_vset_lane_i32:
Index: include/clang/Basic/arm_neon.td
===
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -1116,6 +1116,12 @@
 }
 
 

+// Scalar Floating-point Round to Integral
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" 
in {
+def SCALAR_FRINTN_S32 : SInst<"vrndn", "ss", "Sf">;
+}
+
+
 // Scalar Reduce Pairwise Addition (Scalar and Floating Point)
 def SCALAR_ADDP  : SInst<"vpadd", "sd", "SfSHlSHdSHUl">;
 


Index: test/CodeGen/arm-neon-directed-rounding.c
===
--- test/CodeGen/arm-neon-directed-rounding.c
+++ test/CodeGen/arm-neon-directed-rounding.c
@@ -1,4 +1,6 @@
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
+// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
+// RUN: opt -S -mem2reg | FileCheck %s
 
 #include 
 
@@ -85,3 +87,10 @@
 float32x4_t test_vrndq_f32(float32x4_t a) {
   return vrndq_f32(a);
 }
+
+// CHECK-LABEL: define float @test_vrndns_f32(float %a) #0 {
+// CHECK:   [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) #2
+// CHECK:   ret float [[VRNDN_I]]
+float32_t test_vrndns_f32(float32_t a) {
+  return vrndns_f32(a);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -5485,6 +5485,12 @@
   case NEON::BI__builtin_neon_vgetq_lane_f32:
 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane");
 
+  case NEON::BI__builtin_neon_vrndns_f32: {
+Value *Arg = EmitScalarExpr(E->getArg(0));
+llvm::Type *Tys[] = {Arg->getType()};
+Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys);
+return Builder.CreateCall(F, {Arg}, "vrndn"); }
+
   case NEON::BI__builtin_neon_vset_lane_i8:
   case NEON::BI__builtin_neon_vset_lane_i16:
   case NEON::BI__builtin_neon_vset_lane_i32:
Index: include/clang/Basic/arm_neon.td
===
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -1116,6 +1116,12 @@
 }
 
 
+// Scalar Floating-point Round to Integral
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in {
+def SCALAR_FRINTN_S32 : SInst<"vrndn", "ss", "Sf">;
+}
+
+
 // Scalar Reduce Pairwise Addition (Scalar and Floating Point)
 def SCALAR_ADDP  : SInst<"vpadd", "sd", "SfSHlSHdSHUl">;