[PATCH] D63578: AMDGPU: Add DS GWS sema builtins

[Matt Arsenault via Phabricator via cfe-commits]

arsenm closed this revision.
arsenm added a comment.

r363986


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63578/new/

https://reviews.llvm.org/D63578



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63578: AMDGPU: Add DS GWS sema builtins

[Stanislav Mekhanoshin via Phabricator via cfe-commits]

rampitec accepted this revision.
rampitec added a comment.
This revision is now accepted and ready to land.

LGTM


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63578/new/

https://reviews.llvm.org/D63578



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63578: AMDGPU: Add DS GWS sema builtins

[Matt Arsenault via Phabricator via cfe-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, b-sumner, yaxunl.
Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, 
kzhuravl.
arsenm added a parent revision: D63576: AMDGPU: Add intrinsics for DS GWS 
semaphore instructions.

https://reviews.llvm.org/D63578

Files:
  include/clang/Basic/BuiltinsAMDGPU.def
  test/CodeGenOpenCL/builtins-amdgcn-ci.cl
  test/CodeGenOpenCL/builtins-amdgcn.cl
  test/SemaOpenCL/builtins-amdgcn-error-ci.cl


Index: test/SemaOpenCL/builtins-amdgcn-error-ci.cl
===
--- test/SemaOpenCL/builtins-amdgcn-error-ci.cl
+++ test/SemaOpenCL/builtins-amdgcn-error-ci.cl
@@ -1,8 +1,9 @@
 // REQUIRES: amdgpu-registered-target
 // RUN: %clang_cc1 -triple amdgcn-- -target-cpu tahiti -verify -S -o - %s
 
-void test_ci_biltins()
+void test_ci_builtins()
 {
   __builtin_amdgcn_s_dcache_inv_vol(); // expected-error 
{{'__builtin_amdgcn_s_dcache_inv_vol' needs target feature ci-insts}}
   __builtin_amdgcn_buffer_wbinvl1_vol(); // expected-error 
{{'__builtin_amdgcn_buffer_wbinvl1_vol' needs target feature ci-insts}}
+  __builtin_amdgcn_ds_gws_sema_release_all(0); // expected-error 
{{'__builtin_amdgcn_ds_gws_sema_release_all' needs target feature ci-insts}}
 }
Index: test/CodeGenOpenCL/builtins-amdgcn.cl
===
--- test/CodeGenOpenCL/builtins-amdgcn.cl
+++ test/CodeGenOpenCL/builtins-amdgcn.cl
@@ -560,6 +560,24 @@
   __builtin_amdgcn_ds_gws_barrier(value, id);
 }
 
+// CHECK-LABEL: @test_gws_sema_v(
+// CHECK: call void @llvm.amdgcn.ds.gws.sema.v(i32 %id)
+kernel void test_gws_sema_v(uint id) {
+  __builtin_amdgcn_ds_gws_sema_v(id);
+}
+
+// CHECK-LABEL: @test_gws_sema_br(
+// CHECK: call void @llvm.amdgcn.ds.gws.sema.br(i32 %value, i32 %id)
+kernel void test_gws_sema_br(uint value, uint id) {
+  __builtin_amdgcn_ds_gws_sema_br(value, id);
+}
+
+// CHECK-LABEL: @test_gws_sema_p(
+// CHECK: call void @llvm.amdgcn.ds.gws.sema.p(i32 %id)
+kernel void test_gws_sema_p(uint id) {
+  __builtin_amdgcn_ds_gws_sema_p(id);
+}
+
 // CHECK-DAG: [[$WI_RANGE]] = !{i32 0, i32 1024}
 // CHECK-DAG: attributes #[[$NOUNWIND_READONLY:[0-9]+]] = { nounwind readonly }
 // CHECK-DAG: attributes #[[$READ_EXEC_ATTRS]] = { convergent }
Index: test/CodeGenOpenCL/builtins-amdgcn-ci.cl
===
--- test/CodeGenOpenCL/builtins-amdgcn-ci.cl
+++ test/CodeGenOpenCL/builtins-amdgcn-ci.cl
@@ -17,3 +17,9 @@
   __builtin_amdgcn_buffer_wbinvl1_vol();
 }
 
+// CHECK-LABEL: @test_gws_sema_release_all(
+// CHECK: call void @llvm.amdgcn.ds.gws.sema.release.all(i32 %id)
+kernel void test_gws_sema_p(uint id)
+{
+  __builtin_amdgcn_ds_gws_sema_release_all(id);
+}
Index: include/clang/Basic/BuiltinsAMDGPU.def
===
--- include/clang/Basic/BuiltinsAMDGPU.def
+++ include/clang/Basic/BuiltinsAMDGPU.def
@@ -47,6 +47,9 @@
 BUILTIN(__builtin_amdgcn_buffer_wbinvl1, "v", "n")
 BUILTIN(__builtin_amdgcn_ds_gws_init, "vUiUi", "n")
 BUILTIN(__builtin_amdgcn_ds_gws_barrier, "vUiUi", "n")
+BUILTIN(__builtin_amdgcn_ds_gws_sema_v, "vUi", "n")
+BUILTIN(__builtin_amdgcn_ds_gws_sema_br, "vUiUi", "n")
+BUILTIN(__builtin_amdgcn_ds_gws_sema_p, "vUi", "n")
 
 // FIXME: Need to disallow constant address space.
 BUILTIN(__builtin_amdgcn_div_scale, "dddbb*", "n")
@@ -108,6 +111,7 @@
 
//===--===//
 TARGET_BUILTIN(__builtin_amdgcn_s_dcache_inv_vol, "v", "n", "ci-insts")
 TARGET_BUILTIN(__builtin_amdgcn_buffer_wbinvl1_vol, "v", "n", "ci-insts")
+TARGET_BUILTIN(__builtin_amdgcn_ds_gws_sema_release_all, "vUi", "n", 
"ci-insts")
 
 
//===--===//
 // Interpolation builtins.


Index: test/SemaOpenCL/builtins-amdgcn-error-ci.cl
===
--- test/SemaOpenCL/builtins-amdgcn-error-ci.cl
+++ test/SemaOpenCL/builtins-amdgcn-error-ci.cl
@@ -1,8 +1,9 @@
 // REQUIRES: amdgpu-registered-target
 // RUN: %clang_cc1 -triple amdgcn-- -target-cpu tahiti -verify -S -o - %s
 
-void test_ci_biltins()
+void test_ci_builtins()
 {
   __builtin_amdgcn_s_dcache_inv_vol(); // expected-error {{'__builtin_amdgcn_s_dcache_inv_vol' needs target feature ci-insts}}
   __builtin_amdgcn_buffer_wbinvl1_vol(); // expected-error {{'__builtin_amdgcn_buffer_wbinvl1_vol' needs target feature ci-insts}}
+  __builtin_amdgcn_ds_gws_sema_release_all(0); // expected-error {{'__builtin_amdgcn_ds_gws_sema_release_all' needs target feature ci-insts}}
 }
Index: test/CodeGenOpenCL/builtins-amdgcn.cl
===
--- test/CodeGenOpenCL/builtins-amdgcn.cl
+++ test/CodeGenOpenCL/builtins-amdgcn.cl
@@ -560,6 +560,24 @@
   __builtin_amdgcn_ds_gws_barrier(value, id);
 }
 
+// CHECK-LABEL: @test_gws_sema_v(