[PATCH] D78401: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
This revision was automatically updated to reflect the committed changes.
Closed by commit rG03f419f3eb0c: [SveEmitter] IsInsertOp1SVALL and builtins for
svqdec[bhwd] and svqinc[bhwd] (authored by sdesmalen).
Changed prior to commit:
https://reviews.llvm.org/D78401?vs=259554=260274#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78401/new/
https://reviews.llvm.org/D78401
Files:
clang/include/clang/Basic/TargetBuiltins.h
clang/include/clang/Basic/arm_sve.td
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
clang/utils/TableGen/SveEmitter.cpp
Index: clang/utils/TableGen/SveEmitter.cpp
===
--- clang/utils/TableGen/SveEmitter.cpp
+++ clang/utils/TableGen/SveEmitter.cpp
@@ -505,6 +505,7 @@
Bitwidth = 16;
ElementBitwidth = 1;
break;
+ case 's':
case 'a':
Bitwidth = ElementBitwidth;
NumVectors = 0;
Index: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
@@ -0,0 +1,155 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+#include
+
+int32_t test_svqincw_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 0);
+}
+
+int32_t test_svqincw_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 17);
+}
+
+int64_t test_svqincw_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 0);
+}
+
+int64_t test_svqincw_n_s64_1(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 17);
+}
+
+uint32_t test_svqincw_n_u32(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 0);
+}
+
+uint32_t test_svqincw_n_u32_1(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 17);
+}
+
+uint64_t test_svqincw_n_u64(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 0);
+}
+
+uint64_t test_svqincw_n_u64_1(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 17);
+}
+
+int32_t test_svqincw_pat_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_POW2, 0);
+}
+
+int32_t test_svqincw_pat_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL1, 17);
+}
+
+int64_t test_svqincw_pat_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL2, 0);
+}
+
+int64_t
[PATCH] D78401: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
sdesmalen updated this revision to Diff 259554.
sdesmalen marked 3 inline comments as done.
sdesmalen added a comment.
- Changed UNSIGNED_BYTE etc from upper-case to CamelCase.
- Added comment explaining need to expand SV_ALL
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78401/new/
https://reviews.llvm.org/D78401
Files:
clang/include/clang/Basic/TargetBuiltins.h
clang/include/clang/Basic/arm_sve.td
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
clang/utils/TableGen/SveEmitter.cpp
Index: clang/utils/TableGen/SveEmitter.cpp
===
--- clang/utils/TableGen/SveEmitter.cpp
+++ clang/utils/TableGen/SveEmitter.cpp
@@ -505,6 +505,7 @@
Bitwidth = 16;
ElementBitwidth = 1;
break;
+ case 's':
case 'a':
Bitwidth = ElementBitwidth;
NumVectors = 0;
Index: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
@@ -0,0 +1,155 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+#include
+
+int32_t test_svqincw_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 0);
+}
+
+int32_t test_svqincw_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 17);
+}
+
+int64_t test_svqincw_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 0);
+}
+
+int64_t test_svqincw_n_s64_1(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 17);
+}
+
+uint32_t test_svqincw_n_u32(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 0);
+}
+
+uint32_t test_svqincw_n_u32_1(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 17);
+}
+
+uint64_t test_svqincw_n_u64(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 0);
+}
+
+uint64_t test_svqincw_n_u64_1(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 17);
+}
+
+int32_t test_svqincw_pat_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_POW2, 0);
+}
+
+int32_t test_svqincw_pat_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL1, 17);
+}
+
+int64_t test_svqincw_pat_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL2, 0);
+}
+
+int64_t test_svqincw_pat_n_s64_1(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid
[PATCH] D78401: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
sdesmalen added inline comments.
Comment at: clang/include/clang/Basic/arm_sve.td:530
+class sat_type { string U = u; string T = t; }
+def SIGNED_BYTE : sat_type<"", "c">;
+def SIGNED_HALF : sat_type<"", "s">;
SjoerdMeijer wrote:
> nit: just wondering if all these defs should be all capitals.
They don't and I can see how this can be confused with intrinsics. I've changed
it!
Comment at: clang/lib/CodeGen/CGBuiltin.cpp:7684
+if (TypeFlags.isInsertOp1SVALL())
+ Ops.insert([1], Builder.getInt32(31));
SjoerdMeijer wrote:
> would this be the most appropriate place to add the useful sentence from the
> description:
>
> "Some ACLE builtins leave out the argument to specify the predicate
> pattern, which is expected to be expanded to an SV_ALL pattern."
>
> because that's what 31 is, right?
Yes, good suggestion! I've added the comment.
Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c:7
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
SjoerdMeijer wrote:
> nit: used,unused -> "used/unused", or "used, unused"
I'd rather not fix this for this patch, because it would need changing for all
other test files as well.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78401/new/
https://reviews.llvm.org/D78401
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[PATCH] D78401: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.
Looks reasonable
Comment at: clang/include/clang/Basic/arm_sve.td:530
+class sat_type { string U = u; string T = t; }
+def SIGNED_BYTE : sat_type<"", "c">;
+def SIGNED_HALF : sat_type<"", "s">;
nit: just wondering if all these defs should be all capitals.
Comment at: clang/lib/CodeGen/CGBuiltin.cpp:7684
+if (TypeFlags.isInsertOp1SVALL())
+ Ops.insert([1], Builder.getInt32(31));
would this be the most appropriate place to add the useful sentence from the
description:
"Some ACLE builtins leave out the argument to specify the predicate
pattern, which is expected to be expanded to an SV_ALL pattern."
because that's what 31 is, right?
Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c:7
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
nit: used,unused -> "used/unused", or "used, unused"
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78401/new/
https://reviews.llvm.org/D78401
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[PATCH] D78401: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
sdesmalen created this revision.
sdesmalen added reviewers: efriedma, SjoerdMeijer.
Herald added a subscriber: tschuett.
Herald added a project: clang.
sdesmalen added a parent revision: D77597: [SveEmitter] Add IsAppendSVALL and
builtins for svptrue and svcnt[bhwd].
Some ACLE builtins leave out the argument to specify the predicate
pattern, which is expected to be expanded to an SV_ALL pattern.
This patch adds the flag IsInsertOp1SVALL to insert SV_ALL as the
second operand.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D78401
Files:
clang/include/clang/Basic/TargetBuiltins.h
clang/include/clang/Basic/arm_sve.td
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdech.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecw.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincb.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qinch.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
clang/utils/TableGen/SveEmitter.cpp
Index: clang/utils/TableGen/SveEmitter.cpp
===
--- clang/utils/TableGen/SveEmitter.cpp
+++ clang/utils/TableGen/SveEmitter.cpp
@@ -502,6 +502,7 @@
Bitwidth = 16;
ElementBitwidth = 1;
break;
+ case 's':
case 'a':
Bitwidth = ElementBitwidth;
NumVectors = 0;
Index: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
@@ -0,0 +1,155 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+#include
+
+int32_t test_svqincw_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 0);
+}
+
+int32_t test_svqincw_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 17);
+}
+
+int64_t test_svqincw_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 0);
+}
+
+int64_t test_svqincw_n_s64_1(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 17);
+}
+
+uint32_t test_svqincw_n_u32(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 0);
+}
+
+uint32_t test_svqincw_n_u32_1(uint32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 17);
+}
+
+uint64_t test_svqincw_n_u64(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 0);
+}
+
+uint64_t test_svqincw_n_u64_1(uint64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 17);
+}
+
+int32_t test_svqincw_pat_n_s32(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_POW2, 0);
+}
+
+int32_t test_svqincw_pat_n_s32_1(int32_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
+ return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL1, 17);
+}
+
+int64_t test_svqincw_pat_n_s64(int64_t op)
+{
+ // expected-error-re@+1 {{argument value {{[0-9]+}}
