[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-26 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 added a comment.

In D90009#2354849 , @kiranchandramohan 
wrote:

> I have added a fix to run the test only when the X86 target is available. 
> Please feel free to change if it is not the correct fix.
> https://github.com/llvm/llvm-project/commit/c551ba0e90bd2b49ef501d591f8362ba44e5484d

Thanks for your help!


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-26 Thread Kiran Chandramohan via Phabricator via cfe-commits 
kiranchandramohan added a comment.

I have added a fix to run the test only when the X86 target is available. 
Please feel free to change if it is not the correct fix.
https://github.com/llvm/llvm-project/commit/c551ba0e90bd2b49ef501d591f8362ba44e5484d


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-26 Thread Kiran Chandramohan via Phabricator via cfe-commits 
kiranchandramohan added a comment.

This change probably requires the X86 target.
// REQUIRES: x86-registered-target

Builds which target AArch64 only have been failing due to this change.
http://lab.llvm.org:8011/#/builders/32/builds/291


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-25 Thread LiuChen via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG180548c5c784: [X86] VEX/EVEX prefix doesn't work for 
inline assembly. (authored by LiuChen3).

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Files:
  clang/test/CodeGen/X86/att-inline-asm-prefix.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
  llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

Index: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
===
--- llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -346,6 +346,21 @@
 O << "\trepne\t";
   else if (Flags & X86::IP_HAS_REPEAT)
 O << "\trep\t";
+
+  // These all require a pseudo prefix
+  if (Flags & X86::IP_USE_VEX)
+O << "\t{vex}";
+  else if (Flags & X86::IP_USE_VEX2)
+O << "\t{vex2}";
+  else if (Flags & X86::IP_USE_VEX3)
+O << "\t{vex3}";
+  else if (Flags & X86::IP_USE_EVEX)
+O << "\t{evex}";
+
+  if (Flags & X86::IP_USE_DISP8)
+O << "\t{disp8}";
+  else if (Flags & X86::IP_USE_DISP32)
+O << "\t{disp32}";
 }
 
 void X86InstPrinterCommon::printVKPair(const MCInst *MI, unsigned OpNo,
Index: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
===
--- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -55,15 +55,18 @@
   /// The constants to describe instr prefixes if there are
   enum IPREFIXES {
 IP_NO_PREFIX = 0,
-IP_HAS_OP_SIZE = 1,
-IP_HAS_AD_SIZE = 2,
-IP_HAS_REPEAT_NE = 4,
-IP_HAS_REPEAT = 8,
-IP_HAS_LOCK = 16,
-IP_HAS_NOTRACK = 32,
-IP_USE_VEX3 = 64,
-IP_USE_DISP8 = 128,
-IP_USE_DISP32 = 256,
+IP_HAS_OP_SIZE =   1U << 0,
+IP_HAS_AD_SIZE =   1U << 1,
+IP_HAS_REPEAT_NE = 1U << 2,
+IP_HAS_REPEAT =1U << 3,
+IP_HAS_LOCK =  1U << 4,
+IP_HAS_NOTRACK =   1U << 5,
+IP_USE_VEX =   1U << 6,
+IP_USE_VEX2 =  1U << 7,
+IP_USE_VEX3 =  1U << 8,
+IP_USE_EVEX =  1U << 9,
+IP_USE_DISP8 = 1U << 10,
+IP_USE_DISP32 =1U << 11,
   };
 
   enum OperandType : unsigned {
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -83,6 +83,7 @@
   enum VEXEncoding {
 VEXEncoding_Default,
 VEXEncoding_VEX,
+VEXEncoding_VEX2,
 VEXEncoding_VEX3,
 VEXEncoding_EVEX,
   };
@@ -2818,8 +2819,10 @@
 return Error(Parser.getTok().getLoc(), "Expected '}'");
   Parser.Lex(); // Eat curly.
 
-  if (Prefix == "vex" || Prefix == "vex2")
+  if (Prefix == "vex")
 ForcedVEXEncoding = VEXEncoding_VEX;
+  else if (Prefix == "vex2")
+ForcedVEXEncoding = VEXEncoding_VEX2;
   else if (Prefix == "vex3")
 ForcedVEXEncoding = VEXEncoding_VEX3;
   else if (Prefix == "evex")
@@ -3837,6 +3840,7 @@
 return Match_Unsupported;
 
   if ((ForcedVEXEncoding == VEXEncoding_VEX ||
+   ForcedVEXEncoding == VEXEncoding_VEX2 ||
ForcedVEXEncoding == VEXEncoding_VEX3) &&
   (MCID.TSFlags & X86II::EncodingMask) != X86II::VEX)
 return Match_Unsupported;
@@ -3879,10 +3883,16 @@
 
   MCInst Inst;
 
-  // If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
-  // encoder.
-  if (ForcedVEXEncoding == VEXEncoding_VEX3)
+  // If VEX/EVEX encoding is forced, we need to pass the USE_* flag to the
+  // encoder and printer.
+  if (ForcedVEXEncoding == VEXEncoding_VEX)
+Prefixes |= X86::IP_USE_VEX;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX2)
+Prefixes |= X86::IP_USE_VEX2;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX3)
 Prefixes |= X86::IP_USE_VEX3;
+  else if (ForcedVEXEncoding == VEXEncoding_EVEX)
+Prefixes |= X86::IP_USE_EVEX;
 
   // Set encoded flags for {disp8} and {disp32}.
   if (ForcedDispEncoding == DispEncoding_Disp8)
Index: clang/test/CodeGen/X86/att-inline-asm-prefix.c
===
--- /dev/null
+++ clang/test/CodeGen/X86/att-inline-asm-prefix.c
@@ -0,0 +1,25 @@
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -S -o -  | FileCheck %s -check-prefix CHECK
+
+// This test is to check if the prefix in inline assembly is correctly
+// preserved.
+
+void check_inline_prefix(void) {
+  __asm__ (
+// CHECK: vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex2} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex3} vcvtps2pd %xmm0, %xmm1
+// CHECK: {evex} vcvtps2pd %xmm0, %xm

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-24 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-23 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 added inline comments.



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:352
+  if (Flags & X86::Force_VEXEncoding)
+O << "\t{vex}";
+  else if (Flags & X86::Force_VEX2Encoding)

pengfei wrote:
> `"\t{vex}\t"` ?
No "\t" needed to add to the end of prefix. The printer will handle it 
correctly. 


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-23 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 updated this revision to Diff 300188.
LiuChen3 added a comment.

Address comments


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Files:
  clang/test/CodeGen/X86/att-inline-asm-prefix.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
  llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

Index: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
===
--- llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -346,6 +346,21 @@
 O << "\trepne\t";
   else if (Flags & X86::IP_HAS_REPEAT)
 O << "\trep\t";
+
+  // These all require a pseudo prefix
+  if (Flags & X86::IP_USE_VEX)
+O << "\t{vex}";
+  else if (Flags & X86::IP_USE_VEX2)
+O << "\t{vex2}";
+  else if (Flags & X86::IP_USE_VEX3)
+O << "\t{vex3}";
+  else if (Flags & X86::IP_USE_EVEX)
+O << "\t{evex}";
+
+  if (Flags & X86::IP_USE_DISP8)
+O << "\t{disp8}";
+  else if (Flags & X86::IP_USE_DISP32)
+O << "\t{disp32}";
 }
 
 void X86InstPrinterCommon::printVKPair(const MCInst *MI, unsigned OpNo,
Index: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
===
--- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -55,15 +55,18 @@
   /// The constants to describe instr prefixes if there are
   enum IPREFIXES {
 IP_NO_PREFIX = 0,
-IP_HAS_OP_SIZE = 1,
-IP_HAS_AD_SIZE = 2,
-IP_HAS_REPEAT_NE = 4,
-IP_HAS_REPEAT = 8,
-IP_HAS_LOCK = 16,
-IP_HAS_NOTRACK = 32,
-IP_USE_VEX3 = 64,
-IP_USE_DISP8 = 128,
-IP_USE_DISP32 = 256,
+IP_HAS_OP_SIZE =   1U << 0,
+IP_HAS_AD_SIZE =   1U << 1,
+IP_HAS_REPEAT_NE = 1U << 2,
+IP_HAS_REPEAT =1U << 3,
+IP_HAS_LOCK =  1U << 4,
+IP_HAS_NOTRACK =   1U << 5,
+IP_USE_VEX =   1U << 6,
+IP_USE_VEX2 =  1U << 7,
+IP_USE_VEX3 =  1U << 8,
+IP_USE_EVEX =  1U << 9,
+IP_USE_DISP8 = 1U << 10,
+IP_USE_DISP32 =1U << 11,
   };
 
   enum OperandType : unsigned {
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -83,6 +83,7 @@
   enum VEXEncoding {
 VEXEncoding_Default,
 VEXEncoding_VEX,
+VEXEncoding_VEX2,
 VEXEncoding_VEX3,
 VEXEncoding_EVEX,
   };
@@ -2818,8 +2819,10 @@
 return Error(Parser.getTok().getLoc(), "Expected '}'");
   Parser.Lex(); // Eat curly.
 
-  if (Prefix == "vex" || Prefix == "vex2")
+  if (Prefix == "vex")
 ForcedVEXEncoding = VEXEncoding_VEX;
+  else if (Prefix == "vex2")
+ForcedVEXEncoding = VEXEncoding_VEX2;
   else if (Prefix == "vex3")
 ForcedVEXEncoding = VEXEncoding_VEX3;
   else if (Prefix == "evex")
@@ -3837,6 +3840,7 @@
 return Match_Unsupported;
 
   if ((ForcedVEXEncoding == VEXEncoding_VEX ||
+   ForcedVEXEncoding == VEXEncoding_VEX2 ||
ForcedVEXEncoding == VEXEncoding_VEX3) &&
   (MCID.TSFlags & X86II::EncodingMask) != X86II::VEX)
 return Match_Unsupported;
@@ -3879,10 +3883,16 @@
 
   MCInst Inst;
 
-  // If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
-  // encoder.
-  if (ForcedVEXEncoding == VEXEncoding_VEX3)
+  // If VEX/EVEX encoding is forced, we need to pass the USE_* flag to the
+  // encoder and printer.
+  if (ForcedVEXEncoding == VEXEncoding_VEX)
+Prefixes |= X86::IP_USE_VEX;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX2)
+Prefixes |= X86::IP_USE_VEX2;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX3)
 Prefixes |= X86::IP_USE_VEX3;
+  else if (ForcedVEXEncoding == VEXEncoding_EVEX)
+Prefixes |= X86::IP_USE_EVEX;
 
   // Set encoded flags for {disp8} and {disp32}.
   if (ForcedDispEncoding == DispEncoding_Disp8)
Index: clang/test/CodeGen/X86/att-inline-asm-prefix.c
===
--- /dev/null
+++ clang/test/CodeGen/X86/att-inline-asm-prefix.c
@@ -0,0 +1,25 @@
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -S -o -  | FileCheck %s -check-prefix CHECK
+
+// This test is to check if the prefix in inline assembly is correctly
+// preserved.
+
+void check_inline_prefix(void) {
+  __asm__ (
+// CHECK: vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex2} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex3} vcvtps2pd %xmm0, %xmm1
+// CHECK: {evex} vcvtps2pd %xmm0, %xmm1
+// CHECK: movl $1, (%rax)
+// CHECK: {disp8}  movl $1, (%rax)
+// CHECK: {disp32} movl $1, (%rax)
+"vcvtps2pd %xmm0, %xmm1\n\t"
+"{vex} vcvt

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896
+// encoder.
 Prefixes |= X86::IP_USE_VEX3;
+Prefixes |= X86::Force_VEX3Encoding;

craig.topper wrote:
> LiuChen3 wrote:
> > craig.topper wrote:
> > > Why do we need Force_VEX3Encoding and IP_USE_VEX3?
> > I think this will make all of IP_USE_VEX3 the 3-byte vex prefix instruction 
> > output with {vex3}. The IP_USE_VEX3 is for encoder.
> Isn't this the only place we set IP_USE_VEX3?
Yes. I think it's reasonable to use this flag only. And naming other Force_*  
to   IP_USE_* .


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896
+// encoder.
 Prefixes |= X86::IP_USE_VEX3;
+Prefixes |= X86::Force_VEX3Encoding;

LiuChen3 wrote:
> craig.topper wrote:
> > Why do we need Force_VEX3Encoding and IP_USE_VEX3?
> I think this will make all of IP_USE_VEX3 the 3-byte vex prefix instruction 
> output with {vex3}. The IP_USE_VEX3 is for encoder.
Isn't this the only place we set IP_USE_VEX3?


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 added inline comments.



Comment at: clang/test/CodeGen/X86/att-inline-asm-prefix.c:14
+"{vex2} vcvtps2pd %xmm0, %xmm1\n\t"
+"{vex3} vcvtps2pd %xmm0, %xmm1\n\t"
+"{evex} vcvtps2pd %xmm0, %xmm1\n\t"

> Does this bug only effect the printing of inline assembly to a .s file? 

Yes. Using "-c" to out .o file directly will get right encoding.

But if we firstly output the .s file and then compile it, the end encoding is 
wrong. For this example, it will all be two-byte vex prefix.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896
+// encoder.
 Prefixes |= X86::IP_USE_VEX3;
+Prefixes |= X86::Force_VEX3Encoding;

craig.topper wrote:
> Why do we need Force_VEX3Encoding and IP_USE_VEX3?
I think this will make all of IP_USE_VEX3 the 3-byte vex prefix instruction 
output with {vex3}. The IP_USE_VEX3 is for encoder.


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added a comment.

Does this bug only effect the printing of inline assembly to a .s file? The 
encoder should work correctly even without this I think?


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:358
+  else if (Flags & X86::Force_EVEXEncoding)
+O << "\t{evex}";
 }

We also need to print {disp8} and {disp32} here to fix the same bug with those 
right?


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:354
+  else if (Flags & X86::Force_VEX2Encoding)
+O << "\t{vex2}";
+  else if (Flags & X86::Force_VEX3Encoding)

craig.topper wrote:
> Is it important that we use {vex2} instead of just treating it as {vex}?
I guess we'd actually have to print {vex2} instead of {vex} for compatibility 
with older versions of GNU assember that don't support {vex}. So I guess maybe 
they should be different as much as I hate wasting flags


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896
+// encoder.
 Prefixes |= X86::IP_USE_VEX3;
+Prefixes |= X86::Force_VEX3Encoding;

Why do we need Force_VEX3Encoding and IP_USE_VEX3?



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:67
+IP_USE_DISP32 = 1U << 8,
+Force_VEXEncoding = 1U << 9,
+Force_VEX2Encoding = 1U << 10,

Why don't these start with IP_?



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:354
+  else if (Flags & X86::Force_VEX2Encoding)
+O << "\t{vex2}";
+  else if (Flags & X86::Force_VEX3Encoding)

Is it important that we use {vex2} instead of just treating it as {vex}?


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2824
 ForcedVEXEncoding = VEXEncoding_VEX;
+  else if (Prefix == "vex2")
+ForcedVEXEncoding = VEXEncoding_VEX2;

pengfei wrote:
> I think it's reasonable if we generate "{vex}" for input "{vex2}"
GCC will out put {vex2} if the input is {vex2}.


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei added inline comments.



Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2824
 ForcedVEXEncoding = VEXEncoding_VEX;
+  else if (Prefix == "vex2")
+ForcedVEXEncoding = VEXEncoding_VEX2;

I think it's reasonable if we generate "{vex}" for input "{vex2}"


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  rG LLVM Github Monorepo

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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei added inline comments.



Comment at: clang/test/CodeGen/X86/att-inline-asm-prefix.c:12
+// CHECK: {evex} vcvtps2pd %xmm0, %xmm1
+"{vex} vcvtps2pd %xmm0, %xmm1\n\t"
+"{vex2} vcvtps2pd %xmm0, %xmm1\n\t"

Better adding a no prefix one.



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:57-70
 IP_NO_PREFIX = 0,
-IP_HAS_OP_SIZE = 1,
-IP_HAS_AD_SIZE = 2,
-IP_HAS_REPEAT_NE = 4,
-IP_HAS_REPEAT = 8,
-IP_HAS_LOCK = 16,
-IP_HAS_NOTRACK = 32,
-IP_USE_VEX3 = 64,
-IP_USE_DISP8 = 128,
-IP_USE_DISP32 = 256,
+IP_HAS_OP_SIZE = 1U << 0,
+IP_HAS_AD_SIZE = 1U << 1,
+IP_HAS_REPEAT_NE = 1U << 2,
+IP_HAS_REPEAT = 1U << 3,
+IP_HAS_LOCK = 1U << 4,
+IP_HAS_NOTRACK = 1U << 5,

Can we make these `= 1U <<` aligned?



Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:352
+  if (Flags & X86::Force_VEXEncoding)
+O << "\t{vex}";
+  else if (Flags & X86::Force_VEX2Encoding)

`"\t{vex}\t"` ?


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[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

2020-10-22 Thread LiuChen via Phabricator via cfe-commits 
LiuChen3 created this revision.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya.
Herald added projects: clang, LLVM.
LiuChen3 requested review of this revision.

For now, we lost the encoding information if we using inline assembly.
The encoding for the inline assembly will keep default even if we add
the vex/evex prefix.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90009

Files:
  clang/test/CodeGen/X86/att-inline-asm-prefix.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
  llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

Index: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
===
--- llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -346,6 +346,16 @@
 O << "\trepne\t";
   else if (Flags & X86::IP_HAS_REPEAT)
 O << "\trep\t";
+
+  // These all require a pseudo prefix
+  if (Flags & X86::Force_VEXEncoding)
+O << "\t{vex}";
+  else if (Flags & X86::Force_VEX2Encoding)
+O << "\t{vex2}";
+  else if (Flags & X86::Force_VEX3Encoding)
+O << "\t{vex3}";
+  else if (Flags & X86::Force_EVEXEncoding)
+O << "\t{evex}";
 }
 
 void X86InstPrinterCommon::printVKPair(const MCInst *MI, unsigned OpNo,
Index: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
===
--- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -55,15 +55,19 @@
   /// The constants to describe instr prefixes if there are
   enum IPREFIXES {
 IP_NO_PREFIX = 0,
-IP_HAS_OP_SIZE = 1,
-IP_HAS_AD_SIZE = 2,
-IP_HAS_REPEAT_NE = 4,
-IP_HAS_REPEAT = 8,
-IP_HAS_LOCK = 16,
-IP_HAS_NOTRACK = 32,
-IP_USE_VEX3 = 64,
-IP_USE_DISP8 = 128,
-IP_USE_DISP32 = 256,
+IP_HAS_OP_SIZE = 1U << 0,
+IP_HAS_AD_SIZE = 1U << 1,
+IP_HAS_REPEAT_NE = 1U << 2,
+IP_HAS_REPEAT = 1U << 3,
+IP_HAS_LOCK = 1U << 4,
+IP_HAS_NOTRACK = 1U << 5,
+IP_USE_VEX3 = 1U << 6,
+IP_USE_DISP8 = 1U << 7,
+IP_USE_DISP32 = 1U << 8,
+Force_VEXEncoding = 1U << 9,
+Force_VEX2Encoding = 1U << 10,
+Force_VEX3Encoding = 1U << 11,
+Force_EVEXEncoding = 1U << 12,
   };
 
   enum OperandType : unsigned {
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -83,6 +83,7 @@
   enum VEXEncoding {
 VEXEncoding_Default,
 VEXEncoding_VEX,
+VEXEncoding_VEX2,
 VEXEncoding_VEX3,
 VEXEncoding_EVEX,
   };
@@ -2818,8 +2819,10 @@
 return Error(Parser.getTok().getLoc(), "Expected '}'");
   Parser.Lex(); // Eat curly.
 
-  if (Prefix == "vex" || Prefix == "vex2")
+  if (Prefix == "vex")
 ForcedVEXEncoding = VEXEncoding_VEX;
+  else if (Prefix == "vex2")
+ForcedVEXEncoding = VEXEncoding_VEX2;
   else if (Prefix == "vex3")
 ForcedVEXEncoding = VEXEncoding_VEX3;
   else if (Prefix == "evex")
@@ -3837,6 +3840,7 @@
 return Match_Unsupported;
 
   if ((ForcedVEXEncoding == VEXEncoding_VEX ||
+   ForcedVEXEncoding == VEXEncoding_VEX2 ||
ForcedVEXEncoding == VEXEncoding_VEX3) &&
   (MCID.TSFlags & X86II::EncodingMask) != X86II::VEX)
 return Match_Unsupported;
@@ -3879,10 +3883,19 @@
 
   MCInst Inst;
 
-  // If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
-  // encoder.
-  if (ForcedVEXEncoding == VEXEncoding_VEX3)
+  // Passing the prefix info to Printer if VEX or EVEX encoding is forced.
+  if (ForcedVEXEncoding == VEXEncoding_VEX)
+Prefixes |= X86::Force_VEXEncoding;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX2)
+Prefixes |= X86::Force_VEX2Encoding;
+  else if (ForcedVEXEncoding == VEXEncoding_EVEX)
+Prefixes |= X86::Force_EVEXEncoding;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX3) {
+// If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
+// encoder.
 Prefixes |= X86::IP_USE_VEX3;
+Prefixes |= X86::Force_VEX3Encoding;
+  }
 
   // Set encoded flags for {disp8} and {disp32}.
   if (ForcedDispEncoding == DispEncoding_Disp8)
Index: clang/test/CodeGen/X86/att-inline-asm-prefix.c
===
--- /dev/null
+++ clang/test/CodeGen/X86/att-inline-asm-prefix.c
@@ -0,0 +1,17 @@
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -S -o -  | FileCheck %s -check-prefix CHECK
+
+// This test is to check if the prefix in inline assembly is correctly
+// preserved.
+
+void check_inline_prefix(void) {
+  __asm__ (
+// CHECK: {vex} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex2} vcvtps2pd %xmm0, %xmm1
+// CHECK: {vex3} vcvtps2p