[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-21 Thread LLVM Continuous Integration via cfe-commits 

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clang-x86_64-debian-fast` 
running on `gribozavr4` while building `clang` at step 6 
"test-build-unified-tree-check-all".

Full details are available at: 
https://lab.llvm.org/buildbot/#/builders/56/builds/573

Here is the relevant piece of the build log for the reference:
```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
 TEST 'Clang :: 
CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c' FAILED 

Exit Code: 1

Command Output (stderr):
--
RUN: at line 3: /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 
-internal-isystem /b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include 
-nostdsysteminc -fclang-abi-compat=latest -triple aarch64 -target-feature +sve 
-target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
 | /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S 
-passes=mem2reg,tailcallelim | 
/b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 -internal-isystem 
/b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include -nostdsysteminc 
-fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature 
+bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S -passes=mem2reg,tailcallelim
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
RUN: at line 4: /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 
-internal-isystem /b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include 
-nostdsysteminc -fclang-abi-compat=latest -triple aarch64 -target-feature +sve 
-target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
 | /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S 
-passes=mem2reg,tailcallelim | 
/b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
 -check-prefix=CPP-CHECK
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S -passes=mem2reg,tailcallelim
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 -internal-isystem 
/b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include -nostdsysteminc 
-fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature 
+bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
 -check-prefix=CPP-CHECK
RUN: at line 5: /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 
-internal-isystem /b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include 
-nostdsysteminc -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
 | /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S 
-passes=mem2reg,tailcallelim | 
/b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -S -passes=mem2reg,tailcallelim
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 -internal-isystem 
/b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include -nostdsysteminc 
-fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 
-target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall 
-emit-llvm -o - 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
RUN: at line 6: /b/1/clang-x86_64-debian-fast/llvm.obj/bin/clang -cc1 
-internal-isystem /b/1/clang-x86_64-debian-fast/llvm.obj/lib/clang/19/include 
-nostdsysteminc -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - -x c++ 
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/CodeGen/aarch64-sve-intrinsics/

[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-21 Thread Sander de Smalen via cfe-commits 

https://github.com/sdesmalen-arm closed 
https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Amara Emerson via cfe-commits 


@@ -17,7 +25,7 @@
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
 // CPP-CHECK-NEXT:ret i64 [[TMP1]]
 //
-uint64_t test_svcntb()
+uint64_t test_svcntb(void) MODE_ATTR

aemerson wrote:

Why is that restriction there? We often run into confusion when `int foo() 
__arm_streaming;` and the like is used.

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm approved this pull request.


https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Sander de Smalen via cfe-commits 


@@ -17,7 +25,7 @@
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
 // CPP-CHECK-NEXT:ret i64 [[TMP1]]
 //
-uint64_t test_svcntb()
+uint64_t test_svcntb(void) MODE_ATTR

sdesmalen-arm wrote:

I don't think so.

The ACLE describes that the SME keyword attributes cannot be used with K&R 
unprototyped C functions, 
https://github.com/ARM-software/acle/blob/main/main/acle.md#sme-keyword-attributes

Clang gives a clear diagnostic describing the issue:  
https://godbolt.org/z/7GabEWro1

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 


@@ -1781,7 +1781,13 @@ void SVEEmitter::createStreamingAttrs(raw_ostream &OS, 
ACLEKind Kind) {
   uint64_t VerifyRuntimeMode = getEnumValueForFlag("VerifyRuntimeMode");
   uint64_t IsStreamingCompatibleFlag =
   getEnumValueForFlag("IsStreamingCompatible");
+
   for (auto &Def : Defs) {
+if (!Def->isFlagSet(VerifyRuntimeMode) &&
+(Def->getGuard().contains("sve") + Def->getGuard().contains("sme")) ==
+2)

paulwalker-arm wrote:

Surely this is just
```
if (!Def->isFlagSet(VerifyRuntimeMode) && Def->getGuard().contains("sve") && 
Def->getGuard().contains("sme"))
```
isn't it?

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 


@@ -2264,6 +2278,18 @@ let TargetGuard = "sve2p1" in {
   defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl", 
"aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>;
 }
 
+let TargetGuard = "sve2p1|sme2p1" in {
+  // DUPQ
+  def SVDUP_LANEQ_B  : SInst<"svdup_laneq[_{d}]", "ddi",  "cUc", MergeNone, 
"aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_15>]>;
+  def SVDUP_LANEQ_H  : SInst<"svdup_laneq[_{d}]", "ddi",  "sUsh", MergeNone, 
"aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_7>]>;
+  def SVDUP_LANEQ_S  : SInst<"svdup_laneq[_{d}]", "ddi",  "iUif", MergeNone, 
"aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_3>]>;
+  def SVDUP_LANEQ_D  : SInst<"svdup_laneq[_{d}]", "ddi",  "lUld", MergeNone, 
"aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_1>]>;
+}
+
+let TargetGuard = "(sve2p1|sme2),bf16" in {

paulwalker-arm wrote:

This should match the above and thus be "(sve2p1|sme2p1),bf16".

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm commented:

With the change of default it's very hard to check everything but we've already 
agreed  there'll need to be a full audit once all the inflight work has landed. 
 I did spot one thing though:

Should the integer svclamp and svrevd builtins be protected by "sve2p1|sme" 
rather than "sve2p1|sme2"?

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 


@@ -286,17 +290,20 @@ let TargetGuard = "sve,f64mm,bf16" in {
 }
 
 let TargetGuard = "sve,bf16" in {
+  def SVBFMMLA   : SInst<"svbfmmla[_{0}]",   "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmmla",   [IsOverloadNone]>;
+}
+
+let TargetGuard = "(sve|sme),bf16" in {
   def SVBFDOT: SInst<"svbfdot[_{0}]","MMdd",  "b", MergeNone, 
"aarch64_sve_bfdot",[IsOverloadNone, VerifyRuntimeMode]>;
   def SVBFMLALB  : SInst<"svbfmlalb[_{0}]",  "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmlalb",  [IsOverloadNone, VerifyRuntimeMode]>;
   def SVBFMLALT  : SInst<"svbfmlalt[_{0}]",  "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmlalt",  [IsOverloadNone, VerifyRuntimeMode]>;
-  def SVBFMMLA   : SInst<"svbfmmla[_{0}]",   "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmmla",   [IsOverloadNone, VerifyRuntimeMode]>;
   def SVBFDOT_N  : SInst<"svbfdot[_n_{0}]",  "MMda",  "b", MergeNone, 
"aarch64_sve_bfdot",[IsOverloadNone, VerifyRuntimeMode]>;
   def SVBFMLAL_N : SInst<"svbfmlalb[_n_{0}]","MMda",  "b", MergeNone, 
"aarch64_sve_bfmlalb",  [IsOverloadNone, VerifyRuntimeMode]>;

paulwalker-arm wrote:

Not relevant to this patch but there's a typo here `SVBFMLAL_N` should 
`SVBFMLALB_N`.

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm edited 
https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-20 Thread Paul Walker via cfe-commits 


@@ -17,7 +25,7 @@
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
 // CPP-CHECK-NEXT:ret i64 [[TMP1]]
 //
-uint64_t test_svcntb()
+uint64_t test_svcntb(void) MODE_ATTR

paulwalker-arm wrote:

Is there a problem we need to worry about with using the SME keywords with `()` 
functions?

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-19 Thread Sander de Smalen via cfe-commits 


@@ -1781,7 +1781,12 @@ void SVEEmitter::createStreamingAttrs(raw_ostream &OS, 
ACLEKind Kind) {
   uint64_t VerifyRuntimeMode = getEnumValueForFlag("VerifyRuntimeMode");
   uint64_t IsStreamingCompatibleFlag =
   getEnumValueForFlag("IsStreamingCompatible");
+
   for (auto &Def : Defs) {
+assertDef->getGuard().contains("sve") +
+  Def->getGuard().contains("sme")) <= 1) ||
+Def->isFlagSet(VerifyRuntimeMode)) &&

sdesmalen-arm wrote:

Yes that makes sense. Done.

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-19 Thread Sander de Smalen via cfe-commits 


@@ -2264,6 +2278,18 @@ let TargetGuard = "sve2p1" in {
   defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl", 
"aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>;
 }
 
+let TargetGuard = "sve2p1|sme2" in {

sdesmalen-arm wrote:

Good spot!

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-19 Thread Sander de Smalen via cfe-commits 


@@ -286,10 +290,13 @@ let TargetGuard = "sve,f64mm,bf16" in {
 }
 
 let TargetGuard = "sve,bf16" in {
+  def SVBFMMLA   : SInst<"svbfmmla[_{0}]",   "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmmla",   [IsOverloadNone]>;
+}
+
+let TargetGuard = "(sve,bf16)|sme" in {

sdesmalen-arm wrote:

> Looking at the specification suggests this should be (sve|sme),bf16?

`+sme` implies `+bf16`, so this is equivalent, although I guess that when 
modelling it with `(sve,bf16)|sme`, Clang would still accept the builtin with 
`+sme,+nobf16`, even though LLVM will fail to select.

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm edited 
https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm edited 
https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 


@@ -286,10 +290,13 @@ let TargetGuard = "sve,f64mm,bf16" in {
 }
 
 let TargetGuard = "sve,bf16" in {
+  def SVBFMMLA   : SInst<"svbfmmla[_{0}]",   "MMdd",  "b", MergeNone, 
"aarch64_sve_bfmmla",   [IsOverloadNone]>;
+}
+
+let TargetGuard = "(sve,bf16)|sme" in {

paulwalker-arm wrote:

Looking at the specification suggests this should be `(sve|sme),bf16`?

 
Also, the closing `}` could do with a matching comment.

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 


@@ -1781,7 +1781,12 @@ void SVEEmitter::createStreamingAttrs(raw_ostream &OS, 
ACLEKind Kind) {
   uint64_t VerifyRuntimeMode = getEnumValueForFlag("VerifyRuntimeMode");
   uint64_t IsStreamingCompatibleFlag =
   getEnumValueForFlag("IsStreamingCompatible");
+
   for (auto &Def : Defs) {
+assertDef->getGuard().contains("sve") +
+  Def->getGuard().contains("sme")) <= 1) ||
+Def->isFlagSet(VerifyRuntimeMode)) &&

paulwalker-arm wrote:

Given this is a build time error that represents a bug in `arm_sve.td`, do you 
think it's worth using `llvm_unreachable` rather than an assert?

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm edited 
https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 


@@ -2264,6 +2278,18 @@ let TargetGuard = "sve2p1" in {
   defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl", 
"aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>;
 }
 
+let TargetGuard = "sve2p1|sme2" in {

paulwalker-arm wrote:

I think this is a sme2p1 feature?

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-18 Thread Paul Walker via cfe-commits 

https://github.com/paulwalker-arm commented:

Not for this patch but I do wonder if there's value in protecting non-bf16 
instruction backed builtins (e.g. loadstone and shuffles) with the bf16 target 
guard.  I figure we'll either error on the use of the `svbfloat` type or the 
code generation should just work and thus there's be no reason to artificially 
restrict user code. 

https://github.com/llvm/llvm-project/pull/95787
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[clang] [Clang][AArch64] Expose compatible SVE intrinsics with only +sme (PR #95787)

2024-06-17 Thread via cfe-commits 

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Sander de Smalen (sdesmalen-arm)


Changes

This allows code with SVE intrinsics to be compiled with +sme,+nosve,   




assuming the encompassing function is in the correct mode (see #93802)  





---

Patch is 2.45 MiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/95787.diff


227 Files Affected:

- (modified) clang/include/clang/Basic/arm_sve.td (+72-46) 
- (modified) clang/include/clang/Basic/arm_sve_sme_incl.td (+1-1) 
- (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c (+74-66) 
- (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c (+29-21) 
- (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c (+13-5) 
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