[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-10 Thread Paul T Robinson via cfe-commits 

https://github.com/pogo59 created 
https://github.com/llvm/llvm-project/pull/77686

ia32intrin.h gets descriptions for all remaining non-privileged intrinsic 
functions; the macros providing alternate names are not described. immintrin.h 
ditto, except for the InterlockedExchange functions.

>From 39a884d27f56772a222d352665be95194716beff Mon Sep 17 00:00:00 2001
From: Paul Robinson 
Date: Wed, 10 Jan 2024 10:42:24 -0800
Subject: [PATCH] [Headers][X86] Add more descriptions to ia32intrin.h and
 immintrin.h

ia32intrin.h gets descriptions for all remaining non-privileged intrinsic
functions; the macros providing alternate names are not described.
immintrin.h ditto, except for the Interlocked Exchange functions.
---
 clang/lib/Headers/ia32intrin.h | 172 -
 clang/lib/Headers/immintrin.h  |  57 +++
 2 files changed, 227 insertions(+), 2 deletions(-)

diff --git a/clang/lib/Headers/ia32intrin.h b/clang/lib/Headers/ia32intrin.h
index a8b59dfaad8980..39013e1a5bd0dd 100644
--- a/clang/lib/Headers/ia32intrin.h
+++ b/clang/lib/Headers/ia32intrin.h
@@ -58,7 +58,7 @@ __bsrd(int __A) {
   return 31 - __builtin_clz((unsigned int)__A);
 }
 
-/// Swaps the bytes in the input. Converting little endian to big endian or
+/// Swaps the bytes in the input, converting little endian to big endian or
 ///vice versa.
 ///
 /// \headerfile 
@@ -73,6 +73,16 @@ __bswapd(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
 }
 
+/// Swaps the bytes in the input, converting little endian to big endian or
+///vice versa.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c BSWAP instruction.
+///
+/// \param __A
+///A 32-bit integer operand.
+/// \returns A 32-bit integer containing the swapped bytes.
 static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
 _bswap(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
@@ -173,12 +183,29 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.
+///
+/// \returns The 64-bit value of the RFLAGS register.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u64();
 }
 
+/// Writes the specified value to the program status and control \c RFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHQ + \c POPFQ instruction sequence.
+///
+/// \param __f
+///The 64-bit value to write to \c RFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned long long __f)
 {
@@ -186,12 +213,29 @@ __writeeflags(unsigned long long __f)
 }
 
 #else /* !__x86_64__ */
+/// Returns the program status and control \c EFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFD + \c POPD instruction sequence.
+///
+/// \returns The 32-bit value of the EFLAGS register.
 static __inline__ unsigned int __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u32();
 }
 
+/// Writes the specified value to the program status and control \c EFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHD + \c POPFD instruction sequence.
+///
+/// \param __f
+///The 32-bit value to write to \c EFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned int __f)
 {
@@ -341,12 +385,32 @@ __crc32q(unsigned long long __C, unsigned long long __D)
 }
 #endif /* __x86_64__ */
 
+/// Reads the specified performance monitoring counter. Refer to your
+///processor's documentation to determine which performance counters are
+///supported.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDPMC instruction.
+///
+/// \param __A
+///The performance counter to read.
+/// \returns The 64-bit value read from the performance counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdpmc(int __A) {
   return __builtin_ia32_rdpmc(__A);
 }
 
-/* __rdtscp */
+/// Reads the processor's time stamp counter and the \c IA32_TSC_AUX MSR
+///\c (0xc103).
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDTSCP instruction.
+///
+/// \param __A
+///Address of where to store the 32-bit \c IA32_TSC_AUX value.
+/// \returns The 64-bit value of the time stamp counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdtscp(unsigned int *__A) {
   return __builtin_ia32_rdtscp(__A);
@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///

[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-10 Thread via cfe-commits 

llvmbot wrote:




@llvm/pr-subscribers-backend-x86

Author: Paul T Robinson (pogo59)


Changes

ia32intrin.h gets descriptions for all remaining non-privileged intrinsic 
functions; the macros providing alternate names are not described. immintrin.h 
ditto, except for the InterlockedExchange functions.

---
Full diff: https://github.com/llvm/llvm-project/pull/77686.diff


2 Files Affected:

- (modified) clang/lib/Headers/ia32intrin.h (+170-2) 
- (modified) clang/lib/Headers/immintrin.h (+57) 


``diff
diff --git a/clang/lib/Headers/ia32intrin.h b/clang/lib/Headers/ia32intrin.h
index a8b59dfaad8980..39013e1a5bd0dd 100644
--- a/clang/lib/Headers/ia32intrin.h
+++ b/clang/lib/Headers/ia32intrin.h
@@ -58,7 +58,7 @@ __bsrd(int __A) {
   return 31 - __builtin_clz((unsigned int)__A);
 }
 
-/// Swaps the bytes in the input. Converting little endian to big endian or
+/// Swaps the bytes in the input, converting little endian to big endian or
 ///vice versa.
 ///
 /// \headerfile 
@@ -73,6 +73,16 @@ __bswapd(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
 }
 
+/// Swaps the bytes in the input, converting little endian to big endian or
+///vice versa.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c BSWAP instruction.
+///
+/// \param __A
+///A 32-bit integer operand.
+/// \returns A 32-bit integer containing the swapped bytes.
 static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
 _bswap(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
@@ -173,12 +183,29 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.
+///
+/// \returns The 64-bit value of the RFLAGS register.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u64();
 }
 
+/// Writes the specified value to the program status and control \c RFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHQ + \c POPFQ instruction sequence.
+///
+/// \param __f
+///The 64-bit value to write to \c RFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned long long __f)
 {
@@ -186,12 +213,29 @@ __writeeflags(unsigned long long __f)
 }
 
 #else /* !__x86_64__ */
+/// Returns the program status and control \c EFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFD + \c POPD instruction sequence.
+///
+/// \returns The 32-bit value of the EFLAGS register.
 static __inline__ unsigned int __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u32();
 }
 
+/// Writes the specified value to the program status and control \c EFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHD + \c POPFD instruction sequence.
+///
+/// \param __f
+///The 32-bit value to write to \c EFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned int __f)
 {
@@ -341,12 +385,32 @@ __crc32q(unsigned long long __C, unsigned long long __D)
 }
 #endif /* __x86_64__ */
 
+/// Reads the specified performance monitoring counter. Refer to your
+///processor's documentation to determine which performance counters are
+///supported.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDPMC instruction.
+///
+/// \param __A
+///The performance counter to read.
+/// \returns The 64-bit value read from the performance counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdpmc(int __A) {
   return __builtin_ia32_rdpmc(__A);
 }
 
-/* __rdtscp */
+/// Reads the processor's time stamp counter and the \c IA32_TSC_AUX MSR
+///\c (0xc103).
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDTSCP instruction.
+///
+/// \param __A
+///Address of where to store the 32-bit \c IA32_TSC_AUX value.
+/// \returns The 64-bit value of the time stamp counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdtscp(unsigned int *__A) {
   return __builtin_ia32_rdtscp(__A);
@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///the value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c ROLB instruction.
+///
+/// \param __X
+///The unsigned 8-bit value to be rotated.
+/// \param __C
+///The number of bits to rotate the value.
+/// \returns The rotated value.
 static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
 __rolb(unsigned char __X, int __C) {
   return __buil

[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-10 Thread via cfe-commits 

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Paul T Robinson (pogo59)


Changes

ia32intrin.h gets descriptions for all remaining non-privileged intrinsic 
functions; the macros providing alternate names are not described. immintrin.h 
ditto, except for the InterlockedExchange functions.

---
Full diff: https://github.com/llvm/llvm-project/pull/77686.diff


2 Files Affected:

- (modified) clang/lib/Headers/ia32intrin.h (+170-2) 
- (modified) clang/lib/Headers/immintrin.h (+57) 


``diff
diff --git a/clang/lib/Headers/ia32intrin.h b/clang/lib/Headers/ia32intrin.h
index a8b59dfaad8980..39013e1a5bd0dd 100644
--- a/clang/lib/Headers/ia32intrin.h
+++ b/clang/lib/Headers/ia32intrin.h
@@ -58,7 +58,7 @@ __bsrd(int __A) {
   return 31 - __builtin_clz((unsigned int)__A);
 }
 
-/// Swaps the bytes in the input. Converting little endian to big endian or
+/// Swaps the bytes in the input, converting little endian to big endian or
 ///vice versa.
 ///
 /// \headerfile 
@@ -73,6 +73,16 @@ __bswapd(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
 }
 
+/// Swaps the bytes in the input, converting little endian to big endian or
+///vice versa.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c BSWAP instruction.
+///
+/// \param __A
+///A 32-bit integer operand.
+/// \returns A 32-bit integer containing the swapped bytes.
 static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
 _bswap(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
@@ -173,12 +183,29 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.
+///
+/// \returns The 64-bit value of the RFLAGS register.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u64();
 }
 
+/// Writes the specified value to the program status and control \c RFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHQ + \c POPFQ instruction sequence.
+///
+/// \param __f
+///The 64-bit value to write to \c RFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned long long __f)
 {
@@ -186,12 +213,29 @@ __writeeflags(unsigned long long __f)
 }
 
 #else /* !__x86_64__ */
+/// Returns the program status and control \c EFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFD + \c POPD instruction sequence.
+///
+/// \returns The 32-bit value of the EFLAGS register.
 static __inline__ unsigned int __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u32();
 }
 
+/// Writes the specified value to the program status and control \c EFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHD + \c POPFD instruction sequence.
+///
+/// \param __f
+///The 32-bit value to write to \c EFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned int __f)
 {
@@ -341,12 +385,32 @@ __crc32q(unsigned long long __C, unsigned long long __D)
 }
 #endif /* __x86_64__ */
 
+/// Reads the specified performance monitoring counter. Refer to your
+///processor's documentation to determine which performance counters are
+///supported.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDPMC instruction.
+///
+/// \param __A
+///The performance counter to read.
+/// \returns The 64-bit value read from the performance counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdpmc(int __A) {
   return __builtin_ia32_rdpmc(__A);
 }
 
-/* __rdtscp */
+/// Reads the processor's time stamp counter and the \c IA32_TSC_AUX MSR
+///\c (0xc103).
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDTSCP instruction.
+///
+/// \param __A
+///Address of where to store the 32-bit \c IA32_TSC_AUX value.
+/// \returns The 64-bit value of the time stamp counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdtscp(unsigned int *__A) {
   return __builtin_ia32_rdtscp(__A);
@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///the value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c ROLB instruction.
+///
+/// \param __X
+///The unsigned 8-bit value to be rotated.
+/// \param __C
+///The number of bits to rotate the value.
+/// \returns The rotated value.
 static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
 __rolb(unsigned char __X, int __C) {
   return __builtin_ro

[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-10 Thread Craig Topper via cfe-commits 


@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///the value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c ROLB instruction.

topperc wrote:

In the Intel and AMD manuals I think the instruction is just called ROL. ROLB 
is the name in AT&T assembler syntax to distinquish the size.

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-10 Thread Phoebe Wang via cfe-commits 


@@ -173,25 +183,59 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.

phoebewang wrote:

Also `POP` instead `POPQ`. The same below.

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Paul T Robinson via cfe-commits 

https://github.com/pogo59 updated 
https://github.com/llvm/llvm-project/pull/77686

>From 39a884d27f56772a222d352665be95194716beff Mon Sep 17 00:00:00 2001
From: Paul Robinson 
Date: Wed, 10 Jan 2024 10:42:24 -0800
Subject: [PATCH 1/2] [Headers][X86] Add more descriptions to ia32intrin.h and
 immintrin.h

ia32intrin.h gets descriptions for all remaining non-privileged intrinsic
functions; the macros providing alternate names are not described.
immintrin.h ditto, except for the Interlocked Exchange functions.
---
 clang/lib/Headers/ia32intrin.h | 172 -
 clang/lib/Headers/immintrin.h  |  57 +++
 2 files changed, 227 insertions(+), 2 deletions(-)

diff --git a/clang/lib/Headers/ia32intrin.h b/clang/lib/Headers/ia32intrin.h
index a8b59dfaad8980..39013e1a5bd0dd 100644
--- a/clang/lib/Headers/ia32intrin.h
+++ b/clang/lib/Headers/ia32intrin.h
@@ -58,7 +58,7 @@ __bsrd(int __A) {
   return 31 - __builtin_clz((unsigned int)__A);
 }
 
-/// Swaps the bytes in the input. Converting little endian to big endian or
+/// Swaps the bytes in the input, converting little endian to big endian or
 ///vice versa.
 ///
 /// \headerfile 
@@ -73,6 +73,16 @@ __bswapd(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
 }
 
+/// Swaps the bytes in the input, converting little endian to big endian or
+///vice versa.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c BSWAP instruction.
+///
+/// \param __A
+///A 32-bit integer operand.
+/// \returns A 32-bit integer containing the swapped bytes.
 static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
 _bswap(int __A) {
   return (int)__builtin_bswap32((unsigned int)__A);
@@ -173,12 +183,29 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.
+///
+/// \returns The 64-bit value of the RFLAGS register.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u64();
 }
 
+/// Writes the specified value to the program status and control \c RFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHQ + \c POPFQ instruction sequence.
+///
+/// \param __f
+///The 64-bit value to write to \c RFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned long long __f)
 {
@@ -186,12 +213,29 @@ __writeeflags(unsigned long long __f)
 }
 
 #else /* !__x86_64__ */
+/// Returns the program status and control \c EFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFD + \c POPD instruction sequence.
+///
+/// \returns The 32-bit value of the EFLAGS register.
 static __inline__ unsigned int __DEFAULT_FN_ATTRS
 __readeflags(void)
 {
   return __builtin_ia32_readeflags_u32();
 }
 
+/// Writes the specified value to the program status and control \c EFLAGS
+///register. Reserved bits are not affected.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHD + \c POPFD instruction sequence.
+///
+/// \param __f
+///The 32-bit value to write to \c EFLAGS.
 static __inline__ void __DEFAULT_FN_ATTRS
 __writeeflags(unsigned int __f)
 {
@@ -341,12 +385,32 @@ __crc32q(unsigned long long __C, unsigned long long __D)
 }
 #endif /* __x86_64__ */
 
+/// Reads the specified performance monitoring counter. Refer to your
+///processor's documentation to determine which performance counters are
+///supported.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDPMC instruction.
+///
+/// \param __A
+///The performance counter to read.
+/// \returns The 64-bit value read from the performance counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdpmc(int __A) {
   return __builtin_ia32_rdpmc(__A);
 }
 
-/* __rdtscp */
+/// Reads the processor's time stamp counter and the \c IA32_TSC_AUX MSR
+///\c (0xc103).
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c RDTSCP instruction.
+///
+/// \param __A
+///Address of where to store the 32-bit \c IA32_TSC_AUX value.
+/// \returns The 64-bit value of the time stamp counter.
 static __inline__ unsigned long long __DEFAULT_FN_ATTRS
 __rdtscp(unsigned int *__A) {
   return __builtin_ia32_rdtscp(__A);
@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///the value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c ROLB instruction.
+///
+/// \param __X
+///The unsigned 8-bit value to be rotated.
+/// \param __C
+///The number o

[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Paul T Robinson via cfe-commits 


@@ -173,25 +183,59 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POPQ instruction sequence.

pogo59 wrote:

Done

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Paul T Robinson via cfe-commits 


@@ -361,42 +425,146 @@ _wbinvd(void) {
   __builtin_ia32_wbinvd();
 }
 
+/// Rotates an 8-bit value to the left by the specified number of bits.
+///This operation is undefined if the number of bits exceeds the size of
+///the value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c ROLB instruction.

pogo59 wrote:

Done

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Craig Topper via cfe-commits 

https://github.com/topperc edited 
https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Craig Topper via cfe-commits 

https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Craig Topper via cfe-commits 


@@ -173,25 +183,59 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POP instruction sequence.

topperc wrote:

PUSHFQ->PUSHF

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Phoebe Wang via cfe-commits 


@@ -173,25 +183,59 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POP instruction sequence.

phoebewang wrote:

The mnemonic in SDM is PUSHFQ

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Phoebe Wang via cfe-commits 

https://github.com/phoebewang approved this pull request.

LGTM.

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-16 Thread Craig Topper via cfe-commits 


@@ -173,25 +183,59 @@ __popcntq(unsigned long long __A)
 #endif /* __x86_64__ */
 
 #ifdef __x86_64__
+/// Returns the program status and control \c RFLAGS register with the \c VM
+///and \c RF flags cleared.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the \c PUSHFQ + \c POP instruction sequence.

topperc wrote:

I wrote that comment before I checked and meant to remove it before I approved. 
Sorry.

https://github.com/llvm/llvm-project/pull/77686
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[clang] [Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (PR #77686)

2024-01-17 Thread Paul T Robinson via cfe-commits 

https://github.com/pogo59 closed https://github.com/llvm/llvm-project/pull/77686
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