[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-09 Thread Zakk Chen via cfe-commits 

zakk0610 wrote:

Does the name of "riscv-arch" give the impression that it might be "march" 
string?

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-10 Thread Craig Topper via cfe-commits 

https://github.com/topperc updated 
https://github.com/llvm/llvm-project/pull/80760

>From 8000459a247317400eda6213a23f32ac89e1ea75 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Mon, 5 Feb 2024 14:57:17 -0800
Subject: [PATCH 1/3] [RISCV] Add -march string as Module metadata in IR.

In an LTO build, we don't set the ELF attributes to indicate what
extensions were compiled with. The target CPU/Attrs in RISCVTargetMachine
do not get set for an LTO build. Each function gets a target-cpu/feature
attribute, but this isn't usable to set ELF attributs since we wouldn't
know what function to use. We can't just once since it might have been
compiler with an attribute likes target_verson.

This patch adds the ISA as Module metadata so we can retrieve it in the
backend. Individual translation units can still be compiled with different
strings so we need to collect the unique set when Modules are merged.

The backend will need to combine the unique ISA strings to produce a single
value for the ELF attributes. This will be done in a separate patch.
---
 clang/lib/CodeGen/CodeGenModule.cpp   |  11 +
 .../RISCV/ntlh-intrinsics/riscv32-zihintntl.c | 350 +-
 .../test/CodeGen/RISCV/riscv-metadata-arch.c  |  20 +
 3 files changed, 206 insertions(+), 175 deletions(-)
 create mode 100644 clang/test/CodeGen/RISCV/riscv-metadata-arch.c

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 36b63d78b06f83..25b8d5cae36d3a 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -67,6 +67,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/TimeProfiler.h"
 #include "llvm/Support/xxhash.h"
 #include "llvm/TargetParser/Triple.h"
@@ -1056,6 +1057,16 @@ void CodeGenModule::Release() {
 llvm::LLVMContext &Ctx = TheModule.getContext();
 getModule().addModuleFlag(llvm::Module::Error, "target-abi",
   llvm::MDString::get(Ctx, ABIStr));
+
+const std::vector &Features =
+getTarget().getTargetOpts().Features;
+auto ParseResult =
+llvm::RISCVISAInfo::parseFeatures(T.isRISCV64() ? 64 : 32, Features);
+if (!errorToBool(ParseResult.takeError()))
+  getModule().addModuleFlag(
+  llvm::Module::AppendUnique, "riscv-arch",
+  llvm::MDNode::get(
+  Ctx, llvm::MDString::get(Ctx, (*ParseResult)->toString(;
   }
 
   if (CodeGenOpts.SanitizeCfiCrossDso) {
diff --git a/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c 
b/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
index 897edbc6450af6..b11c2ca010e7ce 100644
--- a/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
+++ b/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
@@ -28,190 +28,190 @@ vint8m1_t *scvc1, *scvc2;
 
 // clang-format off
 void ntl_all_sizes() {   // CHECK-LABEL: 
ntl_all_sizes
-  uc = __riscv_ntl_load(&sc, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i8{{.*}}align 1, !nontemporal !4, !riscv-nontemporal-domain !5
-  sc = __riscv_ntl_load(&uc, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i8{{.*}}align 1, !nontemporal !4, !riscv-nontemporal-domain !5
-  us = __riscv_ntl_load(&ss, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i16{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  ss = __riscv_ntl_load(&us, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i16{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  ui = __riscv_ntl_load(&si, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i32{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  si = __riscv_ntl_load(&ui, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i32{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  ull = __riscv_ntl_load(&sll, __RISCV_NTLH_INNERMOST_PRIVATE); // CHECK: load 
i64{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  sll = __riscv_ntl_load(&ull, __RISCV_NTLH_INNERMOST_PRIVATE); // CHECK: load 
i64{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  h1 = __riscv_ntl_load(&h2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
half{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  f1 = __riscv_ntl_load(&f2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
float{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  d1 = __riscv_ntl_load(&d2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
double{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  v4si1 = __riscv_ntl_load(&v4si2, __RISCV_NTLH_INNERMOST_PRIVATE);   // 
CHECK: load <4 x i32>{{.*}}align 16, !nontemporal !4, !riscv-nontemporal-domain 
!5
-  v8ss1 = __riscv_ntl_load(&v8ss2, __RISCV_NTLH_INNERMOST_PRIVATE);   // 
CHECK: load <8 x i16>{{.*}}align 16, !nontemporal !4, !riscv-nontemporal-domain 
!5
-  v16sc1 = __

[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-12 Thread Philip Reames via cfe-commits 

preames wrote:

I agree with @asb's framing above.  Assuming this doesn't commit us to 
something which is hard to forward version for some reason, I support 
addressing this in a target specific manner for the moment. 

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-12 Thread Jessica Clarke via cfe-commits 

jrtc27 wrote:

That's fair. I just imagine this is going to result in people forgetting about 
the underlying issue and adding their own patchwork fixes to work around it in 
their targets, so it would be a nice motivation to fix it properly.

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-12 Thread Fangrui Song via cfe-commits 

MaskRay wrote:

I share a similar concern about not addressing the issue in a target-specific 
manner. However, I know a lot of confused users by the behavior, and this patch 
will significantly improve the status quo. I concur with asb's analysis.

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-12 Thread Fangrui Song via cfe-commits 

https://github.com/MaskRay approved this pull request.


https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-13 Thread Craig Topper via cfe-commits 

https://github.com/topperc closed 
https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-06 Thread Craig Topper via cfe-commits 

https://github.com/topperc edited 
https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-06 Thread Craig Topper via cfe-commits 

topperc wrote:

> * Just to check my understanding, is the only usecase for this ISA naming 
> string to produce appropriate ELF attributes?

We probably need it to set the `EF_RISCV_RVC` flag too.

I just noticed we only set EF_RISCV_RVC based on C, and not Zca. Is that a bug?

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-06 Thread Craig Topper via cfe-commits 

https://github.com/topperc updated 
https://github.com/llvm/llvm-project/pull/80760

>From 8000459a247317400eda6213a23f32ac89e1ea75 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Mon, 5 Feb 2024 14:57:17 -0800
Subject: [PATCH 1/2] [RISCV] Add -march string as Module metadata in IR.

In an LTO build, we don't set the ELF attributes to indicate what
extensions were compiled with. The target CPU/Attrs in RISCVTargetMachine
do not get set for an LTO build. Each function gets a target-cpu/feature
attribute, but this isn't usable to set ELF attributs since we wouldn't
know what function to use. We can't just once since it might have been
compiler with an attribute likes target_verson.

This patch adds the ISA as Module metadata so we can retrieve it in the
backend. Individual translation units can still be compiled with different
strings so we need to collect the unique set when Modules are merged.

The backend will need to combine the unique ISA strings to produce a single
value for the ELF attributes. This will be done in a separate patch.
---
 clang/lib/CodeGen/CodeGenModule.cpp   |  11 +
 .../RISCV/ntlh-intrinsics/riscv32-zihintntl.c | 350 +-
 .../test/CodeGen/RISCV/riscv-metadata-arch.c  |  20 +
 3 files changed, 206 insertions(+), 175 deletions(-)
 create mode 100644 clang/test/CodeGen/RISCV/riscv-metadata-arch.c

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 36b63d78b06f8..25b8d5cae36d3 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -67,6 +67,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/TimeProfiler.h"
 #include "llvm/Support/xxhash.h"
 #include "llvm/TargetParser/Triple.h"
@@ -1056,6 +1057,16 @@ void CodeGenModule::Release() {
 llvm::LLVMContext &Ctx = TheModule.getContext();
 getModule().addModuleFlag(llvm::Module::Error, "target-abi",
   llvm::MDString::get(Ctx, ABIStr));
+
+const std::vector &Features =
+getTarget().getTargetOpts().Features;
+auto ParseResult =
+llvm::RISCVISAInfo::parseFeatures(T.isRISCV64() ? 64 : 32, Features);
+if (!errorToBool(ParseResult.takeError()))
+  getModule().addModuleFlag(
+  llvm::Module::AppendUnique, "riscv-arch",
+  llvm::MDNode::get(
+  Ctx, llvm::MDString::get(Ctx, (*ParseResult)->toString(;
   }
 
   if (CodeGenOpts.SanitizeCfiCrossDso) {
diff --git a/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c 
b/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
index 897edbc6450af..b11c2ca010e7c 100644
--- a/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
+++ b/clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
@@ -28,190 +28,190 @@ vint8m1_t *scvc1, *scvc2;
 
 // clang-format off
 void ntl_all_sizes() {   // CHECK-LABEL: 
ntl_all_sizes
-  uc = __riscv_ntl_load(&sc, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i8{{.*}}align 1, !nontemporal !4, !riscv-nontemporal-domain !5
-  sc = __riscv_ntl_load(&uc, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i8{{.*}}align 1, !nontemporal !4, !riscv-nontemporal-domain !5
-  us = __riscv_ntl_load(&ss, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i16{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  ss = __riscv_ntl_load(&us, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i16{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  ui = __riscv_ntl_load(&si, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i32{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  si = __riscv_ntl_load(&ui, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
i32{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  ull = __riscv_ntl_load(&sll, __RISCV_NTLH_INNERMOST_PRIVATE); // CHECK: load 
i64{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  sll = __riscv_ntl_load(&ull, __RISCV_NTLH_INNERMOST_PRIVATE); // CHECK: load 
i64{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  h1 = __riscv_ntl_load(&h2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
half{{.*}}align 2, !nontemporal !4, !riscv-nontemporal-domain !5
-  f1 = __riscv_ntl_load(&f2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
float{{.*}}align 4, !nontemporal !4, !riscv-nontemporal-domain !5
-  d1 = __riscv_ntl_load(&d2, __RISCV_NTLH_INNERMOST_PRIVATE);   // CHECK: load 
double{{.*}}align 8, !nontemporal !4, !riscv-nontemporal-domain !5
-  v4si1 = __riscv_ntl_load(&v4si2, __RISCV_NTLH_INNERMOST_PRIVATE);   // 
CHECK: load <4 x i32>{{.*}}align 16, !nontemporal !4, !riscv-nontemporal-domain 
!5
-  v8ss1 = __riscv_ntl_load(&v8ss2, __RISCV_NTLH_INNERMOST_PRIVATE);   // 
CHECK: load <8 x i16>{{.*}}align 16, !nontemporal !4, !riscv-nontemporal-domain 
!5
-  v16sc1 = __risc

[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-06 Thread Jessica Clarke via cfe-commits 

jrtc27 wrote:

> I just noticed we only set EF_RISCV_RVC based on C, and not Zca. Is that a 
> bug?

I think so; binutils sets it for both.

https://github.com/llvm/llvm-project/pull/80760
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[clang] [RISCV] Add canonical ISA string as Module metadata in IR. (PR #80760)

2024-02-06 Thread Jessica Clarke via cfe-commits 

jrtc27 wrote:

> > I just noticed we only set EF_RISCV_RVC based on C, and not Zca. Is that a 
> > bug?
> 
> I think so; binutils sets it for both.

(R_RISCV_ALIGN can probably fail if you don't, I don't think it's just a 
missing optimisation)

https://github.com/llvm/llvm-project/pull/80760
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