[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
@@ -975,6 +975,8 @@ RISC-V Support - Default ABI with F but without D was changed to ilp32f for RV32 and to lp64f for RV64. +- ``__attribute__((rvv_vector_bits(N))) is now supported for RVV vbool*_t types. SuperSodaSea wrote: This line breaks the documentation build (missing ending ` `` `). https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
topperc wrote: > Breaks tests: http://45.33.8.238/linux/129101/step_7.txt Reverted at 51b25bad5e53d5be07b5162e4cebcb7d49a422e7 https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
nico wrote: Breaks tests: http://45.33.8.238/linux/129101/step_7.txt https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/topperc closed https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/wangpc-pp approved this pull request. Oh sorry, I was going to approve this before llvm 18 branch but I forgot. Should we backport this to llvm 18? https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
topperc wrote: ping https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/76551
>From 4e651e382ef68ae3f9ff7c9f9059ea1a1bddf892 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Thu, 28 Dec 2023 16:14:32 -0800
Subject: [PATCH 1/3] [RISCV] Support __riscv_v_fixed_vlen for vbool types.
This adopts a similar behavior to AArch64 SVE, where bool vectors
are represented as a vector of chars with 1/8 the number of elements.
This ensures the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t
can only be used with a vector length that guarantees at least 8 bits.
---
clang/include/clang/AST/Type.h| 3 +
clang/include/clang/Basic/AttrDocs.td | 5 +-
clang/lib/AST/ASTContext.cpp | 20 +-
clang/lib/AST/ItaniumMangle.cpp | 25 +-
clang/lib/AST/JSONNodeDumper.cpp | 3 +
clang/lib/AST/TextNodeDumper.cpp | 3 +
clang/lib/AST/Type.cpp| 15 +-
clang/lib/AST/TypePrinter.cpp | 2 +
clang/lib/CodeGen/Targets/RISCV.cpp | 21 +-
clang/lib/Sema/SemaExpr.cpp | 6 +-
clang/lib/Sema/SemaType.cpp | 21 +-
.../attr-riscv-rvv-vector-bits-bitcast.c | 100 ++
.../CodeGen/attr-riscv-rvv-vector-bits-call.c | 74 +
.../CodeGen/attr-riscv-rvv-vector-bits-cast.c | 76 -
.../attr-riscv-rvv-vector-bits-codegen.c | 172 +++
.../attr-riscv-rvv-vector-bits-globals.c | 107 +++
.../attr-riscv-rvv-vector-bits-types.c| 284 ++
.../riscv-mangle-rvv-fixed-vectors.cpp| 72 +
clang/test/Sema/attr-riscv-rvv-vector-bits.c | 88 +-
19 files changed, 1063 insertions(+), 34 deletions(-)
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1afa693672860f..82c4a5e8701fa5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -3492,6 +3492,9 @@ enum class VectorKind {
/// is RISC-V RVV fixed-length data vector
RVVFixedLengthData,
+
+ /// is RISC-V RVV fixed-length mask vector
+ RVVFixedLengthMask,
};
/// Represents a GCC generic vector type. This type is created using
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index 98a7ecc7fd7df3..c4d69d5a50093c 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536.
For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the
LMUL
of the type before passing to the attribute.
-``vbool*_t`` types are not supported at this time.
+For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the
+number from the type name. For example, ``vbool8_t`` needs to use
+``__riscv_v_fixed_vlen`` / 8. If the resulting value is not a multiple of 8,
+the type is not supported for that value of ``__riscv_v_fixed_vlen``.
}];
}
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 0395b3e47ab6f8..97df251fef6442 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1938,7 +1938,8 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
else if (VT->getVectorKind() == VectorKind::SveFixedLengthPredicate)
// Adjust the alignment for fixed-length SVE predicates.
Align = 16;
-else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData)
+else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData ||
+ VT->getVectorKind() == VectorKind::RVVFixedLengthMask)
// Adjust the alignment for fixed-length RVV vectors.
Align = std::min(64, Width);
break;
@@ -9404,7 +9405,9 @@ bool ASTContext::areCompatibleVectorTypes(QualType
FirstVec,
Second->getVectorKind() != VectorKind::SveFixedLengthData &&
Second->getVectorKind() != VectorKind::SveFixedLengthPredicate &&
First->getVectorKind() != VectorKind::RVVFixedLengthData &&
- Second->getVectorKind() != VectorKind::RVVFixedLengthData)
+ Second->getVectorKind() != VectorKind::RVVFixedLengthData &&
+ First->getVectorKind() != VectorKind::RVVFixedLengthMask &&
+ Second->getVectorKind() != VectorKind::RVVFixedLengthMask)
return true;
return false;
@@ -9510,8 +9513,11 @@ static uint64_t getRVVTypeSize(ASTContext ,
const BuiltinType *Ty) {
ASTContext::BuiltinVectorTypeInfo Info =
Context.getBuiltinVectorTypeInfo(Ty);
- uint64_t EltSize = Context.getTypeSize(Info.ElementType);
- uint64_t MinElts = Info.EC.getKnownMinValue();
+ unsigned EltSize = Context.getTypeSize(Info.ElementType);
+ if (Info.ElementType == Context.BoolTy)
+EltSize = 1;
+
+ unsigned MinElts = Info.EC.getKnownMinValue();
return VScale->first * MinElts * EltSize;
}
@@ -9525,6 +9531,12 @@ bool ASTContext::areCompatibleRVVTypes(QualType
FirstType,
auto IsValidCast =
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536. For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the LMUL of the type before passing to the attribute. -``vbool*_t`` types are not supported at this time. +For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the +number from the type name. For example, ``vbool8_t`` needs to use topperc wrote: It could, but the intention was that the value passed to the attribute should be the size of the type. That's the way LMUL is handled. LMUL 2 needs to pass 2*__riscv_v_fixed_vlen. https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/wangpc-pp commented: Please add a release note. https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536. For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the LMUL of the type before passing to the attribute. -``vbool*_t`` types are not supported at this time. +For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the +number from the type name. For example, ``vbool8_t`` needs to use wangpc-pp wrote: > ``__riscv_v_fixed_vlen`` needs to be divided by the number from the type name. Can this be done by compiler? https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
topperc wrote: Ping https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/76551
>From 4e651e382ef68ae3f9ff7c9f9059ea1a1bddf892 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Thu, 28 Dec 2023 16:14:32 -0800
Subject: [PATCH 1/2] [RISCV] Support __riscv_v_fixed_vlen for vbool types.
This adopts a similar behavior to AArch64 SVE, where bool vectors
are represented as a vector of chars with 1/8 the number of elements.
This ensures the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t
can only be used with a vector length that guarantees at least 8 bits.
---
clang/include/clang/AST/Type.h| 3 +
clang/include/clang/Basic/AttrDocs.td | 5 +-
clang/lib/AST/ASTContext.cpp | 20 +-
clang/lib/AST/ItaniumMangle.cpp | 25 +-
clang/lib/AST/JSONNodeDumper.cpp | 3 +
clang/lib/AST/TextNodeDumper.cpp | 3 +
clang/lib/AST/Type.cpp| 15 +-
clang/lib/AST/TypePrinter.cpp | 2 +
clang/lib/CodeGen/Targets/RISCV.cpp | 21 +-
clang/lib/Sema/SemaExpr.cpp | 6 +-
clang/lib/Sema/SemaType.cpp | 21 +-
.../attr-riscv-rvv-vector-bits-bitcast.c | 100 ++
.../CodeGen/attr-riscv-rvv-vector-bits-call.c | 74 +
.../CodeGen/attr-riscv-rvv-vector-bits-cast.c | 76 -
.../attr-riscv-rvv-vector-bits-codegen.c | 172 +++
.../attr-riscv-rvv-vector-bits-globals.c | 107 +++
.../attr-riscv-rvv-vector-bits-types.c| 284 ++
.../riscv-mangle-rvv-fixed-vectors.cpp| 72 +
clang/test/Sema/attr-riscv-rvv-vector-bits.c | 88 +-
19 files changed, 1063 insertions(+), 34 deletions(-)
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1afa693672860f..82c4a5e8701fa5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -3492,6 +3492,9 @@ enum class VectorKind {
/// is RISC-V RVV fixed-length data vector
RVVFixedLengthData,
+
+ /// is RISC-V RVV fixed-length mask vector
+ RVVFixedLengthMask,
};
/// Represents a GCC generic vector type. This type is created using
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index 98a7ecc7fd7df3..c4d69d5a50093c 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536.
For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the
LMUL
of the type before passing to the attribute.
-``vbool*_t`` types are not supported at this time.
+For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the
+number from the type name. For example, ``vbool8_t`` needs to use
+``__riscv_v_fixed_vlen`` / 8. If the resulting value is not a multiple of 8,
+the type is not supported for that value of ``__riscv_v_fixed_vlen``.
}];
}
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 0395b3e47ab6f8..97df251fef6442 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1938,7 +1938,8 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
else if (VT->getVectorKind() == VectorKind::SveFixedLengthPredicate)
// Adjust the alignment for fixed-length SVE predicates.
Align = 16;
-else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData)
+else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData ||
+ VT->getVectorKind() == VectorKind::RVVFixedLengthMask)
// Adjust the alignment for fixed-length RVV vectors.
Align = std::min(64, Width);
break;
@@ -9404,7 +9405,9 @@ bool ASTContext::areCompatibleVectorTypes(QualType
FirstVec,
Second->getVectorKind() != VectorKind::SveFixedLengthData &&
Second->getVectorKind() != VectorKind::SveFixedLengthPredicate &&
First->getVectorKind() != VectorKind::RVVFixedLengthData &&
- Second->getVectorKind() != VectorKind::RVVFixedLengthData)
+ Second->getVectorKind() != VectorKind::RVVFixedLengthData &&
+ First->getVectorKind() != VectorKind::RVVFixedLengthMask &&
+ Second->getVectorKind() != VectorKind::RVVFixedLengthMask)
return true;
return false;
@@ -9510,8 +9513,11 @@ static uint64_t getRVVTypeSize(ASTContext ,
const BuiltinType *Ty) {
ASTContext::BuiltinVectorTypeInfo Info =
Context.getBuiltinVectorTypeInfo(Ty);
- uint64_t EltSize = Context.getTypeSize(Info.ElementType);
- uint64_t MinElts = Info.EC.getKnownMinValue();
+ unsigned EltSize = Context.getTypeSize(Info.ElementType);
+ if (Info.ElementType == Context.BoolTy)
+EltSize = 1;
+
+ unsigned MinElts = Info.EC.getKnownMinValue();
return VScale->first * MinElts * EltSize;
}
@@ -9525,6 +9531,12 @@ bool ASTContext::areCompatibleRVVTypes(QualType
FirstType,
auto IsValidCast =
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 2dc50d28414c827b6723ae6b01c20a7fc3f38165
4e651e382ef68ae3f9ff7c9f9059ea1a1bddf892 -- clang/include/clang/AST/Type.h
clang/lib/AST/ASTContext.cpp clang/lib/AST/ItaniumMangle.cpp
clang/lib/AST/JSONNodeDumper.cpp clang/lib/AST/TextNodeDumper.cpp
clang/lib/AST/Type.cpp clang/lib/AST/TypePrinter.cpp
clang/lib/CodeGen/Targets/RISCV.cpp clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaType.cpp
clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c
clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c
clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp
clang/test/Sema/attr-riscv-rvv-vector-bits.c
``
View the diff from clang-format here.
``diff
diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp
index 774ca8e55f..66fc145b8f 100644
--- a/clang/lib/AST/Type.cpp
+++ b/clang/lib/AST/Type.cpp
@@ -2479,8 +2479,8 @@ bool Type::isRVVVLSBuiltinType() const {
IsFP, IsBF)
\
case BuiltinType::Id:
\
return NF == 1;
-#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) \
- case BuiltinType::Id: \
+#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)
\
+ case BuiltinType::Id:
\
return true;
#include "clang/Basic/RISCVVTypes.def"
default:
``
https://github.com/llvm/llvm-project/pull/76551
___
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[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Craig Topper (topperc)
Changes
This adopts a similar behavior to AArch64 SVE, where bool vectors are
represented as a vector of chars with 1/8 the number of elements. This ensures
the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t can only be
used with a vector length that guarantees at least 8 bits.
---
Patch is 91.56 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/76551.diff
19 Files Affected:
- (modified) clang/include/clang/AST/Type.h (+3)
- (modified) clang/include/clang/Basic/AttrDocs.td (+4-1)
- (modified) clang/lib/AST/ASTContext.cpp (+16-4)
- (modified) clang/lib/AST/ItaniumMangle.cpp (+17-8)
- (modified) clang/lib/AST/JSONNodeDumper.cpp (+3)
- (modified) clang/lib/AST/TextNodeDumper.cpp (+3)
- (modified) clang/lib/AST/Type.cpp (+14-1)
- (modified) clang/lib/AST/TypePrinter.cpp (+2)
- (modified) clang/lib/CodeGen/Targets/RISCV.cpp (+15-6)
- (modified) clang/lib/Sema/SemaExpr.cpp (+4-2)
- (modified) clang/lib/Sema/SemaType.cpp (+15-6)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c (+100)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c (+74)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c (+72-4)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c (+172)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c (+107)
- (modified) clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c (+284)
- (modified) clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp (+72)
- (modified) clang/test/Sema/attr-riscv-rvv-vector-bits.c (+86-2)
``diff
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1afa693672860f..82c4a5e8701fa5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -3492,6 +3492,9 @@ enum class VectorKind {
/// is RISC-V RVV fixed-length data vector
RVVFixedLengthData,
+
+ /// is RISC-V RVV fixed-length mask vector
+ RVVFixedLengthMask,
};
/// Represents a GCC generic vector type. This type is created using
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index 98a7ecc7fd7df3..c4d69d5a50093c 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536.
For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the
LMUL
of the type before passing to the attribute.
-``vbool*_t`` types are not supported at this time.
+For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the
+number from the type name. For example, ``vbool8_t`` needs to use
+``__riscv_v_fixed_vlen`` / 8. If the resulting value is not a multiple of 8,
+the type is not supported for that value of ``__riscv_v_fixed_vlen``.
}];
}
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 0395b3e47ab6f8..97df251fef6442 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1938,7 +1938,8 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
else if (VT->getVectorKind() == VectorKind::SveFixedLengthPredicate)
// Adjust the alignment for fixed-length SVE predicates.
Align = 16;
-else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData)
+else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData ||
+ VT->getVectorKind() == VectorKind::RVVFixedLengthMask)
// Adjust the alignment for fixed-length RVV vectors.
Align = std::min(64, Width);
break;
@@ -9404,7 +9405,9 @@ bool ASTContext::areCompatibleVectorTypes(QualType
FirstVec,
Second->getVectorKind() != VectorKind::SveFixedLengthData &&
Second->getVectorKind() != VectorKind::SveFixedLengthPredicate &&
First->getVectorKind() != VectorKind::RVVFixedLengthData &&
- Second->getVectorKind() != VectorKind::RVVFixedLengthData)
+ Second->getVectorKind() != VectorKind::RVVFixedLengthData &&
+ First->getVectorKind() != VectorKind::RVVFixedLengthMask &&
+ Second->getVectorKind() != VectorKind::RVVFixedLengthMask)
return true;
return false;
@@ -9510,8 +9513,11 @@ static uint64_t getRVVTypeSize(ASTContext ,
const BuiltinType *Ty) {
ASTContext::BuiltinVectorTypeInfo Info =
Context.getBuiltinVectorTypeInfo(Ty);
- uint64_t EltSize = Context.getTypeSize(Info.ElementType);
- uint64_t MinElts = Info.EC.getKnownMinValue();
+ unsigned EltSize = Context.getTypeSize(Info.ElementType);
+ if (Info.ElementType == Context.BoolTy)
+EltSize = 1;
+
+ unsigned MinElts = Info.EC.getKnownMinValue();
return VScale->first * MinElts * EltSize;
}
@@ -9525,6 +9531,12 @@ bool ASTContext::areCompatibleRVVTypes(QualType
FirstType,
auto IsValidCast = [this](QualType FirstType, QualType
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
topperc wrote: CC @ita-sc https://github.com/llvm/llvm-project/pull/76551 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Support __riscv_v_fixed_vlen for vbool types. (PR #76551)
https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/76551
This adopts a similar behavior to AArch64 SVE, where bool vectors are
represented as a vector of chars with 1/8 the number of elements. This ensures
the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t can only be
used with a vector length that guarantees at least 8 bits.
>From 4e651e382ef68ae3f9ff7c9f9059ea1a1bddf892 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Thu, 28 Dec 2023 16:14:32 -0800
Subject: [PATCH] [RISCV] Support __riscv_v_fixed_vlen for vbool types.
This adopts a similar behavior to AArch64 SVE, where bool vectors
are represented as a vector of chars with 1/8 the number of elements.
This ensures the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t
can only be used with a vector length that guarantees at least 8 bits.
---
clang/include/clang/AST/Type.h| 3 +
clang/include/clang/Basic/AttrDocs.td | 5 +-
clang/lib/AST/ASTContext.cpp | 20 +-
clang/lib/AST/ItaniumMangle.cpp | 25 +-
clang/lib/AST/JSONNodeDumper.cpp | 3 +
clang/lib/AST/TextNodeDumper.cpp | 3 +
clang/lib/AST/Type.cpp| 15 +-
clang/lib/AST/TypePrinter.cpp | 2 +
clang/lib/CodeGen/Targets/RISCV.cpp | 21 +-
clang/lib/Sema/SemaExpr.cpp | 6 +-
clang/lib/Sema/SemaType.cpp | 21 +-
.../attr-riscv-rvv-vector-bits-bitcast.c | 100 ++
.../CodeGen/attr-riscv-rvv-vector-bits-call.c | 74 +
.../CodeGen/attr-riscv-rvv-vector-bits-cast.c | 76 -
.../attr-riscv-rvv-vector-bits-codegen.c | 172 +++
.../attr-riscv-rvv-vector-bits-globals.c | 107 +++
.../attr-riscv-rvv-vector-bits-types.c| 284 ++
.../riscv-mangle-rvv-fixed-vectors.cpp| 72 +
clang/test/Sema/attr-riscv-rvv-vector-bits.c | 88 +-
19 files changed, 1063 insertions(+), 34 deletions(-)
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1afa693672860f..82c4a5e8701fa5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -3492,6 +3492,9 @@ enum class VectorKind {
/// is RISC-V RVV fixed-length data vector
RVVFixedLengthData,
+
+ /// is RISC-V RVV fixed-length mask vector
+ RVVFixedLengthMask,
};
/// Represents a GCC generic vector type. This type is created using
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index 98a7ecc7fd7df3..c4d69d5a50093c 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -2415,7 +2415,10 @@ only be a power of 2 between 64 and 65536.
For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the
LMUL
of the type before passing to the attribute.
-``vbool*_t`` types are not supported at this time.
+For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the
+number from the type name. For example, ``vbool8_t`` needs to use
+``__riscv_v_fixed_vlen`` / 8. If the resulting value is not a multiple of 8,
+the type is not supported for that value of ``__riscv_v_fixed_vlen``.
}];
}
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 0395b3e47ab6f8..97df251fef6442 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -1938,7 +1938,8 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
else if (VT->getVectorKind() == VectorKind::SveFixedLengthPredicate)
// Adjust the alignment for fixed-length SVE predicates.
Align = 16;
-else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData)
+else if (VT->getVectorKind() == VectorKind::RVVFixedLengthData ||
+ VT->getVectorKind() == VectorKind::RVVFixedLengthMask)
// Adjust the alignment for fixed-length RVV vectors.
Align = std::min(64, Width);
break;
@@ -9404,7 +9405,9 @@ bool ASTContext::areCompatibleVectorTypes(QualType
FirstVec,
Second->getVectorKind() != VectorKind::SveFixedLengthData &&
Second->getVectorKind() != VectorKind::SveFixedLengthPredicate &&
First->getVectorKind() != VectorKind::RVVFixedLengthData &&
- Second->getVectorKind() != VectorKind::RVVFixedLengthData)
+ Second->getVectorKind() != VectorKind::RVVFixedLengthData &&
+ First->getVectorKind() != VectorKind::RVVFixedLengthMask &&
+ Second->getVectorKind() != VectorKind::RVVFixedLengthMask)
return true;
return false;
@@ -9510,8 +9513,11 @@ static uint64_t getRVVTypeSize(ASTContext ,
const BuiltinType *Ty) {
ASTContext::BuiltinVectorTypeInfo Info =
Context.getBuiltinVectorTypeInfo(Ty);
- uint64_t EltSize = Context.getTypeSize(Info.ElementType);
- uint64_t MinElts =
