subject:"\[clang\] \[clang\]\[RISCV\] Remove LMUL=8 scalar input for some vector crypto instructions \(PR #89867\)"

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-24 Thread Brandon Wu via cfe-commits


https://github.com/4vtomat closed 
https://github.com/llvm/llvm-project/pull/89867
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[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-24 Thread Craig Topper via cfe-commits


https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/89867
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[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-23 Thread Brandon Wu via cfe-commits


https://github.com/4vtomat updated 
https://github.com/llvm/llvm-project/pull/89867

>From 4db9d00610f110a163a1b7d5b168461f6a91f4ed Mon Sep 17 00:00:00 2001
From: Brandon Wu 
Date: Tue, 23 Apr 2024 20:42:33 -0700
Subject: [PATCH] [clang][RISCV] Remove LMUL=8 scalar input for some vector
 crypto instructions

Since the requirement is EEW=32, it's impossible that EGW=128 needs LMUL=8.
---
 clang/include/clang/Basic/riscv_vector.td  |  3 +--
 .../non-policy/non-overloaded/vaesdf.c | 10 --
 .../non-policy/non-overloaded/vaesdm.c | 10 --
 .../non-policy/non-overloaded/vaesef.c | 10 --
 .../non-policy/non-overloaded/vaesem.c | 10 --
 .../non-policy/non-overloaded/vaesz.c  | 10 --
 .../non-policy/non-overloaded/vsm4r.c  | 10 --
 .../non-policy/overloaded/vaesdf.c | 10 --
 .../non-policy/overloaded/vaesdm.c | 10 --
 .../non-policy/overloaded/vaesef.c | 10 --
 .../non-policy/overloaded/vaesem.c | 10 --
 .../non-policy/overloaded/vaesz.c  | 10 --
 .../non-policy/overloaded/vsm4r.c  | 10 --
 .../policy/non-overloaded/vaesdf.c | 10 --
 .../policy/non-overloaded/vaesdm.c | 10 --
 .../policy/non-overloaded/vaesef.c | 10 --
 .../policy/non-overloaded/vaesem.c | 10 --
 .../policy/non-overloaded/vaesz.c  | 10 --
 .../policy/non-overloaded/vsm4r.c  | 10 --
 .../policy/overloaded/vaesdf.c | 10 --
 .../policy/overloaded/vaesdm.c | 10 --
 .../policy/overloaded/vaesef.c | 10 --
 .../policy/overloaded/vaesem.c | 10 --
 .../policy/overloaded/vaesz.c  | 10 --
 .../policy/overloaded/vsm4r.c  | 10 --
 25 files changed, 1 insertion(+), 242 deletions(-)

diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index 98ae17ec22a047..cca4367751b92b 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2601,8 +2601,7 @@ multiclass RVVOutBuiltinSetZvk {
 
   if HasVS then {
 foreach vs2_lmul = ["(SEFixedLog2LMUL:-1)", "(SEFixedLog2LMUL:0)",
-"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)",
-"(SEFixedLog2LMUL:3)"] in {
+"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)"] in {
 defvar name = NAME # !if(!eq(NAME, "vaesz"), "", "_vs");
 let OverloadedName = name, IRName = NAME # "_vs", Name = NAME # "_vs",
 IntrinsicTypes = [-1, 1] in
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
index 76a9ddc0d52946..3e37ac4b774997 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdf_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdf_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdf_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call  
@llvm.riscv.vaesdf.vs.nxv16i32.nxv16i32.i64( [[VD]],  [[VS2]], i64 [[VL]], i64 3)
-// CHECK-RV64-NEXT:ret  [[TMP0]]
-//
-vuint32m8_t test_vaesdf_vs_u32m8_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t 
vl) {
-  return __riscv_vaesdf_vs_u32m8_u32m8(vd, vs2, vl);
-}
-
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
index 468c3f18378d3c..c29c1e983fce67 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdm_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdm_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdm_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call  
@llvm.riscv.vaesdm.vs.nxv16i32.nxv16i32.i64( [[VD]],  [[VS2]], i64 [[VL]], i64 3)
-//

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-23 Thread Brandon Wu via cfe-commits


https://github.com/4vtomat edited 
https://github.com/llvm/llvm-project/pull/89867
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[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-23 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-risc-v

Author: Brandon Wu (4vtomat)


Changes

Since the minimum requirement is EEW=32, it's impossible that EGW=128
needs LMUL=8.


---

Patch is 28.63 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/89867.diff


25 Files Affected:

- (modified) clang/include/clang/Basic/riscv_vector.td (+1-2) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesz.c 
(-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4r.c 
(-10) 


``diff
diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index 98ae17ec22a047..cca4367751b92b 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2601,8 +2601,7 @@ multiclass RVVOutBuiltinSetZvk {
 
   if HasVS then {
 foreach vs2_lmul = ["(SEFixedLog2LMUL:-1)", "(SEFixedLog2LMUL:0)",
-"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)",
-"(SEFixedLog2LMUL:3)"] in {
+"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)"] in {
 defvar name = NAME # !if(!eq(NAME, "vaesz"), "", "_vs");
 let OverloadedName = name, IRName = NAME # "_vs", Name = NAME # "_vs",
 IntrinsicTypes = [-1, 1] in
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
index 76a9ddc0d52946..3e37ac4b774997 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdf_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdf_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdf_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call  
@llvm.riscv.vaesdf.vs.nxv16i32.nxv16i32.i64( [[VD]],  [[VS2]], i64 [[VL]], i64 3)
-// CHECK-RV64-NEXT:ret  [[TMP0]]
-//
-vuint32m8_t test_vaesdf_vs_u32m8_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t 
vl) {
-  return __riscv_vaesdf_vs_u32m8_u32m8(vd, vs2, vl);
-}
-
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-23 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Brandon Wu (4vtomat)


Changes

Since the minimum requirement is EEW=32, it's impossible that EGW=128
needs LMUL=8.


---

Patch is 28.63 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/89867.diff


25 Files Affected:

- (modified) clang/include/clang/Basic/riscv_vector.td (+1-2) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaesz.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsm4r.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdf.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesdm.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesef.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesem.c
 (-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vaesz.c 
(-10) 
- (modified) 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsm4r.c 
(-10) 


``diff
diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index 98ae17ec22a047..cca4367751b92b 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2601,8 +2601,7 @@ multiclass RVVOutBuiltinSetZvk {
 
   if HasVS then {
 foreach vs2_lmul = ["(SEFixedLog2LMUL:-1)", "(SEFixedLog2LMUL:0)",
-"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)",
-"(SEFixedLog2LMUL:3)"] in {
+"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)"] in {
 defvar name = NAME # !if(!eq(NAME, "vaesz"), "", "_vs");
 let OverloadedName = name, IRName = NAME # "_vs", Name = NAME # "_vs",
 IntrinsicTypes = [-1, 1] in
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
index 76a9ddc0d52946..3e37ac4b774997 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdf_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdf_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdf_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call  
@llvm.riscv.vaesdf.vs.nxv16i32.nxv16i32.i64( [[VD]],  [[VS2]], i64 [[VL]], i64 3)
-// CHECK-RV64-NEXT:ret  [[TMP0]]
-//
-vuint32m8_t test_vaesdf_vs_u32m8_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t 
vl) {
-  return __riscv_vaesdf_vs_u32m8_u32m8(vd, vs2, vl);
-}
-
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

2024-04-23 Thread Brandon Wu via cfe-commits


https://github.com/4vtomat created 
https://github.com/llvm/llvm-project/pull/89867

Since the minimum requirement is EEW=32, it's impossible that EGW=128
needs LMUL=8.


>From 1ed74c3732194512da7eee2e16bc252269f0e6ef Mon Sep 17 00:00:00 2001
From: Brandon Wu 
Date: Tue, 23 Apr 2024 20:42:33 -0700
Subject: [PATCH] [clang][RISCV] Remove LMUL=8 scalar input for some vector
 crypto instructions

Since the minimum requirement is EEW=32, it's impossible that EGW=128
needs LMUL=8.
---
 clang/include/clang/Basic/riscv_vector.td  |  3 +--
 .../non-policy/non-overloaded/vaesdf.c | 10 --
 .../non-policy/non-overloaded/vaesdm.c | 10 --
 .../non-policy/non-overloaded/vaesef.c | 10 --
 .../non-policy/non-overloaded/vaesem.c | 10 --
 .../non-policy/non-overloaded/vaesz.c  | 10 --
 .../non-policy/non-overloaded/vsm4r.c  | 10 --
 .../non-policy/overloaded/vaesdf.c | 10 --
 .../non-policy/overloaded/vaesdm.c | 10 --
 .../non-policy/overloaded/vaesef.c | 10 --
 .../non-policy/overloaded/vaesem.c | 10 --
 .../non-policy/overloaded/vaesz.c  | 10 --
 .../non-policy/overloaded/vsm4r.c  | 10 --
 .../policy/non-overloaded/vaesdf.c | 10 --
 .../policy/non-overloaded/vaesdm.c | 10 --
 .../policy/non-overloaded/vaesef.c | 10 --
 .../policy/non-overloaded/vaesem.c | 10 --
 .../policy/non-overloaded/vaesz.c  | 10 --
 .../policy/non-overloaded/vsm4r.c  | 10 --
 .../policy/overloaded/vaesdf.c | 10 --
 .../policy/overloaded/vaesdm.c | 10 --
 .../policy/overloaded/vaesef.c | 10 --
 .../policy/overloaded/vaesem.c | 10 --
 .../policy/overloaded/vaesz.c  | 10 --
 .../policy/overloaded/vsm4r.c  | 10 --
 25 files changed, 1 insertion(+), 242 deletions(-)

diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index 98ae17ec22a047..cca4367751b92b 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2601,8 +2601,7 @@ multiclass RVVOutBuiltinSetZvk {
 
   if HasVS then {
 foreach vs2_lmul = ["(SEFixedLog2LMUL:-1)", "(SEFixedLog2LMUL:0)",
-"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)",
-"(SEFixedLog2LMUL:3)"] in {
+"(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)"] in {
 defvar name = NAME # !if(!eq(NAME, "vaesz"), "", "_vs");
 let OverloadedName = name, IRName = NAME # "_vs", Name = NAME # "_vs",
 IntrinsicTypes = [-1, 1] in
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
index 76a9ddc0d52946..3e37ac4b774997 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdf.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdf_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdf_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdf_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call  
@llvm.riscv.vaesdf.vs.nxv16i32.nxv16i32.i64( [[VD]],  [[VS2]], i64 [[VL]], i64 3)
-// CHECK-RV64-NEXT:ret  [[TMP0]]
-//
-vuint32m8_t test_vaesdf_vs_u32m8_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t 
vl) {
-  return __riscv_vaesdf_vs_u32m8_u32m8(vd, vs2, vl);
-}
-
diff --git 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
index 468c3f18378d3c..c29c1e983fce67 100644
--- 
a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
+++ 
b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaesdm.c
@@ -206,13 +206,3 @@ vuint32m8_t test_vaesdm_vv_u32m8(vuint32m8_t vd, 
vuint32m8_t vs2, size_t vl) {
   return __riscv_vaesdm_vv_u32m8(vd, vs2, vl);
 }
 
-// CHECK-RV64-LABEL: define dso_local  
@test_vaesdm_vs_u32m8_u32m8
-// CHECK-RV64-SAME: ( [[VD:%.*]],  
[[VS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
-// CHECK-RV64-NEXT:  entry:
-// CHECK-RV64-NEXT:[[TMP0:%.*]] = call

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

[clang] [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (PR #89867)

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