[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: Friendly ping https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/weiguozhi commented: Looks good to me. Please wait for AArch64 maintainer's approval. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: Friendly ping https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: Friendly ping https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo created
https://github.com/llvm/llvm-project/pull/91046
Adds AArch64 support for the `preserve_none` calling convention. Registers
X0-X17 and X19-X28 are caller save, and can be used to pass arguments.
Delegates to AAPCS for all other registers.
Closes #87423
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --ch
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
pinskia wrote: I don't think you can use x16 and x17 for argument passing due to them being reserved for PLTs and call veneers. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
brandtbucher wrote: Aw, but that means we only have *twenty-six* registers for argument-passing... ;) https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/2] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (antangelo)
Changes
Adds AArch64 support for the `preserve_none` calling convention. Registers
X0-X17 and X19-X28 are caller save, and can be used to pass arguments.
Delegates to AAPCS for all other registers.
Closes #87423
---
Patch is 44.29 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/91046.diff
16 Files Affected:
- (modified) clang/include/clang/Basic/Attr.td (+2-1)
- (modified) clang/include/clang/Basic/AttrDocs.td (+11-8)
- (modified) clang/lib/Basic/Targets/AArch64.cpp (+1)
- (modified) clang/test/CodeGen/preserve-call-conv.c (+3-3)
- (modified) llvm/docs/LangRef.rst (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.h (+3)
- (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.td (+29)
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+33-1)
- (modified) llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp (+9-3)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp (+1)
- (added) llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll (+88)
- (modified) llvm/test/CodeGen/AArch64/preserve.ll (+8-1)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc.ll (+92)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll (+337)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll (+11)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll (+16)
``diff
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm %s -o - |
FileCheck %s
// RUN: %clang_cc1 -triple aarch64-unknown-windows-msvc -emit-llvm %s -o - |
FileCheck %s
@@ -23,5 +23,5 @@ void boo
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: None (antangelo)
Changes
Adds AArch64 support for the `preserve_none` calling convention. Registers
X0-X17 and X19-X28 are caller save, and can be used to pass arguments.
Delegates to AAPCS for all other registers.
Closes #87423
---
Patch is 44.29 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/91046.diff
16 Files Affected:
- (modified) clang/include/clang/Basic/Attr.td (+2-1)
- (modified) clang/include/clang/Basic/AttrDocs.td (+11-8)
- (modified) clang/lib/Basic/Targets/AArch64.cpp (+1)
- (modified) clang/test/CodeGen/preserve-call-conv.c (+3-3)
- (modified) llvm/docs/LangRef.rst (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.h (+3)
- (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.td (+29)
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+33-1)
- (modified) llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp (+9-3)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp (+1)
- (added) llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll (+88)
- (modified) llvm/test/CodeGen/AArch64/preserve.ll (+8-1)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc.ll (+92)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll (+337)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll (+11)
- (added) llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll (+16)
``diff
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm %s -o - |
FileCheck %s
// RUN: %clang_cc1 -triple aarch64-unknown-windows-msvc -emit-llvm %s -o - |
FileCheck %s
@@ -23,5 +23,5 @@ void b
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: > I don't think you can use x16 and x17 for argument passing due to them being > reserved for PLTs and call veneers. That is if the linker decides to create a > branch island or if the function is called via a PLT, x16 and x17 will be > clobbered on the call so arguments using that will also won't work. Thanks for catching this, I've removed them from the argument passing list. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo edited https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/3] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
pinskia wrote:
Even though you removed X16/X17 you seemly forgot to update the documentation.
https://github.com/llvm/llvm-project/pull/91046
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/5] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/5] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8ad..712c79927304e2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c0..d23465b77e7edd 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7aea..e1f7dbf1d9f20b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331d..65973206403f70 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/weiguozhi edited https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/weiguozhi requested changes to this pull request. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
@@ -494,6 +494,29 @@ def CC_AArch64_GHC : CallingConv<[ CCIfType<[i64], CCAssignToReg<[X19, X20, X21, X22, X23, X24, X25, X26, X27, X28]>> ]>; +let Entry = 1 in +def CC_AArch64_Preserve_None : CallingConv<[ +// We only preserve: +// - X18, which is used for the 'nest' parameter. +// - X29, the frame pointer +// - X30, the link register +// All other registers can be used to pass arguments. +// Non-volatile registers are used first, so functions may call +// normal functions without saving and reloading arguments. +CCIfType<[i32], CCAssignToReg<[W19, W20, W21, W22, W23, + W24, W25, W26, W27, W28, + W0, W1, W2, W3, W4, W5, + W6, W7, W8, W9, W10, W11, + W12, W13, W14, W15, W16, W17]>>, +CCIfType<[i64], CCAssignToReg<[X19, X20, X21, X22, X23, + X24, X25, X26, X27, X28, + X0, X1, X2, X3, X4, X5, + X6, X7, X8, X9, X10, X11, weiguozhi wrote: X8 is used to pass SRet parameter in AArch64_Common, so it can not be used as a general argument register. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/6] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8a..712c79927304e 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c..d23465b77e7ed 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7ae..e1f7dbf1d9f20 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331..65973206403f7 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm %s -o -
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo edited https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/DanielKristofKiss approved this pull request. Thanks for the PR, just NITS otherwise LGTM https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
@@ -7949,9 +7966,10 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
++NumTailCalls;
}
- if (!IsTailCall && CLI.CB && CLI.CB->isMustTailCall())
+ if (!IsTailCall && CLI.CB && CLI.CB->isMustTailCall()) {
DanielKristofKiss wrote:
if with 1 statement doesn't need braces.
https://github.com/llvm/llvm-project/pull/91046
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
@@ -494,6 +494,32 @@ def CC_AArch64_GHC : CallingConv<[ CCIfType<[i64], CCAssignToReg<[X19, X20, X21, X22, X23, X24, X25, X26, X27, X28]>> ]>; +let Entry = 1 in +def CC_AArch64_Preserve_None : CallingConv<[ +// We can pass arguments in all general registers, except: +// - X8, used for sret +// - X16/X17, used by the linker as IP0/IP1 +// - X18, used for the 'nest' parameter DanielKristofKiss wrote: X18 is the `Platform Register` https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/DanielKristofKiss edited https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
@@ -0,0 +1,92 @@
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc
-mtriple=aarch64-apple-darwin | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc
-mtriple=aarch64-apple-darwin | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc
-mtriple=aarch64-apple-darwin | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/double/;s/RETVAL/0./" %s | llc
-mtriple=aarch64-apple-darwin | FileCheck --check-prefixes=ALL,DOUBLE %s
+
+; We don't need to save registers before using them inside preserve_none
function.
+define preserve_nonecc RETTYPE @preserve_nonecc1(i64, i64, double, double)
nounwind {
+entry:
+;ALL-LABEL: preserve_nonecc1
+;ALL: ; %bb.0:
+;ALL-NEXT:InlineAsm Start
+;ALL-NEXT:InlineAsm End
+;DOUBLE-NEXT: movi d0, #
+;ALL-NEXT:ret
+ call void asm sideeffect "",
"~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{d0},~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15},~{d16}"()
+ ret RETTYPE RETVAL
+}
+
+; When calling a preserve_none function, all live registers must be saved and
+; restored around the function call.
+declare preserve_nonecc RETTYPE @bar(i64, i64, double, double)
DanielKristofKiss wrote:
NIT: maybe easier to follow like:
```suggestion
declare preserve_nonecc RETTYPE @preserve_nonecc2(i64, i64, double, double)
define void @bar() nounwind {
```
https://github.com/llvm/llvm-project/pull/91046
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/7] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8a..712c79927304e 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c..d23465b77e7ed 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7ae..e1f7dbf1d9f20 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331..65973206403f7 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm %s -o -
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo updated
https://github.com/llvm/llvm-project/pull/91046
>From 767173a0dfde9858c90867cc5d476da90e5ba898 Mon Sep 17 00:00:00 2001
From: Antonio Abbatangelo
Date: Tue, 30 Apr 2024 22:58:18 -0400
Subject: [PATCH 1/8] [AArch64] Support preserve_none calling convention
---
clang/include/clang/Basic/Attr.td | 3 +-
clang/include/clang/Basic/AttrDocs.td | 19 +-
clang/lib/Basic/Targets/AArch64.cpp | 1 +
clang/test/CodeGen/preserve-call-conv.c | 6 +-
llvm/docs/LangRef.rst | 2 +-
.../Target/AArch64/AArch64CallingConvention.h | 3 +
.../AArch64/AArch64CallingConvention.td | 27 ++
.../Target/AArch64/AArch64ISelLowering.cpp| 34 +-
.../Target/AArch64/AArch64RegisterInfo.cpp| 12 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 1 +
.../AArch64/dynamic-regmask-preserve-none.ll | 88 +
llvm/test/CodeGen/AArch64/preserve.ll | 9 +-
llvm/test/CodeGen/AArch64/preserve_nonecc.ll | 92 +
.../CodeGen/AArch64/preserve_nonecc_call.ll | 325 ++
.../AArch64/preserve_nonecc_musttail.ll | 11 +
.../CodeGen/AArch64/preserve_nonecc_swift.ll | 16 +
16 files changed, 631 insertions(+), 18 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/dynamic-regmask-preserve-none.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_musttail.ll
create mode 100644 llvm/test/CodeGen/AArch64/preserve_nonecc_swift.ll
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 0225598cbbe8a..712c79927304e 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3038,7 +3038,8 @@ def M68kRTD: DeclOrTypeAttr {
let Documentation = [M68kRTDDocs];
}
-def PreserveNone : DeclOrTypeAttr, TargetSpecificAttr {
+def PreserveNone : DeclOrTypeAttr,
+
TargetSpecificAttr> {
let Spellings = [Clang<"preserve_none">];
let Subjects = SubjectList<[FunctionLike]>;
let Documentation = [PreserveNoneDocs];
diff --git a/clang/include/clang/Basic/AttrDocs.td
b/clang/include/clang/Basic/AttrDocs.td
index f8253143b596c..d23465b77e7ed 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5658,17 +5658,20 @@ experimental at this time.
def PreserveNoneDocs : Documentation {
let Category = DocCatCallingConvs;
let Content = [{
-On X86-64 target, this attribute changes the calling convention of a function.
+On X86-64 and AArch64 targets, this attribute changes the calling convention
of a function.
The ``preserve_none`` calling convention tries to preserve as few general
registers as possible. So all general registers are caller saved registers. It
also uses more general registers to pass arguments. This attribute doesn't
-impact floating-point registers (XMMs/YMMs). Floating-point registers still
-follow the c calling convention.
-
-- Only RSP and RBP are preserved by callee.
-
-- Register RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
- be used to pass function arguments.
+impact floating-point registers.
+
+- On X86-64, only RSP and RBP are preserved by the callee.
+ Registers RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15 and RAX now can
+ be used to pass function arguments. Floating-point registers (XMMs/YMMs)
still
+ follow the C calling convention.
+- On AArch64, only LR and FP are preserved by the callee.
+ Registers X19-X28 and X0-X17 are used to pass function arguments.
+ X18, SIMD and floating-point registers follow the AAPCS calling
+ convention.
}];
}
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index c8d243a8fb7ae..e1f7dbf1d9f20 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1202,6 +1202,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC)
const {
case CC_SwiftAsync:
case CC_PreserveMost:
case CC_PreserveAll:
+ case CC_PreserveNone:
case CC_OpenCLKernel:
case CC_AArch64VectorCall:
case CC_AArch64SVEPCS:
diff --git a/clang/test/CodeGen/preserve-call-conv.c
b/clang/test/CodeGen/preserve-call-conv.c
index 74bf695e6f331..65973206403f7 100644
--- a/clang/test/CodeGen/preserve-call-conv.c
+++ b/clang/test/CodeGen/preserve-call-conv.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,X86-LINUX
-// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
+// RUN: %clang_cc1 -triple arm64-unknown-unknown -emit-llvm < %s | FileCheck
%s --check-prefixes=CHECK,LINUX
// RUN: %clang_cc1 -triple x86_64-unknown-windows-msvc -emit-llvm %s -o -
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
https://github.com/antangelo closed https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
efriedma-quic wrote: X19 is the base register; can we actually allocate arguments in it in general? This seems hard to fix. It looks like frame lowering assumes X9 is available; that's probably fixable, but the code needs to be reworked, I think. X15 is used on Windows for stack allocation; I think you can use it in this context, but probably worth a test to verify the interaction works the way you want. (And more generally, that this calling convention doesn't explode on Windows targets.) What's the interaction between varargs and preserve_none? https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: Thank you for catching these. > X19 is the base register; can we actually allocate arguments in it in > general? This seems hard to fix. I will remove X19 from the argument passing list. `ghccc` also uses X19 for argument passing, and I didn't run into issues while testing this PR, so I'm not sure under what conditions issues present for this but it makes sense to remove it regardless. > It looks like frame lowering assumes X9 is available; that's probably > fixable, but the code needs to be reworked, I think. The function that allocates X9 as scratch has a fallback provision for when the basic block is not an entry block, where it checks for liveness before picking a scratch register if X9 is unavailable. I think we can modify this so that `preserve_none` functions always follow this path, and then X9 should be usable for argument passing. > X15 is used on Windows for stack allocation; I think you can use it in this > context, but probably worth a test to verify the interaction works the way > you want. (And more generally, that this calling convention doesn't explode > on Windows targets.) It looks like X15 is clobbered so I don't think it will be usable on Windows. Do you think it should be excluded from argument passing only on Windows or always? As an aside, it seems like I missed adding the calling convention to the Windows target in clang, so this is currently only reachable from IR directly. > What's the interaction between varargs and preserve_none? I don't believe there is a defined interaction between varargs and `preserve_none` as per the RFC, given that the primary use case is for tail calls (which don't support varargs) I imagine it's unlikely to be used outright. It does not seem to work correctly on either AArch64 with this implementation or the X86_64 reference implementation, so we should probably treat it as unsupported. I will prepare a patch to address the above issues. Do you think this warrants a revert of this PR in the meantime? https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
efriedma-quic wrote: Since nothing should be using preserve_none on aarch64 yet, it's probably fine to just fix forward. > I'm not sure under what conditions issues present for this We only allocate a base pointer under restricted circumstances (primarily, functions with dynamic allocation), so maybe GHC never tripped over the issues. > It looks like X15 is clobbered so I don't think it will be usable on Windows. > Do you think it should be excluded from argument passing only on Windows or > always? You probably could make this work if you really wanted to: you can allocate small amounts of stack without __chkstk, which you could then use to spill X15. Not sure if that's the right tradeoff here. https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
diegorusso wrote: We (CPython project) will use it for the new JIT. I'll be testing the current implementation and report back any issue. I don't think you need to revert the PR but please let me know when you create the new one to address the post-merge comments so I can test it again. Thanks https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
antangelo wrote: I have posted the followup changes in PR #96259 . I have left out the frontend changes required for `preserve_none` to be usable from clang on Windows for a separate patch, since they will require some changes to mangling (which are also required for X86). https://github.com/llvm/llvm-project/pull/91046 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
