[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/heiher closed https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/wangleiat approved this pull request. Thanks. https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
wangleiat wrote: > @wangleiat What do you think? I think this is a good start, and we should make i32 truly legal on LoongArch64, just like RISC-V. https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/heiher updated
https://github.com/llvm/llvm-project/pull/93814
>From 5667b2c24b6e2b277e9478152ae318c4e01d3d09 Mon Sep 17 00:00:00 2001
From: WANG Rui
Date: Wed, 22 May 2024 15:14:28 +0800
Subject: [PATCH 1/2] [LoongArch] Adjust LA64 data layout by using n32:64 in
layout string
Although i32 type is illegal in the backend, LA64 has pretty good support for
i32 types by using W instructions.
By adding n32 to the DataLayout string, middle end optimizations will consider
i32 to be a native type. One known effect of this is enabling LoopStrengthReduce
on loops with i32 induction variables. This can be beneficial because C/C++ code
often has loops with i32 induction variables due to the use of `int` or
`unsigned int`.
If this patch exposes performance issues, those are better addressed by tuning
LSR or other passes.
---
clang/lib/Basic/Targets/LoongArch.h | 2 +-
llvm/docs/ReleaseNotes.rst | 4
llvm/lib/IR/AutoUpgrade.cpp | 4 ++--
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp | 2 +-
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 5 +
5 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/clang/lib/Basic/Targets/LoongArch.h
b/clang/lib/Basic/Targets/LoongArch.h
index 68572843f2d74..5fc223483951e 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,7 +133,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
HasUnalignedAccess = true;
-resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
+resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
// TODO: select appropriate ABI.
setABI("lp64d");
}
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 1e1ccb495c366..7acdf22462b36 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -107,6 +107,10 @@ Changes to the Hexagon Backend
Changes to the LoongArch Backend
+* i32 is now a native type in the datalayout string. This enables
+ LoopStrengthReduce for loops with i32 induction variables, among other
+ optimizations.
+
Changes to the MIPS Backend
---
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index a7ed2de6e8a5f..b66c9bfd22932 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL,
StringRef TT) {
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
}
- if (T.isRISCV64()) {
-// Make i32 a native type for 64-bit RISC-V.
+ if (T.isRISCV64() || T.isLoongArch64()) {
+// Make i32 a native type for 64-bit RISC-V and LoongArch.
auto I = DL.find("-n64-");
if (I != StringRef::npos)
return (DL.take_front(I) + "-n32:64-" + DL.drop_front(I + 5)).str();
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 2b2d4e478cc82..60e09bb2f058a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -46,7 +46,7 @@ static cl::opt
static std::string computeDataLayout(const Triple &TT) {
if (TT.isArch64Bit())
-return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
+return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128";
assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
return "e-m:e-p:32:32-i64:64-n32-S128";
}
diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
index 7148e2902fa7a..ca50187e5e5ee 100644
--- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
@@ -63,6 +63,11 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
"riscv64"),
"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+ // Check that LoongArch64 upgrades -n64 to -n32:64.
+ EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128",
+"loongarch64"),
+"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+
// Check that SPIR && SPIRV targets add -G1 if it's not present.
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");
>From 0a0a4231f02db14583288f093e5d9cde00c433fb Mon Sep 17 00:00:00 2001
From: WANG Rui
Date: Thu, 6 Jun 2024 09:44:11 +0800
Subject: [PATCH 2/2] Address SixWeining's comment
---
llvm/lib/IR/AutoUpgrade.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index b66c9bfd22932..2f4b8351e747a 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL,
StringRef TT) {
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
}
- if (T.isRISCV64()) {
-// Make i32 a native type for 64-bit RISC-V.
+ if (T.isRISCV64() || T.isLoongArch64()) {
SixWeining wrote:
Better to sort alphabetically.
https://github.com/llvm/llvm-project/pull/93814
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/SixWeining commented: @wangleiat What do you think? https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/SixWeining edited https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-backend-loongarch
Author: hev (heiher)
Changes
Although i32 type is illegal in the backend, LA64 has pretty good support for
i32 types by using W instructions.
By adding n32 to the DataLayout string, middle end optimizations will consider
i32 to be a native type. One known effect of this is enabling
LoopStrengthReduce on loops with i32 induction variables. This can be
beneficial because C/C++ code often has loops with i32 induction variables due
to the use of `int` or `unsigned int`.
If this patch exposes performance issues, those are better addressed by tuning
LSR or other passes.
---
Full diff: https://github.com/llvm/llvm-project/pull/93814.diff
5 Files Affected:
- (modified) clang/lib/Basic/Targets/LoongArch.h (+1-1)
- (modified) llvm/docs/ReleaseNotes.rst (+4)
- (modified) llvm/lib/IR/AutoUpgrade.cpp (+2-2)
- (modified) llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp (+1-1)
- (modified) llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp (+5)
``diff
diff --git a/clang/lib/Basic/Targets/LoongArch.h
b/clang/lib/Basic/Targets/LoongArch.h
index 68572843f2d74..5fc223483951e 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,7 +133,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
HasUnalignedAccess = true;
-resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
+resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
// TODO: select appropriate ABI.
setABI("lp64d");
}
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 1e1ccb495c366..7acdf22462b36 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -107,6 +107,10 @@ Changes to the Hexagon Backend
Changes to the LoongArch Backend
+* i32 is now a native type in the datalayout string. This enables
+ LoopStrengthReduce for loops with i32 induction variables, among other
+ optimizations.
+
Changes to the MIPS Backend
---
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index a7ed2de6e8a5f..b66c9bfd22932 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL,
StringRef TT) {
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
}
- if (T.isRISCV64()) {
-// Make i32 a native type for 64-bit RISC-V.
+ if (T.isRISCV64() || T.isLoongArch64()) {
+// Make i32 a native type for 64-bit RISC-V and LoongArch.
auto I = DL.find("-n64-");
if (I != StringRef::npos)
return (DL.take_front(I) + "-n32:64-" + DL.drop_front(I + 5)).str();
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 2b2d4e478cc82..60e09bb2f058a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -46,7 +46,7 @@ static cl::opt
static std::string computeDataLayout(const Triple &TT) {
if (TT.isArch64Bit())
-return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
+return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128";
assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
return "e-m:e-p:32:32-i64:64-n32-S128";
}
diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
index 7148e2902fa7a..ca50187e5e5ee 100644
--- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
@@ -63,6 +63,11 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
"riscv64"),
"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+ // Check that LoongArch64 upgrades -n64 to -n32:64.
+ EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128",
+"loongarch64"),
+"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+
// Check that SPIR && SPIRV targets add -G1 if it's not present.
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");
``
https://github.com/llvm/llvm-project/pull/93814
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)
https://github.com/heiher created
https://github.com/llvm/llvm-project/pull/93814
Although i32 type is illegal in the backend, LA64 has pretty good support for
i32 types by using W instructions.
By adding n32 to the DataLayout string, middle end optimizations will consider
i32 to be a native type. One known effect of this is enabling
LoopStrengthReduce on loops with i32 induction variables. This can be
beneficial because C/C++ code often has loops with i32 induction variables due
to the use of `int` or `unsigned int`.
If this patch exposes performance issues, those are better addressed by tuning
LSR or other passes.
>From 5667b2c24b6e2b277e9478152ae318c4e01d3d09 Mon Sep 17 00:00:00 2001
From: WANG Rui
Date: Wed, 22 May 2024 15:14:28 +0800
Subject: [PATCH] [LoongArch] Adjust LA64 data layout by using n32:64 in layout
string
Although i32 type is illegal in the backend, LA64 has pretty good support for
i32 types by using W instructions.
By adding n32 to the DataLayout string, middle end optimizations will consider
i32 to be a native type. One known effect of this is enabling LoopStrengthReduce
on loops with i32 induction variables. This can be beneficial because C/C++ code
often has loops with i32 induction variables due to the use of `int` or
`unsigned int`.
If this patch exposes performance issues, those are better addressed by tuning
LSR or other passes.
---
clang/lib/Basic/Targets/LoongArch.h | 2 +-
llvm/docs/ReleaseNotes.rst | 4
llvm/lib/IR/AutoUpgrade.cpp | 4 ++--
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp | 2 +-
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 5 +
5 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/clang/lib/Basic/Targets/LoongArch.h
b/clang/lib/Basic/Targets/LoongArch.h
index 68572843f2d74..5fc223483951e 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,7 +133,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
HasUnalignedAccess = true;
-resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
+resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
// TODO: select appropriate ABI.
setABI("lp64d");
}
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 1e1ccb495c366..7acdf22462b36 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -107,6 +107,10 @@ Changes to the Hexagon Backend
Changes to the LoongArch Backend
+* i32 is now a native type in the datalayout string. This enables
+ LoopStrengthReduce for loops with i32 induction variables, among other
+ optimizations.
+
Changes to the MIPS Backend
---
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index a7ed2de6e8a5f..b66c9bfd22932 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL,
StringRef TT) {
return DL.empty() ? std::string("G1") : (DL + "-G1").str();
}
- if (T.isRISCV64()) {
-// Make i32 a native type for 64-bit RISC-V.
+ if (T.isRISCV64() || T.isLoongArch64()) {
+// Make i32 a native type for 64-bit RISC-V and LoongArch.
auto I = DL.find("-n64-");
if (I != StringRef::npos)
return (DL.take_front(I) + "-n32:64-" + DL.drop_front(I + 5)).str();
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 2b2d4e478cc82..60e09bb2f058a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -46,7 +46,7 @@ static cl::opt
static std::string computeDataLayout(const Triple &TT) {
if (TT.isArch64Bit())
-return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
+return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128";
assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
return "e-m:e-p:32:32-i64:64-n32-S128";
}
diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
index 7148e2902fa7a..ca50187e5e5ee 100644
--- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
@@ -63,6 +63,11 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
"riscv64"),
"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+ // Check that LoongArch64 upgrades -n64 to -n32:64.
+ EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128",
+"loongarch64"),
+"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
+
// Check that SPIR && SPIRV targets add -G1 if it's not present.
EXPECT_EQ(UpgradeDataLayou
