[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-12 Thread Alexandros Lamprineas via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

labrinea wrote:

Right, I didn't know that the resolver contains references to every 
target-version declaration that is visible in its translation unit even if the 
definition actually resides in another translation unit. That would be a 
problem if the definition has a mangled name that doesn't match because of the 
alias. Thanks for clarifying!

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-12 Thread Jon Roelofs via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

jroelofs wrote:

FWIW, I think it's okay to change this one: I doubt it will actually break 
anyone but we should get more conservative with this as you get closer to 
finalizing this part of the ACLE.

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-28 Thread Alexandros Lamprineas via cfe-commits 

https://github.com/labrinea updated 
https://github.com/llvm/llvm-project/pull/80540

>From fb56f1c31f7f6fb847b95e0ffe97a39ac76759a9 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas 
Date: Tue, 30 Jan 2024 11:17:55 +
Subject: [PATCH] [TargetParser][AArch64] Add alias for FEAT_RDM.

This patch allows using the name "rdma" as an alias for "rdm".
The name makes its way to target attributes as well as the
command line via the -march and -mcpu options. The motivation
was originally to support this in Function Multi Versioning
but it also makes sense to align with GCC on the command line.
---
 clang/docs/ReleaseNotes.rst   |  5 +
 clang/test/CodeGen/attr-target-version.c  | 12 ++--
 clang/test/Driver/aarch64-rdm.c   |  3 +++
 clang/test/Sema/attr-target-clones-aarch64.c  |  2 +-
 clang/test/SemaCXX/attr-target-version.cpp|  1 +
 .../llvm/TargetParser/AArch64TargetParser.h   | 13 -
 llvm/lib/TargetParser/AArch64TargetParser.cpp | 15 +--
 7 files changed, 37 insertions(+), 14 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 7e16b9f0c67dbd1..6ab31498ff33b9d 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -325,6 +325,11 @@ Arm and AArch64 Support
   improvements for most targets. We have not changed the default behavior for
   ARMv6, but may revisit that decision in the future. Users can restore the old
   behavior with -m[no-]unaligned-access.
+- An alias identifier (rdma) has been added for targeting the AArch64
+  Architecture Extension which uses Rounding Doubling Multiply Accumulate
+  instructions (rdm). The identifier is available on the command line as
+  a feature modifier for -march and -mcpu as well as via target attributes
+  like ``target_version`` or ``target_clones``.
 
 Android Support
 ^^^
diff --git a/clang/test/CodeGen/attr-target-version.c 
b/clang/test/CodeGen/attr-target-version.c
index c27d48f3ecf681d..9eb9f3c73178479 100644
--- a/clang/test/CodeGen/attr-target-version.c
+++ b/clang/test/CodeGen/attr-target-version.c
@@ -25,7 +25,7 @@ int foo() {
 }
 
 inline int __attribute__((target_version("sha1+pmull+f64mm"))) 
fmv_inline(void) { return 1; }
-inline int __attribute__((target_version("fp16+fcma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
+inline int __attribute__((target_version("fp16+fcma+rdma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
 inline int __attribute__((target_version("sha3+i8mm+f32mm"))) fmv_inline(void) 
{ return 12; }
 inline int __attribute__((target_version("dit+sve-ebf16"))) fmv_inline(void) { 
return 8; }
 inline int __attribute__((target_version("dpb+rcpc2 "))) fmv_inline(void) { 
return 6; }
@@ -261,12 +261,12 @@ int hoo(void) {
 // CHECK-NEXT:  resolver_entry:
 // CHECK-NEXT:call void @__init_cpu_features_resolver()
 // CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608256
-// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608256
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608320
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608320
 // CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
 // CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label 
[[RESOLVER_ELSE:%.*]]
 // CHECK:   resolver_return:
-// CHECK-NEXT:ret ptr @fmv_inline._Mfp16Mfp16MfcmaMsme
+// CHECK-NEXT:ret ptr @fmv_inline._MrdmMfp16Mfp16MfcmaMsme
 // CHECK:   resolver_else:
 // CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 // CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064
@@ -575,7 +575,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mfp16Mfp16MfcmaMsme
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MrdmMfp16Mfp16MfcmaMsme
 // CHECK-SAME: () #[[ATTR13:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:ret i32 2
@@ -829,7 +829,7 @@ int hoo(void) {
 // CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+fullfp16,+ls64,+sme,+sme2" }
 // CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+ccpp,+fullfp16,+ls64" }
 // CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
-// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+sme" }
+// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-fea

[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-28 Thread Martin Storsjö via cfe-commits 

mstorsjo wrote:

FYI, see 4b8d9abca7d0280878fb12de331e688ee85d7cd8 for another existing case 
where we already support both `rdm` and `rdma`. But I don't think that case can 
share any of the aliasing logic from here.

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

https://github.com/labrinea updated 
https://github.com/llvm/llvm-project/pull/80540

>From 6f1f4e18de7ebad5e090ea268f3f053562db444c Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas 
Date: Tue, 30 Jan 2024 11:17:55 +
Subject: [PATCH] [TargetParser][AArch64] Add alias for FEAT_RDM.

This patch allows using the name "rdma" as an alias for "rdm".
The name makes its way to target attributes as well as the
command line via the -march and -mcpu options. The motivation
was originally to support this in Function Multi Versioning
but it also makes sense to align with GCC on the command line.
---
 clang/docs/ReleaseNotes.rst   |  5 +
 clang/test/CodeGen/attr-target-version.c  | 12 ++--
 clang/test/Driver/aarch64-rdm.c   |  3 +++
 clang/test/Sema/attr-target-clones-aarch64.c  |  2 +-
 clang/test/SemaCXX/attr-target-version.cpp|  1 +
 .../llvm/TargetParser/AArch64TargetParser.h   | 13 -
 llvm/lib/TargetParser/AArch64TargetParser.cpp | 15 +--
 7 files changed, 37 insertions(+), 14 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index f44fef28b9f17f..530158dda66689 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -333,6 +333,11 @@ Arm and AArch64 Support
   improvements for most targets. We have not changed the default behavior for
   ARMv6, but may revisit that decision in the future. Users can restore the old
   behavior with -m[no-]unaligned-access.
+- An alias identifier (rdma) has been added for targeting the AArch64
+  Architecture Extension which uses Rounding Doubling Multiply Accumulate
+  instructions (rdm). The identifier is available on the command line as
+  a feature modifier for -march and -mcpu as well as via target attributes
+  like ``target_version`` or ``target_clones``.
 
 Android Support
 ^^^
diff --git a/clang/test/CodeGen/attr-target-version.c 
b/clang/test/CodeGen/attr-target-version.c
index ae97977a9144f6..56a42499d0a7ca 100644
--- a/clang/test/CodeGen/attr-target-version.c
+++ b/clang/test/CodeGen/attr-target-version.c
@@ -25,7 +25,7 @@ int foo() {
 }
 
 inline int __attribute__((target_version("sha1+pmull+f64mm"))) 
fmv_inline(void) { return 1; }
-inline int __attribute__((target_version("fp16+fcma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
+inline int __attribute__((target_version("fp16+fcma+rdma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
 inline int __attribute__((target_version("sha3+i8mm+f32mm"))) fmv_inline(void) 
{ return 12; }
 inline int __attribute__((target_version("dit+sve-ebf16"))) fmv_inline(void) { 
return 8; }
 inline int __attribute__((target_version("dpb+rcpc2 "))) fmv_inline(void) { 
return 6; }
@@ -261,12 +261,12 @@ int hoo(void) {
 // CHECK-NEXT:  resolver_entry:
 // CHECK-NEXT:call void @__init_cpu_features_resolver()
 // CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608256
-// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608256
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608320
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608320
 // CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
 // CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label 
[[RESOLVER_ELSE:%.*]]
 // CHECK:   resolver_return:
-// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK:   resolver_else:
 // CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 // CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064
@@ -575,7 +575,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK-SAME: () #[[ATTR13:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:ret i32 2
@@ -829,7 +829,7 @@ int hoo(void) {
 // CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+fullfp16,+ls64,+sme,+sme2" }
 // CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+ccpp,+fullfp16,+ls64" }
 // CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
-// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+sme" }
+// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-feature

[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

https://github.com/labrinea updated 
https://github.com/llvm/llvm-project/pull/80540

>From d2c973c8ebd7605b47a8c5fc928d2d85426c8a6d Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas 
Date: Tue, 30 Jan 2024 11:17:55 +
Subject: [PATCH] [TargetParser][AArch64] Add alias for FEAT_RDM.

This patch allows using the name "rdma" as an alias for "rdm".
The name makes its way to target attributes as well as the
command line via the -march and -mcpu options. The motivation
was originally to support this in Function Multi Versioning
but it also makes sense to align with GCC on the command line.
---
 clang/docs/ReleaseNotes.rst   |  5 +
 clang/test/CodeGen/attr-target-version.c  | 12 ++--
 clang/test/Driver/aarch64-rdm.c   |  3 +++
 clang/test/Sema/attr-target-clones-aarch64.c  |  2 +-
 clang/test/SemaCXX/attr-target-version.cpp|  1 +
 .../llvm/TargetParser/AArch64TargetParser.h   | 13 -
 llvm/lib/TargetParser/AArch64TargetParser.cpp | 15 +--
 7 files changed, 37 insertions(+), 14 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index f44fef28b9f17f..530158dda66689 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -333,6 +333,11 @@ Arm and AArch64 Support
   improvements for most targets. We have not changed the default behavior for
   ARMv6, but may revisit that decision in the future. Users can restore the old
   behavior with -m[no-]unaligned-access.
+- An alias identifier (rdma) has been added for targeting the AArch64
+  Architecture Extension which uses Rounding Doubling Multiply Accumulate
+  instructions (rdm). The identifier is available on the command line as
+  a feature modifier for -march and -mcpu as well as via target attributes
+  like ``target_version`` or ``target_clones``.
 
 Android Support
 ^^^
diff --git a/clang/test/CodeGen/attr-target-version.c 
b/clang/test/CodeGen/attr-target-version.c
index ae97977a9144f6..56a42499d0a7ca 100644
--- a/clang/test/CodeGen/attr-target-version.c
+++ b/clang/test/CodeGen/attr-target-version.c
@@ -25,7 +25,7 @@ int foo() {
 }
 
 inline int __attribute__((target_version("sha1+pmull+f64mm"))) 
fmv_inline(void) { return 1; }
-inline int __attribute__((target_version("fp16+fcma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
+inline int __attribute__((target_version("fp16+fcma+rdma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
 inline int __attribute__((target_version("sha3+i8mm+f32mm"))) fmv_inline(void) 
{ return 12; }
 inline int __attribute__((target_version("dit+sve-ebf16"))) fmv_inline(void) { 
return 8; }
 inline int __attribute__((target_version("dpb+rcpc2 "))) fmv_inline(void) { 
return 6; }
@@ -261,12 +261,12 @@ int hoo(void) {
 // CHECK-NEXT:  resolver_entry:
 // CHECK-NEXT:call void @__init_cpu_features_resolver()
 // CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608256
-// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608256
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608320
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608320
 // CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
 // CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label 
[[RESOLVER_ELSE:%.*]]
 // CHECK:   resolver_return:
-// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK:   resolver_else:
 // CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 // CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064
@@ -575,7 +575,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK-SAME: () #[[ATTR13:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:ret i32 2
@@ -829,7 +829,7 @@ int hoo(void) {
 // CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+fullfp16,+ls64,+sme,+sme2" }
 // CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+ccpp,+fullfp16,+ls64" }
 // CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
-// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+sme" }
+// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-feature

[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

labrinea wrote:

ping

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Jon Roelofs via cfe-commits 

https://github.com/jroelofs approved this pull request.


https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

labrinea wrote:

Thanks!

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

https://github.com/labrinea updated 
https://github.com/llvm/llvm-project/pull/80540

>From 5354d6c6736f84881466b6b5b99479137eddbf29 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas 
Date: Tue, 30 Jan 2024 11:17:55 +
Subject: [PATCH] [TargetParser][AArch64] Add alias for FEAT_RDM.

This patch allows using the name "rdma" as an alias for "rdm".
The name makes its way to target attributes as well as the
command line via the -march and -mcpu options. The motivation
was originally to support this in Function Multi Versioning
but it also makes sense to align with GCC on the command line.
---
 clang/docs/ReleaseNotes.rst   |  5 +
 clang/test/CodeGen/attr-target-version.c  | 12 ++--
 clang/test/Driver/aarch64-rdm.c   |  3 +++
 clang/test/Sema/attr-target-clones-aarch64.c  |  2 +-
 clang/test/SemaCXX/attr-target-version.cpp|  1 +
 .../llvm/TargetParser/AArch64TargetParser.h   | 13 -
 llvm/lib/TargetParser/AArch64TargetParser.cpp | 15 +--
 7 files changed, 37 insertions(+), 14 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index cfe0ac6a5dca61..6f6ce7c68a7a71 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -346,6 +346,11 @@ Arm and AArch64 Support
   improvements for most targets. We have not changed the default behavior for
   ARMv6, but may revisit that decision in the future. Users can restore the old
   behavior with -m[no-]unaligned-access.
+- An alias identifier (rdma) has been added for targeting the AArch64
+  Architecture Extension which uses Rounding Doubling Multiply Accumulate
+  instructions (rdm). The identifier is available on the command line as
+  a feature modifier for -march and -mcpu as well as via target attributes
+  like ``target_version`` or ``target_clones``.
 
 Android Support
 ^^^
diff --git a/clang/test/CodeGen/attr-target-version.c 
b/clang/test/CodeGen/attr-target-version.c
index ae97977a9144f6..56a42499d0a7ca 100644
--- a/clang/test/CodeGen/attr-target-version.c
+++ b/clang/test/CodeGen/attr-target-version.c
@@ -25,7 +25,7 @@ int foo() {
 }
 
 inline int __attribute__((target_version("sha1+pmull+f64mm"))) 
fmv_inline(void) { return 1; }
-inline int __attribute__((target_version("fp16+fcma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
+inline int __attribute__((target_version("fp16+fcma+rdma+sme+ fp16 "))) 
fmv_inline(void) { return 2; }
 inline int __attribute__((target_version("sha3+i8mm+f32mm"))) fmv_inline(void) 
{ return 12; }
 inline int __attribute__((target_version("dit+sve-ebf16"))) fmv_inline(void) { 
return 8; }
 inline int __attribute__((target_version("dpb+rcpc2 "))) fmv_inline(void) { 
return 6; }
@@ -261,12 +261,12 @@ int hoo(void) {
 // CHECK-NEXT:  resolver_entry:
 // CHECK-NEXT:call void @__init_cpu_features_resolver()
 // CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608256
-// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608256
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 4398048608320
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608320
 // CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
 // CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label 
[[RESOLVER_ELSE:%.*]]
 // CHECK:   resolver_return:
-// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-NEXT:ret ptr @fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK:   resolver_else:
 // CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 // CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064
@@ -575,7 +575,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16Msme
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16MrdmMsme
 // CHECK-SAME: () #[[ATTR13:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:ret i32 2
@@ -829,7 +829,7 @@ int hoo(void) {
 // CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+fullfp16,+ls64,+sme,+sme2" }
 // CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+ccpp,+fullfp16,+ls64" }
 // CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
-// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+sme" }
+// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-feature

[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-03-01 Thread Alexandros Lamprineas via cfe-commits 

https://github.com/labrinea closed 
https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-03 Thread via cfe-commits 

llvmbot wrote:



@llvm/pr-subscribers-clang

@llvm/pr-subscribers-clang-driver

Author: Alexandros Lamprineas (labrinea)


Changes

This patch allows using the name "rdma" as an alias for "rdm". The name makes 
its way to target attributes as well as the command line via the -march and 
-mcpu options. The motivation was originally to support this in Function Multi 
Versioning but it also makes sense to align with GCC on the command line.

---
Full diff: https://github.com/llvm/llvm-project/pull/80540.diff


7 Files Affected:

- (modified) clang/docs/ReleaseNotes.rst (+6) 
- (modified) clang/test/CodeGen/attr-target-version.c (+3-3) 
- (modified) clang/test/Driver/aarch64-rdm.c (+3) 
- (modified) clang/test/Sema/attr-target-clones-aarch64.c (+1-1) 
- (modified) clang/test/SemaCXX/attr-target-version.cpp (+1) 
- (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+8-5) 
- (modified) llvm/lib/TargetParser/AArch64TargetParser.cpp (+13-2) 


``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index e634db3c718c9..5d525b74c056d 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -222,6 +222,12 @@ X86 Support
 Arm and AArch64 Support
 ^^^
 
+- An alias identifier (rdma) has been added for targeting the AArch64
+  Architecture Extension which uses Rounding Doubling Multiply Accumulate
+  instructions (rdm). The identifier is available on the command line as
+  a feature modifier for -march and -mcpu as well as via target attributes
+  like ``target_version`` or ``target_clones``.
+
 Android Support
 ^^^
 
diff --git a/clang/test/CodeGen/attr-target-version.c 
b/clang/test/CodeGen/attr-target-version.c
index 2a96697e4291b..2ad6f3a5b0c44 100644
--- a/clang/test/CodeGen/attr-target-version.c
+++ b/clang/test/CodeGen/attr-target-version.c
@@ -39,7 +39,7 @@ inline int 
__attribute__((target_version("memtag3+rcpc3+mops"))) fmv_inline(void
 inline int __attribute__((target_version("aes+dotprod"))) fmv_inline(void) { 
return 13; }
 inline int __attribute__((target_version("simd+fp16fml"))) fmv_inline(void) { 
return 14; }
 inline int __attribute__((target_version("fp+sm4"))) fmv_inline(void) { return 
15; }
-inline int __attribute__((target_version("lse+rdm"))) fmv_inline(void) { 
return 16; }
+inline int __attribute__((target_version("lse+rdma"))) fmv_inline(void) { 
return 16; }
 inline int __attribute__((target_version("default"))) fmv_inline(void) { 
return 3; }
 
 __attribute__((target_version("ls64"))) int fmv_e(void);
@@ -385,7 +385,7 @@ int hoo(void) {
 // CHECK-NEXT:[[TMP59:%.*]] = and i1 true, [[TMP58]]
 // CHECK-NEXT:br i1 [[TMP59]], label [[RESOLVER_RETURN27:%.*]], label 
[[RESOLVER_ELSE28:%.*]]
 // CHECK:   resolver_return27:
-// CHECK-NEXT:ret ptr @fmv_inline._MlseMrdm
+// CHECK-NEXT:ret ptr @fmv_inline._MlseMrdma
 // CHECK:   resolver_else28:
 // CHECK-NEXT:[[TMP60:%.*]] = load i64, ptr @__aarch64_cpu_features, align 
8
 // CHECK-NEXT:[[TMP61:%.*]] = and i64 [[TMP60]], 32
@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma
 // CHECK-SAME: () #[[ATTR25:[0-9]+]] {
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:ret i32 16
diff --git a/clang/test/Driver/aarch64-rdm.c b/clang/test/Driver/aarch64-rdm.c
index f2542b381e7c2..62e1a4def4ce1 100644
--- a/clang/test/Driver/aarch64-rdm.c
+++ b/clang/test/Driver/aarch64-rdm.c
@@ -1,13 +1,16 @@
 // RUN: %clang --target=aarch64-none-elf -march=armv8a+rdm -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
+// RUN: %clang --target=aarch64-none-elf -march=armv8a+rdma -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
 // RUN: %clang --target=aarch64-none-elf -mcpu=generic+rdm -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
 // RUN: %clang --target=aarch64-none-elf -mcpu=falkor -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
 // RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
 // CHECK-RDM: "-target-feature" "+rdm"
 
 // RUN: %clang --target=aarch64-none-elf -march=armv8a+nordm -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-NORDM %s
+// RUN: %clang --target=aarch64-none-elf -march=armv8a+nordma -### -c %s 2>&1 
| FileCheck --check-prefix=CHECK-NORDM %s
 // RUN: %clang --target=aarch64-none-elf -mcpu=generic+nordm -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-NORDM %s
 // CHECK-NORDM-NOT: "-target-feature" "+rdm"
 //
 // RUN: %clang --target=aarch64-none-elf -march=armv8.1a -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-RDM %s
 // RUN: %clang --target=aarch64-none-elf -march=armv8.1a+nordm -### -c %s 2>&1 
| FileCheck --check-prefix=CHECK-NORDM-DEFAULT %s
+// RUN: %clang --target=aarch64-none-elf -march=armv8.1a+nordma -### -c %s 
2>&1 | FileCheck --check-prefix=CHECK-NORDM-DEFAULT %s
 //

[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-09 Thread Jon Roelofs via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

jroelofs wrote:

It seems potentially problematic that this leaks into the mangling. Maybe these 
ought to be canonicalized in `AppendTargetVersionMangling` and 
`AppendTargetClonesMangling` with a `resolveExtAlias` call.

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-09 Thread Jon Roelofs via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

jroelofs wrote:

What does GCC do?

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-09 Thread Jon Roelofs via cfe-commits 


@@ -39,7 +39,7 @@ inline int 
__attribute__((target_version("memtag3+rcpc3+mops"))) fmv_inline(void
 inline int __attribute__((target_version("aes+dotprod"))) fmv_inline(void) { 
return 13; }
 inline int __attribute__((target_version("simd+fp16fml"))) fmv_inline(void) { 
return 14; }
 inline int __attribute__((target_version("fp+sm4"))) fmv_inline(void) { return 
15; }
-inline int __attribute__((target_version("lse+rdm"))) fmv_inline(void) { 
return 16; }
+inline int __attribute__((target_version("lse+rdma"))) fmv_inline(void) { 
return 16; }

jroelofs wrote:

If there isn't one, mind adding another test to make sure that the old name 
still works?

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-10 Thread Alexandros Lamprineas via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

labrinea wrote:

I raised this with the GCC team, I don't have an answer yet but I believe GCC 
only accepts "rdma" on the attribute (so I suppose that makes its way to the 
mangled name?). I remember you raised this matter again in a previous review, 
when we changed priorities and the mangling was affected. That is a good point 
but I think first we need to agree whether those functions are part of the ABI 
or not. Right now I don't see why they need to be. We could even make then have 
internal linkage, no? If I am mistaken a counter example would help, thanks!

https://github.com/llvm/llvm-project/pull/80540
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[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)

2024-02-10 Thread Jon Roelofs via cfe-commits 


@@ -673,7 +673,7 @@ int hoo(void) {
 //
 //
 // CHECK: Function Attrs: noinline nounwind optnone
-// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
+// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdma

jroelofs wrote:

I think they are part of ABI, and giving them internal linkage is undesirable, 
IMO, as that would break an important use case: splitting the implementation 
across multiple TUs. https://godbolt.org/z/3zaM9MzPb

https://github.com/llvm/llvm-project/pull/80540
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