[clang] [llvm] [mlir] [AMDGPU] - Add address space for strided buffers (PR #74471)
@@ -864,6 +865,17 @@ supported for the ``amdgcn`` target. (bits `127:96`). The specific interpretation of these fields varies by the target architecture and is detailed in the ISA descriptions. +**Buffer Strided Pointer** + The buffer index pointer is an experimental address space. It is supposed to + model a 128-bit buffer descriptor and a 32-bit offset, like the **Buffer Fat + Pointer**. Additionally, it contains an index into the descriptor, which + allows the direct addressing of structured elements. + + The buffer descriptor must be *raw*: + the stride is the size of a structured element, the "add tid" flag must be 0, the + swizzle eneable bits must be off, and the extent (NumRecords) must be measured in nhaehnle wrote: Typo: enable Also, drop the part about the extent (NumRecords) -- that's not a requirement of the compiler, it's a requirement of the HW and should be implied by stating that the buffer descriptor is "raw". (And it is also incorrect on IIRC gfx8, which had NUM_RECORDS always in units of bytes) https://github.com/llvm/llvm-project/pull/74471 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [mlir] [AMDGPU] - Add address space for strided buffers (PR #74471)
https://github.com/nhaehnle commented: Thanks! Since the plan for now is to have the lowering in LLPC, it's unclear to me how many of the codegen-related changes we actually want in here, though I suppose they don't hurt. https://github.com/llvm/llvm-project/pull/74471 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [mlir] [AMDGPU] - Add address space for strided buffers (PR #74471)
OutOfCache wrote: > How do you intend to rewrite these operations down to the underlying > instructions? > > That is, what's your planned equivalent to https://reviews.llvm.org/D158463 ? Thank you for the link to the code review, I was not aware of your changes before. Up until now, we intended to use the address space in llpc exclusively and lower the pointers to buffer load instructions in `PatchBufferOp`. If we also need to lower these pointers like you did for the fat buffers, maybe we can extend your new pass to also handle these strided buffer pointers? https://github.com/llvm/llvm-project/pull/74471 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
