https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/88071
>From c94d444b4317706c7434853c0c3490826bdbc110 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 8 Apr 2024 19:10:37 -0500
Subject: [PATCH] [Offload][NFC] Remove `omp_` prefix from offloading entries
Summary:
These entires are generic for offloading with the new driver now. Having
the `omp` prefix was a historical artifact and is confusing when used
for CUDA. This patch just renames them for now, future patches will
rework the binary format to make it more common.
---
clang/test/CodeGenCUDA/offloading-entries.cu | 82 +--
.../OpenMP/declare_target_link_codegen.cpp| 10 +--
.../declare_target_visibility_codegen.cpp | 8 +-
.../OpenMP/target_codegen_registration.cpp| 48 +--
clang/test/OpenMP/target_indirect_codegen.cpp | 8 +-
llvm/lib/Frontend/Offloading/Utility.cpp | 6 +-
.../Frontend/OpenMPIRBuilderTest.cpp | 10 +--
.../omptarget-declare-target-llvm-host.mlir | 60 +++---
8 files changed, 116 insertions(+), 116 deletions(-)
diff --git a/clang/test/CodeGenCUDA/offloading-entries.cu
b/clang/test/CodeGenCUDA/offloading-entries.cu
index 4f5cf65ecd0bde..ec21f018607ff0 100644
--- a/clang/test/CodeGenCUDA/offloading-entries.cu
+++ b/clang/test/CodeGenCUDA/offloading-entries.cu
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-globals --global-value-regex ".omp_offloading.entry.*"
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-globals --global-value-regex ".offloading.entry.*"
// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -fgpu-rdc \
// RUN: --offload-new-driver -emit-llvm -o - -x cuda %s | FileCheck \
// RUN: --check-prefix=CUDA %s
@@ -15,49 +15,49 @@
#include "Inputs/cuda.h"
//.
-// CUDA: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8]
c"_Z3foov\00"
-// CUDA: @.omp_offloading.entry._Z3foov = weak constant
%struct.__tgt_offload_entry { ptr @_Z18__device_stub__foov, ptr
@.omp_offloading.entry_name, i64 0, i32 0, i32 0 }, section
"cuda_offloading_entries", align 1
-// CUDA: @.omp_offloading.entry_name.1 = internal unnamed_addr constant [11 x
i8] c"_Z6kernelv\00"
-// CUDA: @.omp_offloading.entry._Z6kernelv = weak constant
%struct.__tgt_offload_entry { ptr @_Z21__device_stub__kernelv, ptr
@.omp_offloading.entry_name.1, i64 0, i32 0, i32 0 }, section
"cuda_offloading_entries", align 1
-// CUDA: @.omp_offloading.entry_name.2 = internal unnamed_addr constant [4 x
i8] c"var\00"
-// CUDA: @.omp_offloading.entry.var = weak constant
%struct.__tgt_offload_entry { ptr @var, ptr @.omp_offloading.entry_name.2, i64
4, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
-// CUDA: @.omp_offloading.entry_name.3 = internal unnamed_addr constant [5 x
i8] c"surf\00"
-// CUDA: @.omp_offloading.entry.surf = weak constant
%struct.__tgt_offload_entry { ptr @surf, ptr @.omp_offloading.entry_name.3, i64
4, i32 2, i32 1 }, section "cuda_offloading_entries", align 1
-// CUDA: @.omp_offloading.entry_name.4 = internal unnamed_addr constant [4 x
i8] c"tex\00"
-// CUDA: @.omp_offloading.entry.tex = weak constant
%struct.__tgt_offload_entry { ptr @tex, ptr @.omp_offloading.entry_name.4, i64
4, i32 3, i32 1 }, section "cuda_offloading_entries", align 1
+// CUDA: @.offloading.entry_name = internal unnamed_addr constant [8 x i8]
c"_Z3foov\00"
+// CUDA: @.offloading.entry._Z3foov = weak constant
%struct.__tgt_offload_entry { ptr @_Z18__device_stub__foov, ptr
@.offloading.entry_name, i64 0, i32 0, i32 0 }, section
"cuda_offloading_entries", align 1
+// CUDA: @.offloading.entry_name.1 = internal unnamed_addr constant [11 x i8]
c"_Z6kernelv\00"
+// CUDA: @.offloading.entry._Z6kernelv = weak constant
%struct.__tgt_offload_entry { ptr @_Z21__device_stub__kernelv, ptr
@.offloading.entry_name.1, i64 0, i32 0, i32 0 }, section
"cuda_offloading_entries", align 1
+// CUDA: @.offloading.entry_name.2 = internal unnamed_addr constant [4 x i8]
c"var\00"
+// CUDA: @.offloading.entry.var = weak constant %struct.__tgt_offload_entry {
ptr @var, ptr @.offloading.entry_name.2, i64 4, i32 0, i32 0 }, section
"cuda_offloading_entries", align 1
+// CUDA: @.offloading.entry_name.3 = internal unnamed_addr constant [5 x i8]
c"surf\00"
+// CUDA: @.offloading.entry.surf = weak constant %struct.__tgt_offload_entry {
ptr @surf, ptr @.offloading.entry_name.3, i64 4, i32 2, i32 1 }, section
"cuda_offloading_entries", align 1
+// CUDA: @.offloading.entry_name.4 = internal unnamed_addr constant [4 x i8]
c"tex\00"
+// CUDA: @.offloading.entry.tex = weak constant %struct.__tgt_offload_entry {
ptr @tex, ptr @.offloading.entry_name.4, i64 4, i32 3, i32 1 }, section
"cuda_offloading_entries", align 1
//.
-// HIP: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8]
c"_Z3foov\00"
-// HIP: @.omp_offloading.en
